#define REG_DMA             0x04
#define REG_COUNTER         0x9000
#define REG_CONTROL         0x9040
#define CMD_COUNTER_START   0x1
#define CMD_LATENCY_STOP    0xf0000000

/* divide by four to avoid word addressing */
#define WR32(buffer, addr, value) buffer[addr / 4] = value;

kernel void
wait_and_write (volatile global uint *from_fpga, volatile global uint *to_fpga, global uint *output)
{
    if (get_global_id (0) == 0) {
        uint count;

        count = 0;

        /* The following does not start the DMA. We will exit with the count
         * hitting the limit */
        /* WR32 (to_fpga, REG_DMA, 1); */

        /* wait for FPGA to write */
        while (from_fpga[1] == 42 && count < 10000000)
            count++;

        WR32 (to_fpga, REG_DMA, 0);
        output[0] = from_fpga[1];
        output[1] = count;
    }
}