cli.c 93 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101
  1. #define _POSIX_C_SOURCE 200112L
  2. #define _BSD_SOURCE
  3. #include <stdio.h>
  4. #include <stdlib.h>
  5. #include <string.h>
  6. #include <strings.h>
  7. #include <stdint.h>
  8. #include <stdarg.h>
  9. #include <fcntl.h>
  10. #include <unistd.h>
  11. #include <sys/time.h>
  12. #include <sys/ioctl.h>
  13. #include <sys/mman.h>
  14. #include <errno.h>
  15. #include <alloca.h>
  16. #include <arpa/inet.h>
  17. #include <sys/types.h>
  18. #include <sys/stat.h>
  19. #include <dirent.h>
  20. #include <pthread.h>
  21. #include <signal.h>
  22. #include <getopt.h>
  23. #include <fastwriter.h>
  24. #include "pcitool/sysinfo.h"
  25. #include "pcitool/formaters.h"
  26. //#include "pci.h"
  27. #include "tools.h"
  28. #include "kernel.h"
  29. #include "error.h"
  30. /* defines */
  31. #define MAX_KBUF 14
  32. //#define BIGBUFSIZE (512*1024*1024)
  33. #define BIGBUFSIZE (1024*1024)
  34. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  35. #define LINE_WIDTH 80
  36. #define SEPARATOR_WIDTH 2
  37. #define BLOCK_SEPARATOR_WIDTH 2
  38. #define BLOCK_SIZE 8
  39. #define BENCHMARK_ITERATIONS 128
  40. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  41. #define isnumber pcilib_isnumber
  42. #define isxnumber pcilib_isxnumber
  43. #define isnumber_n pcilib_isnumber_n
  44. #define isxnumber_n pcilib_isxnumber_n
  45. typedef uint8_t access_t;
  46. typedef enum {
  47. GRAB_MODE_GRAB = 1,
  48. GRAB_MODE_TRIGGER = 2
  49. } GRAB_MODE;
  50. typedef enum {
  51. MODE_INVALID,
  52. MODE_INFO,
  53. MODE_LIST,
  54. MODE_BENCHMARK,
  55. MODE_READ,
  56. MODE_READ_REGISTER,
  57. MODE_WRITE,
  58. MODE_WRITE_REGISTER,
  59. MODE_RESET,
  60. MODE_GRAB,
  61. MODE_START_DMA,
  62. MODE_STOP_DMA,
  63. MODE_LIST_DMA,
  64. MODE_LIST_DMA_BUFFERS,
  65. MODE_READ_DMA_BUFFER,
  66. MODE_ENABLE_IRQ,
  67. MODE_DISABLE_IRQ,
  68. MODE_ACK_IRQ,
  69. MODE_WAIT_IRQ,
  70. MODE_ALLOC_KMEM,
  71. MODE_LIST_KMEM,
  72. MODE_READ_KMEM,
  73. MODE_FREE_KMEM
  74. } MODE;
  75. typedef enum {
  76. ACCESS_BAR,
  77. ACCESS_DMA,
  78. ACCESS_FIFO,
  79. ACCESS_CONFIG
  80. } ACCESS_MODE;
  81. typedef enum {
  82. FLAG_MULTIPACKET = 1,
  83. FLAG_WAIT = 2
  84. } FLAGS;
  85. typedef enum {
  86. FORMAT_DEFAULT = 0,
  87. FORMAT_RAW,
  88. FORMAT_HEADER,
  89. FORMAT_RINGFS
  90. } FORMAT;
  91. typedef enum {
  92. PARTITION_UNKNOWN,
  93. PARTITION_RAW,
  94. PARTITION_EXT4,
  95. PARTITION_NULL
  96. } PARTITION;
  97. typedef enum {
  98. OPT_DEVICE = 'd',
  99. OPT_MODEL = 'm',
  100. OPT_BAR = 'b',
  101. OPT_ACCESS = 'a',
  102. OPT_ENDIANESS = 'e',
  103. OPT_SIZE = 's',
  104. OPT_OUTPUT = 'o',
  105. OPT_TIMEOUT = 't',
  106. OPT_INFO = 'i',
  107. OPT_LIST = 'l',
  108. OPT_READ = 'r',
  109. OPT_WRITE = 'w',
  110. OPT_GRAB = 'g',
  111. OPT_QUIETE = 'q',
  112. OPT_HELP = 'h',
  113. OPT_RESET = 128,
  114. OPT_BENCHMARK,
  115. OPT_TRIGGER,
  116. OPT_DATA_TYPE,
  117. OPT_EVENT,
  118. OPT_TRIGGER_RATE,
  119. OPT_TRIGGER_TIME,
  120. OPT_RUN_TIME,
  121. OPT_FORMAT,
  122. OPT_BUFFER,
  123. OPT_THREADS,
  124. OPT_LIST_DMA,
  125. OPT_LIST_DMA_BUFFERS,
  126. OPT_READ_DMA_BUFFER,
  127. OPT_START_DMA,
  128. OPT_STOP_DMA,
  129. OPT_ENABLE_IRQ,
  130. OPT_DISABLE_IRQ,
  131. OPT_ACK_IRQ,
  132. OPT_WAIT_IRQ,
  133. OPT_ITERATIONS,
  134. OPT_ALLOC_KMEM,
  135. OPT_LIST_KMEM,
  136. OPT_FREE_KMEM,
  137. OPT_READ_KMEM,
  138. OPT_BLOCK_SIZE,
  139. OPT_ALIGNMENT,
  140. OPT_TYPE,
  141. OPT_FORCE,
  142. OPT_VERIFY,
  143. OPT_WAIT,
  144. OPT_MULTIPACKET,
  145. OPT_VERBOSE
  146. } OPTIONS;
  147. static struct option long_options[] = {
  148. {"device", required_argument, 0, OPT_DEVICE },
  149. {"model", required_argument, 0, OPT_MODEL },
  150. {"bar", required_argument, 0, OPT_BAR },
  151. {"access", required_argument, 0, OPT_ACCESS },
  152. {"endianess", required_argument, 0, OPT_ENDIANESS },
  153. {"size", required_argument, 0, OPT_SIZE },
  154. {"output", required_argument, 0, OPT_OUTPUT },
  155. {"timeout", required_argument, 0, OPT_TIMEOUT },
  156. {"iterations", required_argument, 0, OPT_ITERATIONS },
  157. {"info", no_argument, 0, OPT_INFO },
  158. {"list", no_argument, 0, OPT_LIST },
  159. {"reset", no_argument, 0, OPT_RESET },
  160. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  161. {"read", optional_argument, 0, OPT_READ },
  162. {"write", optional_argument, 0, OPT_WRITE },
  163. {"grab", optional_argument, 0, OPT_GRAB },
  164. {"trigger", optional_argument, 0, OPT_TRIGGER },
  165. {"data", required_argument, 0, OPT_DATA_TYPE },
  166. {"event", required_argument, 0, OPT_EVENT },
  167. {"run-time", required_argument, 0, OPT_RUN_TIME },
  168. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  169. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  170. {"format", required_argument, 0, OPT_FORMAT },
  171. {"buffer", optional_argument, 0, OPT_BUFFER },
  172. {"threads", optional_argument, 0, OPT_THREADS },
  173. {"start-dma", required_argument, 0, OPT_START_DMA },
  174. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  175. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  176. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  177. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  178. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  179. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  180. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  181. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  182. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  183. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  184. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  185. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  186. {"type", required_argument, 0, OPT_TYPE },
  187. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  188. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  189. {"quiete", no_argument, 0, OPT_QUIETE },
  190. {"verbose", optional_argument, 0, OPT_VERBOSE },
  191. {"force", no_argument, 0, OPT_FORCE },
  192. {"verify", no_argument, 0, OPT_VERIFY },
  193. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  194. {"wait", no_argument, 0, OPT_WAIT },
  195. {"help", no_argument, 0, OPT_HELP },
  196. { 0, 0, 0, 0 }
  197. };
  198. void Usage(int argc, char *argv[], const char *format, ...) {
  199. if (format) {
  200. va_list ap;
  201. va_start(ap, format);
  202. printf("Error %i: ", errno);
  203. vprintf(format, ap);
  204. printf("\n");
  205. va_end(ap);
  206. printf("\n");
  207. }
  208. printf(
  209. "Usage:\n"
  210. " %s <mode> [options] [hex data]\n"
  211. " Modes:\n"
  212. " -i - Device Info\n"
  213. " -l[l] - List (detailed) Data Banks & Registers\n"
  214. " -r <addr|reg|dmaX> - Read Data/Register\n"
  215. " -w <addr|reg|dmaX> - Write Data/Register\n"
  216. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  217. " --reset - Reset board\n"
  218. " --help - Help message\n"
  219. "\n"
  220. " Event Modes:\n"
  221. " --trigger [event] - Trigger Events\n"
  222. " -g [event] - Grab Events\n"
  223. "\n"
  224. " IRQ Modes:\n"
  225. " --enable-irq [type] - Enable IRQs\n"
  226. " --disable-irq [type] - Disable IRQs\n"
  227. " --acknowledge-irq <source> - Clean IRQ queue\n"
  228. " --wait-irq <source> - Wait for IRQ\n"
  229. " DMA Modes:\n"
  230. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  231. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  232. " --list-dma-engines - List active DMA engines\n"
  233. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  234. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  235. "\n"
  236. " Kernel Modes:\n"
  237. " --list-kernel-memory [use] - List kernel buffers\n"
  238. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  239. " block is specified as: use:block_number\n"
  240. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  241. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  242. " dma - Remove all buffers allocated by DMA subsystem\n"
  243. " #number - Remove all buffers with the specified use id\n"
  244. "\n"
  245. " Addressing:\n"
  246. " -d <device> - FPGA device (/dev/fpga0)\n"
  247. " -m <model> - Memory model (autodetected)\n"
  248. " pci - Plain\n"
  249. " ipecamera - IPE Camera\n"
  250. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  251. "\n"
  252. " Options:\n"
  253. " -s <size> - Number of words (default: 1)\n"
  254. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  255. " -e <l|b> - Endianess Little/Big (default: host)\n"
  256. " -o <file> - Append output to file (default: stdout)\n"
  257. " -t <timeout|unlimited> - Timeout in microseconds\n"
  258. " --check - Verify write operations\n"
  259. "\n"
  260. " Event Options:\n"
  261. " --event <evt> - Specifies event for trigger and grab modes\n"
  262. " --data <type> - Data type to request for the events\n"
  263. " --run-time <us> - Limit time to grab/trigger events\n"
  264. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  265. " --trigger-rate <tps> - Generate tps triggers per second\n"
  266. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  267. " -s <num|unlimited> - Number of events to grab and trigger\n"
  268. " --format [type] - Specifies how event data should be stored\n"
  269. " raw - Just write all events sequentially\n"
  270. " add_header - Prefix events with 512 bit header:\n"
  271. " event(64), data(64), nope(64), size(64)\n"
  272. " seqnum(64), offset(64), timestamp(128)\n"
  273. //" ringfs - Write to RingFS\n"
  274. " --buffer [size] - Request data buffering, size in MB\n"
  275. " --threads [num] - Allow multithreaded processing\n"
  276. "\n"
  277. " DMA Options:\n"
  278. " --multipacket - Read multiple packets\n"
  279. " --wait - Wait until data arrives\n"
  280. "\n"
  281. " Kernel Options:\n"
  282. " --type <type> - Type of kernel memory to allocate\n"
  283. " consistent - Consistent memory\n"
  284. " s2c - DMA S2C (write) memory\n"
  285. " c2s - DMA C2S (read) memory\n"
  286. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  287. " -s <size> - Number of buffers to allocate (default: 1)\n"
  288. " --allignment <alignment> - Buffer alignment (default: page)\n"
  289. "\n"
  290. " Information:\n"
  291. " --verbose [level] - Announce details of ongoing operations\n"
  292. " -q - Quiete mode (suppress warnings)\n"
  293. "\n"
  294. " Data:\n"
  295. " Data can be specified as sequence of hexdecimal number or\n"
  296. " a single value prefixed with '*'. In this case it will be\n"
  297. " replicated the specified amount of times\n"
  298. "\n\n",
  299. argv[0]);
  300. exit(0);
  301. }
  302. static int StopFlag = 0;
  303. static void signal_exit_handler(int signo) {
  304. if (++StopFlag > 2)
  305. exit(-1);
  306. }
  307. void Error(const char *format, ...) {
  308. va_list ap;
  309. va_start(ap, format);
  310. printf("Error %i: ", errno);
  311. vprintf(format, ap);
  312. if (errno) printf("\n errno: %s", strerror(errno));
  313. printf("\n\n");
  314. va_end(ap);
  315. exit(-1);
  316. }
  317. void Silence(const char *format, ...) {
  318. }
  319. void List(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, int details) {
  320. int i,j;
  321. pcilib_register_bank_description_t *banks;
  322. pcilib_register_description_t *registers;
  323. pcilib_event_description_t *events;
  324. pcilib_event_data_type_description_t *types;
  325. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  326. const pcilib_dma_info_t *dma_info = pcilib_get_dma_info(handle);
  327. for (i = 0; i < PCILIB_MAX_BANKS; i++) {
  328. if (board_info->bar_length[i] > 0) {
  329. printf(" BAR %d - ", i);
  330. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  331. case IORESOURCE_IO: printf(" IO"); break;
  332. case IORESOURCE_MEM: printf("MEM"); break;
  333. case IORESOURCE_IRQ: printf("IRQ"); break;
  334. case IORESOURCE_DMA: printf("DMA"); break;
  335. }
  336. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  337. else printf("32");
  338. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  339. }
  340. }
  341. printf("\n");
  342. if ((dma_info)&&(dma_info->engines)) {
  343. printf("DMA Engines: \n");
  344. for (i = 0; dma_info->engines[i]; i++) {
  345. pcilib_dma_engine_description_t *engine = dma_info->engines[i];
  346. printf(" DMA %2d ", engine->addr);
  347. switch (engine->direction) {
  348. case PCILIB_DMA_FROM_DEVICE:
  349. printf("C2S");
  350. break;
  351. case PCILIB_DMA_TO_DEVICE:
  352. printf("S2C");
  353. break;
  354. case PCILIB_DMA_BIDIRECTIONAL:
  355. printf("BI ");
  356. break;
  357. }
  358. printf(" - Type: ");
  359. switch (engine->type) {
  360. case PCILIB_DMA_TYPE_BLOCK:
  361. printf("Block");
  362. break;
  363. case PCILIB_DMA_TYPE_PACKET:
  364. printf("Packet");
  365. break;
  366. default:
  367. printf("Unknown");
  368. }
  369. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  370. }
  371. printf("\n");
  372. }
  373. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  374. else banks = model_info->banks;
  375. if (banks) {
  376. printf("Banks: \n");
  377. for (i = 0; banks[i].access; i++) {
  378. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  379. if ((banks[i].description)&&(banks[i].description[0])) {
  380. printf(": %s", banks[i].description);
  381. }
  382. printf("\n");
  383. }
  384. printf("\n");
  385. }
  386. if (bank == (char*)-1) registers = NULL;
  387. else registers = model_info->registers;
  388. if (registers) {
  389. pcilib_register_bank_addr_t bank_addr = 0;
  390. if (bank) {
  391. pcilib_register_bank_t bank_id = pcilib_find_bank(handle, bank);
  392. pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  393. bank_addr = b->addr;
  394. if (b->description) printf("%s:\n", b->description);
  395. else if (b->name) printf("Registers of bank %s:\n", b->name);
  396. else printf("Registers of bank 0x%x:\n", b->addr);
  397. } else {
  398. printf("Registers: \n");
  399. }
  400. for (i = 0; registers[i].bits; i++) {
  401. const char *mode;
  402. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  403. if (registers[i].type == PCILIB_REGISTER_BITS) {
  404. if (!details) continue;
  405. if (registers[i].bits > 1) {
  406. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  407. } else {
  408. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  409. }
  410. continue;
  411. }
  412. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  413. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  414. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  415. else mode = " ";
  416. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  417. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  418. printf(": %s", registers[i].description);
  419. }
  420. printf("\n");
  421. }
  422. printf("\n");
  423. }
  424. if (bank == (char*)-1) events = NULL;
  425. else {
  426. events = model_info->events;
  427. types = model_info->data_types;
  428. }
  429. if (events) {
  430. printf("Events: \n");
  431. for (i = 0; events[i].name; i++) {
  432. printf(" %s", events[i].name);
  433. if ((events[i].description)&&(events[i].description[0])) {
  434. printf(": %s", events[i].description);
  435. }
  436. if (types) {
  437. for (j = 0; types[j].name; j++) {
  438. if (types[j].evid & events[i].evid) {
  439. printf("\n %s", types[j].name);
  440. if ((types[j].description)&&(types[j].description[0])) {
  441. printf(": %s", types[j].description);
  442. }
  443. }
  444. }
  445. }
  446. }
  447. printf("\n");
  448. }
  449. }
  450. void Info(pcilib_t *handle, pcilib_model_description_t *model_info) {
  451. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  452. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func);
  453. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  454. List(handle, model_info, (char*)-1, 0);
  455. }
  456. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  457. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  458. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  459. int err;
  460. int i, j, errors;
  461. void *data, *buf, *check;
  462. void *fifo = NULL;
  463. struct timeval start, end;
  464. unsigned long time;
  465. size_t size, min_size, max_size;
  466. double mbs_in, mbs_out, mbs;
  467. size_t irqs;
  468. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  469. if (mode == ACCESS_CONFIG)
  470. Error("No benchmarking of configuration space acess is allowed");
  471. if (mode == ACCESS_DMA) {
  472. if (n) {
  473. min_size = n * access;
  474. max_size = n * access;
  475. } else {
  476. min_size = 1024;
  477. max_size = BENCH_MAX_DMA_SIZE;
  478. }
  479. for (size = min_size; size <= max_size; size *= 4) {
  480. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  481. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  482. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  483. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  484. if (err) irqs = 0;
  485. printf("%8zu KB - ", size / 1024);
  486. printf("RW: ");
  487. if (mbs < 0) printf("failed ... ");
  488. else printf("%8.2lf MB/s", mbs);
  489. printf(", R: ");
  490. if (mbs_in < 0) printf("failed ... ");
  491. else printf("%8.2lf MB/s", mbs_in);
  492. printf(", W: ");
  493. if (mbs_out < 0) printf("failed ... ");
  494. else printf("%8.2lf MB/s", mbs_out);
  495. if (irqs) {
  496. printf(", IRQs: %lu", irqs);
  497. }
  498. printf("\n");
  499. }
  500. return 0;
  501. }
  502. if (bar == PCILIB_BAR_INVALID) {
  503. unsigned long maxlength = 0;
  504. for (i = 0; i < PCILIB_MAX_BANKS; i++) {
  505. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  506. bar = i;
  507. break;
  508. }
  509. if (board_info->bar_length[i] > maxlength) {
  510. maxlength = board_info->bar_length[i];
  511. bar = i;
  512. }
  513. }
  514. if (bar < 0) Error("Data banks are not available");
  515. }
  516. if (n) {
  517. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  518. min_size = n * access;
  519. max_size = n * access;
  520. } else {
  521. min_size = access;
  522. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  523. else max_size = BENCH_MAX_FIFO_SIZE;
  524. }
  525. err = posix_memalign( (void**)&buf, 256, max_size );
  526. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  527. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  528. data = pcilib_map_bar(handle, bar);
  529. if (!data) Error("Can't map bar %i", bar);
  530. if (mode == ACCESS_FIFO) {
  531. fifo = data + (addr - board_info->bar_start[bar]) + (board_info->bar_start[bar] & pcilib_get_page_mask());
  532. // pcilib_resolve_register_address(handle, bar, addr);
  533. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  534. }
  535. if (mode == ACCESS_FIFO)
  536. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  537. else
  538. printf("Transfer time (Bank: %i):\n", bar);
  539. for (size = min_size ; size < max_size; size *= 8) {
  540. gettimeofday(&start,NULL);
  541. if (mode == ACCESS_BAR) {
  542. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  543. pcilib_memcpy(buf, data, size);
  544. }
  545. } else {
  546. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  547. for (j = 0; j < (size/access); j++) {
  548. pcilib_memcpy(buf + j * access, fifo, access);
  549. }
  550. }
  551. }
  552. gettimeofday(&end,NULL);
  553. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  554. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  555. fflush(0);
  556. gettimeofday(&start,NULL);
  557. if (mode == ACCESS_BAR) {
  558. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  559. pcilib_memcpy(data, buf, size);
  560. }
  561. } else {
  562. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  563. for (j = 0; j < (size/access); j++) {
  564. pcilib_memcpy(fifo, buf + j * access, access);
  565. }
  566. }
  567. }
  568. gettimeofday(&end,NULL);
  569. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  570. printf(", write: %8.2lf MB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  571. }
  572. pcilib_unmap_bar(handle, bar, data);
  573. printf("\n\nOpen-Transfer-Close time: \n");
  574. for (size = 4 ; size < max_size; size *= 8) {
  575. gettimeofday(&start,NULL);
  576. if (mode == ACCESS_BAR) {
  577. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  578. pcilib_read(handle, bar, 0, size, buf);
  579. }
  580. } else {
  581. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  582. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  583. }
  584. }
  585. gettimeofday(&end,NULL);
  586. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  587. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  588. fflush(0);
  589. gettimeofday(&start,NULL);
  590. if (mode == ACCESS_BAR) {
  591. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  592. pcilib_write(handle, bar, 0, size, buf);
  593. }
  594. } else {
  595. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  596. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  597. }
  598. }
  599. gettimeofday(&end,NULL);
  600. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  601. printf(", write: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  602. if (mode == ACCESS_BAR) {
  603. gettimeofday(&start,NULL);
  604. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  605. pcilib_write(handle, bar, 0, size, buf);
  606. pcilib_read(handle, bar, 0, size, check);
  607. if (memcmp(buf, check, size)) ++errors;
  608. }
  609. gettimeofday(&end,NULL);
  610. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  611. printf(", write-verify: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  612. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  613. }
  614. printf("\n");
  615. }
  616. printf("\n\n");
  617. free(check);
  618. free(buf);
  619. return 0;
  620. }
  621. #define pci2host16(endianess, value) endianess?
  622. /*
  623. typedef struct {
  624. size_t size;
  625. void *data;
  626. size_t pos;
  627. int multi_mode;
  628. } DMACallbackContext;
  629. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  630. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  631. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  632. ctx->size *= 2;
  633. ctx->data = realloc(ctx->data, ctx->size);
  634. if (!ctx->data) {
  635. Error("Allocation of %i bytes of memory have failed", ctx->size);
  636. return 0;
  637. }
  638. }
  639. memcpy(ctx->data + ctx->pos, buf, bufsize);
  640. ctx->pos += bufsize;
  641. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  642. return 1;
  643. }
  644. */
  645. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  646. void *buf;
  647. int i, err;
  648. size_t ret, bytes;
  649. size_t size = n * abs(access);
  650. int block_width, blocks_per_line;
  651. int numbers_per_block, numbers_per_line;
  652. pcilib_dma_engine_t dmaid;
  653. pcilib_dma_flags_t dma_flags = 0;
  654. int fd;
  655. char stmp[256];
  656. struct stat st;
  657. const pcilib_board_info_t *board_info;
  658. numbers_per_block = BLOCK_SIZE / access;
  659. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  660. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  661. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  662. numbers_per_line = blocks_per_line * numbers_per_block;
  663. if (size) {
  664. buf = malloc(size);
  665. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  666. } else {
  667. buf = NULL;
  668. }
  669. switch (mode) {
  670. case ACCESS_DMA:
  671. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  672. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  673. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  674. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  675. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  676. if (size) {
  677. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  678. if (err) Error("Error (%i) is reported by DMA engine", err);
  679. } else {
  680. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  681. size = 2048; bytes = 0;
  682. do {
  683. size *= 2;
  684. buf = realloc(buf, size);
  685. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  686. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  687. bytes += ret;
  688. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  689. err = PCILIB_ERROR_TOOBIG;
  690. if ((flags&FLAG_WAIT)==0) timeout = 0;
  691. }
  692. } while (err == PCILIB_ERROR_TOOBIG);
  693. }
  694. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  695. Error("Error (%i) during DMA read", err);
  696. }
  697. if (bytes <= 0) {
  698. pcilib_warning("No data is returned by DMA engine");
  699. return 0;
  700. }
  701. size = bytes;
  702. n = bytes / abs(access);
  703. addr = 0;
  704. break;
  705. case ACCESS_FIFO:
  706. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  707. addr = 0;
  708. break;
  709. case ACCESS_CONFIG:
  710. board_info = pcilib_get_board_info(handle);
  711. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  712. fd = open(stmp, O_RDONLY);
  713. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  714. if (st.st_size < addr)
  715. Error("Access beyond the end of PCI configuration space");
  716. if (st.st_size < (addr + size)) {
  717. n = (st.st_size - addr) / abs(access);
  718. size = n * abs(access);
  719. if (!n) Error("Access beyond the end of PCI configuration space");
  720. }
  721. lseek(fd, addr, SEEK_SET);
  722. ret = read(fd, buf, size);
  723. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  724. if (ret < size) {
  725. size = ret;
  726. n = ret / abs(access);
  727. }
  728. close(fd);
  729. break;
  730. default:
  731. pcilib_read(handle, bar, addr, size, buf);
  732. }
  733. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  734. if (o) {
  735. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  736. fwrite(buf, abs(access), n, o);
  737. } else {
  738. for (i = 0; i < n; i++) {
  739. if (i) {
  740. if (i%numbers_per_line == 0) printf("\n");
  741. else {
  742. printf("%*s", SEPARATOR_WIDTH, "");
  743. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  744. }
  745. }
  746. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  747. switch (access) {
  748. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  749. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  750. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  751. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  752. }
  753. }
  754. printf("\n\n");
  755. }
  756. free(buf);
  757. return 0;
  758. }
  759. int ReadRegister(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, const char *reg) {
  760. int i;
  761. int err;
  762. const char *format;
  763. pcilib_register_bank_t bank_id;
  764. pcilib_register_bank_addr_t bank_addr = 0;
  765. pcilib_register_value_t value;
  766. if (reg) {
  767. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  768. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  769. format = model_info->banks[bank_id].format;
  770. if (!format) format = "%lu";
  771. err = pcilib_read_register_by_id(handle, regid, &value);
  772. // err = pcilib_read_register(handle, bank, reg, &value);
  773. if (err) printf("Error reading register %s\n", reg);
  774. else {
  775. printf("%s = ", reg);
  776. printf(format, value);
  777. printf("\n");
  778. }
  779. } else {
  780. // Adding DMA registers
  781. pcilib_get_dma_info(handle);
  782. if (model_info->registers) {
  783. if (bank) {
  784. bank_id = pcilib_find_bank(handle, bank);
  785. bank_addr = model_info->banks[bank_id].addr;
  786. }
  787. printf("Registers:\n");
  788. for (i = 0; model_info->registers[i].bits; i++) {
  789. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  790. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[i].bank);
  791. format = model_info->banks[bank_id].format;
  792. if (!format) format = "%lu";
  793. err = pcilib_read_register_by_id(handle, i, &value);
  794. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  795. else {
  796. printf(" %s = ", model_info->registers[i].name);
  797. printf(format, value);
  798. }
  799. printf(" [");
  800. printf(format, model_info->registers[i].defvalue);
  801. printf("]");
  802. printf("\n");
  803. }
  804. }
  805. } else {
  806. printf("No registers");
  807. }
  808. printf("\n");
  809. }
  810. return 0;
  811. }
  812. #define WRITE_REGVAL(buf, n, access, o) {\
  813. uint##access##_t tbuf[n]; \
  814. for (i = 0; i < n; i++) { \
  815. tbuf[i] = (uint##access##_t)buf[i]; \
  816. } \
  817. fwrite(tbuf, access/8, n, o); \
  818. }
  819. int ReadRegisterRange(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  820. int err;
  821. int i;
  822. pcilib_register_bank_description_t *banks = model_info->banks;
  823. pcilib_register_bank_t bank_id = pcilib_find_bank(handle, bank);
  824. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  825. if (bank) Error("Invalid register bank is specified (%s)", bank);
  826. else Error("Register bank should be specified");
  827. }
  828. int access = banks[bank_id].access / 8;
  829. // int size = n * abs(access);
  830. int block_width, blocks_per_line;
  831. int numbers_per_block, numbers_per_line;
  832. numbers_per_block = BLOCK_SIZE / access;
  833. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  834. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  835. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  836. numbers_per_line = blocks_per_line * numbers_per_block;
  837. pcilib_register_value_t buf[n];
  838. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  839. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  840. if (o) {
  841. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  842. switch (access) {
  843. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  844. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  845. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  846. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  847. }
  848. } else {
  849. for (i = 0; i < n; i++) {
  850. if (i) {
  851. if (i%numbers_per_line == 0) printf("\n");
  852. else {
  853. printf("%*s", SEPARATOR_WIDTH, "");
  854. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  855. }
  856. }
  857. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  858. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  859. }
  860. printf("\n\n");
  861. }
  862. return 0;
  863. }
  864. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  865. int read_back = 0;
  866. void *buf, *check;
  867. int res = 0, i, err;
  868. int size = n * abs(access);
  869. size_t ret;
  870. pcilib_dma_engine_t dmaid;
  871. if (mode == ACCESS_CONFIG)
  872. Error("Writting to PCI configuration space is not supported");
  873. err = posix_memalign( (void**)&buf, 256, size );
  874. if (!err) err = posix_memalign( (void**)&check, 256, size );
  875. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  876. for (i = 0; i < n; i++) {
  877. switch (access) {
  878. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  879. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  880. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  881. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  882. default: Error("Unexpected data size (%lu)", access);
  883. }
  884. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  885. }
  886. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  887. switch (mode) {
  888. case ACCESS_DMA:
  889. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  890. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  891. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  892. if ((err)||(ret != size)) {
  893. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  894. else if (err) Error("DMA engine returned a error while writing the data");
  895. else if (!ret) Error("No data is written by DMA engine");
  896. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  897. }
  898. break;
  899. case ACCESS_FIFO:
  900. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  901. break;
  902. default:
  903. pcilib_write(handle, bar, addr, size, buf);
  904. if (verify) {
  905. pcilib_read(handle, bar, addr, size, check);
  906. read_back = 1;
  907. }
  908. }
  909. if ((read_back)&&(memcmp(buf, check, size))) {
  910. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  911. if (endianess) pcilib_swap(check, check, abs(access), n);
  912. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  913. exit(-1);
  914. }
  915. free(check);
  916. free(buf);
  917. return 0;
  918. }
  919. int WriteRegisterRange(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  920. pcilib_register_value_t *buf, *check;
  921. int res, i, err;
  922. unsigned long value;
  923. int size = n * sizeof(pcilib_register_value_t);
  924. err = posix_memalign( (void**)&buf, 256, size );
  925. if (!err) err = posix_memalign( (void**)&check, 256, size );
  926. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  927. for (i = 0; i < n; i++) {
  928. res = sscanf(data[i], "%lx", &value);
  929. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  930. buf[i] = value;
  931. }
  932. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  933. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  934. err = pcilib_read_register_space(handle, bank, addr, n, check);
  935. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  936. if (memcmp(buf, check, size)) {
  937. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  938. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  939. exit(-1);
  940. }
  941. free(check);
  942. free(buf);
  943. return 0;
  944. }
  945. int WriteRegister(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, const char *reg, char ** data) {
  946. int err;
  947. unsigned long val;
  948. pcilib_register_value_t value;
  949. const char *format = NULL;
  950. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  951. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  952. /*
  953. pcilib_register_bank_t bank_id;
  954. pcilib_register_bank_addr_t bank_addr;
  955. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  956. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  957. format = model_info->banks[bank_id].format;
  958. if (!format) format = "%lu";
  959. */
  960. if (isnumber(*data)) {
  961. if (sscanf(*data, "%li", &val) != 1) {
  962. Error("Can't parse data value (%s) is not valid decimal number", *data);
  963. }
  964. format = "%li";
  965. } else if (isxnumber(*data)) {
  966. if (sscanf(*data, "%lx", &val) != 1) {
  967. Error("Can't parse data value (%s) is not valid decimal number", *data);
  968. }
  969. format = "0x%lx";
  970. } else {
  971. Error("Can't parse data value (%s) is not valid decimal number", *data);
  972. }
  973. value = val;
  974. err = pcilib_write_register(handle, bank, reg, value);
  975. if (err) Error("Error writting register %s\n", reg);
  976. if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) {
  977. err = pcilib_read_register(handle, bank, reg, &value);
  978. if (err) Error("Error reading back register %s for verification\n", reg);
  979. if (val != value) {
  980. Error("Failed to write register %s: %lu is written and %lu is read back", reg, val, value);
  981. } else {
  982. printf("%s = ", reg);
  983. printf(format, value);
  984. printf("\n");
  985. }
  986. } else {
  987. printf("%s is written\n ", reg);
  988. }
  989. return 0;
  990. }
  991. typedef struct {
  992. pcilib_t *handle;
  993. pcilib_event_t event;
  994. pcilib_event_data_type_t data;
  995. fastwriter_t *writer;
  996. int verbose;
  997. pcilib_timeout_t timeout;
  998. size_t run_time;
  999. size_t trigger_time;
  1000. size_t max_triggers;
  1001. pcilib_event_flags_t flags;
  1002. FORMAT format;
  1003. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1004. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1005. volatile int started; /**< Indicates that recording is started */
  1006. volatile int run_flag;
  1007. volatile int writing_flag;
  1008. struct timeval first_frame;
  1009. struct timeval last_frame;
  1010. size_t last_num;
  1011. size_t trigger_failed;
  1012. size_t trigger_count;
  1013. size_t event_count;
  1014. size_t incomplete_count;
  1015. size_t broken_count;
  1016. size_t missing_count;
  1017. size_t storage_count;
  1018. struct timeval start_time;
  1019. struct timeval stop_time;
  1020. } GRABContext;
  1021. int GrabCallback(pcilib_event_id_t event_id, pcilib_event_info_t *info, void *user) {
  1022. int err = 0;
  1023. void *data;
  1024. size_t size;
  1025. GRABContext *ctx = (GRABContext*)user;
  1026. pcilib_t *handle = ctx->handle;
  1027. gettimeofday(&ctx->last_frame, NULL);
  1028. if (!ctx->event_count) {
  1029. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1030. }
  1031. ctx->event_pending = 0;
  1032. ctx->event_count++;
  1033. if (ctx->last_num)
  1034. ctx->missing_count += (info->seqnum - ctx->last_num) - 1;
  1035. ctx->last_num = info->seqnum;
  1036. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1037. ctx->incomplete_count++;
  1038. return PCILIB_STREAMING_CONTINUE;
  1039. }
  1040. switch (ctx->format) {
  1041. case FORMAT_DEFAULT:
  1042. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_DATA, &size);
  1043. break;
  1044. default:
  1045. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_RAW_DATA, &size);
  1046. }
  1047. if (!data) {
  1048. ctx->broken_count++;
  1049. return PCILIB_STREAMING_CONTINUE;
  1050. }
  1051. if (ctx->format == FORMAT_HEADER) {
  1052. uint64_t header[8];
  1053. header[0] = info->type;
  1054. header[1] = ctx->data;
  1055. header[2] = 0;
  1056. header[3] = size;
  1057. header[4] = info->seqnum;
  1058. header[5] = info->offset;
  1059. memcpy(header + 6, &info->timestamp, 16);
  1060. err = fastwriter_push(ctx->writer, 64, header);
  1061. }
  1062. if (!err)
  1063. err = fastwriter_push(ctx->writer, size, data);
  1064. if (err) {
  1065. fastwriter_cancel(ctx->writer);
  1066. if (err != EWOULDBLOCK)
  1067. Error("Storage error %i", err);
  1068. ctx->storage_count++;
  1069. pcilib_return_data(handle, event_id, ctx->data, data);
  1070. return PCILIB_STREAMING_CONTINUE;
  1071. }
  1072. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1073. if (err) {
  1074. ctx->missing_count++;
  1075. fastwriter_cancel(ctx->writer);
  1076. return PCILIB_STREAMING_CONTINUE;
  1077. }
  1078. err = fastwriter_commit(ctx->writer);
  1079. if (err) Error("Error commiting data to storage, Error: %i", err);
  1080. return PCILIB_STREAMING_CONTINUE;
  1081. }
  1082. int raw_data(pcilib_event_id_t event_id, pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1083. int err;
  1084. GRABContext *ctx = (GRABContext*)user;
  1085. // pcilib_t *handle = ctx->handle;
  1086. if ((info)&&(info->seqnum != ctx->last_num)) {
  1087. gettimeofday(&ctx->last_frame, NULL);
  1088. if (!ctx->event_count) {
  1089. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1090. }
  1091. ctx->event_count++;
  1092. ctx->missing_count += (info->seqnum - ctx->last_num) - 1;
  1093. ctx->last_num = info->seqnum;
  1094. }
  1095. err = fastwriter_push_data(ctx->writer, size, data);
  1096. if (err) {
  1097. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1098. Error("Storage error %i", err);
  1099. }
  1100. return PCILIB_STREAMING_CONTINUE;
  1101. }
  1102. void *Trigger(void *user) {
  1103. int err;
  1104. struct timeval start;
  1105. GRABContext *ctx = (GRABContext*)user;
  1106. size_t trigger_time = ctx->trigger_time;
  1107. size_t max_triggers = ctx->max_triggers;
  1108. ctx->trigger_thread_started = 1;
  1109. ctx->event_pending = 1;
  1110. while (!ctx->started) ;
  1111. gettimeofday(&start, NULL);
  1112. do {
  1113. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1114. if (err) ctx->trigger_failed++;
  1115. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1116. if (trigger_time) {
  1117. pcilib_add_timeout(&start, trigger_time);
  1118. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1119. pcilib_sleep_until_deadline(&start);
  1120. } else {
  1121. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1122. ctx->event_pending = 1;
  1123. }
  1124. } while (ctx->run_flag);
  1125. ctx->trigger_thread_started = 0;
  1126. return NULL;
  1127. }
  1128. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1129. int verbose;
  1130. pcilib_timeout_t duration, fps_duration;
  1131. struct timeval cur;
  1132. double fps = 0, good_fps = 0;
  1133. size_t total, good, pending = 0;
  1134. verbose = ctx->verbose;
  1135. if (end_time) {
  1136. if (verbose++) {
  1137. printf("-------------------------------------------------------------------------------\n");
  1138. }
  1139. } else {
  1140. gettimeofday(&cur, NULL);
  1141. end_time = &cur;
  1142. }
  1143. // if ((ctx->event_count + ctx->missing_count) == 0)
  1144. // return;
  1145. duration = pcilib_timediff(&ctx->start_time, end_time);
  1146. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1147. if (ctx->trigger_count) {
  1148. total = ctx->trigger_count;
  1149. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1150. } else {
  1151. total = ctx->event_count + ctx->missing_count;
  1152. }
  1153. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count;
  1154. if (ctx->event_count > 1) {
  1155. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1156. }
  1157. if (good > 1) {
  1158. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1159. }
  1160. printf("Run: ");
  1161. PrintTime(duration);
  1162. if (ctx->trigger_count) {
  1163. printf(", Triggers: ");
  1164. PrintNumber(ctx->trigger_count);
  1165. }
  1166. printf(", Captured: ");
  1167. PrintNumber(ctx->event_count);
  1168. printf(" FPS %5.0lf", fps);
  1169. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1170. printf(", Stored: ");
  1171. PrintNumber(good);
  1172. printf(" FPS %5.0lf", good_fps);
  1173. }
  1174. printf("\n");
  1175. if (verbose > 2) {
  1176. if (ctx->trigger_count) {
  1177. printf("Trig: ");
  1178. PrintNumber(ctx->trigger_count);
  1179. printf(" Issued: ");
  1180. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1181. printf(" (");
  1182. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1183. printf("%%) Failed: ");
  1184. PrintNumber(ctx->trigger_failed);
  1185. printf( " (");
  1186. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1187. printf( "%%); Pending: ");
  1188. PrintNumber(pending);
  1189. printf( " (");
  1190. PrintPercent(pending, ctx->trigger_count);
  1191. printf( "%%)\n");
  1192. }
  1193. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1194. printf("Captured: ");
  1195. PrintNumber(good);
  1196. } else {
  1197. printf("Good: ");
  1198. PrintNumber(good);
  1199. printf(", Dropped: ");
  1200. PrintNumber(ctx->storage_count);
  1201. printf(", Bad: ");
  1202. PrintNumber(ctx->incomplete_count);
  1203. printf(", Empty: ");
  1204. PrintNumber(ctx->broken_count);
  1205. }
  1206. printf(", Lost: ");
  1207. PrintNumber(ctx->missing_count);
  1208. printf("\n");
  1209. }
  1210. if (verbose > 1) {
  1211. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1212. printf("Captured: ");
  1213. PrintPercent(good, total);
  1214. } else {
  1215. printf("Good: ");
  1216. PrintPercent(good, total);
  1217. printf("%% Dropped: ");
  1218. PrintPercent(ctx->storage_count, total);
  1219. printf("%% Bad: ");
  1220. PrintPercent(ctx->incomplete_count, total);
  1221. printf("%% Empty: ");
  1222. PrintPercent(ctx->broken_count, total);
  1223. }
  1224. printf("%% Lost: ");
  1225. PrintPercent(ctx->missing_count, total);
  1226. printf("%%");
  1227. printf("\n");
  1228. }
  1229. }
  1230. void StorageStats(GRABContext *ctx) {
  1231. int err;
  1232. fastwriter_stats_t st;
  1233. pcilib_timeout_t duration;
  1234. struct timeval cur;
  1235. gettimeofday(&cur, NULL);
  1236. duration = pcilib_timediff(&ctx->start_time, &cur);
  1237. err = fastwriter_get_stats(ctx->writer, &st);
  1238. if (err) return;
  1239. printf("Wrote ");
  1240. PrintSize(st.written);
  1241. printf(" of ");
  1242. PrintSize(st.commited);
  1243. printf(" at ");
  1244. PrintSize(1000000.*st.written / duration);
  1245. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1246. printf(" of ");
  1247. PrintSize(st.buffer_size);
  1248. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1249. }
  1250. void *Monitor(void *user) {
  1251. struct timeval deadline;
  1252. struct timeval nextinfo;
  1253. GRABContext *ctx = (GRABContext*)user;
  1254. int verbose = ctx->verbose;
  1255. pcilib_timeout_t timeout = ctx->timeout;
  1256. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1257. // while (!ctx->started);
  1258. if (timeout) {
  1259. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1260. pcilib_add_timeout(&deadline, timeout);
  1261. }
  1262. if (verbose > 0) {
  1263. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1264. }
  1265. while (ctx->run_flag) {
  1266. if (StopFlag) {
  1267. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1268. break;
  1269. }
  1270. if (timeout) {
  1271. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1272. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1273. pcilib_add_timeout(&deadline, timeout);
  1274. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1275. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1276. break;
  1277. }
  1278. }
  1279. }
  1280. if (verbose > 0) {
  1281. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1282. GrabStats(ctx, NULL);
  1283. StorageStats(ctx);
  1284. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1285. }
  1286. }
  1287. usleep(100000);
  1288. }
  1289. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1290. while (ctx->writing_flag) {
  1291. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1292. if (verbose >= 0) StorageStats(ctx);
  1293. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1294. }
  1295. usleep(100000);
  1296. }
  1297. return NULL;
  1298. }
  1299. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1300. int err;
  1301. GRABContext ctx;
  1302. // void *data = NULL;
  1303. // size_t size, written;
  1304. pcilib_event_t event;
  1305. pcilib_event_t listen_events;
  1306. pcilib_event_data_type_t data;
  1307. pthread_t monitor_thread;
  1308. pthread_t trigger_thread;
  1309. pthread_attr_t attr;
  1310. struct sched_param sched;
  1311. struct timeval end_time;
  1312. pcilib_event_flags_t flags;
  1313. if (evname) {
  1314. event = pcilib_find_event(handle, evname);
  1315. if (event == PCILIB_EVENT_INVALID)
  1316. Error("Can't find event (%s)", evname);
  1317. listen_events = event;
  1318. } else {
  1319. listen_events = PCILIB_EVENTS_ALL;
  1320. event = PCILIB_EVENT0;
  1321. }
  1322. if (data_type) {
  1323. data = pcilib_find_event_data_type(handle, event, data_type);
  1324. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1325. Error("Can't find data type (%s)", data_type);
  1326. } else {
  1327. data = PCILIB_EVENT_DATA;
  1328. }
  1329. memset(&ctx, 0, sizeof(GRABContext));
  1330. ctx.handle = handle;
  1331. ctx.event = event;
  1332. ctx.data = data;
  1333. ctx.run_time = run_time;
  1334. ctx.timeout = timeout;
  1335. ctx.format = format;
  1336. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1337. else ctx.verbose = 0;
  1338. if (grab_mode&GRAB_MODE_GRAB) {
  1339. ctx.writer = fastwriter_init(output, 0);
  1340. if (!ctx.writer)
  1341. Error("Can't initialize fastwritter library");
  1342. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1343. err = fastwriter_open(ctx.writer, output, 0);
  1344. if (err)
  1345. Error("Error opening file (%s), Error: %i\n", output, err);
  1346. ctx.writing_flag = 1;
  1347. }
  1348. ctx.run_flag = 1;
  1349. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1350. if (data == PCILIB_EVENT_RAW_DATA) {
  1351. if (format == FORMAT_RAW) {
  1352. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1353. }
  1354. } else {
  1355. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1356. }
  1357. ctx.flags = flags;
  1358. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1359. pcilib_configure_autostop(handle, num, run_time);
  1360. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1361. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1362. }
  1363. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1364. pcilib_configure_preprocessing_threads(handle, threads);
  1365. }
  1366. if (grab_mode&GRAB_MODE_TRIGGER) {
  1367. if (trigger_time) {
  1368. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1369. timeout = 2 * trigger_time;
  1370. ctx.timeout = timeout;
  1371. }
  1372. } else {
  1373. // Otherwise, we will trigger next event after previous one is read
  1374. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1375. }
  1376. ctx.max_triggers = num;
  1377. ctx.trigger_count = 0;
  1378. ctx.trigger_time = trigger_time;
  1379. // We don't really care if RT priority is imposible
  1380. pthread_attr_init(&attr);
  1381. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1382. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1383. pthread_attr_setschedparam(&attr, &sched);
  1384. }
  1385. // Start triggering thread and wait until it is schedulled
  1386. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1387. Error("Error spawning trigger thread");
  1388. while (!ctx.trigger_thread_started) usleep(10);
  1389. }
  1390. gettimeofday(&ctx.start_time, NULL);
  1391. if (grab_mode&GRAB_MODE_GRAB) {
  1392. err = pcilib_start(handle, listen_events, flags);
  1393. if (err) Error("Failed to start event engine, error %i", err);
  1394. }
  1395. ctx.started = 1;
  1396. if (run_time) {
  1397. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1398. if (ctx.stop_time.tv_usec > 999999) {
  1399. ctx.stop_time.tv_usec -= 1000000;
  1400. __sync_synchronize();
  1401. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1402. } else {
  1403. __sync_synchronize();
  1404. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1405. }
  1406. }
  1407. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1408. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1409. Error("Error spawning monitoring thread");
  1410. if (grab_mode&GRAB_MODE_GRAB) {
  1411. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1412. if (err) Error("Error streaming events, error %i", err);
  1413. }
  1414. ctx.run_flag = 0;
  1415. if (grab_mode&GRAB_MODE_TRIGGER) {
  1416. while (ctx.trigger_thread_started) usleep(10);
  1417. }
  1418. if (grab_mode&GRAB_MODE_GRAB) {
  1419. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1420. }
  1421. gettimeofday(&end_time, NULL);
  1422. if (grab_mode&GRAB_MODE_TRIGGER) {
  1423. pthread_join(trigger_thread, NULL);
  1424. }
  1425. if (grab_mode&GRAB_MODE_GRAB) {
  1426. if (verbose >= 0)
  1427. printf("Grabbing is finished, flushing results....\n");
  1428. err = fastwriter_close(ctx.writer);
  1429. if (err) Error("Storage problems, error %i", err);
  1430. }
  1431. ctx.writing_flag = 0;
  1432. pthread_join(monitor_thread, NULL);
  1433. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1434. GrabStats(&ctx, &end_time);
  1435. StorageStats(&ctx);
  1436. }
  1437. fastwriter_destroy(ctx.writer);
  1438. return 0;
  1439. }
  1440. int StartStopDMA(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1441. int err;
  1442. pcilib_dma_engine_t dmaid;
  1443. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1444. const pcilib_dma_info_t *dma_info = pcilib_get_dma_info(handle);
  1445. if (start) Error("DMA engine should be specified");
  1446. for (dmaid = 0; dma_info->engines[dmaid]; dmaid++) {
  1447. err = pcilib_start_dma(handle, dmaid, 0);
  1448. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid]->direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid]->addr);
  1449. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1450. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid]->direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid]->addr);
  1451. }
  1452. return 0;
  1453. }
  1454. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1455. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1456. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1457. if (start) {
  1458. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1459. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1460. } else {
  1461. err = pcilib_start_dma(handle, dmaid, 0);
  1462. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1463. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1464. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1465. }
  1466. }
  1467. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1468. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1469. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1470. if (start) {
  1471. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1472. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1473. } else {
  1474. err = pcilib_start_dma(handle, dmaid, 0);
  1475. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1476. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1477. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1478. }
  1479. }
  1480. return 0;
  1481. }
  1482. typedef struct {
  1483. pcilib_kmem_use_t use;
  1484. int referenced;
  1485. int hw_lock;
  1486. int reusable;
  1487. int persistent;
  1488. int open;
  1489. size_t count;
  1490. size_t size;
  1491. } kmem_use_info_t;
  1492. #define MAX_USES 64
  1493. pcilib_kmem_use_t ParseUse(const char *use) {
  1494. unsigned long utmp;
  1495. if (use) {
  1496. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1497. if (strlen(use) < 5)
  1498. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1499. else
  1500. return utmp;
  1501. }
  1502. Error("Kernel memory use is not specified");
  1503. return 0;
  1504. }
  1505. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1506. size_t i, n = *n_uses;
  1507. if (uses[n - 1].use == use) return n - 1;
  1508. for (i = 1; i < (n - 1); i++) {
  1509. if (uses[i].use == use) return i;
  1510. }
  1511. if (n == MAX_USES) return 0;
  1512. uses[n].use = use;
  1513. return (*n_uses)++;
  1514. }
  1515. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1516. size_t i;
  1517. for (i = 0; i < n_uses; i++) {
  1518. if (uses[i].use == use) {
  1519. if (uses[i].count) return uses + i;
  1520. else return NULL;
  1521. }
  1522. }
  1523. return NULL;
  1524. }
  1525. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  1526. DIR *dir;
  1527. struct dirent *entry;
  1528. const char *pos;
  1529. char sysdir[256];
  1530. char fname[256];
  1531. char info[256];
  1532. size_t useid, n_uses = 1; // Use 0 is for others
  1533. memset(uses, 0, sizeof(uses));
  1534. pos = strrchr(device, '/');
  1535. if (pos) ++pos;
  1536. else pos = device;
  1537. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1538. dir = opendir(sysdir);
  1539. if (!dir) Error("Can't open directory (%s)", sysdir);
  1540. while ((entry = readdir(dir)) != NULL) {
  1541. FILE *f;
  1542. unsigned long use = 0;
  1543. unsigned long size = 0;
  1544. unsigned long refs = 0;
  1545. unsigned long mode = 0;
  1546. unsigned long hwref = 0;
  1547. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1548. if (!isnumber(entry->d_name+4)) continue;
  1549. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1550. f = fopen(fname, "r");
  1551. if (!f) Error("Can't access file (%s)", fname);
  1552. while(!feof(f)) {
  1553. fgets(info, 256, f);
  1554. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1555. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1556. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1557. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1558. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1559. }
  1560. fclose(f);
  1561. useid = FindUse(&n_uses, uses, use);
  1562. uses[useid].count++;
  1563. uses[useid].size += size;
  1564. if (refs) uses[useid].referenced = 1;
  1565. if (hwref) uses[useid].hw_lock = 1;
  1566. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  1567. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  1568. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  1569. }
  1570. closedir(dir);
  1571. *uses_number = n_uses;
  1572. return 0;
  1573. }
  1574. int ListKMEM(pcilib_t *handle, const char *device) {
  1575. int err;
  1576. char stmp[256];
  1577. size_t i, useid, n_uses;
  1578. kmem_use_info_t uses[MAX_USES];
  1579. err = ParseKMEM(handle, device, &n_uses, uses);
  1580. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1581. if ((n_uses == 1)&&(uses[0].count == 0)) {
  1582. printf("No kernel memory is allocated\n");
  1583. return 0;
  1584. }
  1585. printf("Use Type Count Total Size REF Mode \n");
  1586. printf("--------------------------------------------------------------------------------\n");
  1587. for (useid = 0; useid < n_uses; useid++) {
  1588. if (useid + 1 == n_uses) {
  1589. if (!uses[0].count) continue;
  1590. i = 0;
  1591. } else i = useid + 1;
  1592. printf("%08x ", uses[i].use);
  1593. if (!i) printf("All Others ");
  1594. else if ((uses[i].use >> 16) == PCILIB_KMEM_USE_DMA_RING) printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1595. else if ((uses[i].use >> 16) == PCILIB_KMEM_USE_DMA_PAGES) printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1596. else if ((uses[i].use >> 16) == PCILIB_KMEM_USE_USER) printf("User %04x ", uses[i].use&0xFFFF);
  1597. else printf (" ");
  1598. printf(" ");
  1599. printf("% 6lu", uses[i].count);
  1600. printf(" ");
  1601. printf("% 10s", GetPrintSize(stmp, uses[i].size));
  1602. printf(" ");
  1603. if (uses[i].referenced&&uses[i].hw_lock) printf("HW+SW");
  1604. else if (uses[i].referenced) printf(" SW");
  1605. else if (uses[i].hw_lock) printf("HW ");
  1606. else printf(" - ");
  1607. printf(" ");
  1608. if (uses[i].persistent) printf("Persistent");
  1609. else if (uses[i].open) printf("Open ");
  1610. else if (uses[i].reusable) printf("Reusable ");
  1611. else printf("Closed ");
  1612. printf("\n");
  1613. }
  1614. printf("--------------------------------------------------------------------------------\n");
  1615. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  1616. return 0;
  1617. }
  1618. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  1619. int err;
  1620. size_t i, n;
  1621. pcilib_kmem_handle_t *kbuf;
  1622. pcilib_kmem_use_t useid = ParseUse(use);
  1623. size_t n_uses;
  1624. kmem_use_info_t uses[MAX_USES];
  1625. kmem_use_info_t *use_info;
  1626. if (block == (size_t)-1) {
  1627. err = ParseKMEM(handle, device, &n_uses, uses);
  1628. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1629. use_info = GetUse(n_uses, uses, useid);
  1630. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  1631. i = 0;
  1632. n = use_info->count;
  1633. } else {
  1634. i = block;
  1635. n = block + 1;
  1636. }
  1637. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1638. if (!kbuf) {
  1639. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  1640. return 0;
  1641. }
  1642. printf("Buffer Address Hardware Address Bus Address\n");
  1643. printf("--------------------------------------------------------------------------------\n");
  1644. for (; i < n; i++) {
  1645. void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  1646. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  1647. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  1648. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  1649. }
  1650. printf("\n");
  1651. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1652. return 0;
  1653. }
  1654. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  1655. int err;
  1656. void *data;
  1657. size_t size;
  1658. pcilib_kmem_handle_t *kbuf;
  1659. if (block == (size_t)-1) block = 0;
  1660. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1661. if (!kbuf) {
  1662. Error("The specified kernel buffer is not allocated\n");
  1663. return 0;
  1664. }
  1665. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  1666. if (err) {
  1667. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1668. Error("The synchronization of kernel buffer has failed\n");
  1669. return 0;
  1670. }
  1671. data = pcilib_kmem_get_block_ua(handle, kbuf, block);
  1672. if (data) {
  1673. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  1674. if ((max_size)&&(size > max_size)) size = max_size;
  1675. fwrite(data, 1, size, o?o:stdout);
  1676. } else {
  1677. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1678. Error("The specified block is not existing\n");
  1679. return 0;
  1680. }
  1681. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1682. return 0;
  1683. }
  1684. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  1685. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  1686. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  1687. pcilib_kmem_handle_t *kbuf;
  1688. pcilib_kmem_use_t useid = ParseUse(use);
  1689. long page_size = sysconf(_SC_PAGESIZE);
  1690. if (type) {
  1691. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  1692. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  1693. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  1694. else Error("Invalid memory type (%s) is specified", type);
  1695. }
  1696. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  1697. Error("Selected memory type does not allow custom size");
  1698. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  1699. if (!kbuf) Error("Allocation of kernel memory has failed");
  1700. pcilib_free_kernel_memory(handle, kbuf, flags);
  1701. return 0;
  1702. }
  1703. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  1704. int err;
  1705. int i;
  1706. pcilib_kmem_use_t useid;
  1707. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  1708. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  1709. if (!strcasecmp(use, "dma")) {
  1710. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  1711. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  1712. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  1713. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  1714. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  1715. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  1716. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  1717. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  1718. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  1719. }
  1720. return 0;
  1721. }
  1722. useid = ParseUse(use);
  1723. err = pcilib_clean_kernel_memory(handle, useid, flags);
  1724. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  1725. return 0;
  1726. }
  1727. int ListDMA(pcilib_t *handle, const char *device, pcilib_model_description_t *model_info) {
  1728. int err;
  1729. DIR *dir;
  1730. struct dirent *entry;
  1731. const char *pos;
  1732. char sysdir[256];
  1733. char fname[256];
  1734. char info[256];
  1735. char stmp[256];
  1736. pcilib_dma_engine_t dmaid;
  1737. pcilib_dma_engine_status_t status;
  1738. pos = strrchr(device, '/');
  1739. if (pos) ++pos;
  1740. else pos = device;
  1741. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1742. dir = opendir(sysdir);
  1743. if (!dir) Error("Can't open directory (%s)", sysdir);
  1744. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  1745. printf("--------------------------------------------------------------------------------\n");
  1746. while ((entry = readdir(dir)) != NULL) {
  1747. FILE *f;
  1748. unsigned long use = 0;
  1749. // unsigned long size = 0;
  1750. // unsigned long refs = 0;
  1751. unsigned long mode = 0;
  1752. // unsigned long hwref = 0;
  1753. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1754. if (!isnumber(entry->d_name+4)) continue;
  1755. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1756. f = fopen(fname, "r");
  1757. if (!f) Error("Can't access file (%s)", fname);
  1758. while(!feof(f)) {
  1759. fgets(info, 256, f);
  1760. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1761. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1762. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1763. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1764. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1765. }
  1766. fclose(f);
  1767. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  1768. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  1769. if (use&0x80) {
  1770. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  1771. } else {
  1772. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  1773. }
  1774. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  1775. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  1776. err = pcilib_start_dma(handle, dmaid, 0);
  1777. if (err) {
  1778. printf("-- Wrong state, start is failed\n");
  1779. continue;
  1780. }
  1781. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1782. if (err) {
  1783. printf("-- Wrong state, failed to obtain status\n");
  1784. pcilib_stop_dma(handle, dmaid, 0);
  1785. continue;
  1786. }
  1787. pcilib_stop_dma(handle, dmaid, 0);
  1788. if (status.started) printf("S");
  1789. else printf(" ");
  1790. if (status.ring_head == status.ring_tail) printf(" ");
  1791. else printf("D");
  1792. printf(" ");
  1793. printf("% 10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  1794. printf(" ");
  1795. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  1796. printf("\n");
  1797. }
  1798. closedir(dir);
  1799. printf("--------------------------------------------------------------------------------\n");
  1800. printf("S - Started, D - Data in buffers\n");
  1801. return 0;
  1802. }
  1803. int ListBuffers(pcilib_t *handle, const char *device, pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  1804. int err;
  1805. size_t i;
  1806. pcilib_dma_engine_t dmaid;
  1807. pcilib_dma_engine_status_t status;
  1808. pcilib_dma_buffer_status_t *buffer;
  1809. char stmp[256];
  1810. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  1811. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  1812. err = pcilib_start_dma(handle, dmaid, 0);
  1813. if (err) Error("Error starting the specified DMA engine");
  1814. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1815. if (err) Error("Failed to obtain status of the specified DMA engine");
  1816. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  1817. if (!buffer) Error("Failed to allocate memory for status buffer");
  1818. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  1819. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  1820. printf("Buffer Status Total Size \n");
  1821. printf("--------------------------------------------------------------------------------\n");
  1822. for (i = 0; i < status.ring_size; i++) {
  1823. printf("%8zu ", i);
  1824. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  1825. printf("% 10s", GetPrintSize(stmp, buffer[i].size));
  1826. printf("\n");
  1827. }
  1828. printf("--------------------------------------------------------------------------------\n");
  1829. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  1830. free(buffer);
  1831. pcilib_stop_dma(handle, dmaid, 0);
  1832. return 0;
  1833. }
  1834. int ReadBuffer(pcilib_t *handle, const char *device, pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  1835. int err;
  1836. pcilib_dma_engine_t dmaid;
  1837. pcilib_dma_engine_status_t status;
  1838. pcilib_dma_buffer_status_t *buffer;
  1839. size_t size;
  1840. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  1841. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  1842. err = pcilib_start_dma(handle, dmaid, 0);
  1843. if (err) Error("Error starting the specified DMA engine");
  1844. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1845. if (err) Error("Failed to obtain status of the specified DMA engine");
  1846. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  1847. if (!buffer) Error("Failed to allocate memory for status buffer");
  1848. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  1849. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  1850. if (block == (size_t)-1) {
  1851. // get current
  1852. }
  1853. size = buffer[block].size;
  1854. free(buffer);
  1855. pcilib_stop_dma(handle, dmaid, 0);
  1856. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  1857. }
  1858. int EnableIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  1859. int err;
  1860. err = pcilib_enable_irq(handle, irq_type, 0);
  1861. if (err) {
  1862. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  1863. Error("Error enabling IRQs");
  1864. }
  1865. return err;
  1866. }
  1867. int DisableIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  1868. int err;
  1869. err = pcilib_disable_irq(handle, 0);
  1870. if (err) {
  1871. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  1872. Error("Error disabling IRQs");
  1873. }
  1874. return err;
  1875. }
  1876. int AckIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  1877. pcilib_clear_irq(handle, irq_source);
  1878. return 0;
  1879. }
  1880. int WaitIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  1881. int err;
  1882. size_t count;
  1883. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  1884. if (err) {
  1885. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  1886. else Error("Error waiting for IRQ");
  1887. }
  1888. return 0;
  1889. }
  1890. int main(int argc, char **argv) {
  1891. int i;
  1892. long itmp;
  1893. size_t ztmp;
  1894. unsigned char c;
  1895. const char *stmp;
  1896. const char *num_offset;
  1897. int details = 0;
  1898. int verbose = 0;
  1899. int quiete = 0;
  1900. int force = 0;
  1901. int verify = 0;
  1902. pcilib_model_t model = PCILIB_MODEL_DETECT;
  1903. pcilib_model_description_t *model_info;
  1904. MODE mode = MODE_INVALID;
  1905. GRAB_MODE grab_mode = 0;
  1906. size_t trigger_time = 0;
  1907. size_t run_time = 0;
  1908. size_t buffer = 0;
  1909. size_t threads = 1;
  1910. FORMAT format = FORMAT_DEFAULT;
  1911. PARTITION partition = PARTITION_UNKNOWN;
  1912. FLAGS flags = 0;
  1913. const char *atype = NULL;
  1914. const char *type = NULL;
  1915. ACCESS_MODE amode = ACCESS_BAR;
  1916. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  1917. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  1918. const char *addr = NULL;
  1919. const char *reg = NULL;
  1920. const char *bank = NULL;
  1921. char **data = NULL;
  1922. const char *event = NULL;
  1923. const char *data_type = NULL;
  1924. const char *dma_channel = NULL;
  1925. const char *use = NULL;
  1926. size_t block = (size_t)-1;
  1927. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  1928. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  1929. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  1930. pcilib_kmem_use_t useid = 0;
  1931. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  1932. long addr_shift = 0;
  1933. uintptr_t start = -1;
  1934. size_t block_size = 0;
  1935. size_t size = 1;
  1936. access_t access = 4;
  1937. // int skip = 0;
  1938. int endianess = 0;
  1939. size_t timeout = 0;
  1940. size_t alignment = 0;
  1941. const char *output = NULL;
  1942. FILE *ofile = NULL;
  1943. size_t iterations = BENCHMARK_ITERATIONS;
  1944. pcilib_t *handle;
  1945. int size_set = 0;
  1946. int timeout_set = 0;
  1947. // int run_time_set = 0;
  1948. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  1949. extern int optind;
  1950. switch (c) {
  1951. case OPT_HELP:
  1952. Usage(argc, argv, NULL);
  1953. break;
  1954. case OPT_INFO:
  1955. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1956. mode = MODE_INFO;
  1957. break;
  1958. case OPT_LIST:
  1959. if (mode == MODE_LIST) details++;
  1960. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1961. mode = MODE_LIST;
  1962. break;
  1963. case OPT_RESET:
  1964. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1965. mode = MODE_RESET;
  1966. break;
  1967. case OPT_BENCHMARK:
  1968. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1969. mode = MODE_BENCHMARK;
  1970. if (optarg) addr = optarg;
  1971. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  1972. break;
  1973. case OPT_READ:
  1974. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1975. mode = MODE_READ;
  1976. if (optarg) addr = optarg;
  1977. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  1978. break;
  1979. case OPT_WRITE:
  1980. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1981. mode = MODE_WRITE;
  1982. if (optarg) addr = optarg;
  1983. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  1984. break;
  1985. case OPT_GRAB:
  1986. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  1987. mode = MODE_GRAB;
  1988. grab_mode |= GRAB_MODE_GRAB;
  1989. stmp = NULL;
  1990. if (optarg) stmp = optarg;
  1991. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  1992. if (stmp) {
  1993. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  1994. event = stmp;
  1995. }
  1996. break;
  1997. case OPT_TRIGGER:
  1998. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  1999. mode = MODE_GRAB;
  2000. grab_mode |= GRAB_MODE_TRIGGER;
  2001. stmp = NULL;
  2002. if (optarg) stmp = optarg;
  2003. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2004. if (stmp) {
  2005. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2006. event = stmp;
  2007. }
  2008. break;
  2009. case OPT_LIST_DMA:
  2010. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2011. mode = MODE_LIST_DMA;
  2012. break;
  2013. case OPT_LIST_DMA_BUFFERS:
  2014. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2015. mode = MODE_LIST_DMA_BUFFERS;
  2016. dma_channel = optarg;
  2017. break;
  2018. case OPT_READ_DMA_BUFFER:
  2019. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2020. mode = MODE_READ_DMA_BUFFER;
  2021. num_offset = strchr(optarg, ':');
  2022. if (num_offset) {
  2023. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2024. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2025. *(char*)num_offset = 0;
  2026. } else block = (size_t)-1;
  2027. dma_channel = optarg;
  2028. break;
  2029. case OPT_START_DMA:
  2030. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2031. mode = MODE_START_DMA;
  2032. if (optarg) dma_channel = optarg;
  2033. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2034. break;
  2035. case OPT_STOP_DMA:
  2036. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2037. mode = MODE_STOP_DMA;
  2038. if (optarg) dma_channel = optarg;
  2039. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2040. break;
  2041. case OPT_ENABLE_IRQ:
  2042. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2043. mode = MODE_ENABLE_IRQ;
  2044. if (optarg) num_offset = optarg;
  2045. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2046. else num_offset = NULL;
  2047. if (num_offset) {
  2048. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2049. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2050. irq_type = itmp;
  2051. }
  2052. break;
  2053. case OPT_DISABLE_IRQ:
  2054. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2055. mode = MODE_DISABLE_IRQ;
  2056. if (optarg) num_offset = optarg;
  2057. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2058. else num_offset = NULL;
  2059. if (num_offset) {
  2060. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2061. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2062. irq_type = itmp;
  2063. }
  2064. break;
  2065. case OPT_ACK_IRQ:
  2066. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2067. mode = MODE_ACK_IRQ;
  2068. if (optarg) num_offset = optarg;
  2069. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2070. else num_offset = NULL;
  2071. if (num_offset) {
  2072. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2073. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2074. irq_source = itmp;
  2075. }
  2076. break;
  2077. case OPT_WAIT_IRQ:
  2078. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2079. mode = MODE_WAIT_IRQ;
  2080. if (optarg) num_offset = optarg;
  2081. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2082. else num_offset = NULL;
  2083. if (num_offset) {
  2084. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2085. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2086. irq_source = itmp;
  2087. }
  2088. break;
  2089. case OPT_LIST_KMEM:
  2090. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2091. mode = MODE_LIST_KMEM;
  2092. if (optarg) use = optarg;
  2093. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2094. else use = NULL;
  2095. if (use) {
  2096. num_offset = strchr(use, ':');
  2097. if (num_offset) {
  2098. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2099. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2100. *(char*)num_offset = 0;
  2101. }
  2102. }
  2103. break;
  2104. case OPT_READ_KMEM:
  2105. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2106. mode = MODE_READ_KMEM;
  2107. num_offset = strchr(optarg, ':');
  2108. if (num_offset) {
  2109. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2110. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2111. *(char*)num_offset = 0;
  2112. }
  2113. use = optarg;
  2114. useid = ParseUse(use);
  2115. break;
  2116. case OPT_ALLOC_KMEM:
  2117. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2118. mode = MODE_ALLOC_KMEM;
  2119. if (optarg) use = optarg;
  2120. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2121. break;
  2122. case OPT_FREE_KMEM:
  2123. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2124. mode = MODE_FREE_KMEM;
  2125. if (optarg) use = optarg;
  2126. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2127. break;
  2128. case OPT_DEVICE:
  2129. fpga_device = optarg;
  2130. break;
  2131. case OPT_MODEL:
  2132. if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2133. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2134. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2135. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);
  2136. break;
  2137. case OPT_BAR:
  2138. bank = optarg;
  2139. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2140. // else bar = itmp;
  2141. break;
  2142. case OPT_ALIGNMENT:
  2143. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2144. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2145. }
  2146. break;
  2147. case OPT_ACCESS:
  2148. if (!strncasecmp(optarg, "fifo", 4)) {
  2149. atype = "fifo";
  2150. num_offset = optarg + 4;
  2151. amode = ACCESS_FIFO;
  2152. } else if (!strncasecmp(optarg, "dma", 3)) {
  2153. atype = "dma";
  2154. num_offset = optarg + 3;
  2155. amode = ACCESS_DMA;
  2156. } else if (!strncasecmp(optarg, "bar", 3)) {
  2157. atype = "plain";
  2158. num_offset = optarg + 3;
  2159. amode = ACCESS_BAR;
  2160. } else if (!strncasecmp(optarg, "config", 6)) {
  2161. atype = "config";
  2162. num_offset = optarg + 6;
  2163. amode = ACCESS_CONFIG;
  2164. } else if (!strncasecmp(optarg, "plain", 5)) {
  2165. atype = "plain";
  2166. num_offset = optarg + 5;
  2167. amode = ACCESS_BAR;
  2168. } else {
  2169. num_offset = optarg;
  2170. }
  2171. if (*num_offset) {
  2172. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2173. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2174. switch (itmp) {
  2175. case 8: access = 1; break;
  2176. case 16: access = 2; break;
  2177. case 32: access = 4; break;
  2178. case 64: access = 8; break;
  2179. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2180. }
  2181. }
  2182. break;
  2183. case OPT_SIZE:
  2184. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2185. if (strcasecmp(optarg, "unlimited"))
  2186. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2187. else
  2188. size = 0;//(size_t)-1;
  2189. }
  2190. size_set = 1;
  2191. break;
  2192. case OPT_BLOCK_SIZE:
  2193. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2194. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2195. }
  2196. break;
  2197. case OPT_ENDIANESS:
  2198. if ((*optarg == 'b')||(*optarg == 'B')) {
  2199. if (ntohs(1) == 1) endianess = 0;
  2200. else endianess = 1;
  2201. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2202. if (ntohs(1) == 1) endianess = 1;
  2203. else endianess = 0;
  2204. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2205. break;
  2206. case OPT_TIMEOUT:
  2207. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2208. if (strcasecmp(optarg, "unlimited"))
  2209. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2210. else
  2211. timeout = PCILIB_TIMEOUT_INFINITE;
  2212. }
  2213. timeout_set = 1;
  2214. break;
  2215. case OPT_OUTPUT:
  2216. output = optarg;
  2217. break;
  2218. case OPT_ITERATIONS:
  2219. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2220. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2221. break;
  2222. case OPT_EVENT:
  2223. event = optarg;
  2224. break;
  2225. case OPT_TYPE:
  2226. type = optarg;
  2227. break;
  2228. case OPT_DATA_TYPE:
  2229. data_type = optarg;
  2230. break;
  2231. case OPT_RUN_TIME:
  2232. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2233. if (strcasecmp(optarg, "unlimited"))
  2234. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2235. else
  2236. run_time = 0;
  2237. }
  2238. // run_time_set = 1;
  2239. break;
  2240. case OPT_TRIGGER_TIME:
  2241. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2242. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2243. break;
  2244. case OPT_TRIGGER_RATE:
  2245. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2246. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2247. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2248. break;
  2249. case OPT_BUFFER:
  2250. if (optarg) num_offset = optarg;
  2251. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2252. else num_offset = NULL;
  2253. if (num_offset) {
  2254. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2255. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2256. buffer *= 1024 * 1024;
  2257. } else {
  2258. buffer = get_free_memory();
  2259. if (buffer < 256) Error("Not enough free memory (%lz MB) for buffering", buffer / 1024 / 1024);
  2260. buffer -= 128 + buffer/16;
  2261. }
  2262. break;
  2263. case OPT_THREADS:
  2264. if (optarg) num_offset = optarg;
  2265. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2266. else num_offset = NULL;
  2267. if (num_offset) {
  2268. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2269. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2270. } else {
  2271. threads = 0;
  2272. }
  2273. break;
  2274. case OPT_FORMAT:
  2275. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2276. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2277. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2278. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2279. break;
  2280. case OPT_QUIETE:
  2281. quiete = 1;
  2282. verbose = -1;
  2283. break;
  2284. case OPT_VERBOSE:
  2285. if (optarg) num_offset = optarg;
  2286. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2287. else num_offset = NULL;
  2288. if (num_offset) {
  2289. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2290. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2291. } else {
  2292. verbose = 1;
  2293. }
  2294. break;
  2295. case OPT_FORCE:
  2296. force = 1;
  2297. break;
  2298. case OPT_VERIFY:
  2299. verify = 1;
  2300. break;
  2301. case OPT_MULTIPACKET:
  2302. flags |= FLAG_MULTIPACKET;
  2303. break;
  2304. case OPT_WAIT:
  2305. flags |= FLAG_WAIT;
  2306. break;
  2307. default:
  2308. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2309. }
  2310. }
  2311. if (mode == MODE_INVALID) {
  2312. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2313. else Usage(argc, argv, NULL);
  2314. }
  2315. pcilib_set_error_handler(&Error, quiete?Silence:NULL);
  2316. handle = pcilib_open(fpga_device, model);
  2317. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2318. model = pcilib_get_model(handle);
  2319. model_info = pcilib_get_model_description(handle);
  2320. switch (mode) {
  2321. case MODE_WRITE:
  2322. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2323. int vallen = strlen(argv[optind]);
  2324. if (vallen > 1) {
  2325. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2326. if (!data) Error("Error allocating memory for data array");
  2327. for (i = 0; i < size; i++) {
  2328. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2329. strcpy(data[i], argv[optind] + 1);
  2330. }
  2331. } else {
  2332. data = (char**)malloc(size * (9 + sizeof(char*)));
  2333. if (!data) Error("Error allocating memory for data array");
  2334. for (i = 0; i < size; i++) {
  2335. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2336. sprintf(data[i], "%x", i);
  2337. }
  2338. }
  2339. } else if ((argc - optind) == size) data = argv + optind;
  2340. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2341. case MODE_READ:
  2342. if (!addr) {
  2343. if (model == PCILIB_MODEL_PCI) {
  2344. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2345. Usage(argc, argv, "The address is not specified");
  2346. } else ++mode;
  2347. }
  2348. break;
  2349. case MODE_START_DMA:
  2350. case MODE_STOP_DMA:
  2351. case MODE_LIST_DMA_BUFFERS:
  2352. case MODE_READ_DMA_BUFFER:
  2353. if ((dma_channel)&&(*dma_channel)) {
  2354. itmp = strlen(dma_channel) - 1;
  2355. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2356. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2357. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2358. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2359. else {
  2360. num_offset = dma_channel + 3;
  2361. itmp -= 3;
  2362. }
  2363. if (bank) {
  2364. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  2365. }
  2366. if (!isnumber_n(num_offset, itmp))
  2367. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  2368. dma = atoi(num_offset);
  2369. }
  2370. break;
  2371. default:
  2372. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  2373. }
  2374. if (addr) {
  2375. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2376. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  2377. if (bank) {
  2378. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2379. } else {
  2380. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  2381. }
  2382. dma = atoi(addr + 3);
  2383. amode = ACCESS_DMA;
  2384. addr = NULL;
  2385. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2386. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  2387. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2388. bar = atoi(addr + 3);
  2389. amode = ACCESS_BAR;
  2390. addr = NULL;
  2391. } else if (!strcmp(addr, "config")) {
  2392. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  2393. amode = ACCESS_CONFIG;
  2394. addr = NULL;
  2395. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  2396. // check if the address in the register range
  2397. pcilib_register_range_t *ranges = model_info->ranges;
  2398. if (ranges) {
  2399. for (i = 0; ranges[i].start != ranges[i].end; i++)
  2400. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  2401. // register access in plain mode
  2402. if (ranges[i].start != ranges[i].end) {
  2403. pcilib_register_bank_t regbank = pcilib_find_bank_by_addr(handle, ranges[i].bank);
  2404. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  2405. bank = model_info->banks[regbank].name;
  2406. start += ranges[i].addr_shift;
  2407. addr_shift = ranges[i].addr_shift;
  2408. ++mode;
  2409. }
  2410. }
  2411. } else {
  2412. if (pcilib_find_register(handle, bank, addr) == PCILIB_REGISTER_INVALID) {
  2413. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  2414. } else {
  2415. reg = addr;
  2416. ++mode;
  2417. }
  2418. }
  2419. }
  2420. if (mode == MODE_GRAB) {
  2421. if (output) {
  2422. char fsname[128];
  2423. if (!get_file_fs(output, 127, fsname)) {
  2424. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  2425. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  2426. }
  2427. } else {
  2428. output = "/dev/null";
  2429. partition = PARTITION_NULL;
  2430. }
  2431. if (!timeout_set) {
  2432. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  2433. else timeout = PCILIB_EVENT_TIMEOUT;
  2434. }
  2435. if (!size_set) {
  2436. if (run_time) size = 0;
  2437. }
  2438. }
  2439. if (mode != MODE_GRAB) {
  2440. if (size == (size_t)-1)
  2441. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  2442. }
  2443. if ((bank)&&(amode == ACCESS_DMA)) {
  2444. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  2445. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  2446. else dma = itmp;
  2447. } else if (bank) {
  2448. switch (mode) {
  2449. case MODE_BENCHMARK:
  2450. case MODE_READ:
  2451. case MODE_WRITE:
  2452. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS))
  2453. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2454. else bar = itmp;
  2455. break;
  2456. default:
  2457. if (pcilib_find_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  2458. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2459. }
  2460. }
  2461. signal(SIGINT, signal_exit_handler);
  2462. if ((mode != MODE_GRAB)&&(output)) {
  2463. ofile = fopen(output, "a+");
  2464. if (!ofile) {
  2465. Error("Failed to open file \"%s\"", output);
  2466. }
  2467. }
  2468. switch (mode) {
  2469. case MODE_INFO:
  2470. Info(handle, model_info);
  2471. break;
  2472. case MODE_LIST:
  2473. List(handle, model_info, bank, details);
  2474. break;
  2475. case MODE_BENCHMARK:
  2476. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  2477. break;
  2478. case MODE_READ:
  2479. if (amode == ACCESS_DMA) {
  2480. ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  2481. } else if (amode == ACCESS_CONFIG) {
  2482. ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  2483. } else if (addr) {
  2484. ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  2485. } else {
  2486. Error("Address to read is not specified");
  2487. }
  2488. break;
  2489. case MODE_READ_REGISTER:
  2490. if ((reg)||(!addr)) ReadRegister(handle, model_info, bank, reg);
  2491. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  2492. break;
  2493. case MODE_WRITE:
  2494. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  2495. break;
  2496. case MODE_WRITE_REGISTER:
  2497. if (reg) WriteRegister(handle, model_info, bank, reg, data);
  2498. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  2499. break;
  2500. case MODE_RESET:
  2501. pcilib_reset(handle);
  2502. break;
  2503. case MODE_GRAB:
  2504. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  2505. break;
  2506. case MODE_LIST_DMA:
  2507. ListDMA(handle, fpga_device, model_info);
  2508. break;
  2509. case MODE_LIST_DMA_BUFFERS:
  2510. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  2511. break;
  2512. case MODE_READ_DMA_BUFFER:
  2513. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  2514. break;
  2515. case MODE_START_DMA:
  2516. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  2517. break;
  2518. case MODE_STOP_DMA:
  2519. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  2520. break;
  2521. case MODE_ENABLE_IRQ:
  2522. EnableIRQ(handle, model_info, irq_type);
  2523. break;
  2524. case MODE_DISABLE_IRQ:
  2525. DisableIRQ(handle, model_info, irq_type);
  2526. break;
  2527. case MODE_ACK_IRQ:
  2528. AckIRQ(handle, model_info, irq_source);
  2529. break;
  2530. case MODE_WAIT_IRQ:
  2531. WaitIRQ(handle, model_info, irq_source, timeout);
  2532. break;
  2533. case MODE_LIST_KMEM:
  2534. if (use) DetailKMEM(handle, fpga_device, use, block);
  2535. else ListKMEM(handle, fpga_device);
  2536. break;
  2537. case MODE_READ_KMEM:
  2538. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  2539. break;
  2540. case MODE_ALLOC_KMEM:
  2541. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  2542. break;
  2543. case MODE_FREE_KMEM:
  2544. FreeKMEM(handle, fpga_device, use, force);
  2545. break;
  2546. case MODE_INVALID:
  2547. break;
  2548. }
  2549. if (ofile) fclose(ofile);
  2550. pcilib_close(handle);
  2551. if (data != argv + optind) free(data);
  2552. }