base.c 19 KB

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  1. #define _IPECAMERA_IMAGE_C
  2. #define _BSD_SOURCE
  3. #define _GNU_SOURCE
  4. #include <stdio.h>
  5. #include <stdlib.h>
  6. #include <unistd.h>
  7. #include <string.h>
  8. #include <sys/time.h>
  9. #include <pthread.h>
  10. #include <assert.h>
  11. #include <ufodecode.h>
  12. #include <pcilib.h>
  13. #include <pcilib/tools.h>
  14. #include <pcilib/error.h>
  15. #include <pcilib/event.h>
  16. #include "private.h"
  17. #include "model.h"
  18. #include "reader.h"
  19. #include "events.h"
  20. #include "data.h"
  21. #define FIND_REG(var, bank, name) \
  22. ctx->var = pcilib_find_register(pcilib, bank, name); \
  23. if (ctx->var == PCILIB_REGISTER_INVALID) { \
  24. err = PCILIB_ERROR_NOTFOUND; \
  25. pcilib_error("Unable to find a %s register", name); \
  26. }
  27. #define GET_REG(reg, var) \
  28. if (!err) { \
  29. err = pcilib_read_register_by_id(pcilib, ctx->reg, &var); \
  30. if (err) { \
  31. pcilib_error("Error reading %s register", model_info->registers[ctx->reg].name); \
  32. } \
  33. }
  34. #define SET_REG(reg, val) \
  35. if (!err) { \
  36. err = pcilib_write_register_by_id(pcilib, ctx->reg, val); \
  37. if (err) { \
  38. pcilib_error("Error writting %s register", model_info->registers[ctx->reg].name); \
  39. } \
  40. }
  41. #define CHECK_REG(reg, check) \
  42. if (!err) { \
  43. err = pcilib_read_register_by_id(pcilib, ctx->reg, &value); \
  44. if (err) { \
  45. pcilib_error("Error reading %s register", model_info->registers[ctx->reg].name); \
  46. } \
  47. if (value != check) { \
  48. pcilib_error("Unexpected value (0x%lx) of register %s", value, model_info->registers[ctx->reg].name); \
  49. err = PCILIB_ERROR_INVALID_DATA; \
  50. } \
  51. }
  52. #define CHECK_STATUS()
  53. //CHECK_REG(status_reg, IPECAMERA_GET_EXPECTED_STATUS(ctx))
  54. #define CHECK_VALUE(value, val) \
  55. if ((!err)&&(value != val)) { \
  56. pcilib_error("Unexpected value (0x%x) in data stream (0x%x is expected)", value, val); \
  57. err = PCILIB_ERROR_INVALID_DATA; \
  58. }
  59. #define CHECK_FLAG(flag, check, ...) \
  60. if ((!err)&&(!(check))) { \
  61. pcilib_error("Unexpected value (0x%x) of " flag, __VA_ARGS__); \
  62. err = PCILIB_ERROR_INVALID_DATA; \
  63. }
  64. pcilib_context_t *ipecamera_init(pcilib_t *pcilib) {
  65. int err = 0;
  66. const pcilib_model_description_t *model_info = pcilib_get_model_description(pcilib);
  67. ipecamera_t *ctx = malloc(sizeof(ipecamera_t));
  68. if (ctx) {
  69. pcilib_register_value_t value;
  70. memset(ctx, 0, sizeof(ipecamera_t));
  71. ctx->buffer_size = IPECAMERA_DEFAULT_BUFFER_SIZE;
  72. ctx->dim.bpp = sizeof(ipecamera_pixel_t) * 8;
  73. // We need DMA engine initialized to resolve DMA registers
  74. // FIND_REG(packet_len_reg, "fpga", "xrawdata_packet_length");
  75. FIND_REG(status_reg, "fpga", "status");
  76. FIND_REG(control_reg, "fpga", "control");
  77. FIND_REG(status2_reg, "fpga", "status2");
  78. FIND_REG(status3_reg, "fpga", "status3");
  79. FIND_REG(n_lines_reg, "cmosis", "cmosis_number_lines");
  80. FIND_REG(line_reg, "cmosis", "cmosis_start1");
  81. FIND_REG(exposure_reg, "cmosis", "cmosis_exp_time");
  82. FIND_REG(flip_reg, "cmosis", "cmosis_image_flipping");
  83. FIND_REG(firmware_version_reg, "fpga", "firmware_version");
  84. FIND_REG(adc_resolution_reg, "fpga", "adc_resolution");
  85. FIND_REG(output_mode_reg, "fpga", "output_mode");
  86. FIND_REG(max_frames_reg, "fpga", "ddr_max_frames");
  87. FIND_REG(num_frames_reg, "fpga", "ddr_num_frames");
  88. GET_REG(firmware_version_reg, value);
  89. switch (value) {
  90. case 5:
  91. ctx->firmware = value;
  92. break;
  93. default:
  94. ctx->firmware = 5;
  95. pcilib_warning("Unsupported version of firmware (%lu)", value);
  96. }
  97. #ifdef IPECAMERA_BUG_POSTPONED_READ
  98. GET_REG(max_frames_reg, value);
  99. if ((value + IPECAMERA_RESERVE_BUFFERS + 3) > ctx->buffer_size) {
  100. ctx->buffer_size = (value + 1) + IPECAMERA_RESERVE_BUFFERS + 2;
  101. }
  102. #endif /* IPECAMERA_BUG_POSTPONED_READ */
  103. ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
  104. ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
  105. if (err) {
  106. free(ctx);
  107. return NULL;
  108. }
  109. }
  110. return (pcilib_context_t*)ctx;
  111. }
  112. void ipecamera_free(pcilib_context_t *vctx) {
  113. if (vctx) {
  114. ipecamera_t *ctx = (ipecamera_t*)vctx;
  115. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  116. free(ctx);
  117. }
  118. }
  119. pcilib_dma_context_t *ipecamera_init_dma(pcilib_context_t *vctx) {
  120. ipecamera_t *ctx = (ipecamera_t*)vctx;
  121. const pcilib_model_description_t *model_info = pcilib_get_model_description(vctx->pcilib);
  122. if ((!model_info->dma)||(!model_info->dma->api)||(!model_info->dma->api->init)) {
  123. pcilib_error("The DMA engine is not configured in model");
  124. return NULL;
  125. }
  126. if (ctx->firmware) {
  127. return model_info->dma->api->init(vctx->pcilib, NULL, NULL);
  128. } else {
  129. return model_info->dma->api->init(vctx->pcilib, "pci", NULL);
  130. }
  131. }
  132. int ipecamera_set_buffer_size(ipecamera_t *ctx, int size) {
  133. if (ctx->started) {
  134. pcilib_error("Can't change buffer size while grabbing");
  135. return PCILIB_ERROR_INVALID_REQUEST;
  136. }
  137. if (size < 2) {
  138. pcilib_error("The buffer size is too small");
  139. return PCILIB_ERROR_INVALID_REQUEST;
  140. }
  141. if (((size^(size-1)) < size) < size) {
  142. pcilib_error("The buffer size is not power of 2");
  143. }
  144. ctx->buffer_size = size;
  145. return 0;
  146. }
  147. int ipecamera_reset(pcilib_context_t *vctx) {
  148. int err = 0;
  149. ipecamera_t *ctx = (ipecamera_t*)vctx;
  150. pcilib_t *pcilib = vctx->pcilib;
  151. pcilib_register_t control, status;
  152. pcilib_register_value_t value;
  153. if (!ctx) {
  154. pcilib_error("IPECamera imaging is not initialized");
  155. return PCILIB_ERROR_NOTINITIALIZED;
  156. }
  157. if (!ctx->firmware) {
  158. pcilib_warning("Unsupported version of firmware (%lu)", ctx->firmware);
  159. return 0;
  160. }
  161. pcilib = vctx->pcilib;
  162. control = ctx->control_reg;
  163. status = ctx->status_reg;
  164. // Set Reset bit to CMOSIS
  165. err = pcilib_write_register_by_id(pcilib, control, 0x1e4);
  166. if (err) {
  167. pcilib_error("Error setting FPGA reset bit");
  168. return err;
  169. }
  170. usleep(IPECAMERA_SLEEP_TIME);
  171. // Remove Reset bit to CMOSIS
  172. err = pcilib_write_register_by_id(pcilib, control, 0x1e1);
  173. if (err) {
  174. pcilib_error("Error reseting FPGA reset bit");
  175. return err;
  176. }
  177. usleep(IPECAMERA_SLEEP_TIME);
  178. // Special settings for CMOSIS v.2
  179. value = 01; err = pcilib_write_register_space(pcilib, "cmosis", 115, 1, &value);
  180. if (err) {
  181. pcilib_error("Error setting CMOSIS configuration");
  182. return err;
  183. }
  184. usleep(IPECAMERA_SLEEP_TIME);
  185. value = 07; err = pcilib_write_register_space(pcilib, "cmosis", 82, 1, &value);
  186. if (err) {
  187. pcilib_error("Error setting CMOSIS configuration");
  188. return err;
  189. }
  190. usleep(IPECAMERA_SLEEP_TIME);
  191. // Set default parameters
  192. err = pcilib_write_register_by_id(pcilib, control, IPECAMERA_IDLE);
  193. if (err) {
  194. pcilib_error("Error bringing FPGA in default mode");
  195. return err;
  196. }
  197. usleep(10000);
  198. CHECK_STATUS();
  199. if (err) {
  200. err = pcilib_read_register_by_id(pcilib, status, &value);
  201. if (err) pcilib_error("Error reading status register");
  202. else pcilib_error("Camera returns unexpected status (status: %lx)", value);
  203. return PCILIB_ERROR_VERIFY;
  204. }
  205. // DS: Get rid of pending DMA data
  206. return 0;
  207. }
  208. int ipecamera_start(pcilib_context_t *vctx, pcilib_event_t event_mask, pcilib_event_flags_t flags) {
  209. int i;
  210. int err = 0;
  211. ipecamera_t *ctx = (ipecamera_t*)vctx;
  212. pcilib_t *pcilib = vctx->pcilib;
  213. pcilib_register_value_t value;
  214. const pcilib_model_description_t *model_info = pcilib_get_model_description(pcilib);
  215. pthread_attr_t attr;
  216. struct sched_param sched;
  217. if (!ctx) {
  218. pcilib_error("IPECamera imaging is not initialized");
  219. return PCILIB_ERROR_NOTINITIALIZED;
  220. }
  221. if (!ctx->firmware) {
  222. pcilib_error("Unsupported version of firmware (%lu)", ctx->firmware);
  223. return PCILIB_ERROR_INVALID_REQUEST;
  224. }
  225. if (ctx->started) {
  226. pcilib_error("IPECamera grabbing is already started");
  227. return PCILIB_ERROR_INVALID_REQUEST;
  228. }
  229. ctx->event_id = 0;
  230. ctx->preproc_id = 0;
  231. ctx->reported_id = 0;
  232. ctx->buffer_pos = 0;
  233. ctx->parse_data = (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)?0:1;
  234. ctx->cur_size = 0;
  235. ctx->dim.width = IPECAMERA_WIDTH;
  236. ctx->dim.height = IPECAMERA_MAX_LINES;
  237. // GET_REG(n_lines_reg, ctx->dim.height);
  238. GET_REG(output_mode_reg, value);
  239. switch (value) {
  240. case IPECAMERA_MODE_16_CHAN_IO:
  241. ctx->cmosis_outputs = 16;
  242. break;
  243. case IPECAMERA_MODE_4_CHAN_IO:
  244. ctx->cmosis_outputs = 4;
  245. break;
  246. default:
  247. pcilib_error("IPECamera reporting invalid output_mode 0x%lx", value);
  248. return PCILIB_ERROR_INVALID_STATE;
  249. }
  250. ipecamera_compute_buffer_size(ctx, ctx->dim.height);
  251. ctx->raw_size = ctx->cur_raw_size;
  252. ctx->full_size = ctx->cur_full_size;
  253. ctx->padded_size = ctx->cur_padded_size;
  254. ctx->image_size = ctx->dim.width * ctx->dim.height;
  255. GET_REG(max_frames_reg, value);
  256. ctx->max_frames = value;
  257. ctx->buffer = malloc(ctx->padded_size * ctx->buffer_size);
  258. if (!ctx->buffer) {
  259. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  260. pcilib_error("Unable to allocate ring buffer (%lu bytes)", ctx->padded_size * ctx->buffer_size);
  261. return PCILIB_ERROR_MEMORY;
  262. }
  263. ctx->image = (ipecamera_pixel_t*)malloc(ctx->image_size * ctx->buffer_size * sizeof(ipecamera_pixel_t));
  264. if (!ctx->image) {
  265. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  266. pcilib_error("Unable to allocate image buffer (%lu bytes)", ctx->image_size * ctx->buffer_size * sizeof(ipecamera_pixel_t));
  267. return PCILIB_ERROR_MEMORY;
  268. }
  269. ctx->cmask = malloc(ctx->dim.height * ctx->buffer_size * sizeof(ipecamera_change_mask_t));
  270. if (!ctx->cmask) {
  271. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  272. pcilib_error("Unable to allocate change-mask buffer");
  273. return PCILIB_ERROR_MEMORY;
  274. }
  275. ctx->frame = (ipecamera_frame_t*)malloc(ctx->buffer_size * sizeof(ipecamera_frame_t));
  276. if (!ctx->frame) {
  277. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  278. pcilib_error("Unable to allocate frame-info buffer");
  279. return PCILIB_ERROR_MEMORY;
  280. }
  281. memset(ctx->frame, 0, ctx->buffer_size * sizeof(ipecamera_frame_t));
  282. for (i = 0; i < ctx->buffer_size; i++) {
  283. err = pthread_rwlock_init(&ctx->frame[i].mutex, NULL);
  284. if (err) break;
  285. }
  286. ctx->frame_mutex_destroy = i;
  287. if (err) {
  288. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  289. pcilib_error("Initialization of rwlock mutexes for frame synchronization has failed");
  290. return PCILIB_ERROR_FAILED;
  291. }
  292. ctx->ipedec = ufo_decoder_new(ctx->dim.height, ctx->dim.width, NULL, 0);
  293. if (!ctx->ipedec) {
  294. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  295. pcilib_error("Unable to initialize IPECamera decoder library");
  296. return PCILIB_ERROR_FAILED;
  297. }
  298. if (!err) {
  299. ctx->rdma = pcilib_find_dma_by_addr(vctx->pcilib, PCILIB_DMA_FROM_DEVICE, IPECAMERA_DMA_ADDRESS);
  300. if (ctx->rdma == PCILIB_DMA_ENGINE_INVALID) {
  301. err = PCILIB_ERROR_NOTFOUND;
  302. pcilib_error("The C2S channel of IPECamera DMA Engine (%u) is not found", IPECAMERA_DMA_ADDRESS);
  303. } else {
  304. err = pcilib_start_dma(vctx->pcilib, ctx->rdma, PCILIB_DMA_FLAGS_DEFAULT);
  305. if (err) {
  306. ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
  307. pcilib_error("Failed to initialize C2S channel of IPECamera DMA Engine (%u)", IPECAMERA_DMA_ADDRESS);
  308. }
  309. }
  310. }
  311. /*
  312. if (!err) {
  313. ctx->wdma = pcilib_find_dma_by_addr(vctx->pcilib, PCILIB_DMA_TO_DEVICE, IPECAMERA_DMA_ADDRESS);
  314. if (ctx->wdma == PCILIB_DMA_ENGINE_INVALID) {
  315. err = PCILIB_ERROR_NOTFOUND;
  316. pcilib_error("The S2C channel of IPECamera DMA Engine (%u) is not found", IPECAMERA_DMA_ADDRESS);
  317. } else {
  318. err = pcilib_start_dma(vctx->pcilib, ctx->wdma, PCILIB_DMA_FLAGS_DEFAULT);
  319. if (err) {
  320. ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
  321. pcilib_error("Failed to initialize S2C channel of IPECamera DMA Engine (%u)", IPECAMERA_DMA_ADDRESS);
  322. }
  323. }
  324. }
  325. */
  326. /*
  327. SET_REG(packet_len_reg, IPECAMERA_DMA_PACKET_LENGTH);
  328. */
  329. if (err) {
  330. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  331. return err;
  332. }
  333. // Clean DMA
  334. #ifndef IPECAMERA_BUG_POSTPONED_READ
  335. err = pcilib_skip_dma(vctx->pcilib, ctx->rdma);
  336. if (err) {
  337. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  338. pcilib_error("Can't start grabbing, device continuously writes unexpected data using DMA engine");
  339. return err;
  340. }
  341. #endif /* ! IPECAMERA_BUG_POSTPONED_READ */
  342. if (vctx->params.autostop.duration) {
  343. gettimeofday(&ctx->autostop.timestamp, NULL);
  344. ctx->autostop.timestamp.tv_usec += vctx->params.autostop.duration % 1000000;
  345. if (ctx->autostop.timestamp.tv_usec > 999999) {
  346. ctx->autostop.timestamp.tv_sec += 1 + vctx->params.autostop.duration / 1000000;
  347. ctx->autostop.timestamp.tv_usec -= 1000000;
  348. } else {
  349. ctx->autostop.timestamp.tv_sec += vctx->params.autostop.duration / 1000000;
  350. }
  351. }
  352. if (vctx->params.autostop.max_events) {
  353. ctx->autostop.evid = vctx->params.autostop.max_events;
  354. }
  355. if ((ctx->parse_data)&&(flags&PCILIB_EVENT_FLAG_PREPROCESS)) {
  356. ctx->n_preproc = pcilib_get_cpu_count();
  357. // it would be greate to detect hyperthreading cores and ban them
  358. switch (ctx->n_preproc) {
  359. case 1: break;
  360. case 2 ... 3: ctx->n_preproc -= 1; break;
  361. default: ctx->n_preproc -= 2; break;
  362. }
  363. if ((vctx->params.parallel.max_threads)&&(vctx->params.parallel.max_threads < ctx->n_preproc))
  364. ctx->n_preproc = vctx->params.parallel.max_threads;
  365. ctx->preproc = (ipecamera_preprocessor_t*)malloc(ctx->n_preproc * sizeof(ipecamera_preprocessor_t));
  366. if (!ctx->preproc) {
  367. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  368. pcilib_error("Unable to allocate memory for preprocessor contexts");
  369. return PCILIB_ERROR_MEMORY;
  370. }
  371. memset(ctx->preproc, 0, ctx->n_preproc * sizeof(ipecamera_preprocessor_t));
  372. err = pthread_mutex_init(&ctx->preproc_mutex, NULL);
  373. if (err) {
  374. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  375. pcilib_error("Failed to initialize event mutex");
  376. return PCILIB_ERROR_FAILED;
  377. }
  378. ctx->preproc_mutex_destroy = 1;
  379. ctx->run_preprocessors = 1;
  380. for (i = 0; i < ctx->n_preproc; i++) {
  381. ctx->preproc[i].i = i;
  382. ctx->preproc[i].ipecamera = ctx;
  383. err = pthread_create(&ctx->preproc[i].thread, NULL, ipecamera_preproc_thread, ctx->preproc + i);
  384. if (err) {
  385. err = PCILIB_ERROR_FAILED;
  386. break;
  387. } else {
  388. ctx->preproc[i].started = 1;
  389. }
  390. }
  391. if (err) {
  392. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  393. pcilib_error("Failed to schedule some of the preprocessor threads");
  394. return err;
  395. }
  396. } else {
  397. ctx->n_preproc = 0;
  398. }
  399. ctx->started = 1;
  400. ctx->run_reader = 1;
  401. pthread_attr_init(&attr);
  402. if (pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  403. pcilib_warning("Can't schedule a real-time thread, you may consider running as root");
  404. } else {
  405. sched.sched_priority = sched_get_priority_max(SCHED_FIFO) - 1; // Let 1 priority for something really critcial
  406. pthread_attr_setschedparam(&attr, &sched);
  407. }
  408. if (pthread_create(&ctx->rthread, &attr, &ipecamera_reader_thread, (void*)ctx)) {
  409. ctx->started = 0;
  410. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  411. err = PCILIB_ERROR_FAILED;
  412. }
  413. pthread_attr_destroy(&attr);
  414. return err;
  415. }
  416. int ipecamera_stop(pcilib_context_t *vctx, pcilib_event_flags_t flags) {
  417. int i;
  418. int err;
  419. void *retcode;
  420. ipecamera_t *ctx = (ipecamera_t*)vctx;
  421. if (!ctx) {
  422. pcilib_error("IPECamera imaging is not initialized");
  423. return PCILIB_ERROR_NOTINITIALIZED;
  424. }
  425. if (flags&PCILIB_EVENT_FLAG_STOP_ONLY) {
  426. ctx->run_reader = 0;
  427. return 0;
  428. }
  429. if (ctx->started) {
  430. ctx->run_reader = 0;
  431. err = pthread_join(ctx->rthread, &retcode);
  432. if (err) pcilib_error("Error joining the reader thread");
  433. }
  434. if (ctx->preproc) {
  435. ctx->run_preprocessors = 0;
  436. for (i = 0; i < ctx->n_preproc; i++) {
  437. if (ctx->preproc[i].started) {
  438. pthread_join(ctx->preproc[i].thread, &retcode);
  439. ctx->preproc[i].started = 0;
  440. }
  441. }
  442. if (ctx->preproc_mutex_destroy) {
  443. pthread_mutex_destroy(&ctx->preproc_mutex);
  444. ctx->preproc_mutex_destroy = 0;
  445. }
  446. free(ctx->preproc);
  447. ctx->preproc = NULL;
  448. }
  449. if (ctx->frame_mutex_destroy) {
  450. for (i = 0; i < ctx->frame_mutex_destroy; i++) {
  451. pthread_rwlock_destroy(&ctx->frame[i].mutex);
  452. }
  453. ctx->frame_mutex_destroy = 0;
  454. }
  455. if (ctx->wdma != PCILIB_DMA_ENGINE_INVALID) {
  456. pcilib_stop_dma(vctx->pcilib, ctx->wdma, PCILIB_DMA_FLAGS_DEFAULT);
  457. ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
  458. }
  459. if (ctx->rdma != PCILIB_DMA_ENGINE_INVALID) {
  460. pcilib_stop_dma(vctx->pcilib, ctx->rdma, PCILIB_DMA_FLAGS_DEFAULT);
  461. ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
  462. }
  463. while (ctx->streaming) {
  464. usleep(IPECAMERA_NOFRAME_SLEEP);
  465. }
  466. if (ctx->ipedec) {
  467. ufo_decoder_free(ctx->ipedec);
  468. ctx->ipedec = NULL;
  469. }
  470. if (ctx->frame) {
  471. free(ctx->frame);
  472. ctx->frame = NULL;
  473. }
  474. if (ctx->cmask) {
  475. free(ctx->cmask);
  476. ctx->cmask = NULL;
  477. }
  478. if (ctx->image) {
  479. free(ctx->image);
  480. ctx->image = NULL;
  481. }
  482. if (ctx->buffer) {
  483. free(ctx->buffer);
  484. ctx->buffer = NULL;
  485. }
  486. memset(&ctx->autostop, 0, sizeof(ipecamera_autostop_t));
  487. ctx->event_id = 0;
  488. ctx->reported_id = 0;
  489. ctx->buffer_pos = 0;
  490. ctx->started = 0;
  491. return 0;
  492. }
  493. int ipecamera_trigger(pcilib_context_t *vctx, pcilib_event_t event, size_t trigger_size, void *trigger_data) {
  494. int err = 0;
  495. pcilib_register_value_t value;
  496. ipecamera_t *ctx = (ipecamera_t*)vctx;
  497. pcilib_t *pcilib = vctx->pcilib;
  498. const pcilib_model_description_t *model_info = pcilib_get_model_description(pcilib);
  499. if (!ctx) {
  500. pcilib_error("IPECamera imaging is not initialized");
  501. return PCILIB_ERROR_NOTINITIALIZED;
  502. }
  503. if (!ctx->firmware) {
  504. pcilib_error("Unsupported version of firmware (%lu)", ctx->firmware);
  505. return PCILIB_ERROR_INVALID_REQUEST;
  506. }
  507. pcilib_sleep_until_deadline(&ctx->next_trigger);
  508. /*
  509. GET_REG(num_frames_reg, value);
  510. if (value == ctx->max_frames) {
  511. return PCILIB_ERROR_BUSY;
  512. }
  513. */
  514. GET_REG(status2_reg, value);
  515. if (value&0x40000000) {
  516. // printf("%x\n", value);
  517. // GET_REG(status3_reg, value);
  518. // printf("3: %x\n", value);
  519. // GET_REG(status_reg, value);
  520. // printf("1: %x\n", value);
  521. #ifdef IPECAMERA_TRIGGER_WAIT_IDLE
  522. if (IPECAMERA_TRIGGER_WAIT_IDLE) {
  523. struct timeval deadline;
  524. pcilib_calc_deadline(&deadline, IPECAMERA_TRIGGER_WAIT_IDLE);
  525. do {
  526. usleep(IPECAMERA_READ_STATUS_DELAY);
  527. GET_REG(status2_reg, value);
  528. } while ((value&0x40000000)&&(pcilib_calc_time_to_deadline(&deadline) > 0));
  529. }
  530. if (value&0x40000000)
  531. #endif /* IPECAMERA_TRIGGER_WAIT_IDLE */
  532. return PCILIB_ERROR_BUSY;
  533. }
  534. GET_REG(control_reg, value);
  535. SET_REG(control_reg, value|IPECAMERA_FRAME_REQUEST);
  536. usleep(IPECAMERA_WAIT_FRAME_RCVD_TIME);
  537. //DS: CHECK_REG(status_reg, IPECAMERA_EXPECTED_STATUS);
  538. SET_REG(control_reg, value);
  539. // We need to compute it differently, on top of that add exposure time and the time FPGA takes to read frame from CMOSIS
  540. pcilib_calc_deadline(&ctx->next_trigger, IPECAMERA_NEXT_FRAME_DELAY);
  541. return 0;
  542. }