 Suren A. Chilingaryan
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02924fc496
Support dynamic registers, support register offsets and multiregisters (bitmasks), list NWL DMA registers
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13 anni fa |
 root
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c95df4d437
Move to new FPGA design
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13 anni fa |
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Suren A. Chilingaryan
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4be69efe31
Alternative way to overcome problem with address verification of CMOSIS registers
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13 anni fa |
|
Suren A. Chilingaryan
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60d848702a
Support simplified mode (slow) of writting CMOSIS sensors: issue 3 writes + delays and when start looking for status
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13 anni fa |
|
Suren A. Chilingaryan
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39b33ce4be
Infrastructure for event API
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13 anni fa |
