 Suren A. Chilingaryan
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2e4e8a00b2
multithread preprocessing of ipecamera frames and code reorganization
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12 years ago |
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Suren A. Chilingaryan
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869ed99dbc
new event architecture, first trial
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12 years ago |
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Suren A. Chilingaryan
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f4ad2df220
First iteration of work to preserve DMA state between executions
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13 years ago |
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Suren A. Chilingaryan
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c095f06560
IRQ support in NWL DMA engine
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13 years ago |
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Suren A. Chilingaryan
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02924fc496
Support dynamic registers, support register offsets and multiregisters (bitmasks), list NWL DMA registers
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13 years ago |
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Suren A. Chilingaryan
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d98d86bd6b
Support FIFO reading/writting, code restructurization, few fixes
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13 years ago |
 root
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2e7a7a3534
North West Logick DMA implementation
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13 years ago |
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root
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70937611e3
DMA engine initialization and basic intrastructure for DMA read/write
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13 years ago |
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root
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4b5a2c9625
Enumerate DMA engines
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13 years ago |
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root
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1aafef5017
A bit of DMA infrastructure
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13 years ago |
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root
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c95df4d437
Move to new FPGA design
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13 years ago |
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Suren A. Chilingaryan
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6c207f6c26
Some improvements in error handling
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13 years ago |
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Suren A. Chilingaryan
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a178ae6180
Introduce pcilib_context_t type instead pointer to void
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13 years ago |
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Suren A. Chilingaryan
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d7143e0f1f
Accept timeout parameter to get_next_event call
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13 years ago |
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Suren A. Chilingaryan
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b70ed8b6cc
Support non-callback way of getting events
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13 years ago |
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Suren A. Chilingaryan
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b5eac3af41
Really fix setting registers with access mode equal to 32 (size of pcilib_register_value_t)
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13 years ago |
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Suren A. Chilingaryan
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5ccdcb53a3
Allow access to implementation context and provide call to set size of internal buffer for IPECamera
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13 years ago |
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Suren A. Chilingaryan
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445d5db018
Prototype of IPECamera image protocol
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13 years ago |
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Suren A. Chilingaryan
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39b33ce4be
Infrastructure for event API
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13 years ago |
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Suren A. Chilingaryan
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a5fc8db4f2
Fix exiting on warnings
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13 years ago |
 Matthias Vogelgesang
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30998baf65
Set warning handler
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13 years ago |
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Suren A. Chilingaryan
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625e502a76
Correctly detect model in pci.c
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13 years ago |
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Suren A. Chilingaryan
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134e2cc87d
Provide single header for library
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13 years ago |
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Suren A. Chilingaryan
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a008b10d84
Support for FPGA registers
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13 years ago |
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Suren A. Chilingaryan
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b0596cb0f0
Support writting and reading of register ranges
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13 years ago |
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Suren A. Chilingaryan
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1f39476f28
Better handling of register banks
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13 years ago |
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Suren A. Chilingaryan
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7f97ea0741
Initial support of IPECamera protocol
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13 years ago |
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Suren A. Chilingaryan
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c428e3496a
Initial support for registers, infrastructure only
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13 years ago |
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Suren A. Chilingaryan
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f08ec5dd01
Print new line
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13 years ago |
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Suren A. Chilingaryan
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813c7abf04
Print a bit more details
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13 years ago |
