ipecamera.c 16 KB

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  1. #define _IPECAMERA_IMAGE_C
  2. #define _BSD_SOURCE
  3. #define _GNU_SOURCE
  4. #include <stdio.h>
  5. #include <stdlib.h>
  6. #include <unistd.h>
  7. #include <string.h>
  8. #include <sys/time.h>
  9. #include <pthread.h>
  10. #include <assert.h>
  11. #include <ufodecode.h>
  12. #include "../tools.h"
  13. #include "../error.h"
  14. #include "../event.h"
  15. #include "pcilib.h"
  16. #include "private.h"
  17. #include "model.h"
  18. #include "reader.h"
  19. #include "events.h"
  20. #include "data.h"
  21. #include "dma/nwl_dma.h"
  22. #ifdef IPECAMERA_DEBUG
  23. #include "dma/nwl.h"
  24. #endif /* IPECAMERA_DEBUG */
  25. #define FIND_REG(var, bank, name) \
  26. ctx->var = pcilib_find_register(pcilib, bank, name); \
  27. if (ctx->var == PCILIB_REGISTER_INVALID) { \
  28. err = PCILIB_ERROR_NOTFOUND; \
  29. pcilib_error("Unable to find a %s register", name); \
  30. }
  31. #define GET_REG(reg, var) \
  32. if (!err) { \
  33. err = pcilib_read_register_by_id(pcilib, ctx->reg, &var); \
  34. if (err) { \
  35. pcilib_error("Error reading %s register", ipecamera_registers[ctx->reg].name); \
  36. } \
  37. }
  38. #define SET_REG(reg, val) \
  39. if (!err) { \
  40. err = pcilib_write_register_by_id(pcilib, ctx->reg, val); \
  41. if (err) { \
  42. pcilib_error("Error writting %s register", ipecamera_registers[ctx->reg].name); \
  43. } \
  44. }
  45. #define CHECK_REG(reg, check) \
  46. if (!err) { \
  47. err = pcilib_read_register_by_id(pcilib, ctx->reg, &value); \
  48. if (err) { \
  49. pcilib_error("Error reading %s register", ipecamera_registers[ctx->reg].name); \
  50. } \
  51. if (!(check)) { \
  52. pcilib_error("Unexpected value (%li) of register %s", value, ipecamera_registers[ctx->reg].name); \
  53. err = PCILIB_ERROR_INVALID_DATA; \
  54. } \
  55. }
  56. #define CHECK_VALUE(value, val) \
  57. if ((!err)&&(value != val)) { \
  58. pcilib_error("Unexpected value (0x%x) in data stream (0x%x is expected)", value, val); \
  59. err = PCILIB_ERROR_INVALID_DATA; \
  60. }
  61. #define CHECK_FLAG(flag, check, ...) \
  62. if ((!err)&&(!(check))) { \
  63. pcilib_error("Unexpected value (0x%x) of " flag, __VA_ARGS__); \
  64. err = PCILIB_ERROR_INVALID_DATA; \
  65. }
  66. pcilib_context_t *ipecamera_init(pcilib_t *pcilib) {
  67. int err = 0;
  68. ipecamera_t *ctx = malloc(sizeof(ipecamera_t));
  69. if (ctx) {
  70. memset(ctx, 0, sizeof(ipecamera_t));
  71. ctx->buffer_size = IPECAMERA_DEFAULT_BUFFER_SIZE;
  72. ctx->dim.bpp = sizeof(ipecamera_pixel_t) * 8;
  73. // We need DMA engine initialized to resolve DMA registers
  74. // FIND_REG(packet_len_reg, "fpga", "xrawdata_packet_length");
  75. FIND_REG(status_reg, "fpga", "status");
  76. FIND_REG(control_reg, "fpga", "control");
  77. FIND_REG(start_reg, "fpga", "start_address");
  78. FIND_REG(end_reg, "fpga", "end_address");
  79. FIND_REG(n_lines_reg, "cmosis", "number_lines");
  80. FIND_REG(line_reg, "cmosis", "start1");
  81. FIND_REG(exposure_reg, "cmosis", "exp_time");
  82. FIND_REG(flip_reg, "cmosis", "image_flipping");
  83. ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
  84. ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
  85. if (err) {
  86. free(ctx);
  87. return NULL;
  88. }
  89. }
  90. return (pcilib_context_t*)ctx;
  91. }
  92. void ipecamera_free(pcilib_context_t *vctx) {
  93. if (vctx) {
  94. ipecamera_t *ctx = (ipecamera_t*)vctx;
  95. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  96. free(ctx);
  97. }
  98. }
  99. pcilib_dma_context_t *ipecamera_init_dma(pcilib_context_t *vctx) {
  100. // ipecamera_t *ctx = (ipecamera_t*)vctx;
  101. pcilib_model_description_t *model_info = pcilib_get_model_description(vctx->pcilib);
  102. if ((!model_info->dma_api)||(!model_info->dma_api->init)) {
  103. pcilib_error("The DMA engine is not configured in model");
  104. return NULL;
  105. }
  106. #ifdef IPECAMERA_DMA_R3
  107. return model_info->dma_api->init(vctx->pcilib, PCILIB_NWL_MODIFICATION_IPECAMERA, NULL);
  108. #else
  109. return model_info->dma_api->init(vctx->pcilib, PCILIB_DMA_MODIFICATION_DEFAULT, NULL);
  110. #endif
  111. }
  112. int ipecamera_set_buffer_size(ipecamera_t *ctx, int size) {
  113. if (ctx->started) {
  114. pcilib_error("Can't change buffer size while grabbing");
  115. return PCILIB_ERROR_INVALID_REQUEST;
  116. }
  117. if (size < 2) {
  118. pcilib_error("The buffer size is too small");
  119. return PCILIB_ERROR_INVALID_REQUEST;
  120. }
  121. if (((size^(size-1)) < size) < size) {
  122. pcilib_error("The buffer size is not power of 2");
  123. }
  124. ctx->buffer_size = size;
  125. return 0;
  126. }
  127. int ipecamera_reset(pcilib_context_t *vctx) {
  128. int err = 0;
  129. ipecamera_t *ctx = (ipecamera_t*)vctx;
  130. pcilib_t *pcilib = vctx->pcilib;
  131. pcilib_register_t control, status;
  132. pcilib_register_value_t value;
  133. if (!ctx) {
  134. pcilib_error("IPECamera imaging is not initialized");
  135. return PCILIB_ERROR_NOTINITIALIZED;
  136. }
  137. pcilib = vctx->pcilib;
  138. control = ctx->control_reg;
  139. status = ctx->status_reg;
  140. // Set Reset bit to CMOSIS
  141. err = pcilib_write_register_by_id(pcilib, control, 0x1e4);
  142. if (err) {
  143. pcilib_error("Error setting FPGA reset bit");
  144. return err;
  145. }
  146. usleep(IPECAMERA_SLEEP_TIME);
  147. // Remove Reset bit to CMOSIS
  148. err = pcilib_write_register_by_id(pcilib, control, 0x1e1);
  149. if (err) {
  150. pcilib_error("Error reseting FPGA reset bit");
  151. return err;
  152. }
  153. usleep(IPECAMERA_SLEEP_TIME);
  154. // Special settings for CMOSIS v.2
  155. value = 01; err = pcilib_write_register_space(pcilib, "cmosis", 115, 1, &value);
  156. if (err) {
  157. pcilib_error("Error setting CMOSIS configuration");
  158. return err;
  159. }
  160. usleep(IPECAMERA_SLEEP_TIME);
  161. value = 07; err = pcilib_write_register_space(pcilib, "cmosis", 82, 1, &value);
  162. if (err) {
  163. pcilib_error("Error setting CMOSIS configuration");
  164. return err;
  165. }
  166. usleep(IPECAMERA_SLEEP_TIME);
  167. // Set default parameters
  168. err = pcilib_write_register_by_id(pcilib, control, IPECAMERA_IDLE);
  169. if (err) {
  170. pcilib_error("Error bringing FPGA in default mode");
  171. return err;
  172. }
  173. usleep(10000);
  174. err = pcilib_read_register_by_id(pcilib, status, &value);
  175. if (err) {
  176. pcilib_error("Error reading status register");
  177. return err;
  178. }
  179. if (value != IPECAMERA_EXPECTED_STATUS) {
  180. pcilib_error("Unexpected value (%lx) of status register, expected %lx", value, IPECAMERA_EXPECTED_STATUS);
  181. return PCILIB_ERROR_VERIFY;
  182. }
  183. return 0;
  184. }
  185. int ipecamera_start(pcilib_context_t *vctx, pcilib_event_t event_mask, pcilib_event_flags_t flags) {
  186. int i;
  187. int err = 0;
  188. ipecamera_t *ctx = (ipecamera_t*)vctx;
  189. pcilib_t *pcilib = vctx->pcilib;
  190. pcilib_register_value_t value;
  191. const size_t chan_size = (2 + IPECAMERA_PIXELS_PER_CHANNEL / 3) * sizeof(ipecamera_payload_t);
  192. const size_t line_size = (IPECAMERA_MAX_CHANNELS * chan_size);
  193. const size_t header_size = 8 * sizeof(ipecamera_payload_t);
  194. const size_t footer_size = 8 * sizeof(ipecamera_payload_t);
  195. size_t raw_size;
  196. size_t padded_blocks;
  197. pthread_attr_t attr;
  198. struct sched_param sched;
  199. if (!ctx) {
  200. pcilib_error("IPECamera imaging is not initialized");
  201. return PCILIB_ERROR_NOTINITIALIZED;
  202. }
  203. if (ctx->started) {
  204. pcilib_error("IPECamera grabbing is already started");
  205. return PCILIB_ERROR_INVALID_REQUEST;
  206. }
  207. // Allow readout and clean the FRAME_REQUEST mode if set for some reason
  208. SET_REG(control_reg, IPECAMERA_IDLE|IPECAMERA_READOUT_FLAG);
  209. usleep(IPECAMERA_SLEEP_TIME);
  210. CHECK_REG(status_reg, IPECAMERA_EXPECTED_STATUS);
  211. if (err) return err;
  212. ctx->event_id = 0;
  213. ctx->preproc_id = 0;
  214. ctx->reported_id = 0;
  215. ctx->buffer_pos = 0;
  216. ctx->parse_data = (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)?0:1;
  217. ctx->cur_size = 0;
  218. ctx->dim.width = IPECAMERA_WIDTH;
  219. GET_REG(n_lines_reg, ctx->dim.height);
  220. raw_size = header_size + ctx->dim.height * line_size + footer_size;
  221. padded_blocks = raw_size / IPECAMERA_DMA_PACKET_LENGTH + ((raw_size % IPECAMERA_DMA_PACKET_LENGTH)?1:0);
  222. ctx->image_size = ctx->dim.width * ctx->dim.height;
  223. ctx->raw_size = raw_size;
  224. ctx->full_size = padded_blocks * IPECAMERA_DMA_PACKET_LENGTH;
  225. #ifdef IPECAMERA_BUG_EXTRA_DATA
  226. ctx->full_size += 8;
  227. padded_blocks ++;
  228. #endif /* IPECAMERA_BUG_EXTRA_DATA */
  229. ctx->padded_size = padded_blocks * IPECAMERA_DMA_PACKET_LENGTH;
  230. ctx->buffer = malloc(ctx->padded_size * ctx->buffer_size);
  231. if (!ctx->buffer) {
  232. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  233. pcilib_error("Unable to allocate ring buffer (%lu bytes)", ctx->padded_size * ctx->buffer_size);
  234. return PCILIB_ERROR_MEMORY;
  235. }
  236. ctx->image = (ipecamera_pixel_t*)malloc(ctx->image_size * ctx->buffer_size * sizeof(ipecamera_pixel_t));
  237. if (!ctx->image) {
  238. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  239. pcilib_error("Unable to allocate image buffer (%lu bytes)", ctx->image_size * ctx->buffer_size * sizeof(ipecamera_pixel_t));
  240. return PCILIB_ERROR_MEMORY;
  241. }
  242. ctx->cmask = malloc(ctx->dim.height * ctx->buffer_size * sizeof(ipecamera_change_mask_t));
  243. if (!ctx->cmask) {
  244. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  245. pcilib_error("Unable to allocate change-mask buffer");
  246. return PCILIB_ERROR_MEMORY;
  247. }
  248. ctx->frame = (ipecamera_frame_t*)malloc(ctx->buffer_size * sizeof(ipecamera_frame_t));
  249. if (!ctx->frame) {
  250. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  251. pcilib_error("Unable to allocate frame-info buffer");
  252. return PCILIB_ERROR_MEMORY;
  253. }
  254. memset(ctx->frame, 0, ctx->buffer_size * sizeof(ipecamera_frame_t));
  255. for (i = 0; i < ctx->buffer_size; i++) {
  256. err = pthread_rwlock_init(&ctx->frame[i].mutex, NULL);
  257. if (err) break;
  258. }
  259. ctx->frame_mutex_destroy = i;
  260. if (err) {
  261. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  262. pcilib_error("Initialization of rwlock mutexes for frame synchronization has failed");
  263. return PCILIB_ERROR_FAILED;
  264. }
  265. ctx->ipedec = ufo_decoder_new(ctx->dim.height, ctx->dim.width, NULL, 0);
  266. if (!ctx->ipedec) {
  267. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  268. pcilib_error("Unable to initialize IPECamera decoder library");
  269. return PCILIB_ERROR_FAILED;
  270. }
  271. if (!err) {
  272. ctx->rdma = pcilib_find_dma_by_addr(vctx->pcilib, PCILIB_DMA_FROM_DEVICE, IPECAMERA_DMA_ADDRESS);
  273. if (ctx->rdma == PCILIB_DMA_ENGINE_INVALID) {
  274. err = PCILIB_ERROR_NOTFOUND;
  275. pcilib_error("The C2S channel of IPECamera DMA Engine (%u) is not found", IPECAMERA_DMA_ADDRESS);
  276. } else {
  277. err = pcilib_start_dma(vctx->pcilib, ctx->rdma, PCILIB_DMA_FLAGS_DEFAULT);
  278. if (err) {
  279. ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
  280. pcilib_error("Failed to initialize C2S channel of IPECamera DMA Engine (%u)", IPECAMERA_DMA_ADDRESS);
  281. }
  282. }
  283. }
  284. /*
  285. if (!err) {
  286. ctx->wdma = pcilib_find_dma_by_addr(vctx->pcilib, PCILIB_DMA_TO_DEVICE, IPECAMERA_DMA_ADDRESS);
  287. if (ctx->wdma == PCILIB_DMA_ENGINE_INVALID) {
  288. err = PCILIB_ERROR_NOTFOUND;
  289. pcilib_error("The S2C channel of IPECamera DMA Engine (%u) is not found", IPECAMERA_DMA_ADDRESS);
  290. } else {
  291. err = pcilib_start_dma(vctx->pcilib, ctx->wdma, PCILIB_DMA_FLAGS_DEFAULT);
  292. if (err) {
  293. ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
  294. pcilib_error("Failed to initialize S2C channel of IPECamera DMA Engine (%u)", IPECAMERA_DMA_ADDRESS);
  295. }
  296. }
  297. }
  298. */
  299. /*
  300. SET_REG(packet_len_reg, IPECAMERA_DMA_PACKET_LENGTH);
  301. */
  302. if (err) {
  303. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  304. return err;
  305. }
  306. // Clean DMA
  307. err = pcilib_skip_dma(vctx->pcilib, ctx->rdma);
  308. if (err) {
  309. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  310. pcilib_error("Can't start grabbing, device continuously writes unexpected data using DMA engine");
  311. return err;
  312. }
  313. if (vctx->params.autostop.duration) {
  314. gettimeofday(&ctx->autostop.timestamp, NULL);
  315. ctx->autostop.timestamp.tv_usec += vctx->params.autostop.duration % 1000000;
  316. if (ctx->autostop.timestamp.tv_usec > 999999) {
  317. ctx->autostop.timestamp.tv_sec += 1 + vctx->params.autostop.duration / 1000000;
  318. ctx->autostop.timestamp.tv_usec -= 1000000;
  319. } else {
  320. ctx->autostop.timestamp.tv_sec += vctx->params.autostop.duration / 1000000;
  321. }
  322. }
  323. if (vctx->params.autostop.max_events) {
  324. ctx->autostop.evid = vctx->params.autostop.max_events;
  325. }
  326. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  327. ctx->n_preproc = pcilib_get_cpu_count();
  328. switch (ctx->n_preproc) {
  329. case 1: break;
  330. case 2-3: ctx->n_preproc -= 1; break;
  331. default: ctx->n_preproc -= 2; break;
  332. }
  333. ctx->preproc = (ipecamera_preprocessor_t*)malloc(ctx->n_preproc * sizeof(ipecamera_preprocessor_t));
  334. if (!ctx->preproc) {
  335. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  336. pcilib_error("Unable to allocate memory for preprocessor contexts");
  337. return PCILIB_ERROR_MEMORY;
  338. }
  339. memset(ctx->preproc, 0, ctx->n_preproc * sizeof(ipecamera_preprocessor_t));
  340. err = pthread_mutex_init(&ctx->preproc_mutex, NULL);
  341. if (err) {
  342. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  343. pcilib_error("Failed to initialize event mutex");
  344. return PCILIB_ERROR_FAILED;
  345. }
  346. ctx->preproc_mutex_destroy = 1;
  347. ctx->run_preprocessors = 1;
  348. for (i = 0; i < ctx->n_preproc; i++) {
  349. ctx->preproc[i].i = i;
  350. ctx->preproc[i].ipecamera = ctx;
  351. err = pthread_create(&ctx->preproc[i].thread, NULL, ipecamera_preproc_thread, ctx->preproc + i);
  352. if (err) {
  353. err = PCILIB_ERROR_FAILED;
  354. break;
  355. } else {
  356. ctx->preproc[i].started = 1;
  357. }
  358. }
  359. if (err) {
  360. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  361. pcilib_error("Failed to schedule some of the preprocessor threads");
  362. return err;
  363. }
  364. } else {
  365. ctx->n_preproc = 0;
  366. }
  367. ctx->started = 1;
  368. ctx->run_reader = 1;
  369. pthread_attr_init(&attr);
  370. if (pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  371. pcilib_warning("Can't schedule a real-time thread, you may consider running as root");
  372. } else {
  373. sched.sched_priority = sched_get_priority_max(SCHED_FIFO) - 1; // Let 1 priority for something really critcial
  374. pthread_attr_setschedparam(&attr, &sched);
  375. }
  376. if (pthread_create(&ctx->rthread, &attr, &ipecamera_reader_thread, (void*)ctx)) {
  377. ctx->started = 0;
  378. ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
  379. err = PCILIB_ERROR_FAILED;
  380. }
  381. pthread_attr_destroy(&attr);
  382. return err;
  383. }
  384. int ipecamera_stop(pcilib_context_t *vctx, pcilib_event_flags_t flags) {
  385. int i;
  386. int err;
  387. void *retcode;
  388. ipecamera_t *ctx = (ipecamera_t*)vctx;
  389. if (!ctx) {
  390. pcilib_error("IPECamera imaging is not initialized");
  391. return PCILIB_ERROR_NOTINITIALIZED;
  392. }
  393. if (flags&PCILIB_EVENT_FLAG_STOP_ONLY) {
  394. ctx->run_reader = 0;
  395. return 0;
  396. }
  397. if (ctx->started) {
  398. ctx->run_reader = 0;
  399. err = pthread_join(ctx->rthread, &retcode);
  400. if (err) pcilib_error("Error joining the reader thread");
  401. }
  402. if (ctx->preproc) {
  403. ctx->run_preprocessors = 0;
  404. for (i = 0; i < ctx->n_preproc; i++) {
  405. if (ctx->preproc[i].started) {
  406. pthread_join(ctx->preproc[i].thread, &retcode);
  407. ctx->preproc[i].started = 0;
  408. }
  409. }
  410. if (ctx->preproc_mutex_destroy) {
  411. pthread_mutex_destroy(&ctx->preproc_mutex);
  412. ctx->preproc_mutex_destroy = 0;
  413. }
  414. free(ctx->preproc);
  415. ctx->preproc = NULL;
  416. }
  417. if (ctx->frame_mutex_destroy) {
  418. for (i = 0; i < ctx->frame_mutex_destroy; i++) {
  419. pthread_rwlock_destroy(&ctx->frame[i].mutex);
  420. }
  421. ctx->frame_mutex_destroy = 0;
  422. }
  423. if (ctx->wdma != PCILIB_DMA_ENGINE_INVALID) {
  424. pcilib_stop_dma(vctx->pcilib, ctx->wdma, PCILIB_DMA_FLAGS_DEFAULT);
  425. ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
  426. }
  427. if (ctx->rdma != PCILIB_DMA_ENGINE_INVALID) {
  428. pcilib_stop_dma(vctx->pcilib, ctx->rdma, PCILIB_DMA_FLAGS_DEFAULT);
  429. ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
  430. }
  431. if (ctx->ipedec) {
  432. ufo_decoder_free(ctx->ipedec);
  433. ctx->ipedec = NULL;
  434. }
  435. if (ctx->frame) {
  436. free(ctx->frame);
  437. ctx->frame = NULL;
  438. }
  439. if (ctx->cmask) {
  440. free(ctx->cmask);
  441. ctx->cmask = NULL;
  442. }
  443. if (ctx->image) {
  444. free(ctx->image);
  445. ctx->image = NULL;
  446. }
  447. if (ctx->buffer) {
  448. free(ctx->buffer);
  449. ctx->buffer = NULL;
  450. }
  451. memset(&ctx->autostop, 0, sizeof(ipecamera_autostop_t));
  452. ctx->event_id = 0;
  453. ctx->reported_id = 0;
  454. ctx->buffer_pos = 0;
  455. ctx->started = 0;
  456. return 0;
  457. }
  458. int ipecamera_trigger(pcilib_context_t *vctx, pcilib_event_t event, size_t trigger_size, void *trigger_data) {
  459. int err = 0;
  460. pcilib_register_value_t value;
  461. ipecamera_t *ctx = (ipecamera_t*)vctx;
  462. pcilib_t *pcilib = vctx->pcilib;
  463. if (!ctx) {
  464. pcilib_error("IPECamera imaging is not initialized");
  465. return PCILIB_ERROR_NOTINITIALIZED;
  466. }
  467. SET_REG(control_reg, IPECAMERA_FRAME_REQUEST|IPECAMERA_READOUT_FLAG);
  468. usleep(IPECAMERA_WAIT_FRAME_RCVD_TIME);
  469. CHECK_REG(status_reg, IPECAMERA_EXPECTED_STATUS);
  470. SET_REG(control_reg, IPECAMERA_IDLE|IPECAMERA_READOUT_FLAG);
  471. // DS: Just measure when next trigger is allowed instead and wait in the beginning
  472. usleep(IPECAMERA_NEXT_FRAME_DELAY); // minimum delay between End Of Readout and next Frame Req
  473. return 0;
  474. }