cli.c 108 KB

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  1. #define _XOPEN_SOURCE 700
  2. #define _POSIX_C_SOURCE 200112L
  3. #define _BSD_SOURCE
  4. #define _GNU_SOURCE
  5. #define _DEFAULT_SOURCE
  6. #include <stdio.h>
  7. #include <stdlib.h>
  8. #include <string.h>
  9. #include <strings.h>
  10. #include <stdint.h>
  11. #include <stdarg.h>
  12. #include <fcntl.h>
  13. #include <unistd.h>
  14. #include <sys/time.h>
  15. #include <sys/ioctl.h>
  16. #include <sys/mman.h>
  17. #include <errno.h>
  18. #include <alloca.h>
  19. #include <arpa/inet.h>
  20. #include <sys/types.h>
  21. #include <sys/stat.h>
  22. #include <dirent.h>
  23. #include <pthread.h>
  24. #include <signal.h>
  25. #include <dlfcn.h>
  26. #include <getopt.h>
  27. #include <fastwriter.h>
  28. #include "pcitool/sysinfo.h"
  29. #include "pcitool/formaters.h"
  30. #include "pci.h"
  31. #include "plugin.h"
  32. #include "config.h"
  33. #include "tools.h"
  34. #include "kmem.h"
  35. #include "error.h"
  36. #include "debug.h"
  37. #include "model.h"
  38. #include "locking.h"
  39. /* defines */
  40. #define MAX_KBUF 14
  41. //#define BIGBUFSIZE (512*1024*1024)
  42. #define BIGBUFSIZE (1024*1024)
  43. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  44. #define LINE_WIDTH 80
  45. #define SEPARATOR_WIDTH 2
  46. #define BLOCK_SEPARATOR_WIDTH 2
  47. #define BLOCK_SIZE 8
  48. #define BENCHMARK_ITERATIONS 128
  49. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  50. #define isnumber pcilib_isnumber
  51. #define isxnumber pcilib_isxnumber
  52. #define isnumber_n pcilib_isnumber_n
  53. #define isxnumber_n pcilib_isxnumber_n
  54. typedef uint8_t access_t;
  55. typedef enum {
  56. GRAB_MODE_GRAB = 1,
  57. GRAB_MODE_TRIGGER = 2
  58. } GRAB_MODE;
  59. typedef enum {
  60. MODE_INVALID,
  61. MODE_INFO,
  62. MODE_LIST,
  63. MODE_BENCHMARK,
  64. MODE_READ,
  65. MODE_READ_REGISTER,
  66. MODE_WRITE,
  67. MODE_WRITE_REGISTER,
  68. MODE_RESET,
  69. MODE_GRAB,
  70. MODE_START_DMA,
  71. MODE_STOP_DMA,
  72. MODE_LIST_DMA,
  73. MODE_LIST_DMA_BUFFERS,
  74. MODE_READ_DMA_BUFFER,
  75. MODE_ENABLE_IRQ,
  76. MODE_DISABLE_IRQ,
  77. MODE_ACK_IRQ,
  78. MODE_WAIT_IRQ,
  79. MODE_ALLOC_KMEM,
  80. MODE_LIST_KMEM,
  81. MODE_READ_KMEM,
  82. MODE_FREE_KMEM,
  83. MODE_LIST_LOCKS,
  84. MODE_FREE_LOCKS,
  85. MODE_LOCK,
  86. MODE_UNLOCK
  87. } MODE;
  88. typedef enum {
  89. ACCESS_BAR,
  90. ACCESS_DMA,
  91. ACCESS_FIFO,
  92. ACCESS_CONFIG
  93. } ACCESS_MODE;
  94. typedef enum {
  95. FLAG_MULTIPACKET = 1,
  96. FLAG_WAIT = 2
  97. } FLAGS;
  98. typedef enum {
  99. FORMAT_DEFAULT = 0,
  100. FORMAT_RAW,
  101. FORMAT_HEADER,
  102. FORMAT_RINGFS
  103. } FORMAT;
  104. typedef enum {
  105. PARTITION_UNKNOWN,
  106. PARTITION_RAW,
  107. PARTITION_EXT4,
  108. PARTITION_NULL
  109. } PARTITION;
  110. typedef enum {
  111. OPT_DEVICE = 'd',
  112. OPT_MODEL = 'm',
  113. OPT_BAR = 'b',
  114. OPT_ACCESS = 'a',
  115. OPT_ENDIANESS = 'e',
  116. OPT_SIZE = 's',
  117. OPT_OUTPUT = 'o',
  118. OPT_TIMEOUT = 't',
  119. OPT_INFO = 'i',
  120. OPT_LIST = 'l',
  121. OPT_READ = 'r',
  122. OPT_WRITE = 'w',
  123. OPT_GRAB = 'g',
  124. OPT_QUIETE = 'q',
  125. OPT_HELP = 'h',
  126. OPT_RESET = 128,
  127. OPT_BENCHMARK,
  128. OPT_TRIGGER,
  129. OPT_DATA_TYPE,
  130. OPT_EVENT,
  131. OPT_TRIGGER_RATE,
  132. OPT_TRIGGER_TIME,
  133. OPT_RUN_TIME,
  134. OPT_FORMAT,
  135. OPT_BUFFER,
  136. OPT_THREADS,
  137. OPT_LIST_DMA,
  138. OPT_LIST_DMA_BUFFERS,
  139. OPT_READ_DMA_BUFFER,
  140. OPT_START_DMA,
  141. OPT_STOP_DMA,
  142. OPT_ENABLE_IRQ,
  143. OPT_DISABLE_IRQ,
  144. OPT_ACK_IRQ,
  145. OPT_WAIT_IRQ,
  146. OPT_ITERATIONS,
  147. OPT_ALLOC_KMEM,
  148. OPT_LIST_KMEM,
  149. OPT_FREE_KMEM,
  150. OPT_READ_KMEM,
  151. OPT_LIST_LOCKS,
  152. OPT_FREE_LOCKS,
  153. OPT_LOCK,
  154. OPT_UNLOCK,
  155. OPT_BLOCK_SIZE,
  156. OPT_ALIGNMENT,
  157. OPT_TYPE,
  158. OPT_FORCE,
  159. OPT_VERIFY,
  160. OPT_WAIT,
  161. OPT_MULTIPACKET,
  162. OPT_VERBOSE
  163. } OPTIONS;
  164. static struct option long_options[] = {
  165. {"device", required_argument, 0, OPT_DEVICE },
  166. {"model", required_argument, 0, OPT_MODEL },
  167. {"bar", required_argument, 0, OPT_BAR },
  168. {"access", required_argument, 0, OPT_ACCESS },
  169. {"endianess", required_argument, 0, OPT_ENDIANESS },
  170. {"size", required_argument, 0, OPT_SIZE },
  171. {"output", required_argument, 0, OPT_OUTPUT },
  172. {"timeout", required_argument, 0, OPT_TIMEOUT },
  173. {"iterations", required_argument, 0, OPT_ITERATIONS },
  174. {"info", optional_argument, 0, OPT_INFO },
  175. {"list", no_argument, 0, OPT_LIST },
  176. {"reset", no_argument, 0, OPT_RESET },
  177. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  178. {"read", optional_argument, 0, OPT_READ },
  179. {"write", optional_argument, 0, OPT_WRITE },
  180. {"grab", optional_argument, 0, OPT_GRAB },
  181. {"trigger", optional_argument, 0, OPT_TRIGGER },
  182. {"data", required_argument, 0, OPT_DATA_TYPE },
  183. {"event", required_argument, 0, OPT_EVENT },
  184. {"run-time", required_argument, 0, OPT_RUN_TIME },
  185. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  186. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  187. {"format", required_argument, 0, OPT_FORMAT },
  188. {"buffer", optional_argument, 0, OPT_BUFFER },
  189. {"threads", optional_argument, 0, OPT_THREADS },
  190. {"start-dma", required_argument, 0, OPT_START_DMA },
  191. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  192. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  193. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  194. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  195. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  196. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  197. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  198. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  199. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  200. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  201. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  202. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  203. {"list-locks", no_argument, 0, OPT_LIST_LOCKS },
  204. {"free-locks", no_argument, 0, OPT_FREE_LOCKS },
  205. {"lock", required_argument, 0, OPT_LOCK },
  206. {"unlock", required_argument, 0, OPT_UNLOCK },
  207. {"type", required_argument, 0, OPT_TYPE },
  208. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  209. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  210. {"quiete", no_argument, 0, OPT_QUIETE },
  211. {"verbose", optional_argument, 0, OPT_VERBOSE },
  212. {"force", no_argument, 0, OPT_FORCE },
  213. {"verify", no_argument, 0, OPT_VERIFY },
  214. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  215. {"wait", no_argument, 0, OPT_WAIT },
  216. {"help", no_argument, 0, OPT_HELP },
  217. { 0, 0, 0, 0 }
  218. };
  219. void Usage(int argc, char *argv[], const char *format, ...) {
  220. if (format) {
  221. va_list ap;
  222. va_start(ap, format);
  223. printf("Error %i: ", errno);
  224. vprintf(format, ap);
  225. printf("\n");
  226. va_end(ap);
  227. printf("\n");
  228. }
  229. printf(
  230. "Usage:\n"
  231. " %s <mode> [options] [hex data]\n"
  232. " Modes:\n"
  233. " -i [target] - Device or Register (target) Info\n"
  234. " -l[l] - List (detailed) Data Banks & Registers\n"
  235. " -r <addr|dmaX|reg[/unit]> - Read Data/Register\n"
  236. " -w <addr|dmaX|reg[/unit]> - Write Data/Register\n"
  237. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  238. " --reset - Reset board\n"
  239. " --help - Help message\n"
  240. "\n"
  241. " Event Modes:\n"
  242. " --trigger [event] - Trigger Events\n"
  243. " -g [event] - Grab Events\n"
  244. "\n"
  245. " IRQ Modes:\n"
  246. " --enable-irq [type] - Enable IRQs\n"
  247. " --disable-irq [type] - Disable IRQs\n"
  248. " --acknowledge-irq <source> - Clean IRQ queue\n"
  249. " --wait-irq <source> - Wait for IRQ\n"
  250. " DMA Modes:\n"
  251. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  252. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  253. " --list-dma-engines - List active DMA engines\n"
  254. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  255. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  256. "\n"
  257. " Kernel Modes:\n"
  258. " --list-kernel-memory [use] - List kernel buffers\n"
  259. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  260. " block is specified as: use:block_number\n"
  261. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  262. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  263. " dma - Remove all buffers allocated by DMA subsystem\n"
  264. " #number - Remove all buffers with the specified use id\n"
  265. "\n"
  266. " --list-locks - List all registered locks\n"
  267. " --free-locks - Destroy all locks (DANGEROUS)\n"
  268. " --lock <lock name> - Obtain persistent lock\n"
  269. " --unlock <lock name> - Release persistent lock\n"
  270. "\n"
  271. " Addressing:\n"
  272. " -d <device> - FPGA device (/dev/fpga0)\n"
  273. " -m <model> - Memory model (autodetected)\n"
  274. " pci - Plain\n"
  275. " ipecamera - IPE Camera\n"
  276. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  277. "\n"
  278. " Options:\n"
  279. " -s <size> - Number of words (default: 1)\n"
  280. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  281. " -e <l|b> - Endianess Little/Big (default: host)\n"
  282. " -o <file> - Append output to file (default: stdout)\n"
  283. " -t <timeout|unlimited> - Timeout in microseconds\n"
  284. " --check - Verify write operations\n"
  285. "\n"
  286. " Event Options:\n"
  287. " --event <evt> - Specifies event for trigger and grab modes\n"
  288. " --data <type> - Data type to request for the events\n"
  289. " --run-time <us> - Limit time to grab/trigger events\n"
  290. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  291. " --trigger-rate <tps> - Generate tps triggers per second\n"
  292. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  293. " -s <num|unlimited> - Number of events to grab and trigger\n"
  294. " --format [type] - Specifies how event data should be stored\n"
  295. " raw - Just write all events sequentially\n"
  296. " add_header - Prefix events with 512 bit header:\n"
  297. " event(64), data(64), nope(64), size(64)\n"
  298. " seqnum(64), offset(64), timestamp(128)\n"
  299. //" ringfs - Write to RingFS\n"
  300. " --buffer [size] - Request data buffering, size in MB\n"
  301. " --threads [num] - Allow multithreaded processing\n"
  302. "\n"
  303. " DMA Options:\n"
  304. " --multipacket - Read multiple packets\n"
  305. " --wait - Wait until data arrives\n"
  306. "\n"
  307. " Kernel Options:\n"
  308. " --type <type> - Type of kernel memory to allocate\n"
  309. " consistent - Consistent memory\n"
  310. " s2c - DMA S2C (write) memory\n"
  311. " c2s - DMA C2S (read) memory\n"
  312. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  313. " -s <size> - Number of buffers to allocate (default: 1)\n"
  314. " --allignment <alignment> - Buffer alignment (default: page)\n"
  315. "\n"
  316. " Information:\n"
  317. " --verbose [level] - Announce details of ongoing operations\n"
  318. " -q - Quiete mode (suppress warnings)\n"
  319. "\n"
  320. " Data:\n"
  321. " Data can be specified as sequence of hexdecimal number or\n"
  322. " a single value prefixed with '*'. In this case it will be\n"
  323. " replicated the specified amount of times\n"
  324. "\n\n",
  325. argv[0]);
  326. exit(0);
  327. }
  328. static int StopFlag = 0;
  329. static void signal_exit_handler(int signo) {
  330. if (++StopFlag > 2)
  331. exit(-1);
  332. }
  333. void LogError(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, va_list ap) {
  334. vprintf(format, ap);
  335. if (prio == PCILIB_LOG_ERROR) {
  336. if (errno) printf("\nerrno: %i (%s)", errno, strerror(errno));
  337. }
  338. printf("\n");
  339. if (prio == PCILIB_LOG_ERROR) {
  340. printf("Exiting at [%s:%u]\n\n", file, line);
  341. exit(-1);
  342. }
  343. }
  344. void ErrorInternal(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, ...) {
  345. va_list ap;
  346. va_start(ap, format);
  347. LogError(arg, file, line, prio, format, ap);
  348. va_end(ap);
  349. }
  350. #define Error(...) ErrorInternal(NULL, __FILE__, __LINE__, PCILIB_LOG_ERROR, __VA_ARGS__)
  351. int RegisterCompare(const void *aptr, const void *bptr, void *registers) {
  352. pcilib_register_description_t *a = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)aptr];
  353. pcilib_register_description_t *b = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)bptr];
  354. if (a->bank < b->bank) return -1;
  355. if (a->bank > b->bank) return 1;
  356. if (a->addr < b->addr) return -1;
  357. if (a->addr > b->addr) return 1;
  358. if ((a->type != PCILIB_REGISTER_BITS)&&(b->type == PCILIB_REGISTER_BITS)) return -1;
  359. if ((a->type == PCILIB_REGISTER_BITS)&&(b->type != PCILIB_REGISTER_BITS)) return 1;
  360. if (a->offset < b->offset) return -1;
  361. if (a->offset > b->offset) return 0;
  362. return 0;
  363. }
  364. void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
  365. int i, j, k;
  366. const pcilib_register_bank_description_t *banks;
  367. const pcilib_register_description_t *registers;
  368. const pcilib_event_description_t *events;
  369. const pcilib_event_data_type_description_t *types;
  370. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  371. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  372. for (i = 0; i < PCILIB_MAX_BARS; i++) {
  373. if (board_info->bar_length[i] > 0) {
  374. printf(" BAR %d - ", i);
  375. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  376. case IORESOURCE_IO: printf(" IO"); break;
  377. case IORESOURCE_MEM: printf("MEM"); break;
  378. case IORESOURCE_IRQ: printf("IRQ"); break;
  379. case IORESOURCE_DMA: printf("DMA"); break;
  380. }
  381. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  382. else printf("32");
  383. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  384. }
  385. }
  386. printf("\n");
  387. if ((dma_info)&&(dma_info->engines)) {
  388. printf("DMA Engines: \n");
  389. for (i = 0; dma_info->engines[i].addr_bits; i++) {
  390. const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
  391. printf(" DMA %2d ", engine->addr);
  392. switch (engine->direction) {
  393. case PCILIB_DMA_FROM_DEVICE:
  394. printf("C2S");
  395. break;
  396. case PCILIB_DMA_TO_DEVICE:
  397. printf("S2C");
  398. break;
  399. case PCILIB_DMA_BIDIRECTIONAL:
  400. printf("BI ");
  401. break;
  402. }
  403. printf(" - Type: ");
  404. switch (engine->type) {
  405. case PCILIB_DMA_TYPE_BLOCK:
  406. printf("Block");
  407. break;
  408. case PCILIB_DMA_TYPE_PACKET:
  409. printf("Packet");
  410. break;
  411. default:
  412. printf("Unknown");
  413. }
  414. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  415. }
  416. printf("\n");
  417. }
  418. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  419. else banks = model_info->banks;
  420. if (banks) {
  421. printf("Banks: \n");
  422. for (i = 0; banks[i].access; i++) {
  423. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  424. if ((banks[i].description)&&(banks[i].description[0])) {
  425. printf(": %s", banks[i].description);
  426. }
  427. printf("\n");
  428. }
  429. printf("\n");
  430. }
  431. if (bank == (char*)-1) registers = NULL;
  432. else registers = model_info->registers;
  433. if (registers) {
  434. pcilib_register_t regsort[handle->num_reg];
  435. pcilib_register_bank_addr_t bank_addr = 0;
  436. if (bank) {
  437. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  438. const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  439. bank_addr = b->addr;
  440. if (b->description) printf("%s:\n", b->description);
  441. else if (b->name) printf("Registers of bank %s:\n", b->name);
  442. else printf("Registers of bank 0x%x:\n", b->addr);
  443. } else {
  444. printf("Registers: \n");
  445. }
  446. // sorting
  447. for (i = 0, k = 0; registers[i].bits; i++) {
  448. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  449. if ((registers[i].type == PCILIB_REGISTER_BITS)&&(!details)) continue;
  450. regsort[k++] = i;
  451. }
  452. qsort_r(regsort, k, sizeof(pcilib_register_t), &RegisterCompare, (void*)registers);
  453. for (j = 0; j < k; j++) {
  454. const char *mode;
  455. i = regsort[j];
  456. if (registers[i].type == PCILIB_REGISTER_BITS) {
  457. if (!details) continue;
  458. if (registers[i].bits > 1) {
  459. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  460. } else {
  461. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  462. }
  463. continue;
  464. }
  465. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  466. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  467. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  468. else mode = " ";
  469. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  470. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  471. printf(": %s", registers[i].description);
  472. }
  473. printf("\n");
  474. }
  475. printf("\n");
  476. }
  477. if (bank == (char*)-1) events = NULL;
  478. else {
  479. events = model_info->events;
  480. types = model_info->data_types;
  481. }
  482. if (events) {
  483. printf("Events: \n");
  484. for (i = 0; events[i].name; i++) {
  485. printf(" %s", events[i].name);
  486. if ((events[i].description)&&(events[i].description[0])) {
  487. printf(": %s", events[i].description);
  488. }
  489. if (types) {
  490. for (j = 0; types[j].name; j++) {
  491. if (types[j].evid & events[i].evid) {
  492. printf("\n %s", types[j].name);
  493. if ((types[j].description)&&(types[j].description[0])) {
  494. printf(": %s", types[j].description);
  495. }
  496. }
  497. }
  498. }
  499. }
  500. printf("\n");
  501. }
  502. }
  503. void RegisterInfo(pcilib_t *handle, pcilib_register_t reg) {
  504. int err;
  505. pcilib_value_t val = {0};
  506. pcilib_register_value_t regval;
  507. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  508. const pcilib_register_description_t *r = &model_info->registers[reg];
  509. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, r->bank);
  510. const pcilib_register_bank_description_t *b = &model_info->banks[bank];
  511. err = pcilib_read_register_by_id(handle, reg, &regval);
  512. printf("%s/%s\n", b->name, r->name);
  513. printf(" Current value: ");
  514. if (err) printf("error %i", err);
  515. else printf(b->format, regval);
  516. if (r->mode&PCILIB_REGISTER_W) {
  517. printf(" (default: ");
  518. printf(b->format, r->defvalue);
  519. printf(")");
  520. }
  521. printf("\n");
  522. printf(" Address : 0x%x [%u:%u]\n", r->addr, r->offset, r->offset + r->bits);
  523. printf(" Access : ");
  524. if ((r->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  525. if (r->mode&PCILIB_REGISTER_R) printf("R");
  526. if (r->mode&PCILIB_REGISTER_W) printf("W");
  527. if (r->mode&PCILIB_REGISTER_W1C) printf("/reset");
  528. if (r->mode&PCILIB_REGISTER_W1I) printf("/invert");
  529. printf("\n");
  530. if (r->description)
  531. printf(" Description : %s\n", r->description);
  532. if (r->views) {
  533. int i;
  534. printf("\nSupported Views:\n");
  535. for (i = 0; r->views[i].name; i++) {
  536. pcilib_view_t view = pcilib_find_view_by_name(handle, r->views[i].view);
  537. if (view == PCILIB_VIEW_INVALID) continue;
  538. const pcilib_view_description_t *v = model_info->views[view];
  539. printf(" View %s (", r->views[i].name);
  540. switch (v->type) {
  541. case PCILIB_TYPE_STRING:
  542. printf("char*");
  543. break;
  544. case PCILIB_TYPE_DOUBLE:
  545. printf("double");
  546. break;
  547. default:
  548. printf("unknown");
  549. }
  550. printf(")\n");
  551. err = pcilib_read_register_view(handle, b->name, r->name, r->views[i].name, &val);
  552. if (!err) err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  553. if (err)
  554. printf(" Current value : error %i\n", err);
  555. else {
  556. printf(" Current value : %s", val.sval);
  557. if (v->unit) printf(" (units: %s)", v->unit);
  558. printf("\n");
  559. }
  560. if (v->unit) {
  561. pcilib_unit_t unit = pcilib_find_unit_by_name(handle, v->unit);
  562. printf(" Supported units: %s", v->unit);
  563. if (unit != PCILIB_UNIT_INVALID) {
  564. int j;
  565. const pcilib_unit_description_t *u = &model_info->units[unit];
  566. for (j = 0; u->transforms[j].unit; j++)
  567. printf(", %s", u->transforms[j].unit);
  568. }
  569. printf("\n");
  570. }
  571. if (v->description)
  572. printf(" Description : %s\n", v->description);
  573. }
  574. }
  575. // printf("Type: %s". r->rw
  576. }
  577. void Info(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *target) {
  578. int i, j;
  579. DIR *dir;
  580. void *plugin;
  581. const char *path;
  582. struct dirent *entry;
  583. const pcilib_model_description_t *info = NULL;
  584. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  585. const pcilib_pcie_link_info_t *link_info = pcilib_get_pcie_link_info(handle);
  586. path = getenv("PCILIB_PLUGIN_DIR");
  587. if (!path) path = PCILIB_PLUGIN_DIR;
  588. if (board_info)
  589. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x, Model: %s\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func, handle->model);
  590. if (link_info) {
  591. printf(" PCIe x%u (gen%u), DMA Payload: %u (of %u)\n", link_info->link_width, link_info->link_speed, 1<<link_info->payload, 1<<link_info->max_payload);
  592. }
  593. if (board_info)
  594. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  595. printf("\n");
  596. if (target) {
  597. pcilib_register_t reg;
  598. reg = pcilib_find_register(handle, NULL, target);
  599. if (reg != PCILIB_REGISTER_INVALID)
  600. return RegisterInfo(handle, reg);
  601. Error(" No register %s is found", target);
  602. }
  603. List(handle, model_info, (char*)-1, 0);
  604. printf("Available models:\n");
  605. dir = opendir(path);
  606. if (dir) {
  607. while ((entry = readdir(dir))) {
  608. const char *suffix = strstr(entry->d_name, ".so");
  609. if ((!suffix)||(strlen(suffix) != 3)) continue;
  610. plugin = pcilib_plugin_load(entry->d_name);
  611. if (plugin) {
  612. info = pcilib_get_plugin_model(handle, plugin, 0, 0, NULL);
  613. if (info) {
  614. printf(" %s\n", entry->d_name);
  615. for (j = 0; info[j].name; j++) {
  616. pcilib_version_t version = info[j].api->version;
  617. printf(" %-12s %u.%u.%u - %s\n", info[j].name,
  618. PCILIB_VERSION_GET_MAJOR(version),
  619. PCILIB_VERSION_GET_MINOR(version),
  620. PCILIB_VERSION_GET_MICRO(version),
  621. info[j].description?info[j].description:"");
  622. }
  623. }
  624. pcilib_plugin_close(plugin);
  625. } else {
  626. const char *msg = dlerror();
  627. if (msg)
  628. printf(" %s: %s\n", entry->d_name, msg);
  629. }
  630. }
  631. closedir(dir);
  632. }
  633. // printf(" XML\n");
  634. printf(" Internal Models\n");
  635. for (i = 0; pcilib_dma[i].api; i++)
  636. printf(" %-12s - %s\n", pcilib_dma[i].name, pcilib_dma[i].description?pcilib_dma[i].description:"");
  637. printf(" %-12s - Plain PCI-access model\n\n", "pci");
  638. }
  639. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  640. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  641. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  642. int err;
  643. int i, j, errors;
  644. void *data, *buf, *check;
  645. void *fifo = NULL;
  646. struct timeval start, end;
  647. unsigned long time;
  648. size_t size, min_size, max_size;
  649. double mbs_in, mbs_out, mbs;
  650. size_t irqs;
  651. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  652. if (mode == ACCESS_CONFIG)
  653. Error("No benchmarking of configuration space acess is allowed");
  654. if (mode == ACCESS_DMA) {
  655. if (n) {
  656. min_size = n * access;
  657. max_size = n * access;
  658. } else {
  659. min_size = 1024;
  660. max_size = BENCH_MAX_DMA_SIZE;
  661. }
  662. for (size = min_size; size <= max_size; size *= 4) {
  663. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  664. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  665. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  666. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  667. if (err) irqs = 0;
  668. printf("%8zu KB - ", size / 1024);
  669. printf("RW: ");
  670. if (mbs < 0) printf("failed ... ");
  671. else printf("%8.2lf MB/s", mbs);
  672. printf(", R: ");
  673. if (mbs_in < 0) printf("failed ... ");
  674. else printf("%8.2lf MB/s", mbs_in);
  675. printf(", W: ");
  676. if (mbs_out < 0) printf("failed ... ");
  677. else printf("%8.2lf MB/s", mbs_out);
  678. if (irqs) {
  679. printf(", IRQs: %lu", irqs);
  680. }
  681. printf("\n");
  682. }
  683. return 0;
  684. }
  685. if (bar == PCILIB_BAR_INVALID) {
  686. unsigned long maxlength = 0;
  687. for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
  688. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  689. bar = i;
  690. break;
  691. }
  692. if (board_info->bar_length[i] > maxlength) {
  693. maxlength = board_info->bar_length[i];
  694. bar = i;
  695. }
  696. }
  697. if (bar < 0) Error("Data banks are not available");
  698. }
  699. if (n) {
  700. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  701. min_size = n * access;
  702. max_size = n * access;
  703. } else {
  704. min_size = access;
  705. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  706. else max_size = BENCH_MAX_FIFO_SIZE;
  707. }
  708. err = posix_memalign( (void**)&buf, 256, max_size );
  709. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  710. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  711. data = pcilib_map_bar(handle, bar);
  712. if (!data) Error("Can't map bar %i", bar);
  713. if (mode == ACCESS_FIFO) {
  714. fifo = data + (addr - board_info->bar_start[bar]) + (board_info->bar_start[bar] & pcilib_get_page_mask());
  715. // pcilib_resolve_register_address(handle, bar, addr);
  716. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  717. }
  718. if (mode == ACCESS_FIFO)
  719. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  720. else
  721. printf("Transfer time (Bank: %i):\n", bar);
  722. for (size = min_size ; size < max_size; size *= 8) {
  723. gettimeofday(&start,NULL);
  724. if (mode == ACCESS_BAR) {
  725. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  726. pcilib_memcpy(buf, data, size);
  727. }
  728. } else {
  729. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  730. for (j = 0; j < (size/access); j++) {
  731. pcilib_memcpy(buf + j * access, fifo, access);
  732. }
  733. }
  734. }
  735. gettimeofday(&end,NULL);
  736. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  737. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  738. fflush(0);
  739. gettimeofday(&start,NULL);
  740. if (mode == ACCESS_BAR) {
  741. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  742. pcilib_memcpy(data, buf, size);
  743. }
  744. } else {
  745. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  746. for (j = 0; j < (size/access); j++) {
  747. pcilib_memcpy(fifo, buf + j * access, access);
  748. }
  749. }
  750. }
  751. gettimeofday(&end,NULL);
  752. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  753. printf(", write: %8.2lf MB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  754. }
  755. pcilib_unmap_bar(handle, bar, data);
  756. printf("\n\nOpen-Transfer-Close time: \n");
  757. for (size = 4 ; size < max_size; size *= 8) {
  758. gettimeofday(&start,NULL);
  759. if (mode == ACCESS_BAR) {
  760. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  761. pcilib_read(handle, bar, 0, size, buf);
  762. }
  763. } else {
  764. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  765. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  766. }
  767. }
  768. gettimeofday(&end,NULL);
  769. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  770. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  771. fflush(0);
  772. gettimeofday(&start,NULL);
  773. if (mode == ACCESS_BAR) {
  774. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  775. pcilib_write(handle, bar, 0, size, buf);
  776. }
  777. } else {
  778. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  779. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  780. }
  781. }
  782. gettimeofday(&end,NULL);
  783. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  784. printf(", write: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  785. if (mode == ACCESS_BAR) {
  786. gettimeofday(&start,NULL);
  787. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  788. pcilib_write(handle, bar, 0, size, buf);
  789. pcilib_read(handle, bar, 0, size, check);
  790. if (memcmp(buf, check, size)) ++errors;
  791. }
  792. gettimeofday(&end,NULL);
  793. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  794. printf(", write-verify: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  795. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  796. }
  797. printf("\n");
  798. }
  799. printf("\n\n");
  800. free(check);
  801. free(buf);
  802. return 0;
  803. }
  804. #define pci2host16(endianess, value) endianess?
  805. /*
  806. typedef struct {
  807. size_t size;
  808. void *data;
  809. size_t pos;
  810. int multi_mode;
  811. } DMACallbackContext;
  812. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  813. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  814. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  815. ctx->size *= 2;
  816. ctx->data = realloc(ctx->data, ctx->size);
  817. if (!ctx->data) {
  818. Error("Allocation of %i bytes of memory have failed", ctx->size);
  819. return 0;
  820. }
  821. }
  822. memcpy(ctx->data + ctx->pos, buf, bufsize);
  823. ctx->pos += bufsize;
  824. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  825. return 1;
  826. }
  827. */
  828. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  829. void *buf;
  830. int i, err;
  831. size_t ret, bytes;
  832. size_t size = n * abs(access);
  833. int block_width, blocks_per_line;
  834. int numbers_per_block, numbers_per_line;
  835. pcilib_dma_engine_t dmaid;
  836. pcilib_dma_flags_t dma_flags = 0;
  837. int fd;
  838. char stmp[256];
  839. struct stat st;
  840. const pcilib_board_info_t *board_info;
  841. numbers_per_block = BLOCK_SIZE / access;
  842. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  843. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  844. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  845. numbers_per_line = blocks_per_line * numbers_per_block;
  846. if (size) {
  847. buf = malloc(size);
  848. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  849. } else {
  850. buf = NULL;
  851. }
  852. switch (mode) {
  853. case ACCESS_DMA:
  854. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  855. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  856. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  857. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  858. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  859. if (size) {
  860. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  861. if (err) Error("Error (%i) is reported by DMA engine", err);
  862. } else {
  863. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  864. size = 2048; bytes = 0;
  865. do {
  866. size *= 2;
  867. buf = realloc(buf, size);
  868. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  869. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  870. bytes += ret;
  871. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  872. err = PCILIB_ERROR_TOOBIG;
  873. if ((flags&FLAG_WAIT)==0) timeout = 0;
  874. }
  875. } while (err == PCILIB_ERROR_TOOBIG);
  876. }
  877. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  878. Error("Error (%i) during DMA read", err);
  879. }
  880. if (bytes <= 0) {
  881. pcilib_warning("No data is returned by DMA engine");
  882. return -1;
  883. }
  884. size = bytes;
  885. n = bytes / abs(access);
  886. addr = 0;
  887. break;
  888. case ACCESS_FIFO:
  889. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  890. addr = 0;
  891. break;
  892. case ACCESS_CONFIG:
  893. board_info = pcilib_get_board_info(handle);
  894. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  895. fd = open(stmp, O_RDONLY);
  896. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  897. if (st.st_size < addr)
  898. Error("Access beyond the end of PCI configuration space");
  899. if (st.st_size < (addr + size)) {
  900. n = (st.st_size - addr) / abs(access);
  901. size = n * abs(access);
  902. if (!n) Error("Access beyond the end of PCI configuration space");
  903. }
  904. lseek(fd, addr, SEEK_SET);
  905. ret = read(fd, buf, size);
  906. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  907. if (ret < size) {
  908. size = ret;
  909. n = ret / abs(access);
  910. }
  911. close(fd);
  912. break;
  913. default:
  914. pcilib_read(handle, bar, addr, size, buf);
  915. }
  916. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  917. if (o) {
  918. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  919. fwrite(buf, abs(access), n, o);
  920. } else {
  921. for (i = 0; i < n; i++) {
  922. if (i) {
  923. if (i%numbers_per_line == 0) printf("\n");
  924. else {
  925. printf("%*s", SEPARATOR_WIDTH, "");
  926. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  927. }
  928. }
  929. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  930. switch (access) {
  931. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  932. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  933. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  934. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  935. }
  936. }
  937. printf("\n\n");
  938. }
  939. free(buf);
  940. return 0;
  941. }
  942. int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *unit) {
  943. int i;
  944. int err;
  945. const char *format;
  946. pcilib_register_bank_t bank_id;
  947. pcilib_register_bank_addr_t bank_addr = 0;
  948. pcilib_register_value_t value;
  949. // Adding DMA registers
  950. pcilib_get_dma_description(handle);
  951. if (reg) {
  952. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  953. if (unit) {
  954. pcilib_value_t val = {0};
  955. err = pcilib_read_register_view(handle, bank, reg, unit, &val);
  956. if (err) Error("Error reading view %s of register %s", unit, reg);
  957. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  958. if (err) Error("Error converting view %s of register %s to string", unit, reg);
  959. printf("%s = %s\n", reg, val.sval);
  960. } else {
  961. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
  962. format = model_info->banks[bank_id].format;
  963. if (!format) format = "%lu";
  964. err = pcilib_read_register_by_id(handle, regid, &value);
  965. if (err) Error("Error reading register %s", reg);
  966. printf("%s = ", reg);
  967. printf(format, value);
  968. printf("\n");
  969. }
  970. } else {
  971. if (model_info->registers) {
  972. if (bank) {
  973. bank_id = pcilib_find_register_bank(handle, bank);
  974. bank_addr = model_info->banks[bank_id].addr;
  975. }
  976. printf("Registers:\n");
  977. for (i = 0; model_info->registers[i].bits; i++) {
  978. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  979. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
  980. format = model_info->banks[bank_id].format;
  981. if (!format) format = "%lu";
  982. err = pcilib_read_register_by_id(handle, i, &value);
  983. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  984. else {
  985. printf(" %s = ", model_info->registers[i].name);
  986. printf(format, value);
  987. }
  988. printf(" [");
  989. printf(format, model_info->registers[i].defvalue);
  990. printf("]");
  991. printf("\n");
  992. }
  993. }
  994. } else {
  995. printf("No registers");
  996. }
  997. printf("\n");
  998. }
  999. return 0;
  1000. }
  1001. #define WRITE_REGVAL(buf, n, access, o) {\
  1002. uint##access##_t tbuf[n]; \
  1003. for (i = 0; i < n; i++) { \
  1004. tbuf[i] = (uint##access##_t)buf[i]; \
  1005. } \
  1006. fwrite(tbuf, access/8, n, o); \
  1007. }
  1008. int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  1009. int err;
  1010. int i;
  1011. const pcilib_register_bank_description_t *banks = model_info->banks;
  1012. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  1013. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  1014. if (bank) Error("Invalid register bank is specified (%s)", bank);
  1015. else Error("Register bank should be specified");
  1016. }
  1017. int access = banks[bank_id].access / 8;
  1018. // int size = n * abs(access);
  1019. int block_width, blocks_per_line;
  1020. int numbers_per_block, numbers_per_line;
  1021. numbers_per_block = BLOCK_SIZE / access;
  1022. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1023. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1024. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1025. numbers_per_line = blocks_per_line * numbers_per_block;
  1026. pcilib_register_value_t buf[n];
  1027. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  1028. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1029. if (o) {
  1030. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1031. switch (access) {
  1032. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  1033. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  1034. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  1035. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  1036. }
  1037. } else {
  1038. for (i = 0; i < n; i++) {
  1039. if (i) {
  1040. if (i%numbers_per_line == 0) printf("\n");
  1041. else {
  1042. printf("%*s", SEPARATOR_WIDTH, "");
  1043. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1044. }
  1045. }
  1046. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  1047. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  1048. }
  1049. printf("\n\n");
  1050. }
  1051. return 0;
  1052. }
  1053. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  1054. int read_back = 0;
  1055. void *buf, *check;
  1056. int res = 0, i, err;
  1057. int size = n * abs(access);
  1058. size_t ret;
  1059. pcilib_dma_engine_t dmaid;
  1060. if (mode == ACCESS_CONFIG)
  1061. Error("Writting to PCI configuration space is not supported");
  1062. err = posix_memalign( (void**)&buf, 256, size );
  1063. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1064. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1065. for (i = 0; i < n; i++) {
  1066. switch (access) {
  1067. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  1068. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  1069. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  1070. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  1071. default: Error("Unexpected data size (%lu)", access);
  1072. }
  1073. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1074. }
  1075. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1076. switch (mode) {
  1077. case ACCESS_DMA:
  1078. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1079. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1080. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  1081. if ((err)||(ret != size)) {
  1082. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  1083. else if (err) Error("DMA engine returned a error while writing the data");
  1084. else if (!ret) Error("No data is written by DMA engine");
  1085. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  1086. }
  1087. break;
  1088. case ACCESS_FIFO:
  1089. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  1090. break;
  1091. default:
  1092. pcilib_write(handle, bar, addr, size, buf);
  1093. if (verify) {
  1094. pcilib_read(handle, bar, addr, size, check);
  1095. read_back = 1;
  1096. }
  1097. }
  1098. if ((read_back)&&(memcmp(buf, check, size))) {
  1099. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1100. if (endianess) pcilib_swap(check, check, abs(access), n);
  1101. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  1102. exit(-1);
  1103. }
  1104. free(check);
  1105. free(buf);
  1106. return 0;
  1107. }
  1108. int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  1109. pcilib_register_value_t *buf, *check;
  1110. int res, i, err;
  1111. unsigned long value;
  1112. int size = n * sizeof(pcilib_register_value_t);
  1113. err = posix_memalign( (void**)&buf, 256, size );
  1114. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1115. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1116. for (i = 0; i < n; i++) {
  1117. res = sscanf(data[i], "%lx", &value);
  1118. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1119. buf[i] = value;
  1120. }
  1121. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  1122. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1123. err = pcilib_read_register_space(handle, bank, addr, n, check);
  1124. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1125. if (memcmp(buf, check, size)) {
  1126. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1127. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  1128. exit(-1);
  1129. }
  1130. free(check);
  1131. free(buf);
  1132. return 0;
  1133. }
  1134. int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *unit, char **data) {
  1135. int err = 0;
  1136. pcilib_value_t val = {0};
  1137. pcilib_register_value_t value, verify;
  1138. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1139. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  1140. /*
  1141. pcilib_register_bank_t bank_id;
  1142. pcilib_register_bank_addr_t bank_addr;
  1143. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  1144. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  1145. format = model_info->banks[bank_id].format;
  1146. if (!format) format = "%lu";
  1147. */
  1148. err = pcilib_set_value_from_static_string(handle, &val, *data);
  1149. if (err) Error("Error (%i) setting value", err);
  1150. if (unit) {
  1151. err = pcilib_write_register_view(handle, bank, reg, unit, &val);
  1152. if (err) Error("Error writting view %s of register %s", unit, reg);
  1153. printf("%s is written\n ", reg);
  1154. } else {
  1155. value = pcilib_get_value_as_register_value(handle, &val, &err);
  1156. if (err) Error("Error (%i) parsing data value (%s)", *data);
  1157. err = pcilib_write_register(handle, bank, reg, value);
  1158. if (err) Error("Error writting register %s\n", reg);
  1159. if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) {
  1160. const char *format = (val.format?val.format:"%u");
  1161. err = pcilib_read_register(handle, bank, reg, &verify);
  1162. if (err) Error("Error reading back register %s for verification\n", reg);
  1163. if (verify != value) {
  1164. Error("Failed to write register %s: %lu is written and %lu is read back", reg, value, verify);
  1165. } else {
  1166. printf("%s = ", reg);
  1167. printf(format, verify);
  1168. printf("\n");
  1169. }
  1170. } else {
  1171. printf("%s is written\n ", reg);
  1172. }
  1173. }
  1174. return 0;
  1175. }
  1176. typedef struct {
  1177. pcilib_t *handle;
  1178. pcilib_event_t event;
  1179. pcilib_event_data_type_t data;
  1180. fastwriter_t *writer;
  1181. int verbose;
  1182. pcilib_timeout_t timeout;
  1183. size_t run_time;
  1184. size_t trigger_time;
  1185. size_t max_triggers;
  1186. pcilib_event_flags_t flags;
  1187. FORMAT format;
  1188. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1189. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1190. volatile int started; /**< Indicates that recording is started */
  1191. volatile int run_flag;
  1192. volatile int writing_flag;
  1193. struct timeval first_frame;
  1194. struct timeval last_frame;
  1195. size_t last_num, last_id;
  1196. size_t trigger_failed;
  1197. size_t trigger_count;
  1198. size_t event_count; /**< Total number of events (including bad ones, but excluding events expected, but not reported by hardware) */
  1199. size_t incomplete_count; /**< Broken events, we even can't extract appropriate block of raw data */
  1200. size_t broken_count; /**< Broken events, error while decoding in the requested format */
  1201. size_t empty_count; /**< Broken events, no associated data or unknown */
  1202. size_t missing_count; /**< Missing events, not received from the hardware */
  1203. size_t dropped_count; /**< Missing events, dropped due slow decoding/copying performance */
  1204. size_t storage_count; /**< Missing events, dropped due to slowness of the storage subsystem */
  1205. struct timeval start_time;
  1206. struct timeval stop_time;
  1207. } GRABContext;
  1208. int GrabCallback(pcilib_event_id_t event_id, pcilib_event_info_t *info, void *user) {
  1209. int err = 0;
  1210. void *data;
  1211. size_t size;
  1212. GRABContext *ctx = (GRABContext*)user;
  1213. pcilib_t *handle = ctx->handle;
  1214. gettimeofday(&ctx->last_frame, NULL);
  1215. if (!ctx->event_count) {
  1216. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1217. }
  1218. ctx->event_pending = 0;
  1219. ctx->event_count++;
  1220. if (ctx->last_num) {
  1221. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1222. ctx->missing_count += missing_count;
  1223. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1224. if (missing_count)
  1225. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu (hwid: %zu) and %zu (hwid: %zu)", missing_count, ctx->last_id, ctx->last_num, event_id, info->seqnum);
  1226. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1227. }
  1228. ctx->last_num = info->seqnum;
  1229. ctx->last_id = event_id;
  1230. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1231. ctx->incomplete_count++;
  1232. return PCILIB_STREAMING_CONTINUE;
  1233. }
  1234. switch (ctx->format) {
  1235. case FORMAT_DEFAULT:
  1236. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_DATA, &size);
  1237. break;
  1238. default:
  1239. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_RAW_DATA, &size);
  1240. }
  1241. if (!data) {
  1242. int err = (int)size;
  1243. switch (err) {
  1244. case PCILIB_ERROR_OVERWRITTEN:
  1245. ctx->dropped_count++;
  1246. break;
  1247. case PCILIB_ERROR_INVALID_DATA:
  1248. ctx->broken_count++;
  1249. break;
  1250. default:
  1251. ctx->empty_count++;
  1252. }
  1253. return PCILIB_STREAMING_CONTINUE;
  1254. }
  1255. if (ctx->format == FORMAT_HEADER) {
  1256. uint64_t header[8];
  1257. header[0] = info->type;
  1258. header[1] = ctx->data;
  1259. header[2] = 0;
  1260. header[3] = size;
  1261. header[4] = info->seqnum;
  1262. header[5] = info->offset;
  1263. memcpy(header + 6, &info->timestamp, 16);
  1264. err = fastwriter_push(ctx->writer, 64, header);
  1265. }
  1266. if (!err)
  1267. err = fastwriter_push(ctx->writer, size, data);
  1268. if (err) {
  1269. fastwriter_cancel(ctx->writer);
  1270. if (err != EWOULDBLOCK)
  1271. Error("Storage error %i", err);
  1272. ctx->storage_count++;
  1273. pcilib_return_data(handle, event_id, ctx->data, data);
  1274. return PCILIB_STREAMING_CONTINUE;
  1275. }
  1276. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1277. if (err) {
  1278. ctx->dropped_count++;
  1279. fastwriter_cancel(ctx->writer);
  1280. return PCILIB_STREAMING_CONTINUE;
  1281. }
  1282. err = fastwriter_commit(ctx->writer);
  1283. if (err) Error("Error commiting data to storage, Error: %i", err);
  1284. return PCILIB_STREAMING_CONTINUE;
  1285. }
  1286. int raw_data(pcilib_event_id_t event_id, pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1287. int err;
  1288. GRABContext *ctx = (GRABContext*)user;
  1289. // pcilib_t *handle = ctx->handle;
  1290. if ((info)&&(info->seqnum != ctx->last_num)) {
  1291. gettimeofday(&ctx->last_frame, NULL);
  1292. if (!ctx->event_count) {
  1293. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1294. }
  1295. ctx->event_count++;
  1296. if (ctx->last_num) {
  1297. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1298. ctx->missing_count += missing_count;
  1299. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1300. if (missing_count)
  1301. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu and %zu", missing_count, ctx->last_num, info->seqnum);
  1302. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1303. }
  1304. ctx->last_num = info->seqnum;
  1305. }
  1306. err = fastwriter_push_data(ctx->writer, size, data);
  1307. if (err) {
  1308. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1309. Error("Storage error %i", err);
  1310. }
  1311. return PCILIB_STREAMING_CONTINUE;
  1312. }
  1313. void *Trigger(void *user) {
  1314. int err;
  1315. struct timeval start;
  1316. GRABContext *ctx = (GRABContext*)user;
  1317. size_t trigger_time = ctx->trigger_time;
  1318. size_t max_triggers = ctx->max_triggers;
  1319. ctx->trigger_thread_started = 1;
  1320. ctx->event_pending = 1;
  1321. while (!ctx->started) ;
  1322. gettimeofday(&start, NULL);
  1323. do {
  1324. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1325. if (err) ctx->trigger_failed++;
  1326. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1327. if (trigger_time) {
  1328. pcilib_add_timeout(&start, trigger_time);
  1329. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1330. pcilib_sleep_until_deadline(&start);
  1331. } else {
  1332. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1333. ctx->event_pending = 1;
  1334. }
  1335. } while (ctx->run_flag);
  1336. ctx->trigger_thread_started = 0;
  1337. return NULL;
  1338. }
  1339. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1340. int verbose;
  1341. pcilib_timeout_t duration, fps_duration;
  1342. struct timeval cur;
  1343. double fps = 0, good_fps = 0;
  1344. size_t total, good, pending = 0;
  1345. verbose = ctx->verbose;
  1346. if (end_time) {
  1347. if (verbose++) {
  1348. printf("-------------------------------------------------------------------------------\n");
  1349. }
  1350. } else {
  1351. gettimeofday(&cur, NULL);
  1352. end_time = &cur;
  1353. }
  1354. // if ((ctx->event_count + ctx->missing_count) == 0)
  1355. // return;
  1356. duration = pcilib_timediff(&ctx->start_time, end_time);
  1357. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1358. if (ctx->trigger_count) {
  1359. total = ctx->trigger_count;
  1360. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1361. } else {
  1362. total = ctx->event_count + ctx->missing_count;
  1363. }
  1364. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count - ctx->empty_count - ctx->dropped_count;
  1365. if (ctx->event_count > 1) {
  1366. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1367. }
  1368. if (good > 1) {
  1369. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1370. }
  1371. printf("Run: ");
  1372. PrintTime(duration);
  1373. if (ctx->trigger_count) {
  1374. printf(", Triggers: ");
  1375. PrintNumber(ctx->trigger_count);
  1376. }
  1377. printf(", Captured: ");
  1378. PrintNumber(ctx->event_count);
  1379. printf(" FPS %5.0lf", fps);
  1380. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1381. printf(", Stored: ");
  1382. PrintNumber(good);
  1383. printf(" FPS %5.0lf", good_fps);
  1384. }
  1385. printf("\n");
  1386. if (verbose > 2) {
  1387. if (ctx->trigger_count) {
  1388. printf("Trig: ");
  1389. PrintNumber(ctx->trigger_count);
  1390. printf(" Issued: ");
  1391. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1392. printf(" (");
  1393. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1394. printf("%%) Failed: ");
  1395. PrintNumber(ctx->trigger_failed);
  1396. printf( " (");
  1397. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1398. printf( "%%); Pending: ");
  1399. PrintNumber(pending);
  1400. printf( " (");
  1401. PrintPercent(pending, ctx->trigger_count);
  1402. printf( "%%)\n");
  1403. }
  1404. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1405. printf("Captured: ");
  1406. PrintNumber(good);
  1407. } else {
  1408. printf("Good: ");
  1409. PrintNumber(good);
  1410. printf(", Dropped: ");
  1411. PrintNumber(ctx->dropped_count + ctx->storage_count);
  1412. printf(", Bad: ");
  1413. PrintNumber(ctx->incomplete_count + ctx->broken_count);
  1414. printf(", Empty: ");
  1415. PrintNumber(ctx->empty_count);
  1416. }
  1417. printf(", Lost: ");
  1418. PrintNumber(ctx->missing_count);
  1419. printf("\n");
  1420. }
  1421. if (verbose > 1) {
  1422. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1423. printf("Captured: ");
  1424. PrintPercent(good, total);
  1425. } else {
  1426. printf("Good: ");
  1427. PrintPercent(good, total);
  1428. printf("%% Dropped: ");
  1429. PrintPercent(ctx->dropped_count + ctx->storage_count, total);
  1430. printf("%% Bad: ");
  1431. PrintPercent(ctx->incomplete_count + ctx->broken_count, total);
  1432. printf("%% Empty: ");
  1433. PrintPercent(ctx->empty_count, total);
  1434. }
  1435. printf("%% Lost: ");
  1436. PrintPercent(ctx->missing_count, total);
  1437. printf("%%");
  1438. printf("\n");
  1439. }
  1440. }
  1441. void StorageStats(GRABContext *ctx) {
  1442. int err;
  1443. fastwriter_stats_t st;
  1444. pcilib_timeout_t duration;
  1445. struct timeval cur;
  1446. gettimeofday(&cur, NULL);
  1447. duration = pcilib_timediff(&ctx->start_time, &cur);
  1448. err = fastwriter_get_stats(ctx->writer, &st);
  1449. if (err) return;
  1450. printf("Wrote ");
  1451. PrintSize(st.written);
  1452. printf(" of ");
  1453. PrintSize(st.commited);
  1454. printf(" at ");
  1455. PrintSize(1000000.*st.written / duration);
  1456. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1457. printf(" of ");
  1458. PrintSize(st.buffer_size);
  1459. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1460. }
  1461. void *Monitor(void *user) {
  1462. struct timeval deadline;
  1463. struct timeval nextinfo;
  1464. GRABContext *ctx = (GRABContext*)user;
  1465. int verbose = ctx->verbose;
  1466. pcilib_timeout_t timeout = ctx->timeout;
  1467. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1468. // while (!ctx->started);
  1469. if (timeout) {
  1470. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1471. pcilib_add_timeout(&deadline, timeout);
  1472. }
  1473. if (verbose > 0) {
  1474. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1475. }
  1476. while (ctx->run_flag) {
  1477. if (StopFlag) {
  1478. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1479. break;
  1480. }
  1481. if (timeout) {
  1482. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1483. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1484. pcilib_add_timeout(&deadline, timeout);
  1485. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1486. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1487. break;
  1488. }
  1489. }
  1490. }
  1491. if (verbose > 0) {
  1492. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1493. GrabStats(ctx, NULL);
  1494. StorageStats(ctx);
  1495. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1496. }
  1497. }
  1498. usleep(100000);
  1499. }
  1500. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1501. while (ctx->writing_flag) {
  1502. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1503. if (verbose >= 0) StorageStats(ctx);
  1504. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1505. }
  1506. usleep(100000);
  1507. }
  1508. return NULL;
  1509. }
  1510. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1511. int err;
  1512. GRABContext ctx;
  1513. // void *data = NULL;
  1514. // size_t size, written;
  1515. pcilib_event_t event;
  1516. pcilib_event_t listen_events;
  1517. pcilib_event_data_type_t data;
  1518. pthread_t monitor_thread;
  1519. pthread_t trigger_thread;
  1520. pthread_attr_t attr;
  1521. struct sched_param sched;
  1522. struct timeval end_time;
  1523. pcilib_event_flags_t flags;
  1524. if (evname) {
  1525. event = pcilib_find_event(handle, evname);
  1526. if (event == PCILIB_EVENT_INVALID)
  1527. Error("Can't find event (%s)", evname);
  1528. listen_events = event;
  1529. } else {
  1530. listen_events = PCILIB_EVENTS_ALL;
  1531. event = PCILIB_EVENT0;
  1532. }
  1533. if (data_type) {
  1534. data = pcilib_find_event_data_type(handle, event, data_type);
  1535. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1536. Error("Can't find data type (%s)", data_type);
  1537. } else {
  1538. data = PCILIB_EVENT_DATA;
  1539. }
  1540. memset(&ctx, 0, sizeof(GRABContext));
  1541. ctx.handle = handle;
  1542. ctx.event = event;
  1543. ctx.data = data;
  1544. ctx.run_time = run_time;
  1545. ctx.timeout = timeout;
  1546. ctx.format = format;
  1547. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1548. else ctx.verbose = 0;
  1549. if (grab_mode&GRAB_MODE_GRAB) {
  1550. ctx.writer = fastwriter_init(output, 0);
  1551. if (!ctx.writer)
  1552. Error("Can't initialize fastwritter library");
  1553. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1554. err = fastwriter_open(ctx.writer, output, 0);
  1555. if (err)
  1556. Error("Error opening file (%s), Error: %i\n", output, err);
  1557. ctx.writing_flag = 1;
  1558. }
  1559. ctx.run_flag = 1;
  1560. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1561. if (data == PCILIB_EVENT_RAW_DATA) {
  1562. if (format == FORMAT_RAW) {
  1563. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1564. }
  1565. } else {
  1566. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1567. }
  1568. ctx.flags = flags;
  1569. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1570. pcilib_configure_autostop(handle, num, run_time);
  1571. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1572. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1573. }
  1574. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1575. pcilib_configure_preprocessing_threads(handle, threads);
  1576. }
  1577. if (grab_mode&GRAB_MODE_TRIGGER) {
  1578. if (trigger_time) {
  1579. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1580. timeout = 2 * trigger_time;
  1581. ctx.timeout = timeout;
  1582. }
  1583. } else {
  1584. // Otherwise, we will trigger next event after previous one is read
  1585. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1586. }
  1587. ctx.max_triggers = num;
  1588. ctx.trigger_count = 0;
  1589. ctx.trigger_time = trigger_time;
  1590. // We don't really care if RT priority is imposible
  1591. pthread_attr_init(&attr);
  1592. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1593. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1594. pthread_attr_setschedparam(&attr, &sched);
  1595. }
  1596. // Start triggering thread and wait until it is schedulled
  1597. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1598. Error("Error spawning trigger thread");
  1599. while (!ctx.trigger_thread_started) usleep(10);
  1600. }
  1601. gettimeofday(&ctx.start_time, NULL);
  1602. if (grab_mode&GRAB_MODE_GRAB) {
  1603. err = pcilib_start(handle, listen_events, flags);
  1604. if (err) Error("Failed to start event engine, error %i", err);
  1605. }
  1606. ctx.started = 1;
  1607. if (run_time) {
  1608. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1609. if (ctx.stop_time.tv_usec > 999999) {
  1610. ctx.stop_time.tv_usec -= 1000000;
  1611. __sync_synchronize();
  1612. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1613. } else {
  1614. __sync_synchronize();
  1615. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1616. }
  1617. }
  1618. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1619. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1620. Error("Error spawning monitoring thread");
  1621. if (grab_mode&GRAB_MODE_GRAB) {
  1622. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1623. if (err) Error("Error streaming events, error %i", err);
  1624. }
  1625. ctx.run_flag = 0;
  1626. if (grab_mode&GRAB_MODE_TRIGGER) {
  1627. while (ctx.trigger_thread_started) usleep(10);
  1628. }
  1629. if (grab_mode&GRAB_MODE_GRAB) {
  1630. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1631. }
  1632. gettimeofday(&end_time, NULL);
  1633. if (grab_mode&GRAB_MODE_TRIGGER) {
  1634. pthread_join(trigger_thread, NULL);
  1635. }
  1636. if (grab_mode&GRAB_MODE_GRAB) {
  1637. if (verbose >= 0)
  1638. printf("Grabbing is finished, flushing results....\n");
  1639. err = fastwriter_close(ctx.writer);
  1640. if (err) Error("Storage problems, error %i", err);
  1641. }
  1642. ctx.writing_flag = 0;
  1643. pthread_join(monitor_thread, NULL);
  1644. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1645. GrabStats(&ctx, &end_time);
  1646. StorageStats(&ctx);
  1647. }
  1648. fastwriter_destroy(ctx.writer);
  1649. return 0;
  1650. }
  1651. int StartStopDMA(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1652. int err;
  1653. pcilib_dma_engine_t dmaid;
  1654. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1655. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  1656. if (start) Error("DMA engine should be specified");
  1657. for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
  1658. err = pcilib_start_dma(handle, dmaid, 0);
  1659. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1660. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1661. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1662. }
  1663. return 0;
  1664. }
  1665. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1666. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1667. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1668. if (start) {
  1669. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1670. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1671. } else {
  1672. err = pcilib_start_dma(handle, dmaid, 0);
  1673. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1674. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1675. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1676. }
  1677. }
  1678. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1679. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1680. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1681. if (start) {
  1682. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1683. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1684. } else {
  1685. err = pcilib_start_dma(handle, dmaid, 0);
  1686. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1687. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1688. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1689. }
  1690. }
  1691. return 0;
  1692. }
  1693. typedef struct {
  1694. pcilib_kmem_use_t use;
  1695. int referenced;
  1696. int hw_lock;
  1697. int reusable;
  1698. int persistent;
  1699. int open;
  1700. size_t count;
  1701. size_t size;
  1702. } kmem_use_info_t;
  1703. #define MAX_USES 64
  1704. pcilib_kmem_use_t ParseUse(const char *use) {
  1705. unsigned long utmp;
  1706. if (use) {
  1707. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1708. if (strlen(use) < 5)
  1709. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1710. else
  1711. return utmp;
  1712. }
  1713. Error("Kernel memory use is not specified");
  1714. return 0;
  1715. }
  1716. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1717. size_t i, n = *n_uses;
  1718. if (uses[n - 1].use == use) return n - 1;
  1719. for (i = 1; i < (n - 1); i++) {
  1720. if (uses[i].use == use) return i;
  1721. }
  1722. if (n == MAX_USES) return 0;
  1723. memset(&uses[n], 0, sizeof(kmem_use_info_t));
  1724. uses[n].use = use;
  1725. return (*n_uses)++;
  1726. }
  1727. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1728. size_t i;
  1729. for (i = 0; i < n_uses; i++) {
  1730. if (uses[i].use == use) {
  1731. if (uses[i].count) return uses + i;
  1732. else return NULL;
  1733. }
  1734. }
  1735. return NULL;
  1736. }
  1737. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  1738. DIR *dir;
  1739. struct dirent *entry;
  1740. const char *pos;
  1741. char sysdir[256];
  1742. char fname[256];
  1743. char info[256];
  1744. size_t useid, n_uses = 1; // Use 0 is for others
  1745. memset(uses, 0, sizeof(kmem_use_info_t));
  1746. pos = strrchr(device, '/');
  1747. if (pos) ++pos;
  1748. else pos = device;
  1749. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1750. dir = opendir(sysdir);
  1751. if (!dir) Error("Can't open directory (%s)", sysdir);
  1752. while ((entry = readdir(dir)) != NULL) {
  1753. FILE *f;
  1754. unsigned long use = 0;
  1755. unsigned long size = 0;
  1756. unsigned long refs = 0;
  1757. unsigned long mode = 0;
  1758. unsigned long hwref = 0;
  1759. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1760. if (!isnumber(entry->d_name+4)) continue;
  1761. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1762. f = fopen(fname, "r");
  1763. if (!f) Error("Can't access file (%s)", fname);
  1764. while(!feof(f)) {
  1765. if (!fgets(info, 256, f))
  1766. break;
  1767. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1768. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1769. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1770. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1771. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1772. }
  1773. fclose(f);
  1774. useid = FindUse(&n_uses, uses, use);
  1775. uses[useid].count++;
  1776. uses[useid].size += size;
  1777. if (refs) uses[useid].referenced = 1;
  1778. if (hwref) uses[useid].hw_lock = 1;
  1779. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  1780. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  1781. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  1782. }
  1783. closedir(dir);
  1784. *uses_number = n_uses;
  1785. return 0;
  1786. }
  1787. int ListKMEM(pcilib_t *handle, const char *device) {
  1788. int err;
  1789. char stmp[256];
  1790. size_t i, useid, n_uses;
  1791. kmem_use_info_t uses[MAX_USES];
  1792. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  1793. err = ParseKMEM(handle, device, &n_uses, uses);
  1794. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1795. if ((n_uses == 1)&&(uses[0].count == 0)) {
  1796. printf("No kernel memory is allocated\n");
  1797. return 0;
  1798. }
  1799. printf("Use Type Count Total Size REF Mode \n");
  1800. printf("--------------------------------------------------------------------------------\n");
  1801. for (useid = 0; useid < n_uses; useid++) {
  1802. if (useid + 1 == n_uses) {
  1803. if (!uses[0].count) continue;
  1804. i = 0;
  1805. } else i = useid + 1;
  1806. printf("%08x ", uses[i].use);
  1807. if (i) {
  1808. switch(PCILIB_KMEM_USE_TYPE(uses[i].use)) {
  1809. case PCILIB_KMEM_USE_DMA_RING:
  1810. printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1811. break;
  1812. case PCILIB_KMEM_USE_DMA_PAGES:
  1813. printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1814. break;
  1815. case PCILIB_KMEM_USE_SOFTWARE_REGISTERS: {
  1816. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  1817. if (bank == PCILIB_REGISTER_BANK_INVALID)
  1818. printf("SoftRegs (%8u)", PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  1819. else
  1820. printf("SoftRegs (%8s)", model_info->banks[bank].name);
  1821. break;
  1822. }
  1823. case PCILIB_KMEM_USE_LOCKS:
  1824. printf("Locks ");
  1825. break;
  1826. case PCILIB_KMEM_USE_USER:
  1827. printf("User %04x ", uses[i].use&0xFFFF);
  1828. break;
  1829. default:
  1830. printf (" ");
  1831. }
  1832. } else printf("All Others ");
  1833. printf(" ");
  1834. printf("%6zu", uses[i].count);
  1835. printf(" ");
  1836. printf("%10s", GetPrintSize(stmp, uses[i].size));
  1837. printf(" ");
  1838. if ((uses[i].referenced)&&(uses[i].hw_lock)) printf("HW+SW");
  1839. else if (uses[i].referenced) printf(" SW");
  1840. else if (uses[i].hw_lock) printf("HW ");
  1841. else printf(" - ");
  1842. printf(" ");
  1843. if (uses[i].persistent) printf("Persistent");
  1844. else if (uses[i].open) printf("Open ");
  1845. else if (uses[i].reusable) printf("Reusable ");
  1846. else printf("Closed ");
  1847. printf("\n");
  1848. }
  1849. printf("--------------------------------------------------------------------------------\n");
  1850. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  1851. return 0;
  1852. }
  1853. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  1854. int err;
  1855. size_t i, n;
  1856. pcilib_kmem_handle_t *kbuf;
  1857. pcilib_kmem_use_t useid = ParseUse(use);
  1858. size_t n_uses;
  1859. kmem_use_info_t uses[MAX_USES];
  1860. kmem_use_info_t *use_info;
  1861. if (block == (size_t)-1) {
  1862. err = ParseKMEM(handle, device, &n_uses, uses);
  1863. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1864. use_info = GetUse(n_uses, uses, useid);
  1865. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  1866. i = 0;
  1867. n = use_info->count;
  1868. } else {
  1869. i = block;
  1870. n = block + 1;
  1871. }
  1872. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1873. if (!kbuf) {
  1874. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  1875. return 0;
  1876. }
  1877. printf("Buffer Address Hardware Address Bus Address\n");
  1878. printf("--------------------------------------------------------------------------------\n");
  1879. for (; i < n; i++) {
  1880. void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  1881. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  1882. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  1883. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  1884. }
  1885. printf("\n");
  1886. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1887. return 0;
  1888. }
  1889. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  1890. int err;
  1891. void *data;
  1892. size_t size;
  1893. pcilib_kmem_handle_t *kbuf;
  1894. if (block == (size_t)-1) block = 0;
  1895. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1896. if (!kbuf) {
  1897. Error("The specified kernel buffer is not allocated\n");
  1898. return 0;
  1899. }
  1900. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  1901. if (err) {
  1902. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1903. Error("The synchronization of kernel buffer has failed\n");
  1904. return 0;
  1905. }
  1906. data = pcilib_kmem_get_block_ua(handle, kbuf, block);
  1907. if (data) {
  1908. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  1909. if ((max_size)&&(size > max_size)) size = max_size;
  1910. fwrite(data, 1, size, o?o:stdout);
  1911. } else {
  1912. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1913. Error("The specified block is not existing\n");
  1914. return 0;
  1915. }
  1916. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1917. return 0;
  1918. }
  1919. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  1920. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  1921. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  1922. pcilib_kmem_handle_t *kbuf;
  1923. pcilib_kmem_use_t useid = ParseUse(use);
  1924. long page_size = sysconf(_SC_PAGESIZE);
  1925. if (type) {
  1926. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  1927. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  1928. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  1929. else Error("Invalid memory type (%s) is specified", type);
  1930. }
  1931. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  1932. Error("Selected memory type does not allow custom size");
  1933. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  1934. if (!kbuf) Error("Allocation of kernel memory has failed");
  1935. pcilib_free_kernel_memory(handle, kbuf, flags);
  1936. return 0;
  1937. }
  1938. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  1939. int err;
  1940. int i;
  1941. pcilib_kmem_use_t useid;
  1942. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  1943. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  1944. if (!strcasecmp(use, "dma")) {
  1945. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  1946. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  1947. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  1948. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  1949. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  1950. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  1951. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  1952. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  1953. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  1954. }
  1955. return 0;
  1956. }
  1957. useid = ParseUse(use);
  1958. err = pcilib_clean_kernel_memory(handle, useid, flags);
  1959. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  1960. return 0;
  1961. }
  1962. int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
  1963. int err;
  1964. DIR *dir;
  1965. struct dirent *entry;
  1966. const char *pos;
  1967. char sysdir[256];
  1968. char fname[256];
  1969. char info[256];
  1970. char stmp[256];
  1971. pcilib_dma_engine_t dmaid;
  1972. pcilib_dma_engine_status_t status;
  1973. pos = strrchr(device, '/');
  1974. if (pos) ++pos;
  1975. else pos = device;
  1976. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1977. dir = opendir(sysdir);
  1978. if (!dir) Error("Can't open directory (%s)", sysdir);
  1979. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  1980. printf("--------------------------------------------------------------------------------\n");
  1981. while ((entry = readdir(dir)) != NULL) {
  1982. FILE *f;
  1983. unsigned long use = 0;
  1984. // unsigned long size = 0;
  1985. // unsigned long refs = 0;
  1986. unsigned long mode = 0;
  1987. // unsigned long hwref = 0;
  1988. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1989. if (!isnumber(entry->d_name+4)) continue;
  1990. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1991. f = fopen(fname, "r");
  1992. if (!f) Error("Can't access file (%s)", fname);
  1993. while(!feof(f)) {
  1994. if (!fgets(info, 256, f))
  1995. break;
  1996. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1997. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1998. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1999. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2000. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2001. }
  2002. fclose(f);
  2003. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  2004. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  2005. if (use&0x80) {
  2006. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  2007. } else {
  2008. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  2009. }
  2010. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  2011. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  2012. err = pcilib_start_dma(handle, dmaid, 0);
  2013. if (err) {
  2014. printf("-- Wrong state, start is failed\n");
  2015. continue;
  2016. }
  2017. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2018. if (err) {
  2019. printf("-- Wrong state, failed to obtain status\n");
  2020. pcilib_stop_dma(handle, dmaid, 0);
  2021. continue;
  2022. }
  2023. pcilib_stop_dma(handle, dmaid, 0);
  2024. if (status.started) printf("S");
  2025. else printf(" ");
  2026. if (status.ring_head == status.ring_tail) printf(" ");
  2027. else printf("D");
  2028. printf(" ");
  2029. printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  2030. printf(" ");
  2031. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  2032. printf("\n");
  2033. }
  2034. closedir(dir);
  2035. printf("--------------------------------------------------------------------------------\n");
  2036. printf("S - Started, D - Data in buffers\n");
  2037. return 0;
  2038. }
  2039. int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  2040. int err;
  2041. size_t i;
  2042. pcilib_dma_engine_t dmaid;
  2043. pcilib_dma_engine_status_t status;
  2044. pcilib_dma_buffer_status_t *buffer;
  2045. char stmp[256];
  2046. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2047. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2048. err = pcilib_start_dma(handle, dmaid, 0);
  2049. if (err) Error("Error starting the specified DMA engine");
  2050. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2051. if (err) Error("Failed to obtain status of the specified DMA engine");
  2052. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2053. if (!buffer) Error("Failed to allocate memory for status buffer");
  2054. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2055. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2056. printf("Buffer Status Total Size \n");
  2057. printf("--------------------------------------------------------------------------------\n");
  2058. for (i = 0; i < status.ring_size; i++) {
  2059. printf("%8zu ", i);
  2060. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  2061. printf("%10s", GetPrintSize(stmp, buffer[i].size));
  2062. printf("\n");
  2063. }
  2064. printf("--------------------------------------------------------------------------------\n");
  2065. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  2066. free(buffer);
  2067. pcilib_stop_dma(handle, dmaid, 0);
  2068. return 0;
  2069. }
  2070. int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  2071. int err;
  2072. pcilib_dma_engine_t dmaid;
  2073. pcilib_dma_engine_status_t status;
  2074. pcilib_dma_buffer_status_t *buffer;
  2075. size_t size;
  2076. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2077. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2078. err = pcilib_start_dma(handle, dmaid, 0);
  2079. if (err) Error("Error starting the specified DMA engine");
  2080. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2081. if (err) Error("Failed to obtain status of the specified DMA engine");
  2082. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2083. if (!buffer) Error("Failed to allocate memory for status buffer");
  2084. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2085. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2086. if (block == (size_t)-1) {
  2087. // get current
  2088. }
  2089. size = buffer[block].size;
  2090. free(buffer);
  2091. pcilib_stop_dma(handle, dmaid, 0);
  2092. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  2093. }
  2094. int ListLocks(pcilib_t *ctx, int verbose) {
  2095. int err;
  2096. pcilib_lock_id_t i;
  2097. if (verbose)
  2098. printf("ID Refs Flags Locked Name\n");
  2099. else
  2100. printf("ID Refs Flags Name\n");
  2101. printf("--------------------------------------------------------------------------------\n");
  2102. for (i = 0; i < PCILIB_MAX_LOCKS; i++) {
  2103. pcilib_lock_t *lock = pcilib_get_lock_by_id(ctx, i);
  2104. const char *name = pcilib_lock_get_name(lock);
  2105. if (!name) break;
  2106. pcilib_lock_flags_t flags = pcilib_lock_get_flags(lock);
  2107. size_t refs = pcilib_lock_get_refs(lock);
  2108. printf("%4u %4zu ", i, refs);
  2109. if (flags&PCILIB_LOCK_FLAG_PERSISTENT) printf("P");
  2110. else printf(" ");
  2111. printf(" ");
  2112. if (verbose) {
  2113. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, PCILIB_TIMEOUT_IMMEDIATE);
  2114. switch (err) {
  2115. case 0:
  2116. pcilib_unlock(lock);
  2117. printf("No ");
  2118. break;
  2119. case PCILIB_ERROR_TIMEOUT:
  2120. printf("Yes ");
  2121. break;
  2122. default:
  2123. printf("Err: %3i ", err);
  2124. }
  2125. }
  2126. printf("%s\n", name);
  2127. }
  2128. printf("--------------------------------------------------------------------------------\n");
  2129. printf("P - Persistent\n");
  2130. return 0;
  2131. }
  2132. int FreeLocks(pcilib_t *handle, int force) {
  2133. return pcilib_destroy_all_locks(handle, force);
  2134. }
  2135. int LockUnlock(pcilib_t *handle, const char *name, int do_lock, pcilib_timeout_t timeout) {
  2136. int err = 0;
  2137. pcilib_lock_t *lock = pcilib_get_lock(handle, PCILIB_LOCK_FLAG_PERSISTENT, name);
  2138. if (!lock) Error("Error getting persistent lock %s", name);
  2139. if (do_lock)
  2140. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, timeout);
  2141. else
  2142. pcilib_unlock(lock);
  2143. if (err) {
  2144. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2145. switch (err) {
  2146. case PCILIB_ERROR_TIMEOUT:
  2147. printf("Timeout locking %s\n", name);
  2148. break;
  2149. default:
  2150. Error("Error (%i) locking %s", err, name);
  2151. }
  2152. } else if (do_lock) {
  2153. pcilib_lock_ref(lock);
  2154. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2155. printf("%s is locked\n", name);
  2156. } else {
  2157. pcilib_lock_unref(lock);
  2158. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2159. }
  2160. return err;
  2161. }
  2162. int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2163. int err;
  2164. err = pcilib_enable_irq(handle, irq_type, 0);
  2165. if (err) {
  2166. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2167. Error("Error enabling IRQs");
  2168. }
  2169. return err;
  2170. }
  2171. int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2172. int err;
  2173. err = pcilib_disable_irq(handle, 0);
  2174. if (err) {
  2175. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2176. Error("Error disabling IRQs");
  2177. }
  2178. return err;
  2179. }
  2180. int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  2181. pcilib_clear_irq(handle, irq_source);
  2182. return 0;
  2183. }
  2184. int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  2185. int err;
  2186. size_t count;
  2187. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  2188. if (err) {
  2189. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  2190. else Error("Error waiting for IRQ");
  2191. }
  2192. return 0;
  2193. }
  2194. int main(int argc, char **argv) {
  2195. int err = 0;
  2196. int i;
  2197. long itmp;
  2198. size_t ztmp;
  2199. unsigned char c;
  2200. const char *stmp;
  2201. const char *num_offset;
  2202. int details = 0;
  2203. int verbose = 0;
  2204. int quiete = 0;
  2205. int force = 0;
  2206. int verify = 0;
  2207. pcilib_log_priority_t log_priority;
  2208. const char *model = NULL;
  2209. const pcilib_model_description_t *model_info;
  2210. const pcilib_dma_description_t *dma_info;
  2211. MODE mode = MODE_INVALID;
  2212. GRAB_MODE grab_mode = 0;
  2213. size_t trigger_time = 0;
  2214. size_t run_time = 0;
  2215. size_t buffer = 0;
  2216. size_t threads = 1;
  2217. FORMAT format = FORMAT_DEFAULT;
  2218. PARTITION partition = PARTITION_UNKNOWN;
  2219. FLAGS flags = 0;
  2220. const char *atype = NULL;
  2221. const char *type = NULL;
  2222. ACCESS_MODE amode = ACCESS_BAR;
  2223. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  2224. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  2225. const char *addr = NULL;
  2226. const char *reg = NULL;
  2227. const char *unit = NULL;
  2228. const char *bank = NULL;
  2229. char **data = NULL;
  2230. const char *event = NULL;
  2231. const char *data_type = NULL;
  2232. const char *dma_channel = NULL;
  2233. const char *use = NULL;
  2234. const char *lock = NULL;
  2235. const char *info_target = NULL;
  2236. size_t block = (size_t)-1;
  2237. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  2238. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  2239. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  2240. pcilib_kmem_use_t useid = 0;
  2241. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  2242. long addr_shift = 0;
  2243. uintptr_t start = -1;
  2244. size_t block_size = 0;
  2245. size_t size = 1;
  2246. access_t access = 4;
  2247. // int skip = 0;
  2248. int endianess = 0;
  2249. size_t timeout = 0;
  2250. size_t alignment = 0;
  2251. const char *output = NULL;
  2252. FILE *ofile = NULL;
  2253. size_t iterations = BENCHMARK_ITERATIONS;
  2254. pcilib_t *handle;
  2255. int size_set = 0;
  2256. int timeout_set = 0;
  2257. // int run_time_set = 0;
  2258. struct sched_param sched_param = {0};
  2259. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  2260. extern int optind;
  2261. switch (c) {
  2262. case OPT_HELP:
  2263. Usage(argc, argv, NULL);
  2264. break;
  2265. case OPT_INFO:
  2266. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2267. if (optarg) info_target = optarg;
  2268. else if ((optind < argc)&&(argv[optind][0] != '-')) info_target = argv[optind++];
  2269. mode = MODE_INFO;
  2270. break;
  2271. case OPT_LIST:
  2272. if (mode == MODE_LIST) details++;
  2273. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2274. mode = MODE_LIST;
  2275. break;
  2276. case OPT_RESET:
  2277. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2278. mode = MODE_RESET;
  2279. break;
  2280. case OPT_BENCHMARK:
  2281. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2282. mode = MODE_BENCHMARK;
  2283. if (optarg) addr = optarg;
  2284. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2285. break;
  2286. case OPT_READ:
  2287. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2288. mode = MODE_READ;
  2289. if (optarg) addr = optarg;
  2290. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2291. break;
  2292. case OPT_WRITE:
  2293. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2294. mode = MODE_WRITE;
  2295. if (optarg) addr = optarg;
  2296. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2297. break;
  2298. case OPT_GRAB:
  2299. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  2300. mode = MODE_GRAB;
  2301. grab_mode |= GRAB_MODE_GRAB;
  2302. stmp = NULL;
  2303. if (optarg) stmp = optarg;
  2304. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2305. if (stmp) {
  2306. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2307. event = stmp;
  2308. }
  2309. break;
  2310. case OPT_TRIGGER:
  2311. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  2312. mode = MODE_GRAB;
  2313. grab_mode |= GRAB_MODE_TRIGGER;
  2314. stmp = NULL;
  2315. if (optarg) stmp = optarg;
  2316. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2317. if (stmp) {
  2318. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2319. event = stmp;
  2320. }
  2321. break;
  2322. case OPT_LIST_DMA:
  2323. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2324. mode = MODE_LIST_DMA;
  2325. break;
  2326. case OPT_LIST_DMA_BUFFERS:
  2327. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2328. mode = MODE_LIST_DMA_BUFFERS;
  2329. dma_channel = optarg;
  2330. break;
  2331. case OPT_READ_DMA_BUFFER:
  2332. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2333. mode = MODE_READ_DMA_BUFFER;
  2334. num_offset = strchr(optarg, ':');
  2335. if (num_offset) {
  2336. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2337. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2338. *(char*)num_offset = 0;
  2339. } else block = (size_t)-1;
  2340. dma_channel = optarg;
  2341. break;
  2342. case OPT_START_DMA:
  2343. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2344. mode = MODE_START_DMA;
  2345. if (optarg) dma_channel = optarg;
  2346. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2347. break;
  2348. case OPT_STOP_DMA:
  2349. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2350. mode = MODE_STOP_DMA;
  2351. if (optarg) dma_channel = optarg;
  2352. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2353. break;
  2354. case OPT_ENABLE_IRQ:
  2355. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2356. mode = MODE_ENABLE_IRQ;
  2357. if (optarg) num_offset = optarg;
  2358. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2359. else num_offset = NULL;
  2360. if (num_offset) {
  2361. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2362. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2363. irq_type = itmp;
  2364. }
  2365. break;
  2366. case OPT_DISABLE_IRQ:
  2367. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2368. mode = MODE_DISABLE_IRQ;
  2369. if (optarg) num_offset = optarg;
  2370. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2371. else num_offset = NULL;
  2372. if (num_offset) {
  2373. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2374. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2375. irq_type = itmp;
  2376. }
  2377. break;
  2378. case OPT_ACK_IRQ:
  2379. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2380. mode = MODE_ACK_IRQ;
  2381. if (optarg) num_offset = optarg;
  2382. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2383. else num_offset = NULL;
  2384. if (num_offset) {
  2385. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2386. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2387. irq_source = itmp;
  2388. }
  2389. break;
  2390. case OPT_WAIT_IRQ:
  2391. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2392. mode = MODE_WAIT_IRQ;
  2393. if (optarg) num_offset = optarg;
  2394. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2395. else num_offset = NULL;
  2396. if (num_offset) {
  2397. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2398. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2399. irq_source = itmp;
  2400. }
  2401. break;
  2402. case OPT_LIST_KMEM:
  2403. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2404. mode = MODE_LIST_KMEM;
  2405. if (optarg) use = optarg;
  2406. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2407. else use = NULL;
  2408. if (use) {
  2409. num_offset = strchr(use, ':');
  2410. if (num_offset) {
  2411. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2412. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2413. *(char*)num_offset = 0;
  2414. }
  2415. }
  2416. break;
  2417. case OPT_READ_KMEM:
  2418. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2419. mode = MODE_READ_KMEM;
  2420. if (!model) model = "pci";
  2421. num_offset = strchr(optarg, ':');
  2422. if (num_offset) {
  2423. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2424. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2425. *(char*)num_offset = 0;
  2426. }
  2427. use = optarg;
  2428. useid = ParseUse(use);
  2429. break;
  2430. case OPT_ALLOC_KMEM:
  2431. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2432. mode = MODE_ALLOC_KMEM;
  2433. model = "pci";
  2434. if (optarg) use = optarg;
  2435. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2436. break;
  2437. case OPT_FREE_KMEM:
  2438. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2439. mode = MODE_FREE_KMEM;
  2440. if (!model) model = "pci";
  2441. if (optarg) use = optarg;
  2442. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2443. break;
  2444. case OPT_LIST_LOCKS:
  2445. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2446. mode = MODE_LIST_LOCKS;
  2447. break;
  2448. case OPT_FREE_LOCKS:
  2449. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2450. mode = MODE_FREE_LOCKS;
  2451. model = "maintenance";
  2452. break;
  2453. case OPT_LOCK:
  2454. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2455. mode = MODE_LOCK;
  2456. lock = optarg;
  2457. break;
  2458. case OPT_UNLOCK:
  2459. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2460. mode = MODE_UNLOCK;
  2461. lock = optarg;
  2462. break;
  2463. case OPT_DEVICE:
  2464. fpga_device = optarg;
  2465. break;
  2466. case OPT_MODEL:
  2467. model = optarg;
  2468. /* if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2469. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2470. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2471. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
  2472. break;
  2473. case OPT_BAR:
  2474. bank = optarg;
  2475. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2476. // else bar = itmp;
  2477. break;
  2478. case OPT_ALIGNMENT:
  2479. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2480. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2481. }
  2482. break;
  2483. case OPT_ACCESS:
  2484. if (!strncasecmp(optarg, "fifo", 4)) {
  2485. atype = "fifo";
  2486. num_offset = optarg + 4;
  2487. amode = ACCESS_FIFO;
  2488. } else if (!strncasecmp(optarg, "dma", 3)) {
  2489. atype = "dma";
  2490. num_offset = optarg + 3;
  2491. amode = ACCESS_DMA;
  2492. } else if (!strncasecmp(optarg, "bar", 3)) {
  2493. atype = "plain";
  2494. num_offset = optarg + 3;
  2495. amode = ACCESS_BAR;
  2496. } else if (!strncasecmp(optarg, "config", 6)) {
  2497. atype = "config";
  2498. num_offset = optarg + 6;
  2499. amode = ACCESS_CONFIG;
  2500. } else if (!strncasecmp(optarg, "plain", 5)) {
  2501. atype = "plain";
  2502. num_offset = optarg + 5;
  2503. amode = ACCESS_BAR;
  2504. } else {
  2505. num_offset = optarg;
  2506. }
  2507. if (*num_offset) {
  2508. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2509. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2510. switch (itmp) {
  2511. case 8: access = 1; break;
  2512. case 16: access = 2; break;
  2513. case 32: access = 4; break;
  2514. case 64: access = 8; break;
  2515. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2516. }
  2517. }
  2518. break;
  2519. case OPT_SIZE:
  2520. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2521. if (strcasecmp(optarg, "unlimited"))
  2522. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2523. else
  2524. size = 0;//(size_t)-1;
  2525. }
  2526. size_set = 1;
  2527. break;
  2528. case OPT_BLOCK_SIZE:
  2529. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2530. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2531. }
  2532. break;
  2533. case OPT_ENDIANESS:
  2534. if ((*optarg == 'b')||(*optarg == 'B')) {
  2535. if (ntohs(1) == 1) endianess = 0;
  2536. else endianess = 1;
  2537. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2538. if (ntohs(1) == 1) endianess = 1;
  2539. else endianess = 0;
  2540. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2541. break;
  2542. case OPT_TIMEOUT:
  2543. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2544. if (strcasecmp(optarg, "unlimited"))
  2545. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2546. else
  2547. timeout = PCILIB_TIMEOUT_INFINITE;
  2548. }
  2549. timeout_set = 1;
  2550. break;
  2551. case OPT_OUTPUT:
  2552. output = optarg;
  2553. break;
  2554. case OPT_ITERATIONS:
  2555. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2556. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2557. break;
  2558. case OPT_EVENT:
  2559. event = optarg;
  2560. break;
  2561. case OPT_TYPE:
  2562. type = optarg;
  2563. break;
  2564. case OPT_DATA_TYPE:
  2565. data_type = optarg;
  2566. break;
  2567. case OPT_RUN_TIME:
  2568. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2569. if (strcasecmp(optarg, "unlimited"))
  2570. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2571. else
  2572. run_time = 0;
  2573. }
  2574. // run_time_set = 1;
  2575. break;
  2576. case OPT_TRIGGER_TIME:
  2577. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2578. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2579. break;
  2580. case OPT_TRIGGER_RATE:
  2581. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2582. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2583. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2584. break;
  2585. case OPT_BUFFER:
  2586. if (optarg) num_offset = optarg;
  2587. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2588. else num_offset = NULL;
  2589. if (num_offset) {
  2590. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2591. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2592. buffer *= 1024 * 1024;
  2593. } else {
  2594. buffer = get_free_memory();
  2595. if (buffer < 256) Error("Not enough free memory (%lz MB) for buffering", buffer / 1024 / 1024);
  2596. buffer -= 128 + buffer/16;
  2597. }
  2598. break;
  2599. case OPT_THREADS:
  2600. if (optarg) num_offset = optarg;
  2601. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2602. else num_offset = NULL;
  2603. if (num_offset) {
  2604. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2605. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2606. } else {
  2607. threads = 0;
  2608. }
  2609. break;
  2610. case OPT_FORMAT:
  2611. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2612. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2613. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2614. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2615. break;
  2616. case OPT_QUIETE:
  2617. quiete = 1;
  2618. verbose = -1;
  2619. break;
  2620. case OPT_VERBOSE:
  2621. if (optarg) num_offset = optarg;
  2622. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2623. else num_offset = NULL;
  2624. if (num_offset) {
  2625. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2626. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2627. } else {
  2628. verbose = 1;
  2629. }
  2630. break;
  2631. case OPT_FORCE:
  2632. force = 1;
  2633. break;
  2634. case OPT_VERIFY:
  2635. verify = 1;
  2636. break;
  2637. case OPT_MULTIPACKET:
  2638. flags |= FLAG_MULTIPACKET;
  2639. break;
  2640. case OPT_WAIT:
  2641. flags |= FLAG_WAIT;
  2642. break;
  2643. default:
  2644. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2645. }
  2646. }
  2647. if (mode == MODE_INVALID) {
  2648. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2649. else Usage(argc, argv, NULL);
  2650. }
  2651. if (verbose) log_priority = PCILIB_LOG_INFO;
  2652. else if (quiete) log_priority = PCILIB_LOG_ERROR;
  2653. else log_priority = PCILIB_LOG_WARNING;
  2654. pcilib_set_logger(log_priority, &LogError, NULL);
  2655. handle = pcilib_open(fpga_device, model);
  2656. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2657. model_info = pcilib_get_model_description(handle);
  2658. dma_info = pcilib_get_dma_description(handle);
  2659. switch (mode) {
  2660. case MODE_WRITE:
  2661. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2662. int vallen = strlen(argv[optind]);
  2663. if (vallen > 1) {
  2664. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2665. if (!data) Error("Error allocating memory for data array");
  2666. for (i = 0; i < size; i++) {
  2667. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2668. strcpy(data[i], argv[optind] + 1);
  2669. }
  2670. } else {
  2671. data = (char**)malloc(size * (9 + sizeof(char*)));
  2672. if (!data) Error("Error allocating memory for data array");
  2673. for (i = 0; i < size; i++) {
  2674. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2675. sprintf(data[i], "%x", i);
  2676. }
  2677. }
  2678. } else if ((argc - optind) == size) data = argv + optind;
  2679. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2680. case MODE_READ:
  2681. if (!addr) {
  2682. if (((!dma_info)||(!dma_info->api))&&(!model_info->api)&&(!handle->num_reg)) {
  2683. // if (model == PCILIB_MODEL_PCI) {
  2684. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2685. Usage(argc, argv, "The address is not specified");
  2686. } else ++mode;
  2687. }
  2688. break;
  2689. case MODE_START_DMA:
  2690. case MODE_STOP_DMA:
  2691. case MODE_LIST_DMA_BUFFERS:
  2692. case MODE_READ_DMA_BUFFER:
  2693. if ((dma_channel)&&(*dma_channel)) {
  2694. itmp = strlen(dma_channel) - 1;
  2695. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2696. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2697. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2698. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2699. else {
  2700. num_offset = dma_channel + 3;
  2701. itmp -= 3;
  2702. }
  2703. if (bank) {
  2704. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  2705. }
  2706. if (!isnumber_n(num_offset, itmp))
  2707. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  2708. dma = atoi(num_offset);
  2709. }
  2710. break;
  2711. default:
  2712. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  2713. }
  2714. if (addr) {
  2715. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2716. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  2717. if (bank) {
  2718. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2719. } else {
  2720. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  2721. }
  2722. dma = atoi(addr + 3);
  2723. amode = ACCESS_DMA;
  2724. addr = NULL;
  2725. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2726. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  2727. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2728. bar = atoi(addr + 3);
  2729. amode = ACCESS_BAR;
  2730. addr = NULL;
  2731. } else if (!strcmp(addr, "config")) {
  2732. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  2733. amode = ACCESS_CONFIG;
  2734. addr = NULL;
  2735. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  2736. // check if the address in the register range
  2737. const pcilib_register_range_t *ranges = model_info->ranges;
  2738. if (ranges) {
  2739. for (i = 0; ranges[i].start != ranges[i].end; i++)
  2740. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  2741. // register access in plain mode
  2742. if (ranges[i].start != ranges[i].end) {
  2743. pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
  2744. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  2745. bank = model_info->banks[regbank].name;
  2746. start += ranges[i].addr_shift;
  2747. addr_shift = ranges[i].addr_shift;
  2748. ++mode;
  2749. }
  2750. }
  2751. } else {
  2752. unit = strchr(addr, '/');
  2753. if (!unit) unit = strchr(addr, ':');
  2754. if (unit) {
  2755. char *reg_name;
  2756. size_t reg_size = strlen(addr) - strlen(unit);
  2757. reg_name = alloca(reg_size + 1);
  2758. memcpy(reg_name, addr, reg_size);
  2759. reg_name[reg_size] = 0;
  2760. reg = reg_name;
  2761. unit++;
  2762. } else {
  2763. reg = addr;
  2764. }
  2765. if (pcilib_find_register(handle, bank, reg) == PCILIB_REGISTER_INVALID) {
  2766. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  2767. } else {
  2768. ++mode;
  2769. }
  2770. }
  2771. }
  2772. if (mode == MODE_GRAB) {
  2773. if (output) {
  2774. char fsname[128];
  2775. if (!get_file_fs(output, 127, fsname)) {
  2776. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  2777. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  2778. }
  2779. } else {
  2780. output = "/dev/null";
  2781. partition = PARTITION_NULL;
  2782. }
  2783. if (!timeout_set) {
  2784. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  2785. else timeout = PCILIB_EVENT_TIMEOUT;
  2786. }
  2787. if (!size_set) {
  2788. if (run_time) size = 0;
  2789. }
  2790. }
  2791. if (mode != MODE_GRAB) {
  2792. if (size == (size_t)-1)
  2793. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  2794. }
  2795. if ((bank)&&(amode == ACCESS_DMA)) {
  2796. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  2797. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  2798. else dma = itmp;
  2799. } else if (bank) {
  2800. switch (mode) {
  2801. case MODE_BENCHMARK:
  2802. case MODE_READ:
  2803. case MODE_WRITE:
  2804. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS))
  2805. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2806. else bar = itmp;
  2807. break;
  2808. default:
  2809. if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  2810. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2811. }
  2812. }
  2813. signal(SIGINT, signal_exit_handler);
  2814. if ((mode != MODE_GRAB)&&(output)) {
  2815. ofile = fopen(output, "a+");
  2816. if (!ofile) {
  2817. Error("Failed to open file \"%s\"", output);
  2818. }
  2819. }
  2820. // Requesting real-time priority when needed
  2821. switch (mode) {
  2822. case MODE_READ:
  2823. case MODE_WRITE:
  2824. if (amode != ACCESS_DMA)
  2825. break;
  2826. case MODE_BENCHMARK:
  2827. case MODE_GRAB:
  2828. sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO);
  2829. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  2830. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  2831. break;
  2832. default:
  2833. ;
  2834. }
  2835. switch (mode) {
  2836. case MODE_INFO:
  2837. Info(handle, model_info, info_target);
  2838. break;
  2839. case MODE_LIST:
  2840. List(handle, model_info, bank, details);
  2841. break;
  2842. case MODE_BENCHMARK:
  2843. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  2844. break;
  2845. case MODE_READ:
  2846. if (amode == ACCESS_DMA) {
  2847. err = ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  2848. } else if (amode == ACCESS_CONFIG) {
  2849. err = ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  2850. } else if (addr) {
  2851. err = ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  2852. } else {
  2853. Error("Address to read is not specified");
  2854. }
  2855. break;
  2856. case MODE_READ_REGISTER:
  2857. if ((reg)||(!addr)) ReadRegister(handle, model_info, bank, reg, unit);
  2858. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  2859. break;
  2860. case MODE_WRITE:
  2861. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  2862. break;
  2863. case MODE_WRITE_REGISTER:
  2864. if (reg) WriteRegister(handle, model_info, bank, reg, unit, data);
  2865. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  2866. break;
  2867. case MODE_RESET:
  2868. pcilib_reset(handle);
  2869. break;
  2870. case MODE_GRAB:
  2871. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  2872. break;
  2873. case MODE_LIST_DMA:
  2874. ListDMA(handle, fpga_device, model_info);
  2875. break;
  2876. case MODE_LIST_DMA_BUFFERS:
  2877. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  2878. break;
  2879. case MODE_READ_DMA_BUFFER:
  2880. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  2881. break;
  2882. case MODE_START_DMA:
  2883. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  2884. break;
  2885. case MODE_STOP_DMA:
  2886. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  2887. break;
  2888. case MODE_ENABLE_IRQ:
  2889. EnableIRQ(handle, model_info, irq_type);
  2890. break;
  2891. case MODE_DISABLE_IRQ:
  2892. DisableIRQ(handle, model_info, irq_type);
  2893. break;
  2894. case MODE_ACK_IRQ:
  2895. AckIRQ(handle, model_info, irq_source);
  2896. break;
  2897. case MODE_WAIT_IRQ:
  2898. WaitIRQ(handle, model_info, irq_source, timeout);
  2899. break;
  2900. case MODE_LIST_KMEM:
  2901. if (use) DetailKMEM(handle, fpga_device, use, block);
  2902. else ListKMEM(handle, fpga_device);
  2903. break;
  2904. case MODE_READ_KMEM:
  2905. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  2906. break;
  2907. case MODE_ALLOC_KMEM:
  2908. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  2909. break;
  2910. case MODE_FREE_KMEM:
  2911. FreeKMEM(handle, fpga_device, use, force);
  2912. break;
  2913. case MODE_LIST_LOCKS:
  2914. ListLocks(handle, verbose);
  2915. break;
  2916. case MODE_FREE_LOCKS:
  2917. FreeLocks(handle, force);
  2918. break;
  2919. case MODE_LOCK:
  2920. LockUnlock(handle, lock, 1, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  2921. break;
  2922. case MODE_UNLOCK:
  2923. LockUnlock(handle, lock, 0, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  2924. break;
  2925. case MODE_INVALID:
  2926. break;
  2927. }
  2928. if (ofile) fclose(ofile);
  2929. pcilib_close(handle);
  2930. if (data != argv + optind) free(data);
  2931. return err;
  2932. }