cli.c 120 KB

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  1. #define _XOPEN_SOURCE 700
  2. #define _POSIX_C_SOURCE 200112L
  3. #define _BSD_SOURCE
  4. #define _GNU_SOURCE
  5. #define _DEFAULT_SOURCE
  6. #include <stdio.h>
  7. #include <stdlib.h>
  8. #include <string.h>
  9. #include <strings.h>
  10. #include <stdint.h>
  11. #include <stdarg.h>
  12. #include <fcntl.h>
  13. #include <unistd.h>
  14. #include <sys/time.h>
  15. #include <sys/ioctl.h>
  16. #include <sys/mman.h>
  17. #include <errno.h>
  18. #include <alloca.h>
  19. #include <arpa/inet.h>
  20. #include <sys/types.h>
  21. #include <sys/stat.h>
  22. #include <dirent.h>
  23. #include <pthread.h>
  24. #include <signal.h>
  25. #include <dlfcn.h>
  26. #include <getopt.h>
  27. #include <fastwriter.h>
  28. #include "pcitool/sysinfo.h"
  29. #include "pcitool/formaters.h"
  30. #include "pcitool/buildinfo.h"
  31. #include "views/transform.h"
  32. #include "views/enum.h"
  33. #include "pcilib/pci.h"
  34. #include "pcilib/plugin.h"
  35. #include "pcilib/config.h"
  36. #include "pcilib/tools.h"
  37. #include "pcilib/kmem.h"
  38. #include "pcilib/error.h"
  39. #include "pcilib/debug.h"
  40. #include "pcilib/model.h"
  41. #include "pcilib/locking.h"
  42. /* defines */
  43. #define MAX_KBUF 14
  44. //#define BIGBUFSIZE (512*1024*1024)
  45. #define BIGBUFSIZE (1024*1024)
  46. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  47. #define LINE_WIDTH 80
  48. #define SEPARATOR_WIDTH 2
  49. #define BLOCK_SEPARATOR_WIDTH 2
  50. #define BLOCK_SIZE 8
  51. #define BENCHMARK_ITERATIONS 128
  52. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  53. #define isnumber pcilib_isnumber
  54. #define isxnumber pcilib_isxnumber
  55. #define isnumber_n pcilib_isnumber_n
  56. #define isxnumber_n pcilib_isxnumber_n
  57. typedef uint8_t access_t;
  58. typedef enum {
  59. GRAB_MODE_GRAB = 1,
  60. GRAB_MODE_TRIGGER = 2
  61. } GRAB_MODE;
  62. typedef enum {
  63. MODE_INVALID,
  64. MODE_VERSION,
  65. MODE_INFO,
  66. MODE_LIST,
  67. MODE_BENCHMARK,
  68. MODE_READ,
  69. MODE_READ_REGISTER,
  70. MODE_READ_PROPERTY,
  71. MODE_READ_ATTR,
  72. MODE_WRITE,
  73. MODE_WRITE_REGISTER,
  74. MODE_WRITE_PROPERTY,
  75. MODE_RESET,
  76. MODE_GRAB,
  77. MODE_START_DMA,
  78. MODE_STOP_DMA,
  79. MODE_LIST_DMA,
  80. MODE_LIST_DMA_BUFFERS,
  81. MODE_READ_DMA_BUFFER,
  82. MODE_ENABLE_IRQ,
  83. MODE_DISABLE_IRQ,
  84. MODE_ACK_IRQ,
  85. MODE_WAIT_IRQ,
  86. MODE_SET_DMASK,
  87. MODE_SET_MPS,
  88. MODE_ALLOC_KMEM,
  89. MODE_LIST_KMEM,
  90. MODE_READ_KMEM,
  91. MODE_FREE_KMEM,
  92. MODE_LIST_LOCKS,
  93. MODE_FREE_LOCKS,
  94. MODE_LOCK,
  95. MODE_UNLOCK
  96. } MODE;
  97. typedef enum {
  98. ACCESS_BAR,
  99. ACCESS_DMA,
  100. ACCESS_FIFO,
  101. ACCESS_CONFIG
  102. } ACCESS_MODE;
  103. typedef enum {
  104. FLAG_MULTIPACKET = 1,
  105. FLAG_WAIT = 2
  106. } FLAGS;
  107. typedef enum {
  108. FORMAT_DEFAULT = 0,
  109. FORMAT_RAW,
  110. FORMAT_HEADER,
  111. FORMAT_RINGFS
  112. } FORMAT;
  113. typedef enum {
  114. PARTITION_UNKNOWN,
  115. PARTITION_RAW,
  116. PARTITION_EXT4,
  117. PARTITION_NULL
  118. } PARTITION;
  119. typedef enum {
  120. OPT_DEVICE = 'd',
  121. OPT_MODEL = 'm',
  122. OPT_BAR = 'b',
  123. OPT_ACCESS = 'a',
  124. OPT_ENDIANESS = 'e',
  125. OPT_SIZE = 's',
  126. OPT_OUTPUT = 'o',
  127. OPT_TIMEOUT = 't',
  128. OPT_INFO = 'i',
  129. OPT_LIST = 'l',
  130. OPT_READ = 'r',
  131. OPT_WRITE = 'w',
  132. OPT_GRAB = 'g',
  133. OPT_QUIETE = 'q',
  134. OPT_HELP = 'h',
  135. OPT_VERSION = 128,
  136. OPT_RESET,
  137. OPT_BENCHMARK,
  138. OPT_TRIGGER,
  139. OPT_DATA_TYPE,
  140. OPT_EVENT,
  141. OPT_TRIGGER_RATE,
  142. OPT_TRIGGER_TIME,
  143. OPT_RUN_TIME,
  144. OPT_FORMAT,
  145. OPT_BUFFER,
  146. OPT_THREADS,
  147. OPT_LIST_DMA,
  148. OPT_LIST_DMA_BUFFERS,
  149. OPT_READ_DMA_BUFFER,
  150. OPT_START_DMA,
  151. OPT_STOP_DMA,
  152. OPT_ENABLE_IRQ,
  153. OPT_DISABLE_IRQ,
  154. OPT_ACK_IRQ,
  155. OPT_WAIT_IRQ,
  156. OPT_ITERATIONS,
  157. OPT_SET_DMASK,
  158. OPT_SET_MPS,
  159. OPT_ALLOC_KMEM,
  160. OPT_LIST_KMEM,
  161. OPT_FREE_KMEM,
  162. OPT_READ_KMEM,
  163. OPT_LIST_LOCKS,
  164. OPT_FREE_LOCKS,
  165. OPT_LOCK,
  166. OPT_UNLOCK,
  167. OPT_BLOCK_SIZE,
  168. OPT_ALIGNMENT,
  169. OPT_TYPE,
  170. OPT_FORCE,
  171. OPT_VERIFY,
  172. OPT_WAIT,
  173. OPT_MULTIPACKET,
  174. OPT_VERBOSE
  175. } OPTIONS;
  176. static struct option long_options[] = {
  177. {"device", required_argument, 0, OPT_DEVICE },
  178. {"model", required_argument, 0, OPT_MODEL },
  179. {"bar", required_argument, 0, OPT_BAR },
  180. {"access", required_argument, 0, OPT_ACCESS },
  181. {"endianess", required_argument, 0, OPT_ENDIANESS },
  182. {"size", required_argument, 0, OPT_SIZE },
  183. {"output", required_argument, 0, OPT_OUTPUT },
  184. {"timeout", required_argument, 0, OPT_TIMEOUT },
  185. {"iterations", required_argument, 0, OPT_ITERATIONS },
  186. {"info", optional_argument, 0, OPT_INFO },
  187. {"list", optional_argument, 0, OPT_LIST },
  188. {"reset", no_argument, 0, OPT_RESET },
  189. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  190. {"read", optional_argument, 0, OPT_READ },
  191. {"write", optional_argument, 0, OPT_WRITE },
  192. {"grab", optional_argument, 0, OPT_GRAB },
  193. {"trigger", optional_argument, 0, OPT_TRIGGER },
  194. {"data", required_argument, 0, OPT_DATA_TYPE },
  195. {"event", required_argument, 0, OPT_EVENT },
  196. {"run-time", required_argument, 0, OPT_RUN_TIME },
  197. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  198. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  199. {"format", required_argument, 0, OPT_FORMAT },
  200. {"buffer", optional_argument, 0, OPT_BUFFER },
  201. {"threads", optional_argument, 0, OPT_THREADS },
  202. {"start-dma", required_argument, 0, OPT_START_DMA },
  203. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  204. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  205. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  206. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  207. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  208. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  209. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  210. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  211. {"set-dma-mask", required_argument, 0, OPT_SET_DMASK },
  212. {"set-mps", required_argument, 0, OPT_SET_MPS },
  213. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  214. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  215. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  216. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  217. {"list-locks", no_argument, 0, OPT_LIST_LOCKS },
  218. {"free-locks", no_argument, 0, OPT_FREE_LOCKS },
  219. {"lock", required_argument, 0, OPT_LOCK },
  220. {"unlock", required_argument, 0, OPT_UNLOCK },
  221. {"type", required_argument, 0, OPT_TYPE },
  222. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  223. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  224. {"quiete", no_argument, 0, OPT_QUIETE },
  225. {"verbose", optional_argument, 0, OPT_VERBOSE },
  226. {"force", no_argument, 0, OPT_FORCE },
  227. {"verify", no_argument, 0, OPT_VERIFY },
  228. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  229. {"wait", no_argument, 0, OPT_WAIT },
  230. {"version", no_argument, 0, OPT_VERSION },
  231. {"help", no_argument, 0, OPT_HELP },
  232. { 0, 0, 0, 0 }
  233. };
  234. void Usage(int argc, char *argv[], const char *format, ...) {
  235. if (format) {
  236. va_list ap;
  237. va_start(ap, format);
  238. printf("Error %i: ", errno);
  239. vprintf(format, ap);
  240. printf("\n");
  241. va_end(ap);
  242. printf("\n");
  243. }
  244. printf(
  245. "Usage:\n"
  246. " %s <mode> [options] [hex data]\n"
  247. " Modes:\n"
  248. " -i [target] - Device or Register (target) Info\n"
  249. " -l[l] [bank|/branch] - List (detailed) Data Banks & Registers\n"
  250. " -r <addr|dmaX|reg|prop> - Read Data/Register/Property\n"
  251. " -w <addr|dmaX|reg|prop> - Write Data/Register/Property\n"
  252. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  253. " --reset - Reset board\n"
  254. " --version - Version information\n"
  255. " --help - Help message\n"
  256. "\n"
  257. " Property/Register Modes:\n"
  258. " -r <reg>/view[:unit] - Read register view\n"
  259. " -w <reg>/view[:unit] - Write register view\n"
  260. " -r <reg>/unit - Read register, detect view based on unit\n"
  261. " -w <reg>/unit - Write register, detect view based on unt\n"
  262. " -r <prop>[:unit] - Read property\n"
  263. " -w <prop>[:unit] - Write property\n"
  264. " -r <prop|reg>@attr - Read register/property attribute\n"
  265. "\n"
  266. " Event Modes:\n"
  267. " --trigger [event] - Trigger Events\n"
  268. " -g [event] - Grab Events\n"
  269. "\n"
  270. " IRQ Modes:\n"
  271. " --enable-irq [type] - Enable IRQs\n"
  272. " --disable-irq [type] - Disable IRQs\n"
  273. " --acknowledge-irq <source> - Clean IRQ queue\n"
  274. " --wait-irq <source> - Wait for IRQ\n"
  275. "\n"
  276. " DMA Modes:\n"
  277. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  278. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  279. " --list-dma-engines - List active DMA engines\n"
  280. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  281. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  282. "\n"
  283. " PCI Configuration:\n"
  284. " --set-dma-mask [bits] - Set DMA address width (DANGEROUS)\n"
  285. " --set-mps [bits] - Set PCIe Payload Size (DANGEROUS)\n"
  286. "\n"
  287. " Kernel Memory Modes:\n"
  288. " --list-kernel-memory [use] - List kernel buffers\n"
  289. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  290. " block is specified as: use:block_number\n"
  291. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  292. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  293. " dma - Remove all buffers allocated by DMA subsystem\n"
  294. " #number - Remove all buffers with the specified use id\n"
  295. "\n"
  296. " --list-locks - List all registered locks\n"
  297. " --free-locks - Destroy all locks (DANGEROUS)\n"
  298. " --lock <lock name> - Obtain persistent lock\n"
  299. " --unlock <lock name> - Release persistent lock\n"
  300. "\n"
  301. " Addressing:\n"
  302. " -d <device> - FPGA device (/dev/fpga0)\n"
  303. " -m <model> - Memory model (autodetected)\n"
  304. " pci - Plain\n"
  305. " ipecamera - IPE Camera\n"
  306. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  307. "\n"
  308. " Options:\n"
  309. " -s <size> - Number of words (default: 1)\n"
  310. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  311. " -e <l|b> - Endianess Little/Big (default: host)\n"
  312. " -o <file> - Append output to file (default: stdout)\n"
  313. " -t <timeout|unlimited> - Timeout in microseconds\n"
  314. " --check - Verify write operations\n"
  315. "\n"
  316. " Event Options:\n"
  317. " --event <evt> - Specifies event for trigger and grab modes\n"
  318. " --data <type> - Data type to request for the events\n"
  319. " --run-time <us> - Limit time to grab/trigger events\n"
  320. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  321. " --trigger-rate <tps> - Generate tps triggers per second\n"
  322. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  323. " -s <num|unlimited> - Number of events to grab and trigger\n"
  324. " --format [type] - Specifies how event data should be stored\n"
  325. " raw - Just write all events sequentially\n"
  326. " add_header - Prefix events with 512 bit header:\n"
  327. " event(64), data(64), nope(64), size(64)\n"
  328. " seqnum(64), offset(64), timestamp(128)\n"
  329. //" ringfs - Write to RingFS\n"
  330. " --buffer [size] - Request data buffering, size in MB\n"
  331. " --threads [num] - Allow multithreaded processing\n"
  332. "\n"
  333. " DMA Options:\n"
  334. " --multipacket - Read multiple packets\n"
  335. " --wait - Wait until data arrives\n"
  336. "\n"
  337. " Kernel Options:\n"
  338. " --type <type> - Type of kernel memory to allocate\n"
  339. " consistent - Consistent memory\n"
  340. " s2c - DMA S2C (write) memory\n"
  341. " c2s - DMA C2S (read) memory\n"
  342. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  343. " -s <size> - Number of buffers to allocate (default: 1)\n"
  344. " --allignment <alignment> - Buffer alignment (default: page)\n"
  345. "\n"
  346. " Information:\n"
  347. " --verbose [level] - Announce details of ongoing operations\n"
  348. " -q - Quiete mode (suppress warnings)\n"
  349. "\n"
  350. " Data:\n"
  351. " Data can be specified as sequence of hexdecimal number or\n"
  352. " a single value prefixed with '*'. In this case it will be\n"
  353. " replicated the specified amount of times\n"
  354. "\n\n",
  355. argv[0]);
  356. exit(0);
  357. }
  358. static int StopFlag = 0;
  359. static void signal_exit_handler(int signo) {
  360. if (++StopFlag > 2)
  361. exit(-1);
  362. }
  363. void LogError(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, va_list ap) {
  364. vprintf(format, ap);
  365. if (prio == PCILIB_LOG_ERROR) {
  366. if (errno) printf("\nerrno: %i (%s)", errno, strerror(errno));
  367. }
  368. printf("\n");
  369. if (prio == PCILIB_LOG_ERROR) {
  370. printf("Exiting at [%s:%u]\n\n", file, line);
  371. exit(-1);
  372. }
  373. }
  374. void ErrorInternal(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, ...) {
  375. va_list ap;
  376. va_start(ap, format);
  377. LogError(arg, file, line, prio, format, ap);
  378. va_end(ap);
  379. }
  380. #define Error(...) ErrorInternal(NULL, __FILE__, __LINE__, PCILIB_LOG_ERROR, __VA_ARGS__)
  381. int RegisterCompare(const void *aptr, const void *bptr, void *registers) {
  382. pcilib_register_description_t *a = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)aptr];
  383. pcilib_register_description_t *b = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)bptr];
  384. if (a->bank < b->bank) return -1;
  385. if (a->bank > b->bank) return 1;
  386. if (a->addr < b->addr) return -1;
  387. if (a->addr > b->addr) return 1;
  388. if ((a->type != PCILIB_REGISTER_BITS)&&(b->type == PCILIB_REGISTER_BITS)) return -1;
  389. if ((a->type == PCILIB_REGISTER_BITS)&&(b->type != PCILIB_REGISTER_BITS)) return 1;
  390. if (a->offset < b->offset) return -1;
  391. if (a->offset > b->offset) return 0;
  392. return 0;
  393. }
  394. void ListProperties(pcilib_t *handle, const char *branch, int details) {
  395. int i;
  396. pcilib_property_info_t *props;
  397. props = pcilib_get_property_list(handle, branch, 0);
  398. if (!props) Error("Error getting properties");
  399. if (props[0].path) {
  400. printf("Properties: \n");
  401. for (i = 0; props[i].path; i++) {
  402. const char *mode;
  403. const char *type;
  404. switch (props[i].type) {
  405. case PCILIB_TYPE_LONG:
  406. type = "int ";
  407. break;
  408. case PCILIB_TYPE_DOUBLE:
  409. type = "float ";
  410. break;
  411. case PCILIB_TYPE_STRING:
  412. type = "string ";
  413. break;
  414. case PCILIB_TYPE_INVALID:
  415. type = NULL;
  416. break;
  417. default:
  418. type = "unknown";
  419. }
  420. switch (props[i].mode) {
  421. case PCILIB_ACCESS_RW:
  422. mode = "RW";
  423. break;
  424. case PCILIB_ACCESS_R:
  425. mode = "R ";
  426. break;
  427. case PCILIB_ACCESS_W:
  428. mode = "W ";
  429. break;
  430. default:
  431. mode = " ";
  432. }
  433. if (type)
  434. printf(" (%s %s) ", type, mode);
  435. else
  436. printf(" %12s", "");
  437. if (props[i].flags&PCILIB_LIST_FLAG_CHILDS)
  438. printf(" + ");
  439. else
  440. printf(" ");
  441. if (details > 0) {
  442. printf("%s", props[i].name);
  443. if ((props[i].description)&&(props[i].description[0])) {
  444. printf(": %s", props[i].description);
  445. }
  446. } else {
  447. printf("%s", props[i].path);
  448. }
  449. printf("\n");
  450. }
  451. printf("\n");
  452. pcilib_free_property_info(handle, props);
  453. }
  454. }
  455. void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
  456. int i, j, k;
  457. const pcilib_register_bank_description_t *banks;
  458. const pcilib_register_description_t *registers;
  459. const pcilib_event_description_t *events;
  460. const pcilib_event_data_type_description_t *types;
  461. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  462. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  463. for (i = 0; i < PCILIB_MAX_BARS; i++) {
  464. if (board_info->bar_length[i] > 0) {
  465. printf(" BAR %d - ", i);
  466. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  467. case IORESOURCE_IO: printf(" IO"); break;
  468. case IORESOURCE_MEM: printf("MEM"); break;
  469. case IORESOURCE_IRQ: printf("IRQ"); break;
  470. case IORESOURCE_DMA: printf("DMA"); break;
  471. }
  472. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  473. else printf("32");
  474. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  475. }
  476. }
  477. printf("\n");
  478. if ((dma_info)&&(dma_info->engines)) {
  479. printf("DMA Engines: \n");
  480. for (i = 0; dma_info->engines[i].addr_bits; i++) {
  481. const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
  482. printf(" DMA %2d ", engine->addr);
  483. switch (engine->direction) {
  484. case PCILIB_DMA_FROM_DEVICE:
  485. printf("C2S");
  486. break;
  487. case PCILIB_DMA_TO_DEVICE:
  488. printf("S2C");
  489. break;
  490. case PCILIB_DMA_BIDIRECTIONAL:
  491. printf("BI ");
  492. break;
  493. }
  494. printf(" - Type: ");
  495. switch (engine->type) {
  496. case PCILIB_DMA_TYPE_BLOCK:
  497. printf("Block");
  498. break;
  499. case PCILIB_DMA_TYPE_PACKET:
  500. printf("Packet");
  501. break;
  502. default:
  503. printf("Unknown");
  504. }
  505. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  506. }
  507. printf("\n");
  508. }
  509. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  510. else banks = model_info->banks;
  511. if (banks) {
  512. printf("Banks: \n");
  513. for (i = 0; banks[i].access; i++) {
  514. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  515. if ((banks[i].description)&&(banks[i].description[0])) {
  516. printf(": %s", banks[i].description);
  517. }
  518. printf("\n");
  519. }
  520. printf("\n");
  521. }
  522. if (bank == (char*)-1) registers = NULL;
  523. else registers = model_info->registers;
  524. if (registers) {
  525. pcilib_register_t regsort[handle->num_reg];
  526. pcilib_register_bank_addr_t bank_addr = 0;
  527. if (bank) {
  528. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  529. const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  530. bank_addr = b->addr;
  531. if (b->description) printf("%s:\n", b->description);
  532. else if (b->name) printf("Registers of bank %s:\n", b->name);
  533. else printf("Registers of bank 0x%x:\n", b->addr);
  534. } else {
  535. printf("Registers: \n");
  536. }
  537. // sorting
  538. for (i = 0, k = 0; registers[i].bits; i++) {
  539. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  540. if ((registers[i].type == PCILIB_REGISTER_BITS)&&(!details)) continue;
  541. regsort[k++] = i;
  542. }
  543. qsort_r(regsort, k, sizeof(pcilib_register_t), &RegisterCompare, (void*)registers);
  544. for (j = 0; j < k; j++) {
  545. const char *mode;
  546. i = regsort[j];
  547. if (registers[i].type == PCILIB_REGISTER_BITS) {
  548. if (!details) continue;
  549. if (registers[i].bits > 1) {
  550. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  551. } else {
  552. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  553. }
  554. continue;
  555. }
  556. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  557. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  558. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  559. else mode = " ";
  560. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  561. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  562. printf(": %s", registers[i].description);
  563. }
  564. printf("\n");
  565. }
  566. printf("\n");
  567. }
  568. ListProperties(handle, "/", details);
  569. if (bank == (char*)-1) events = NULL;
  570. else {
  571. events = model_info->events;
  572. types = model_info->data_types;
  573. }
  574. if (events) {
  575. printf("Events: \n");
  576. for (i = 0; events[i].name; i++) {
  577. printf(" %s", events[i].name);
  578. if ((events[i].description)&&(events[i].description[0])) {
  579. printf(": %s", events[i].description);
  580. }
  581. if (types) {
  582. for (j = 0; types[j].name; j++) {
  583. if (types[j].evid & events[i].evid) {
  584. printf("\n %s", types[j].name);
  585. if ((types[j].description)&&(types[j].description[0])) {
  586. printf(": %s", types[j].description);
  587. }
  588. }
  589. }
  590. }
  591. }
  592. printf("\n");
  593. }
  594. }
  595. void ViewInfo(pcilib_t *handle, pcilib_register_t reg, size_t id) {
  596. int err;
  597. int i;
  598. pcilib_value_t val = {0};
  599. pcilib_register_value_name_t *vnames;
  600. pcilib_view_t view;
  601. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  602. const pcilib_register_description_t *r;
  603. const pcilib_view_description_t *v;
  604. if (reg == PCILIB_REGISTER_INVALID) {
  605. r = NULL;
  606. view = id;
  607. } else {
  608. r = &model_info->registers[reg];
  609. view = pcilib_find_view_by_name(handle, r->views[id].view);
  610. }
  611. if (view == PCILIB_VIEW_INVALID) return;
  612. v = model_info->views[view];
  613. if (r) {
  614. printf(" View %s (", r->views[id].name);
  615. } else {
  616. printf("%s\n", v->name);
  617. printf(" Data type : ");
  618. }
  619. switch (v->type) {
  620. case PCILIB_TYPE_STRING:
  621. printf("char*");
  622. break;
  623. case PCILIB_TYPE_DOUBLE:
  624. printf("double");
  625. break;
  626. case PCILIB_TYPE_LONG:
  627. printf("long");
  628. break;
  629. default:
  630. printf("unknown");
  631. }
  632. if (r) printf(")");
  633. printf("\n");
  634. if (v->mode&PCILIB_ACCESS_R) {
  635. if (r) {
  636. err = pcilib_read_register_view_by_id(handle, reg, r->views[id].name, &val);
  637. } else {
  638. err = pcilib_get_property(handle, v->name, &val);
  639. }
  640. if (!err) err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  641. } else {
  642. err = PCILIB_ERROR_NOTPERMITED;
  643. }
  644. if (err) {
  645. if (err == PCILIB_ERROR_NOTPERMITED)
  646. printf(" Current value : no read access\n");
  647. else
  648. printf(" Current value : error %i\n", err);
  649. } else {
  650. printf(" Current value : %s", val.sval);
  651. if (v->unit) printf(" (units: %s)", v->unit);
  652. printf("\n");
  653. }
  654. if (v->unit) {
  655. pcilib_unit_t unit = pcilib_find_unit_by_name(handle, v->unit);
  656. printf(" Supported units: %s", v->unit);
  657. if (unit != PCILIB_UNIT_INVALID) {
  658. const pcilib_unit_description_t *u = &model_info->units[unit];
  659. for (i = 0; u->transforms[i].unit; i++)
  660. printf(", %s", u->transforms[i].unit);
  661. }
  662. printf("\n");
  663. }
  664. printf(" Access : ");
  665. if ((v->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  666. if (v->mode&PCILIB_REGISTER_R) printf("R");
  667. if (v->mode&PCILIB_REGISTER_W) printf("W");
  668. printf("\n");
  669. if ((v->api == &pcilib_enum_view_static_api)||(v->api == &pcilib_enum_view_xml_api)) {
  670. vnames = ((pcilib_enum_view_description_t*)v)->names;
  671. printf(" Value aliases :");
  672. for (i = 0; vnames[i].name; i++) {
  673. if (i) printf(",");
  674. printf(" %s = %lu", vnames[i].name, vnames[i].value);
  675. if (vnames[i].min != vnames[i].max)
  676. printf(" (%lu - %lu)", vnames[i].min, vnames[i].max);
  677. }
  678. printf("\n");
  679. } else if (v->api == &pcilib_transform_view_api) {
  680. const pcilib_transform_view_description_t *tv = (const pcilib_transform_view_description_t*)v;
  681. if (tv->read_from_reg)
  682. printf(" Read function : %s\n", tv->read_from_reg);
  683. if (tv->write_to_reg)
  684. printf(" Write function : %s\n", tv->write_to_reg);
  685. }
  686. if (v->description)
  687. printf(" Description : %s\n", v->description);
  688. }
  689. void RegisterInfo(pcilib_t *handle, pcilib_register_t reg) {
  690. int err;
  691. int i;
  692. pcilib_register_value_t regval;
  693. pcilib_register_info_t *info;
  694. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  695. const pcilib_register_description_t *r = &model_info->registers[reg];
  696. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, r->bank);
  697. const pcilib_register_bank_description_t *b = &model_info->banks[bank];
  698. if (r->mode&PCILIB_ACCESS_R) {
  699. err = pcilib_read_register_by_id(handle, reg, &regval);
  700. } else {
  701. err = PCILIB_ERROR_NOTPERMITED;
  702. }
  703. info = pcilib_get_register_info(handle, b->name, r->name, 0);
  704. if (!info) Error("Can't obtain register info for %s", r->name);
  705. printf("%s/%s\n", b->name, r->name);
  706. printf(" Current value: ");
  707. if (err) {
  708. if (err == PCILIB_ERROR_NOTPERMITED) printf("no read access");
  709. else printf("error %i", err);
  710. } else printf(b->format, regval);
  711. if (r->mode&PCILIB_REGISTER_W) {
  712. printf(" (default: ");
  713. printf(b->format, r->defvalue);
  714. if (info->range) {
  715. printf(", range: ");
  716. printf(b->format, info->range->min);
  717. printf (" - ");
  718. printf(b->format, info->range->max);
  719. }
  720. printf(")");
  721. }
  722. printf("\n");
  723. printf(" Address : 0x%x [%u:%u]\n", r->addr, r->offset, r->offset + r->bits);
  724. if ((info->values)&&(info->values[0].name)) {
  725. printf(" Value aliases:");
  726. for (i = 0; info->values[i].name; i++)
  727. printf(" %s", info->values[i].name);
  728. printf("\n");
  729. }
  730. printf(" Access : ");
  731. if ((r->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  732. if (r->mode&PCILIB_REGISTER_R) printf("R");
  733. if (r->mode&PCILIB_REGISTER_W) printf("W");
  734. if (r->mode&PCILIB_REGISTER_W1C) printf("/reset");
  735. if (r->mode&PCILIB_REGISTER_W1I) printf("/invert");
  736. printf("\n");
  737. if (r->description)
  738. printf(" Description : %s\n", r->description);
  739. if (r->views) {
  740. printf("\nSupported Views:\n");
  741. for (i = 0; r->views[i].name; i++) {
  742. ViewInfo(handle, reg, i);
  743. }
  744. }
  745. pcilib_free_register_info(handle, info);
  746. }
  747. void Version(pcilib_t *handle, const pcilib_model_description_t *model_info) {
  748. const pcilib_driver_version_t *driver_version;
  749. driver_version = pcilib_get_driver_version(handle);
  750. printf("pcilib version: %u.%u.%u\n",
  751. PCILIB_VERSION_GET_MAJOR(PCILIB_VERSION),
  752. PCILIB_VERSION_GET_MINOR(PCILIB_VERSION),
  753. PCILIB_VERSION_GET_MICRO(PCILIB_VERSION)
  754. );
  755. printf("driver version: %lu.%lu.%lu, interface: 0x%lx, registered ioctls: %lu\n",
  756. PCILIB_VERSION_GET_MAJOR(driver_version->version),
  757. PCILIB_VERSION_GET_MINOR(driver_version->version),
  758. PCILIB_VERSION_GET_MICRO(driver_version->version),
  759. driver_version->interface,
  760. driver_version->ioctls
  761. );
  762. if (model_info) {
  763. pcilib_version_t version = model_info->interface_version;
  764. printf("Model: %s", handle->model);
  765. if (version) {
  766. printf(", version: %u.%u.%u\n",
  767. PCILIB_VERSION_GET_MAJOR(version),
  768. PCILIB_VERSION_GET_MINOR(version),
  769. PCILIB_VERSION_GET_MICRO(version)
  770. );
  771. } else {
  772. printf(" (embedded)\n");
  773. }
  774. }
  775. if (model_info->dma) {
  776. pcilib_version_t version = model_info->dma->api->version;
  777. printf("DMA Engine: %s, version: %u.%u.%u\n", model_info->dma->name,
  778. PCILIB_VERSION_GET_MAJOR(version),
  779. PCILIB_VERSION_GET_MINOR(version),
  780. PCILIB_VERSION_GET_MICRO(version)
  781. );
  782. }
  783. BuildInfo();
  784. }
  785. void Info(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *target) {
  786. int i, j;
  787. DIR *dir;
  788. void *plugin;
  789. const char *path;
  790. struct dirent *entry;
  791. const pcilib_model_description_t *info = NULL;
  792. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  793. const pcilib_pcie_link_info_t *link_info = pcilib_get_pcie_link_info(handle);
  794. int have_state;
  795. pcilib_device_state_t state;
  796. path = getenv("PCILIB_PLUGIN_DIR");
  797. if (!path) path = PCILIB_PLUGIN_DIR;
  798. have_state = !pcilib_get_device_state(handle, &state);
  799. if (board_info)
  800. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x, Model: %s\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func, handle->model);
  801. if (link_info) {
  802. printf(" PCIe x%u (gen%u), DMA Payload: %u (of %u)", link_info->link_width, link_info->link_speed, 1<<link_info->payload, 1<<link_info->max_payload);
  803. if (have_state) {
  804. int bits = 0;
  805. unsigned long mask;
  806. for (mask = state.dma_mask; mask&1; mask>>=1) bits++;
  807. printf(", DMA Mask: ");
  808. if (mask) printf("0x%lx", state.dma_mask);
  809. else printf("%u bits", bits);
  810. printf(", IOMMU: %s", state.iommu?"on":"off");
  811. }
  812. printf("\n");
  813. }
  814. if (board_info)
  815. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  816. printf("\n");
  817. if (target) {
  818. if (*target == '/') {
  819. pcilib_view_t view;
  820. view = pcilib_find_view_by_name(handle, target);
  821. if (view != PCILIB_VIEW_INVALID)
  822. return ViewInfo(handle, PCILIB_REGISTER_INVALID, view);
  823. Error(" No property %s is found", target);
  824. } else {
  825. pcilib_register_t reg;
  826. reg = pcilib_find_register(handle, NULL, target);
  827. if (reg != PCILIB_REGISTER_INVALID)
  828. return RegisterInfo(handle, reg);
  829. Error(" No register %s is found", target);
  830. }
  831. }
  832. List(handle, model_info, (char*)-1, 0);
  833. printf("Available models:\n");
  834. dir = opendir(path);
  835. if (dir) {
  836. while ((entry = readdir(dir))) {
  837. const char *suffix = strstr(entry->d_name, ".so");
  838. if ((!suffix)||(strlen(suffix) != 3)) continue;
  839. plugin = pcilib_plugin_load(entry->d_name);
  840. if (plugin) {
  841. info = pcilib_get_plugin_model(handle, plugin, 0, 0, NULL);
  842. if (info) {
  843. printf(" %s\n", entry->d_name);
  844. for (j = 0; info[j].name; j++) {
  845. pcilib_version_t version = info[j].api->version;
  846. printf(" %-12s %u.%u.%u - %s\n", info[j].name,
  847. PCILIB_VERSION_GET_MAJOR(version),
  848. PCILIB_VERSION_GET_MINOR(version),
  849. PCILIB_VERSION_GET_MICRO(version),
  850. info[j].description?info[j].description:"");
  851. }
  852. }
  853. pcilib_plugin_close(plugin);
  854. } else {
  855. const char *msg = dlerror();
  856. if (msg)
  857. printf(" %s: %s\n", entry->d_name, msg);
  858. }
  859. }
  860. closedir(dir);
  861. }
  862. // printf(" XML\n");
  863. printf(" Internal Models\n");
  864. for (i = 0; pcilib_dma[i].api; i++)
  865. printf(" %-12s - %s\n", pcilib_dma[i].name, pcilib_dma[i].description?pcilib_dma[i].description:"");
  866. printf(" %-12s - Plain PCI-access model\n\n", "pci");
  867. }
  868. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  869. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  870. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  871. int err;
  872. int i, j, errors;
  873. void *data, *buf, *check;
  874. void *fifo = NULL;
  875. struct timeval start, end;
  876. unsigned long time;
  877. size_t size, min_size, max_size;
  878. double mbs_in, mbs_out, mbs;
  879. size_t irqs;
  880. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  881. if (mode == ACCESS_CONFIG)
  882. Error("No benchmarking of configuration space acess is allowed");
  883. if (mode == ACCESS_DMA) {
  884. if (n) {
  885. min_size = n * access;
  886. max_size = n * access;
  887. } else {
  888. min_size = 1024;
  889. max_size = BENCH_MAX_DMA_SIZE;
  890. }
  891. for (size = min_size; size <= max_size; size *= 4) {
  892. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  893. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  894. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  895. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  896. if (err) irqs = 0;
  897. printf("%8zu KiB - ", size / 1024);
  898. printf("RW: ");
  899. if (mbs < 0) printf("failed ... ");
  900. else printf("%8.2lf MiB/s", mbs);
  901. printf(", R: ");
  902. if (mbs_in < 0) printf("failed ... ");
  903. else printf("%8.2lf MiB/s", mbs_in);
  904. printf(", W: ");
  905. if (mbs_out < 0) printf("failed ... ");
  906. else printf("%8.2lf MiB/s", mbs_out);
  907. if (irqs) {
  908. printf(", IRQs: %lu", irqs);
  909. }
  910. printf("\n");
  911. }
  912. return 0;
  913. }
  914. if (bar == PCILIB_BAR_INVALID) {
  915. unsigned long maxlength = 0;
  916. for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
  917. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  918. bar = i;
  919. break;
  920. }
  921. if (board_info->bar_length[i] > maxlength) {
  922. maxlength = board_info->bar_length[i];
  923. bar = i;
  924. }
  925. }
  926. if (bar < 0) Error("Data banks are not available");
  927. }
  928. if (n) {
  929. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  930. min_size = n * access;
  931. max_size = n * access;
  932. } else {
  933. min_size = access;
  934. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  935. else max_size = BENCH_MAX_FIFO_SIZE;
  936. }
  937. err = posix_memalign( (void**)&buf, 256, max_size );
  938. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  939. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  940. if (mode == ACCESS_FIFO) {
  941. fifo = pcilib_resolve_bar_address(handle, bar, addr);
  942. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  943. } else {
  944. data = pcilib_resolve_bar_address(handle, bar, 0);
  945. if (!data) Error("Can't resolve start of bar (%u)", bar);
  946. }
  947. if (mode == ACCESS_FIFO)
  948. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  949. else
  950. printf("Transfer time (Bank: %i):\n", bar);
  951. for (size = min_size ; size < max_size; size *= 8) {
  952. gettimeofday(&start,NULL);
  953. if (mode == ACCESS_BAR) {
  954. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  955. pcilib_memcpy(buf, data, access, size / access);
  956. }
  957. } else {
  958. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  959. for (j = 0; j < (size/access); j++) {
  960. pcilib_memcpy(buf + j * access, fifo, access, 1);
  961. }
  962. }
  963. }
  964. gettimeofday(&end,NULL);
  965. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  966. printf("%8zu bytes - read: %8.2lf MiB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  967. fflush(0);
  968. gettimeofday(&start,NULL);
  969. if (mode == ACCESS_BAR) {
  970. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  971. pcilib_memcpy(data, buf, access, size / access);
  972. }
  973. } else {
  974. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  975. for (j = 0; j < (size/access); j++) {
  976. pcilib_memcpy(fifo, buf + j * access, access, 1);
  977. }
  978. }
  979. }
  980. gettimeofday(&end,NULL);
  981. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  982. printf(", write: %8.2lf MiB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  983. }
  984. printf("\n\nOpen-Transfer-Close time: \n");
  985. for (size = 4 ; size < max_size; size *= 8) {
  986. gettimeofday(&start,NULL);
  987. if (mode == ACCESS_BAR) {
  988. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  989. pcilib_read(handle, bar, 0, access, size / access, buf);
  990. }
  991. } else {
  992. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  993. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  994. }
  995. }
  996. gettimeofday(&end,NULL);
  997. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  998. printf("%8zu bytes - read: %8.2lf MiB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  999. fflush(0);
  1000. gettimeofday(&start,NULL);
  1001. if (mode == ACCESS_BAR) {
  1002. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  1003. pcilib_write(handle, bar, 0, access, size / access, buf);
  1004. }
  1005. } else {
  1006. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  1007. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  1008. }
  1009. }
  1010. gettimeofday(&end,NULL);
  1011. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  1012. printf(", write: %8.2lf MiB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  1013. if (mode == ACCESS_BAR) {
  1014. gettimeofday(&start,NULL);
  1015. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  1016. pcilib_write(handle, bar, 0, access, size / access, buf);
  1017. pcilib_read(handle, bar, 0, access, size / access, check);
  1018. if (memcmp(buf, check, size)) ++errors;
  1019. }
  1020. gettimeofday(&end,NULL);
  1021. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  1022. printf(", write-verify: %8.2lf MiB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  1023. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  1024. }
  1025. printf("\n");
  1026. }
  1027. printf("\n\n");
  1028. free(check);
  1029. free(buf);
  1030. return 0;
  1031. }
  1032. #define pci2host16(endianess, value) endianess?
  1033. /*
  1034. typedef struct {
  1035. size_t size;
  1036. void *data;
  1037. size_t pos;
  1038. int multi_mode;
  1039. } DMACallbackContext;
  1040. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  1041. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  1042. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  1043. ctx->size *= 2;
  1044. ctx->data = realloc(ctx->data, ctx->size);
  1045. if (!ctx->data) {
  1046. Error("Allocation of %i bytes of memory have failed", ctx->size);
  1047. return 0;
  1048. }
  1049. }
  1050. memcpy(ctx->data + ctx->pos, buf, bufsize);
  1051. ctx->pos += bufsize;
  1052. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  1053. return 1;
  1054. }
  1055. */
  1056. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  1057. void *buf;
  1058. int i, err;
  1059. size_t ret, bytes;
  1060. size_t size = n * abs(access);
  1061. int block_width, blocks_per_line;
  1062. int numbers_per_block, numbers_per_line;
  1063. pcilib_dma_engine_t dmaid;
  1064. pcilib_dma_flags_t dma_flags = 0;
  1065. int fd;
  1066. char stmp[256];
  1067. struct stat st;
  1068. const pcilib_board_info_t *board_info;
  1069. numbers_per_block = BLOCK_SIZE / access;
  1070. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1071. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1072. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1073. numbers_per_line = blocks_per_line * numbers_per_block;
  1074. if (size) {
  1075. buf = malloc(size);
  1076. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  1077. } else {
  1078. buf = NULL;
  1079. }
  1080. switch (mode) {
  1081. case ACCESS_DMA:
  1082. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  1083. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1084. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1085. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  1086. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  1087. if (size) {
  1088. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  1089. if (err) Error("Error (%i) is reported by DMA engine", err);
  1090. } else {
  1091. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  1092. size = 2048; bytes = 0;
  1093. do {
  1094. if ((size - bytes) < 4096) {
  1095. size *= 2;
  1096. buf = realloc(buf, size);
  1097. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  1098. }
  1099. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  1100. bytes += ret;
  1101. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  1102. err = PCILIB_ERROR_TOOBIG;
  1103. if ((flags&FLAG_WAIT)==0) timeout = 0;
  1104. }
  1105. } while (err == PCILIB_ERROR_TOOBIG);
  1106. }
  1107. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  1108. Error("Error (%i) during DMA read", err);
  1109. }
  1110. if (bytes <= 0) {
  1111. pcilib_warning("No data is returned by DMA engine");
  1112. return -1;
  1113. }
  1114. size = bytes;
  1115. n = bytes / abs(access);
  1116. addr = 0;
  1117. break;
  1118. case ACCESS_FIFO:
  1119. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  1120. addr = 0;
  1121. break;
  1122. case ACCESS_CONFIG:
  1123. board_info = pcilib_get_board_info(handle);
  1124. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  1125. fd = open(stmp, O_RDONLY);
  1126. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  1127. if (st.st_size < addr)
  1128. Error("Access beyond the end of PCI configuration space");
  1129. if (st.st_size < (addr + size)) {
  1130. n = (st.st_size - addr) / abs(access);
  1131. size = n * abs(access);
  1132. if (!n) Error("Access beyond the end of PCI configuration space");
  1133. }
  1134. lseek(fd, addr, SEEK_SET);
  1135. ret = read(fd, buf, size);
  1136. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  1137. if (ret < size) {
  1138. size = ret;
  1139. n = ret / abs(access);
  1140. }
  1141. close(fd);
  1142. break;
  1143. default:
  1144. pcilib_read(handle, bar, addr, access, size / access, buf);
  1145. }
  1146. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1147. if (o) {
  1148. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1149. fwrite(buf, abs(access), n, o);
  1150. } else {
  1151. for (i = 0; i < n; i++) {
  1152. if (i) {
  1153. if (i%numbers_per_line == 0) printf("\n");
  1154. else {
  1155. printf("%*s", SEPARATOR_WIDTH, "");
  1156. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1157. }
  1158. }
  1159. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  1160. switch (access) {
  1161. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  1162. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  1163. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  1164. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  1165. }
  1166. }
  1167. printf("\n\n");
  1168. }
  1169. free(buf);
  1170. return 0;
  1171. }
  1172. int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, const char *attr) {
  1173. int i;
  1174. int err;
  1175. const char *format;
  1176. pcilib_register_bank_t bank_id;
  1177. pcilib_register_bank_addr_t bank_addr = 0;
  1178. pcilib_register_value_t value;
  1179. // Adding DMA registers
  1180. pcilib_get_dma_description(handle);
  1181. if (reg||view||attr) {
  1182. pcilib_value_t val = {0};
  1183. if (attr) {
  1184. if (reg) err = pcilib_get_register_attr(handle, bank, reg, attr, &val);
  1185. else if (view) err = pcilib_get_property_attr(handle, view, attr, &val);
  1186. else if (bank) err = pcilib_get_register_bank_attr(handle, bank, attr, &val);
  1187. else err = PCILIB_ERROR_INVALID_ARGUMENT;
  1188. if (err) {
  1189. if (err == PCILIB_ERROR_NOTFOUND)
  1190. Error("Attribute %s is not found", attr);
  1191. else
  1192. Error("Error (%i) reading attribute %s", err, attr);
  1193. }
  1194. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1195. if (err) Error("Error converting attribute %s to string", attr);
  1196. printf("%s = %s", attr, val.sval);
  1197. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1198. printf(" %s", val.unit);
  1199. printf(" (for %s)\n", (reg?reg:(view?view:bank)));
  1200. } else if (view) {
  1201. if (reg) {
  1202. err = pcilib_read_register_view(handle, bank, reg, view, &val);
  1203. if (err) Error("Error reading view %s of register %s", view, reg);
  1204. } else {
  1205. err = pcilib_get_property(handle, view, &val);
  1206. if (err) Error("Error reading property %s", view);
  1207. }
  1208. if (unit) {
  1209. err = pcilib_convert_value_unit(handle, &val, unit);
  1210. if (err) {
  1211. if (reg) Error("Error converting view %s of register %s to unit %s", view, reg, unit);
  1212. else Error("Error converting property %s to unit %s", view, unit);
  1213. }
  1214. }
  1215. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1216. if (err) {
  1217. if (reg) Error("Error converting view %s of register %s to string", view);
  1218. else Error("Error converting property %s to string", view);
  1219. }
  1220. printf("%s = %s", (reg?reg:view), val.sval);
  1221. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1222. printf(" %s", val.unit);
  1223. printf("\n");
  1224. } else {
  1225. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1226. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
  1227. format = model_info->banks[bank_id].format;
  1228. if (!format) format = "%lu";
  1229. err = pcilib_read_register_by_id(handle, regid, &value);
  1230. if (err) Error("Error reading register %s", reg);
  1231. printf("%s = ", reg);
  1232. printf(format, value);
  1233. printf("\n");
  1234. }
  1235. } else {
  1236. if (model_info->registers) {
  1237. if (bank) {
  1238. bank_id = pcilib_find_register_bank(handle, bank);
  1239. bank_addr = model_info->banks[bank_id].addr;
  1240. }
  1241. printf("Registers:\n");
  1242. for (i = 0; model_info->registers[i].bits; i++) {
  1243. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  1244. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
  1245. format = model_info->banks[bank_id].format;
  1246. if (!format) format = "%lu";
  1247. err = pcilib_read_register_by_id(handle, i, &value);
  1248. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  1249. else {
  1250. printf(" %s = ", model_info->registers[i].name);
  1251. printf(format, value);
  1252. }
  1253. printf(" [");
  1254. printf(format, model_info->registers[i].defvalue);
  1255. printf("]");
  1256. printf("\n");
  1257. }
  1258. }
  1259. } else {
  1260. printf("No registers");
  1261. }
  1262. printf("\n");
  1263. }
  1264. return 0;
  1265. }
  1266. #define WRITE_REGVAL(buf, n, access, o) {\
  1267. uint##access##_t tbuf[n]; \
  1268. for (i = 0; i < n; i++) { \
  1269. tbuf[i] = (uint##access##_t)buf[i]; \
  1270. } \
  1271. fwrite(tbuf, access/8, n, o); \
  1272. }
  1273. int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  1274. int err;
  1275. int i;
  1276. const pcilib_register_bank_description_t *banks = model_info->banks;
  1277. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  1278. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  1279. if (bank) Error("Invalid register bank is specified (%s)", bank);
  1280. else Error("Register bank should be specified");
  1281. }
  1282. int access = banks[bank_id].access / 8;
  1283. // int size = n * abs(access);
  1284. int block_width, blocks_per_line;
  1285. int numbers_per_block, numbers_per_line;
  1286. numbers_per_block = BLOCK_SIZE / access;
  1287. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1288. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1289. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1290. numbers_per_line = blocks_per_line * numbers_per_block;
  1291. pcilib_register_value_t buf[n];
  1292. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  1293. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1294. if (o) {
  1295. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1296. switch (access) {
  1297. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  1298. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  1299. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  1300. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  1301. }
  1302. } else {
  1303. for (i = 0; i < n; i++) {
  1304. if (i) {
  1305. if (i%numbers_per_line == 0) printf("\n");
  1306. else {
  1307. printf("%*s", SEPARATOR_WIDTH, "");
  1308. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1309. }
  1310. }
  1311. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  1312. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  1313. }
  1314. printf("\n\n");
  1315. }
  1316. return 0;
  1317. }
  1318. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  1319. int read_back = 0;
  1320. void *buf, *check;
  1321. int res = 0, i, err;
  1322. int size = n * abs(access);
  1323. size_t ret;
  1324. pcilib_dma_engine_t dmaid;
  1325. if (mode == ACCESS_CONFIG)
  1326. Error("Writting to PCI configuration space is not supported");
  1327. err = posix_memalign( (void**)&buf, 256, size );
  1328. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1329. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1330. for (i = 0; i < n; i++) {
  1331. switch (access) {
  1332. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  1333. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  1334. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  1335. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  1336. default: Error("Unexpected data size (%lu)", access);
  1337. }
  1338. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1339. }
  1340. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1341. switch (mode) {
  1342. case ACCESS_DMA:
  1343. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1344. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1345. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  1346. if ((err)||(ret != size)) {
  1347. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  1348. else if (err) Error("DMA engine returned a error while writing the data");
  1349. else if (!ret) Error("No data is written by DMA engine");
  1350. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  1351. }
  1352. break;
  1353. case ACCESS_FIFO:
  1354. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  1355. break;
  1356. default:
  1357. pcilib_write(handle, bar, addr, access, size / access, buf);
  1358. if (verify) {
  1359. pcilib_read(handle, bar, addr, access, size / access, check);
  1360. read_back = 1;
  1361. }
  1362. }
  1363. if ((read_back)&&(memcmp(buf, check, size))) {
  1364. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1365. if (endianess) pcilib_swap(check, check, abs(access), n);
  1366. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  1367. exit(-1);
  1368. }
  1369. free(check);
  1370. free(buf);
  1371. return 0;
  1372. }
  1373. int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  1374. pcilib_register_value_t *buf, *check;
  1375. int res, i, err;
  1376. unsigned long value;
  1377. int size = n * sizeof(pcilib_register_value_t);
  1378. err = posix_memalign( (void**)&buf, 256, size );
  1379. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1380. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1381. for (i = 0; i < n; i++) {
  1382. res = sscanf(data[i], "%lx", &value);
  1383. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1384. buf[i] = value;
  1385. }
  1386. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  1387. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1388. err = pcilib_read_register_space(handle, bank, addr, n, check);
  1389. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1390. if (memcmp(buf, check, size)) {
  1391. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1392. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  1393. exit(-1);
  1394. }
  1395. free(check);
  1396. free(buf);
  1397. return 0;
  1398. }
  1399. int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, char **data) {
  1400. int err = 0;
  1401. pcilib_value_t val = {0};
  1402. pcilib_register_value_t value, verify;
  1403. /*
  1404. pcilib_register_bank_t bank_id;
  1405. pcilib_register_bank_addr_t bank_addr;
  1406. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  1407. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  1408. format = model_info->banks[bank_id].format;
  1409. if (!format) format = "%lu";
  1410. */
  1411. err = pcilib_set_value_from_static_string(handle, &val, *data);
  1412. if (err) Error("Error (%i) setting value", err);
  1413. if (view) {
  1414. if (unit)
  1415. val.unit = unit;
  1416. if (reg) {
  1417. err = pcilib_write_register_view(handle, bank, reg, view, &val);
  1418. if (err) Error("Error writting view %s of register %s", view, reg);
  1419. printf("%s is written\n ", reg);
  1420. } else {
  1421. err = pcilib_set_property(handle, view, &val);
  1422. if (err) Error("Error setting property %s", view);
  1423. printf("%s is written\n ", view);
  1424. }
  1425. } else {
  1426. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1427. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  1428. value = pcilib_get_value_as_register_value(handle, &val, &err);
  1429. if (err) Error("Error (%i) parsing data value (%s)", *data);
  1430. err = pcilib_write_register(handle, bank, reg, value);
  1431. if (err) Error("Error writting register %s\n", reg);
  1432. if ((model_info->registers[regid].mode&(PCILIB_REGISTER_RW|PCILIB_REGISTER_INCONSISTENT)) == PCILIB_REGISTER_RW) {
  1433. const char *format = (val.format?val.format:"%u");
  1434. err = pcilib_read_register(handle, bank, reg, &verify);
  1435. if (err) Error("Error reading back register %s for verification\n", reg);
  1436. if (verify != value) {
  1437. Error("Failed to write register %s: %lu is written and %lu is read back", reg, value, verify);
  1438. } else {
  1439. printf("%s = ", reg);
  1440. printf(format, verify);
  1441. printf("\n");
  1442. }
  1443. } else {
  1444. printf("%s is written\n ", reg);
  1445. }
  1446. }
  1447. return 0;
  1448. }
  1449. typedef struct {
  1450. pcilib_t *handle;
  1451. pcilib_event_t event;
  1452. pcilib_event_data_type_t data;
  1453. fastwriter_t *writer;
  1454. int verbose;
  1455. pcilib_timeout_t timeout;
  1456. size_t run_time;
  1457. size_t trigger_time;
  1458. size_t max_triggers;
  1459. pcilib_event_flags_t flags;
  1460. FORMAT format;
  1461. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1462. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1463. volatile int started; /**< Indicates that recording is started */
  1464. volatile int run_flag;
  1465. volatile int writing_flag;
  1466. struct timeval first_frame;
  1467. struct timeval last_frame;
  1468. size_t last_num, last_id;
  1469. size_t trigger_failed;
  1470. size_t trigger_count;
  1471. size_t event_count; /**< Total number of events (including bad ones, but excluding events expected, but not reported by hardware) */
  1472. size_t incomplete_count; /**< Broken events, we even can't extract appropriate block of raw data */
  1473. size_t broken_count; /**< Broken events, error while decoding in the requested format */
  1474. size_t empty_count; /**< Broken events, no associated data or unknown */
  1475. size_t missing_count; /**< Missing events, not received from the hardware */
  1476. size_t dropped_count; /**< Missing events, dropped due slow decoding/copying performance */
  1477. size_t storage_count; /**< Missing events, dropped due to slowness of the storage subsystem */
  1478. struct timeval start_time;
  1479. struct timeval stop_time;
  1480. } GRABContext;
  1481. int GrabCallback(pcilib_event_id_t event_id, const pcilib_event_info_t *info, void *user) {
  1482. int err = 0;
  1483. void *data;
  1484. size_t size;
  1485. GRABContext *ctx = (GRABContext*)user;
  1486. pcilib_t *handle = ctx->handle;
  1487. gettimeofday(&ctx->last_frame, NULL);
  1488. if (!ctx->event_count) {
  1489. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1490. }
  1491. ctx->event_pending = 0;
  1492. ctx->event_count++;
  1493. if (ctx->last_num) {
  1494. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1495. ctx->missing_count += missing_count;
  1496. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1497. if (missing_count)
  1498. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu (hwid: %zu) and %zu (hwid: %zu)", missing_count, ctx->last_id, ctx->last_num, event_id, info->seqnum);
  1499. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1500. }
  1501. ctx->last_num = info->seqnum;
  1502. ctx->last_id = event_id;
  1503. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1504. ctx->incomplete_count++;
  1505. return PCILIB_STREAMING_CONTINUE;
  1506. }
  1507. data = pcilib_get_data(handle, event_id, ctx->data, &size);
  1508. if (!data) {
  1509. int err = (int)size;
  1510. switch (err) {
  1511. case PCILIB_ERROR_OVERWRITTEN:
  1512. ctx->dropped_count++;
  1513. break;
  1514. case PCILIB_ERROR_INVALID_DATA:
  1515. ctx->broken_count++;
  1516. break;
  1517. default:
  1518. ctx->empty_count++;
  1519. }
  1520. return PCILIB_STREAMING_CONTINUE;
  1521. }
  1522. if (ctx->format == FORMAT_HEADER) {
  1523. uint64_t header[8];
  1524. header[0] = info->type;
  1525. header[1] = ctx->data;
  1526. header[2] = 0;
  1527. header[3] = size;
  1528. header[4] = info->seqnum;
  1529. header[5] = info->offset;
  1530. memcpy(header + 6, &info->timestamp, 16);
  1531. err = fastwriter_push(ctx->writer, 64, header);
  1532. }
  1533. if (!err)
  1534. err = fastwriter_push(ctx->writer, size, data);
  1535. if (err) {
  1536. fastwriter_cancel(ctx->writer);
  1537. if (err != EWOULDBLOCK)
  1538. Error("Storage error %i", err);
  1539. ctx->storage_count++;
  1540. pcilib_return_data(handle, event_id, ctx->data, data);
  1541. return PCILIB_STREAMING_CONTINUE;
  1542. }
  1543. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1544. if (err) {
  1545. ctx->dropped_count++;
  1546. fastwriter_cancel(ctx->writer);
  1547. return PCILIB_STREAMING_CONTINUE;
  1548. }
  1549. err = fastwriter_commit(ctx->writer);
  1550. if (err) Error("Error commiting data to storage, Error: %i", err);
  1551. return PCILIB_STREAMING_CONTINUE;
  1552. }
  1553. int raw_data(pcilib_event_id_t event_id, const pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1554. int err;
  1555. GRABContext *ctx = (GRABContext*)user;
  1556. // pcilib_t *handle = ctx->handle;
  1557. if ((info)&&(info->seqnum != ctx->last_num)) {
  1558. gettimeofday(&ctx->last_frame, NULL);
  1559. if (!ctx->event_count) {
  1560. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1561. }
  1562. ctx->event_count++;
  1563. if (ctx->last_num) {
  1564. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1565. ctx->missing_count += missing_count;
  1566. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1567. if (missing_count)
  1568. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu and %zu", missing_count, ctx->last_num, info->seqnum);
  1569. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1570. }
  1571. ctx->last_num = info->seqnum;
  1572. }
  1573. err = fastwriter_push_data(ctx->writer, size, data);
  1574. if (err) {
  1575. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1576. Error("Storage error %i", err);
  1577. }
  1578. return PCILIB_STREAMING_CONTINUE;
  1579. }
  1580. void *Trigger(void *user) {
  1581. int err;
  1582. struct timeval start;
  1583. GRABContext *ctx = (GRABContext*)user;
  1584. size_t trigger_time = ctx->trigger_time;
  1585. size_t max_triggers = ctx->max_triggers;
  1586. ctx->trigger_thread_started = 1;
  1587. ctx->event_pending = 1;
  1588. while (!ctx->started) ;
  1589. gettimeofday(&start, NULL);
  1590. do {
  1591. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1592. if (err) ctx->trigger_failed++;
  1593. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1594. if (trigger_time) {
  1595. pcilib_add_timeout(&start, trigger_time);
  1596. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1597. pcilib_sleep_until_deadline(&start);
  1598. } else {
  1599. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1600. ctx->event_pending = 1;
  1601. }
  1602. } while (ctx->run_flag);
  1603. ctx->trigger_thread_started = 0;
  1604. return NULL;
  1605. }
  1606. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1607. int verbose;
  1608. pcilib_timeout_t duration, fps_duration;
  1609. struct timeval cur;
  1610. double fps = 0, good_fps = 0;
  1611. size_t total, good, pending = 0;
  1612. verbose = ctx->verbose;
  1613. if (end_time) {
  1614. if (verbose++) {
  1615. printf("-------------------------------------------------------------------------------\n");
  1616. }
  1617. } else {
  1618. gettimeofday(&cur, NULL);
  1619. end_time = &cur;
  1620. }
  1621. // if ((ctx->event_count + ctx->missing_count) == 0)
  1622. // return;
  1623. duration = pcilib_timediff(&ctx->start_time, end_time);
  1624. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1625. if (ctx->trigger_count) {
  1626. total = ctx->trigger_count;
  1627. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1628. } else {
  1629. total = ctx->event_count + ctx->missing_count;
  1630. }
  1631. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count - ctx->empty_count - ctx->dropped_count;
  1632. if (ctx->event_count > 1) {
  1633. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1634. }
  1635. if (good > 1) {
  1636. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1637. }
  1638. printf("Run: ");
  1639. PrintTime(duration);
  1640. if (ctx->trigger_count) {
  1641. printf(", Triggers: ");
  1642. PrintNumber(ctx->trigger_count);
  1643. }
  1644. printf(", Captured: ");
  1645. PrintNumber(ctx->event_count);
  1646. printf(" FPS %5.0lf", fps);
  1647. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1648. printf(", Stored: ");
  1649. PrintNumber(good);
  1650. printf(" FPS %5.0lf", good_fps);
  1651. }
  1652. printf("\n");
  1653. if (verbose > 2) {
  1654. if (ctx->trigger_count) {
  1655. printf("Trig: ");
  1656. PrintNumber(ctx->trigger_count);
  1657. printf(" Issued: ");
  1658. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1659. printf(" (");
  1660. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1661. printf("%%) Failed: ");
  1662. PrintNumber(ctx->trigger_failed);
  1663. printf( " (");
  1664. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1665. printf( "%%); Pending: ");
  1666. PrintNumber(pending);
  1667. printf( " (");
  1668. PrintPercent(pending, ctx->trigger_count);
  1669. printf( "%%)\n");
  1670. }
  1671. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1672. printf("Captured: ");
  1673. PrintNumber(good);
  1674. } else {
  1675. printf("Good: ");
  1676. PrintNumber(good);
  1677. printf(", Dropped: ");
  1678. PrintNumber(ctx->dropped_count + ctx->storage_count);
  1679. printf(", Bad: ");
  1680. PrintNumber(ctx->incomplete_count + ctx->broken_count);
  1681. printf(", Empty: ");
  1682. PrintNumber(ctx->empty_count);
  1683. }
  1684. printf(", Lost: ");
  1685. PrintNumber(ctx->missing_count);
  1686. printf("\n");
  1687. }
  1688. if (verbose > 1) {
  1689. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1690. printf("Captured: ");
  1691. PrintPercent(good, total);
  1692. } else {
  1693. printf("Good: ");
  1694. PrintPercent(good, total);
  1695. printf("%% Dropped: ");
  1696. PrintPercent(ctx->dropped_count + ctx->storage_count, total);
  1697. printf("%% Bad: ");
  1698. PrintPercent(ctx->incomplete_count + ctx->broken_count, total);
  1699. printf("%% Empty: ");
  1700. PrintPercent(ctx->empty_count, total);
  1701. }
  1702. printf("%% Lost: ");
  1703. PrintPercent(ctx->missing_count, total);
  1704. printf("%%");
  1705. printf("\n");
  1706. }
  1707. }
  1708. void StorageStats(GRABContext *ctx) {
  1709. int err;
  1710. fastwriter_stats_t st;
  1711. pcilib_timeout_t duration;
  1712. struct timeval cur;
  1713. gettimeofday(&cur, NULL);
  1714. duration = pcilib_timediff(&ctx->start_time, &cur);
  1715. err = fastwriter_get_stats(ctx->writer, &st);
  1716. if (err) return;
  1717. printf("Wrote ");
  1718. PrintSize(st.written);
  1719. printf(" of ");
  1720. PrintSize(st.commited);
  1721. printf(" at ");
  1722. PrintSize(1000000.*st.written / duration);
  1723. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1724. printf(" of ");
  1725. PrintSize(st.buffer_size);
  1726. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1727. }
  1728. void *Monitor(void *user) {
  1729. struct timeval deadline;
  1730. struct timeval nextinfo;
  1731. GRABContext *ctx = (GRABContext*)user;
  1732. int verbose = ctx->verbose;
  1733. pcilib_timeout_t timeout = ctx->timeout;
  1734. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1735. // while (!ctx->started);
  1736. if (timeout) {
  1737. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1738. pcilib_add_timeout(&deadline, timeout);
  1739. }
  1740. if (verbose > 0) {
  1741. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1742. }
  1743. while (ctx->run_flag) {
  1744. if (StopFlag) {
  1745. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1746. break;
  1747. }
  1748. if (timeout) {
  1749. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1750. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1751. pcilib_add_timeout(&deadline, timeout);
  1752. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1753. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1754. break;
  1755. }
  1756. }
  1757. }
  1758. if (verbose > 0) {
  1759. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1760. GrabStats(ctx, NULL);
  1761. StorageStats(ctx);
  1762. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1763. }
  1764. }
  1765. usleep(100000);
  1766. }
  1767. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1768. while (ctx->writing_flag) {
  1769. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1770. if (verbose >= 0) StorageStats(ctx);
  1771. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1772. }
  1773. usleep(100000);
  1774. }
  1775. return NULL;
  1776. }
  1777. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1778. int err;
  1779. GRABContext ctx;
  1780. // void *data = NULL;
  1781. // size_t size, written;
  1782. pcilib_event_t event;
  1783. pcilib_event_t listen_events;
  1784. pcilib_event_data_type_t data;
  1785. pthread_t monitor_thread;
  1786. pthread_t trigger_thread;
  1787. pthread_attr_t attr;
  1788. struct sched_param sched;
  1789. struct timeval end_time;
  1790. pcilib_event_flags_t flags;
  1791. if (evname) {
  1792. event = pcilib_find_event(handle, evname);
  1793. if (event == PCILIB_EVENT_INVALID)
  1794. Error("Can't find event (%s)", evname);
  1795. listen_events = event;
  1796. } else {
  1797. listen_events = PCILIB_EVENTS_ALL;
  1798. event = PCILIB_EVENT0;
  1799. }
  1800. if (data_type) {
  1801. data = pcilib_find_event_data_type(handle, event, data_type);
  1802. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1803. Error("Can't find data type (%s)", data_type);
  1804. } else {
  1805. switch (format) {
  1806. case FORMAT_DEFAULT:
  1807. data = PCILIB_EVENT_DATA;
  1808. break;
  1809. default:
  1810. data = PCILIB_EVENT_RAW_DATA;
  1811. }
  1812. }
  1813. memset(&ctx, 0, sizeof(GRABContext));
  1814. ctx.handle = handle;
  1815. ctx.event = event;
  1816. ctx.data = data;
  1817. ctx.run_time = run_time;
  1818. ctx.timeout = timeout;
  1819. ctx.format = format;
  1820. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1821. else ctx.verbose = 0;
  1822. if (grab_mode&GRAB_MODE_GRAB) {
  1823. ctx.writer = fastwriter_init(output, 0);
  1824. if (!ctx.writer)
  1825. Error("Can't initialize fastwritter library");
  1826. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1827. err = fastwriter_open(ctx.writer, output, 0);
  1828. if (err)
  1829. Error("Error opening file (%s), Error: %i\n", output, err);
  1830. ctx.writing_flag = 1;
  1831. }
  1832. ctx.run_flag = 1;
  1833. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1834. if (data == PCILIB_EVENT_RAW_DATA) {
  1835. if (format == FORMAT_RAW) {
  1836. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1837. }
  1838. } else {
  1839. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1840. }
  1841. ctx.flags = flags;
  1842. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1843. pcilib_configure_autostop(handle, num, run_time);
  1844. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1845. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1846. }
  1847. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1848. pcilib_write_register(handle, "conf", "max_threads", threads);
  1849. }
  1850. if (grab_mode&GRAB_MODE_TRIGGER) {
  1851. if (trigger_time) {
  1852. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1853. timeout = 2 * trigger_time;
  1854. ctx.timeout = timeout;
  1855. }
  1856. } else {
  1857. // Otherwise, we will trigger next event after previous one is read
  1858. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1859. }
  1860. ctx.max_triggers = num;
  1861. ctx.trigger_count = 0;
  1862. ctx.trigger_time = trigger_time;
  1863. // We don't really care if RT priority is imposible
  1864. pthread_attr_init(&attr);
  1865. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1866. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1867. pthread_attr_setschedparam(&attr, &sched);
  1868. }
  1869. // Start triggering thread and wait until it is schedulled
  1870. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1871. Error("Error spawning trigger thread");
  1872. while (!ctx.trigger_thread_started) usleep(10);
  1873. }
  1874. gettimeofday(&ctx.start_time, NULL);
  1875. if (grab_mode&GRAB_MODE_GRAB) {
  1876. err = pcilib_start(handle, listen_events, flags);
  1877. if (err) Error("Failed to start event engine, error %i", err);
  1878. }
  1879. ctx.started = 1;
  1880. if (run_time) {
  1881. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1882. if (ctx.stop_time.tv_usec > 999999) {
  1883. ctx.stop_time.tv_usec -= 1000000;
  1884. __sync_synchronize();
  1885. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1886. } else {
  1887. __sync_synchronize();
  1888. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1889. }
  1890. }
  1891. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1892. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1893. Error("Error spawning monitoring thread");
  1894. if (grab_mode&GRAB_MODE_GRAB) {
  1895. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1896. if (err) Error("Error streaming events, error %i", err);
  1897. }
  1898. ctx.run_flag = 0;
  1899. if (grab_mode&GRAB_MODE_TRIGGER) {
  1900. while (ctx.trigger_thread_started) usleep(10);
  1901. }
  1902. if (grab_mode&GRAB_MODE_GRAB) {
  1903. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1904. }
  1905. gettimeofday(&end_time, NULL);
  1906. if (grab_mode&GRAB_MODE_TRIGGER) {
  1907. pthread_join(trigger_thread, NULL);
  1908. }
  1909. if (grab_mode&GRAB_MODE_GRAB) {
  1910. if (verbose >= 0)
  1911. printf("Grabbing is finished, flushing results....\n");
  1912. err = fastwriter_close(ctx.writer);
  1913. if (err) Error("Storage problems, error %i", err);
  1914. }
  1915. ctx.writing_flag = 0;
  1916. pthread_join(monitor_thread, NULL);
  1917. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1918. GrabStats(&ctx, &end_time);
  1919. StorageStats(&ctx);
  1920. }
  1921. fastwriter_destroy(ctx.writer);
  1922. return 0;
  1923. }
  1924. int StartStopDMA(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1925. int err;
  1926. pcilib_dma_engine_t dmaid;
  1927. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1928. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  1929. if (start) Error("DMA engine should be specified");
  1930. for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
  1931. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1932. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1933. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1934. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1935. }
  1936. return 0;
  1937. }
  1938. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1939. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1940. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1941. if (start) {
  1942. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1943. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1944. } else {
  1945. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1946. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1947. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1948. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1949. }
  1950. }
  1951. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1952. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1953. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1954. if (start) {
  1955. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1956. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1957. } else {
  1958. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1959. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1960. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1961. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1962. }
  1963. }
  1964. return 0;
  1965. }
  1966. typedef struct {
  1967. pcilib_kmem_use_t use;
  1968. int referenced;
  1969. int hw_lock;
  1970. int reusable;
  1971. int persistent;
  1972. int open;
  1973. size_t count;
  1974. size_t size;
  1975. } kmem_use_info_t;
  1976. #define MAX_USES 64
  1977. pcilib_kmem_use_t ParseUse(const char *use) {
  1978. unsigned long utmp;
  1979. if (use) {
  1980. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1981. if (strlen(use) < 5)
  1982. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1983. else
  1984. return utmp;
  1985. }
  1986. Error("Kernel memory use is not specified");
  1987. return 0;
  1988. }
  1989. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1990. size_t i, n = *n_uses;
  1991. if (uses[n - 1].use == use) return n - 1;
  1992. for (i = 1; i < (n - 1); i++) {
  1993. if (uses[i].use == use) return i;
  1994. }
  1995. if (n == MAX_USES) return 0;
  1996. memset(&uses[n], 0, sizeof(kmem_use_info_t));
  1997. uses[n].use = use;
  1998. return (*n_uses)++;
  1999. }
  2000. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  2001. size_t i;
  2002. for (i = 0; i < n_uses; i++) {
  2003. if (uses[i].use == use) {
  2004. if (uses[i].count) return uses + i;
  2005. else return NULL;
  2006. }
  2007. }
  2008. return NULL;
  2009. }
  2010. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  2011. DIR *dir;
  2012. struct dirent *entry;
  2013. const char *pos;
  2014. char sysdir[256];
  2015. char fname[256];
  2016. char info[256];
  2017. size_t useid, n_uses = 1; // Use 0 is for others
  2018. memset(uses, 0, sizeof(kmem_use_info_t));
  2019. pos = strrchr(device, '/');
  2020. if (pos) ++pos;
  2021. else pos = device;
  2022. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  2023. dir = opendir(sysdir);
  2024. if (!dir) Error("Can't open directory (%s)", sysdir);
  2025. while ((entry = readdir(dir)) != NULL) {
  2026. FILE *f;
  2027. unsigned long use = 0;
  2028. unsigned long size = 0;
  2029. unsigned long refs = 0;
  2030. unsigned long mode = 0;
  2031. unsigned long hwref = 0;
  2032. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  2033. if (!isnumber(entry->d_name+4)) continue;
  2034. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  2035. f = fopen(fname, "r");
  2036. if (!f) Error("Can't access file (%s)", fname);
  2037. while(!feof(f)) {
  2038. if (!fgets(info, 256, f))
  2039. break;
  2040. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  2041. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  2042. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  2043. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2044. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2045. }
  2046. fclose(f);
  2047. useid = FindUse(&n_uses, uses, use);
  2048. uses[useid].count++;
  2049. uses[useid].size += size;
  2050. if (refs) uses[useid].referenced = 1;
  2051. if (hwref) uses[useid].hw_lock = 1;
  2052. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  2053. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  2054. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  2055. }
  2056. closedir(dir);
  2057. *uses_number = n_uses;
  2058. return 0;
  2059. }
  2060. int ListKMEM(pcilib_t *handle, const char *device) {
  2061. int err;
  2062. char stmp[256];
  2063. size_t i, useid, n_uses;
  2064. kmem_use_info_t uses[MAX_USES];
  2065. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  2066. err = ParseKMEM(handle, device, &n_uses, uses);
  2067. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  2068. if ((n_uses == 1)&&(uses[0].count == 0)) {
  2069. printf("No kernel memory is allocated\n");
  2070. return 0;
  2071. }
  2072. printf("Use Type Count Total Size REF Mode \n");
  2073. printf("--------------------------------------------------------------------------------\n");
  2074. for (useid = 0; useid < n_uses; useid++) {
  2075. if (useid + 1 == n_uses) {
  2076. if (!uses[0].count) continue;
  2077. i = 0;
  2078. } else i = useid + 1;
  2079. printf("%08x ", uses[i].use);
  2080. if (i) {
  2081. switch(PCILIB_KMEM_USE_TYPE(uses[i].use)) {
  2082. case PCILIB_KMEM_USE_DMA_RING:
  2083. printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  2084. break;
  2085. case PCILIB_KMEM_USE_DMA_PAGES:
  2086. printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  2087. break;
  2088. case PCILIB_KMEM_USE_SOFTWARE_REGISTERS: {
  2089. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  2090. if (bank == PCILIB_REGISTER_BANK_INVALID)
  2091. printf("SoftRegs (%8u)", PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  2092. else
  2093. printf("SoftRegs (%8s)", model_info->banks[bank].name);
  2094. break;
  2095. }
  2096. case PCILIB_KMEM_USE_LOCKS:
  2097. printf("Locks ");
  2098. break;
  2099. case PCILIB_KMEM_USE_USER:
  2100. printf("User %04x ", uses[i].use&0xFFFF);
  2101. break;
  2102. default:
  2103. printf (" ");
  2104. }
  2105. } else printf("All Others ");
  2106. printf(" ");
  2107. printf("%6zu", uses[i].count);
  2108. printf(" ");
  2109. printf("%10s", GetPrintSize(stmp, uses[i].size));
  2110. printf(" ");
  2111. if ((uses[i].referenced)&&(uses[i].hw_lock)) printf("HW+SW");
  2112. else if (uses[i].referenced) printf(" SW");
  2113. else if (uses[i].hw_lock) printf("HW ");
  2114. else printf(" - ");
  2115. printf(" ");
  2116. if (uses[i].persistent) printf("Persistent");
  2117. else if (uses[i].open) printf("Open ");
  2118. else if (uses[i].reusable) printf("Reusable ");
  2119. else printf("Closed ");
  2120. printf("\n");
  2121. }
  2122. printf("--------------------------------------------------------------------------------\n");
  2123. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  2124. return 0;
  2125. }
  2126. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  2127. int err;
  2128. size_t i, n;
  2129. pcilib_kmem_handle_t *kbuf;
  2130. pcilib_kmem_use_t useid = ParseUse(use);
  2131. size_t n_uses;
  2132. kmem_use_info_t uses[MAX_USES];
  2133. kmem_use_info_t *use_info;
  2134. if (block == (size_t)-1) {
  2135. err = ParseKMEM(handle, device, &n_uses, uses);
  2136. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  2137. use_info = GetUse(n_uses, uses, useid);
  2138. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  2139. i = 0;
  2140. n = use_info->count;
  2141. } else {
  2142. i = block;
  2143. n = block + 1;
  2144. }
  2145. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  2146. if (!kbuf) {
  2147. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  2148. return 0;
  2149. }
  2150. printf("Buffer Address Hardware Address Bus Address\n");
  2151. printf("--------------------------------------------------------------------------------\n");
  2152. for (; i < n; i++) {
  2153. volatile void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  2154. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  2155. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  2156. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  2157. }
  2158. printf("\n");
  2159. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2160. return 0;
  2161. }
  2162. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  2163. int err;
  2164. void *data;
  2165. size_t size;
  2166. pcilib_kmem_handle_t *kbuf;
  2167. if (block == (size_t)-1) block = 0;
  2168. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  2169. if (!kbuf) {
  2170. Error("The specified kernel buffer is not allocated\n");
  2171. return 0;
  2172. }
  2173. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  2174. if (err) {
  2175. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2176. Error("The synchronization of kernel buffer has failed\n");
  2177. return 0;
  2178. }
  2179. data = (void*)pcilib_kmem_get_block_ua(handle, kbuf, block);
  2180. if (data) {
  2181. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  2182. if ((max_size)&&(size > max_size)) size = max_size;
  2183. fwrite(data, 1, size, o?o:stdout);
  2184. } else {
  2185. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2186. Error("The specified block is not existing\n");
  2187. return 0;
  2188. }
  2189. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2190. return 0;
  2191. }
  2192. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  2193. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  2194. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  2195. pcilib_kmem_handle_t *kbuf;
  2196. pcilib_kmem_use_t useid = ParseUse(use);
  2197. long page_size = sysconf(_SC_PAGESIZE);
  2198. if (type) {
  2199. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  2200. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  2201. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  2202. else Error("Invalid memory type (%s) is specified", type);
  2203. }
  2204. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  2205. Error("Selected memory type does not allow custom size");
  2206. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  2207. if (!kbuf) Error("Allocation of kernel memory has failed");
  2208. pcilib_free_kernel_memory(handle, kbuf, flags);
  2209. return 0;
  2210. }
  2211. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  2212. int err;
  2213. int i;
  2214. pcilib_kmem_use_t useid;
  2215. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  2216. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  2217. if (!strcasecmp(use, "dma")) {
  2218. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  2219. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  2220. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  2221. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  2222. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  2223. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  2224. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  2225. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  2226. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  2227. }
  2228. return 0;
  2229. }
  2230. useid = ParseUse(use);
  2231. err = pcilib_clean_kernel_memory(handle, useid, flags);
  2232. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  2233. return 0;
  2234. }
  2235. int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
  2236. int err;
  2237. DIR *dir;
  2238. struct dirent *entry;
  2239. const char *pos;
  2240. char sysdir[256];
  2241. char fname[256];
  2242. char info[256];
  2243. char stmp[256];
  2244. pcilib_dma_engine_t dmaid;
  2245. pcilib_dma_engine_status_t status;
  2246. pos = strrchr(device, '/');
  2247. if (pos) ++pos;
  2248. else pos = device;
  2249. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  2250. dir = opendir(sysdir);
  2251. if (!dir) Error("Can't open directory (%s)", sysdir);
  2252. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  2253. printf("--------------------------------------------------------------------------------\n");
  2254. while ((entry = readdir(dir)) != NULL) {
  2255. FILE *f;
  2256. unsigned long use = 0;
  2257. // unsigned long size = 0;
  2258. // unsigned long refs = 0;
  2259. unsigned long mode = 0;
  2260. // unsigned long hwref = 0;
  2261. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  2262. if (!isnumber(entry->d_name+4)) continue;
  2263. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  2264. f = fopen(fname, "r");
  2265. if (!f) Error("Can't access file (%s)", fname);
  2266. while(!feof(f)) {
  2267. if (!fgets(info, 256, f))
  2268. break;
  2269. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  2270. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  2271. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  2272. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2273. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2274. }
  2275. fclose(f);
  2276. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  2277. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  2278. if (use&0x80) {
  2279. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  2280. } else {
  2281. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  2282. }
  2283. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  2284. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  2285. err = pcilib_start_dma(handle, dmaid, 0);
  2286. if (err) {
  2287. printf("-- Wrong state, start is failed\n");
  2288. continue;
  2289. }
  2290. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2291. if (err) {
  2292. printf("-- Wrong state, failed to obtain status\n");
  2293. pcilib_stop_dma(handle, dmaid, 0);
  2294. continue;
  2295. }
  2296. pcilib_stop_dma(handle, dmaid, 0);
  2297. if (status.started) printf("S");
  2298. else printf(" ");
  2299. if (status.ring_head == status.ring_tail) printf(" ");
  2300. else printf("D");
  2301. printf(" ");
  2302. printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  2303. printf(" ");
  2304. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  2305. printf("\n");
  2306. }
  2307. closedir(dir);
  2308. printf("--------------------------------------------------------------------------------\n");
  2309. printf("S - Started, D - Data in buffers\n");
  2310. return 0;
  2311. }
  2312. int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  2313. int err;
  2314. size_t i;
  2315. pcilib_dma_engine_t dmaid;
  2316. pcilib_dma_engine_status_t status;
  2317. pcilib_dma_buffer_status_t *buffer;
  2318. char stmp[256];
  2319. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2320. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2321. err = pcilib_start_dma(handle, dmaid, 0);
  2322. if (err) Error("Error starting the specified DMA engine");
  2323. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2324. if (err) Error("Failed to obtain status of the specified DMA engine");
  2325. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2326. if (!buffer) Error("Failed to allocate memory for status buffer");
  2327. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2328. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2329. printf("Buffer Status Total Size \n");
  2330. printf("--------------------------------------------------------------------------------\n");
  2331. for (i = 0; i < status.ring_size; i++) {
  2332. printf("%8zu ", i);
  2333. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  2334. printf("%10s", GetPrintSize(stmp, buffer[i].size));
  2335. printf("\n");
  2336. }
  2337. printf("--------------------------------------------------------------------------------\n");
  2338. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  2339. free(buffer);
  2340. pcilib_stop_dma(handle, dmaid, 0);
  2341. return 0;
  2342. }
  2343. int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  2344. int err;
  2345. pcilib_dma_engine_t dmaid;
  2346. pcilib_dma_engine_status_t status;
  2347. pcilib_dma_buffer_status_t *buffer;
  2348. size_t size;
  2349. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2350. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2351. err = pcilib_start_dma(handle, dmaid, 0);
  2352. if (err) Error("Error starting the specified DMA engine");
  2353. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2354. if (err) Error("Failed to obtain status of the specified DMA engine");
  2355. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2356. if (!buffer) Error("Failed to allocate memory for status buffer");
  2357. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2358. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2359. if (block == (size_t)-1) {
  2360. // get current
  2361. }
  2362. size = buffer[block].size;
  2363. free(buffer);
  2364. pcilib_stop_dma(handle, dmaid, 0);
  2365. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  2366. }
  2367. int ListLocks(pcilib_t *ctx, int verbose) {
  2368. int err;
  2369. pcilib_lock_id_t i;
  2370. if (verbose)
  2371. printf("ID Refs Flags Locked Name\n");
  2372. else
  2373. printf("ID Refs Flags Name\n");
  2374. printf("--------------------------------------------------------------------------------\n");
  2375. for (i = 0; i < PCILIB_MAX_LOCKS; i++) {
  2376. pcilib_lock_t *lock = pcilib_get_lock_by_id(ctx, i);
  2377. const char *name = pcilib_lock_get_name(lock);
  2378. if (!name) break;
  2379. pcilib_lock_flags_t flags = pcilib_lock_get_flags(lock);
  2380. size_t refs = pcilib_lock_get_refs(lock);
  2381. printf("%4u %4zu ", i, refs);
  2382. if (flags&PCILIB_LOCK_FLAG_PERSISTENT) printf("P");
  2383. else printf(" ");
  2384. printf(" ");
  2385. if (verbose) {
  2386. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, PCILIB_TIMEOUT_IMMEDIATE);
  2387. switch (err) {
  2388. case 0:
  2389. pcilib_unlock(lock);
  2390. printf("No ");
  2391. break;
  2392. case PCILIB_ERROR_TIMEOUT:
  2393. printf("Yes ");
  2394. break;
  2395. default:
  2396. printf("Err: %3i ", err);
  2397. }
  2398. }
  2399. printf("%s\n", name);
  2400. }
  2401. printf("--------------------------------------------------------------------------------\n");
  2402. printf("P - Persistent\n");
  2403. return 0;
  2404. }
  2405. int FreeLocks(pcilib_t *handle, int force) {
  2406. return pcilib_destroy_all_locks(handle, force);
  2407. }
  2408. int LockUnlock(pcilib_t *handle, const char *name, int do_lock, pcilib_timeout_t timeout) {
  2409. int err = 0;
  2410. pcilib_lock_t *lock = pcilib_get_lock(handle, PCILIB_LOCK_FLAG_PERSISTENT, name);
  2411. if (!lock) Error("Error getting persistent lock %s", name);
  2412. if (do_lock)
  2413. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, timeout);
  2414. else
  2415. pcilib_unlock(lock);
  2416. if (err) {
  2417. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2418. switch (err) {
  2419. case PCILIB_ERROR_TIMEOUT:
  2420. printf("Timeout locking %s\n", name);
  2421. break;
  2422. default:
  2423. Error("Error (%i) locking %s", err, name);
  2424. }
  2425. } else if (do_lock) {
  2426. pcilib_lock_ref(lock);
  2427. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2428. printf("%s is locked\n", name);
  2429. } else {
  2430. pcilib_lock_unref(lock);
  2431. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2432. }
  2433. return err;
  2434. }
  2435. int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2436. int err;
  2437. err = pcilib_enable_irq(handle, irq_type, 0);
  2438. if (err) {
  2439. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2440. Error("Error enabling IRQs");
  2441. }
  2442. return err;
  2443. }
  2444. int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2445. int err;
  2446. err = pcilib_disable_irq(handle, 0);
  2447. if (err) {
  2448. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2449. Error("Error disabling IRQs");
  2450. }
  2451. return err;
  2452. }
  2453. int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  2454. pcilib_clear_irq(handle, irq_source);
  2455. return 0;
  2456. }
  2457. int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  2458. int err;
  2459. size_t count;
  2460. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  2461. if (err) {
  2462. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  2463. else Error("Error waiting for IRQ");
  2464. }
  2465. return 0;
  2466. }
  2467. int main(int argc, char **argv) {
  2468. int err = 0;
  2469. int i;
  2470. long itmp;
  2471. size_t ztmp;
  2472. unsigned char c;
  2473. const char *stmp;
  2474. const char *num_offset;
  2475. int details = 0;
  2476. int verbose = 0;
  2477. int quiete = 0;
  2478. int force = 0;
  2479. int verify = 0;
  2480. pcilib_log_priority_t log_priority;
  2481. const char *model = NULL;
  2482. const pcilib_model_description_t *model_info;
  2483. const pcilib_dma_description_t *dma_info;
  2484. MODE mode = MODE_INVALID;
  2485. GRAB_MODE grab_mode = 0;
  2486. size_t trigger_time = 0;
  2487. size_t run_time = 0;
  2488. size_t buffer = 0;
  2489. size_t threads = 1;
  2490. FORMAT format = FORMAT_DEFAULT;
  2491. PARTITION partition = PARTITION_UNKNOWN;
  2492. FLAGS flags = 0;
  2493. const char *atype = NULL;
  2494. const char *type = NULL;
  2495. ACCESS_MODE amode = ACCESS_BAR;
  2496. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  2497. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  2498. const char *addr = NULL;
  2499. const char *reg = NULL;
  2500. const char *view = NULL;
  2501. const char *unit = NULL;
  2502. const char *attr = NULL;
  2503. const char *bank = NULL;
  2504. char **data = NULL;
  2505. const char *event = NULL;
  2506. const char *data_type = NULL;
  2507. const char *dma_channel = NULL;
  2508. const char *use = NULL;
  2509. const char *lock = NULL;
  2510. const char *info_target = NULL;
  2511. const char *list_target = NULL;
  2512. size_t block = (size_t)-1;
  2513. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  2514. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  2515. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  2516. pcilib_kmem_use_t useid = 0;
  2517. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  2518. long addr_shift = 0;
  2519. uintptr_t start = -1;
  2520. size_t block_size = 0;
  2521. size_t size = 1;
  2522. access_t access = 4;
  2523. // int skip = 0;
  2524. int endianess = 0;
  2525. size_t timeout = 0;
  2526. size_t alignment = 0;
  2527. const char *output = NULL;
  2528. FILE *ofile = NULL;
  2529. size_t iterations = BENCHMARK_ITERATIONS;
  2530. unsigned long dma_mask = 0;
  2531. unsigned long pcie_mps = 0;
  2532. pcilib_t *handle;
  2533. int size_set = 0;
  2534. int timeout_set = 0;
  2535. // int run_time_set = 0;
  2536. struct sched_param sched_param = {0};
  2537. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  2538. extern int optind;
  2539. switch (c) {
  2540. case OPT_HELP:
  2541. Usage(argc, argv, NULL);
  2542. break;
  2543. case OPT_VERSION:
  2544. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2545. mode = MODE_VERSION;
  2546. break;
  2547. case OPT_INFO:
  2548. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2549. if (optarg) info_target = optarg;
  2550. else if ((optind < argc)&&(argv[optind][0] != '-')) info_target = argv[optind++];
  2551. mode = MODE_INFO;
  2552. break;
  2553. case OPT_LIST:
  2554. if (mode == MODE_LIST) details++;
  2555. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2556. if (optarg) list_target = optarg;
  2557. else if ((optind < argc)&&(argv[optind][0] != '-')) list_target = argv[optind++];
  2558. mode = MODE_LIST;
  2559. break;
  2560. case OPT_RESET:
  2561. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2562. mode = MODE_RESET;
  2563. break;
  2564. case OPT_BENCHMARK:
  2565. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2566. mode = MODE_BENCHMARK;
  2567. if (optarg) addr = optarg;
  2568. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2569. break;
  2570. case OPT_READ:
  2571. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2572. mode = MODE_READ;
  2573. if (optarg) addr = optarg;
  2574. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2575. break;
  2576. case OPT_WRITE:
  2577. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2578. mode = MODE_WRITE;
  2579. if (optarg) addr = optarg;
  2580. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2581. break;
  2582. case OPT_GRAB:
  2583. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  2584. mode = MODE_GRAB;
  2585. grab_mode |= GRAB_MODE_GRAB;
  2586. stmp = NULL;
  2587. if (optarg) stmp = optarg;
  2588. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2589. if (stmp) {
  2590. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2591. event = stmp;
  2592. }
  2593. break;
  2594. case OPT_TRIGGER:
  2595. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  2596. mode = MODE_GRAB;
  2597. grab_mode |= GRAB_MODE_TRIGGER;
  2598. stmp = NULL;
  2599. if (optarg) stmp = optarg;
  2600. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2601. if (stmp) {
  2602. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2603. event = stmp;
  2604. }
  2605. break;
  2606. case OPT_LIST_DMA:
  2607. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2608. mode = MODE_LIST_DMA;
  2609. break;
  2610. case OPT_LIST_DMA_BUFFERS:
  2611. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2612. mode = MODE_LIST_DMA_BUFFERS;
  2613. dma_channel = optarg;
  2614. break;
  2615. case OPT_READ_DMA_BUFFER:
  2616. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2617. mode = MODE_READ_DMA_BUFFER;
  2618. num_offset = strchr(optarg, ':');
  2619. if (num_offset) {
  2620. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2621. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2622. *(char*)num_offset = 0;
  2623. } else block = (size_t)-1;
  2624. dma_channel = optarg;
  2625. break;
  2626. case OPT_START_DMA:
  2627. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2628. mode = MODE_START_DMA;
  2629. if (optarg) dma_channel = optarg;
  2630. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2631. break;
  2632. case OPT_STOP_DMA:
  2633. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2634. mode = MODE_STOP_DMA;
  2635. if (optarg) dma_channel = optarg;
  2636. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2637. break;
  2638. case OPT_ENABLE_IRQ:
  2639. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2640. mode = MODE_ENABLE_IRQ;
  2641. if (optarg) num_offset = optarg;
  2642. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2643. else num_offset = NULL;
  2644. if (num_offset) {
  2645. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2646. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2647. irq_type = itmp;
  2648. }
  2649. break;
  2650. case OPT_DISABLE_IRQ:
  2651. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2652. mode = MODE_DISABLE_IRQ;
  2653. if (optarg) num_offset = optarg;
  2654. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2655. else num_offset = NULL;
  2656. if (num_offset) {
  2657. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2658. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2659. irq_type = itmp;
  2660. }
  2661. break;
  2662. case OPT_ACK_IRQ:
  2663. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2664. mode = MODE_ACK_IRQ;
  2665. if (optarg) num_offset = optarg;
  2666. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2667. else num_offset = NULL;
  2668. if (num_offset) {
  2669. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2670. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2671. irq_source = itmp;
  2672. }
  2673. break;
  2674. case OPT_WAIT_IRQ:
  2675. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2676. mode = MODE_WAIT_IRQ;
  2677. if (optarg) num_offset = optarg;
  2678. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2679. else num_offset = NULL;
  2680. if (num_offset) {
  2681. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2682. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2683. irq_source = itmp;
  2684. }
  2685. break;
  2686. case OPT_SET_DMASK:
  2687. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2688. mode = MODE_SET_DMASK;
  2689. if ((!isnumber(optarg))||(sscanf(optarg, "%lu", &dma_mask) != 1)||(dma_mask<24)||(dma_mask>64))
  2690. Usage(argc, argv, "Invalid DMA mask is specified (%s)", optarg);
  2691. break;
  2692. case OPT_SET_MPS:
  2693. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2694. mode = MODE_SET_MPS;
  2695. if ((!isnumber(optarg))||(sscanf(optarg, "%lu", &pcie_mps) != 1)||(pcie_mps<128)||(pcie_mps>2048))
  2696. Usage(argc, argv, "Invalid payload size is specified (%s)", optarg);
  2697. break;
  2698. case OPT_LIST_KMEM:
  2699. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2700. mode = MODE_LIST_KMEM;
  2701. if (optarg) use = optarg;
  2702. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2703. else use = NULL;
  2704. if (use) {
  2705. num_offset = strchr(use, ':');
  2706. if (num_offset) {
  2707. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2708. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2709. *(char*)num_offset = 0;
  2710. }
  2711. }
  2712. break;
  2713. case OPT_READ_KMEM:
  2714. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2715. mode = MODE_READ_KMEM;
  2716. if (!model) model = "pci";
  2717. num_offset = strchr(optarg, ':');
  2718. if (num_offset) {
  2719. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2720. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2721. *(char*)num_offset = 0;
  2722. }
  2723. use = optarg;
  2724. useid = ParseUse(use);
  2725. break;
  2726. case OPT_ALLOC_KMEM:
  2727. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2728. mode = MODE_ALLOC_KMEM;
  2729. model = "pci";
  2730. if (optarg) use = optarg;
  2731. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2732. break;
  2733. case OPT_FREE_KMEM:
  2734. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2735. mode = MODE_FREE_KMEM;
  2736. if (!model) model = "pci";
  2737. if (optarg) use = optarg;
  2738. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2739. break;
  2740. case OPT_LIST_LOCKS:
  2741. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2742. mode = MODE_LIST_LOCKS;
  2743. break;
  2744. case OPT_FREE_LOCKS:
  2745. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2746. mode = MODE_FREE_LOCKS;
  2747. model = "maintenance";
  2748. break;
  2749. case OPT_LOCK:
  2750. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2751. mode = MODE_LOCK;
  2752. lock = optarg;
  2753. break;
  2754. case OPT_UNLOCK:
  2755. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2756. mode = MODE_UNLOCK;
  2757. lock = optarg;
  2758. break;
  2759. case OPT_DEVICE:
  2760. fpga_device = optarg;
  2761. break;
  2762. case OPT_MODEL:
  2763. model = optarg;
  2764. /* if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2765. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2766. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2767. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
  2768. break;
  2769. case OPT_BAR:
  2770. bank = optarg;
  2771. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2772. // else bar = itmp;
  2773. break;
  2774. case OPT_ALIGNMENT:
  2775. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2776. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2777. }
  2778. break;
  2779. case OPT_ACCESS:
  2780. if (!strncasecmp(optarg, "fifo", 4)) {
  2781. atype = "fifo";
  2782. num_offset = optarg + 4;
  2783. amode = ACCESS_FIFO;
  2784. } else if (!strncasecmp(optarg, "dma", 3)) {
  2785. atype = "dma";
  2786. num_offset = optarg + 3;
  2787. amode = ACCESS_DMA;
  2788. } else if (!strncasecmp(optarg, "bar", 3)) {
  2789. atype = "plain";
  2790. num_offset = optarg + 3;
  2791. amode = ACCESS_BAR;
  2792. } else if (!strncasecmp(optarg, "config", 6)) {
  2793. atype = "config";
  2794. num_offset = optarg + 6;
  2795. amode = ACCESS_CONFIG;
  2796. } else if (!strncasecmp(optarg, "plain", 5)) {
  2797. atype = "plain";
  2798. num_offset = optarg + 5;
  2799. amode = ACCESS_BAR;
  2800. } else {
  2801. num_offset = optarg;
  2802. }
  2803. if (*num_offset) {
  2804. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2805. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2806. switch (itmp) {
  2807. case 8: access = 1; break;
  2808. case 16: access = 2; break;
  2809. case 32: access = 4; break;
  2810. case 64: access = 8; break;
  2811. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2812. }
  2813. }
  2814. break;
  2815. case OPT_SIZE:
  2816. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2817. if (strcasecmp(optarg, "unlimited"))
  2818. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2819. else
  2820. size = 0;//(size_t)-1;
  2821. }
  2822. size_set = 1;
  2823. break;
  2824. case OPT_BLOCK_SIZE:
  2825. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2826. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2827. }
  2828. break;
  2829. case OPT_ENDIANESS:
  2830. if ((*optarg == 'b')||(*optarg == 'B')) {
  2831. if (ntohs(1) == 1) endianess = 0;
  2832. else endianess = 1;
  2833. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2834. if (ntohs(1) == 1) endianess = 1;
  2835. else endianess = 0;
  2836. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2837. break;
  2838. case OPT_TIMEOUT:
  2839. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2840. if (strcasecmp(optarg, "unlimited"))
  2841. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2842. else
  2843. timeout = PCILIB_TIMEOUT_INFINITE;
  2844. }
  2845. timeout_set = 1;
  2846. break;
  2847. case OPT_OUTPUT:
  2848. output = optarg;
  2849. break;
  2850. case OPT_ITERATIONS:
  2851. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2852. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2853. break;
  2854. case OPT_EVENT:
  2855. event = optarg;
  2856. break;
  2857. case OPT_TYPE:
  2858. type = optarg;
  2859. break;
  2860. case OPT_DATA_TYPE:
  2861. data_type = optarg;
  2862. break;
  2863. case OPT_RUN_TIME:
  2864. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2865. if (strcasecmp(optarg, "unlimited"))
  2866. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2867. else
  2868. run_time = 0;
  2869. }
  2870. // run_time_set = 1;
  2871. break;
  2872. case OPT_TRIGGER_TIME:
  2873. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2874. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2875. break;
  2876. case OPT_TRIGGER_RATE:
  2877. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2878. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2879. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2880. break;
  2881. case OPT_BUFFER:
  2882. if (optarg) num_offset = optarg;
  2883. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2884. else num_offset = NULL;
  2885. if (num_offset) {
  2886. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2887. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2888. buffer *= 1024 * 1024;
  2889. } else {
  2890. buffer = get_free_memory();
  2891. if (buffer < 256) Error("Not enough free memory (%lz MiB) for buffering", buffer / 1024 / 1024);
  2892. buffer -= 128 + buffer/16;
  2893. }
  2894. break;
  2895. case OPT_THREADS:
  2896. if (optarg) num_offset = optarg;
  2897. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2898. else num_offset = NULL;
  2899. if (num_offset) {
  2900. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2901. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2902. } else {
  2903. threads = 0;
  2904. }
  2905. break;
  2906. case OPT_FORMAT:
  2907. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2908. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2909. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2910. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2911. break;
  2912. case OPT_QUIETE:
  2913. quiete = 1;
  2914. verbose = -1;
  2915. break;
  2916. case OPT_VERBOSE:
  2917. if (optarg) num_offset = optarg;
  2918. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2919. else num_offset = NULL;
  2920. if (num_offset) {
  2921. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2922. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2923. } else {
  2924. verbose = 1;
  2925. }
  2926. break;
  2927. case OPT_FORCE:
  2928. force = 1;
  2929. break;
  2930. case OPT_VERIFY:
  2931. verify = 1;
  2932. break;
  2933. case OPT_MULTIPACKET:
  2934. flags |= FLAG_MULTIPACKET;
  2935. break;
  2936. case OPT_WAIT:
  2937. flags |= FLAG_WAIT;
  2938. break;
  2939. default:
  2940. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2941. }
  2942. }
  2943. if (mode == MODE_INVALID) {
  2944. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2945. else Usage(argc, argv, NULL);
  2946. }
  2947. if (verbose) log_priority = PCILIB_LOG_INFO;
  2948. else if (quiete) log_priority = PCILIB_LOG_ERROR;
  2949. else log_priority = PCILIB_LOG_WARNING;
  2950. pcilib_set_logger(log_priority, &LogError, NULL);
  2951. handle = pcilib_open(fpga_device, model);
  2952. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2953. model_info = pcilib_get_model_description(handle);
  2954. dma_info = pcilib_get_dma_description(handle);
  2955. switch (mode) {
  2956. case MODE_WRITE:
  2957. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2958. int vallen = strlen(argv[optind]);
  2959. if (vallen > 1) {
  2960. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2961. if (!data) Error("Error allocating memory for data array");
  2962. for (i = 0; i < size; i++) {
  2963. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2964. strcpy(data[i], argv[optind] + 1);
  2965. }
  2966. } else {
  2967. data = (char**)malloc(size * (9 + sizeof(char*)));
  2968. if (!data) Error("Error allocating memory for data array");
  2969. for (i = 0; i < size; i++) {
  2970. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2971. sprintf(data[i], "%x", i);
  2972. }
  2973. }
  2974. } else if ((argc - optind) == size) data = argv + optind;
  2975. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2976. case MODE_READ:
  2977. if (!addr) {
  2978. if (((!dma_info)||(!dma_info->api))&&(!model_info->api)&&(!handle->num_reg)) {
  2979. // if (model == PCILIB_MODEL_PCI) {
  2980. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2981. Usage(argc, argv, "The address is not specified");
  2982. } else ++mode;
  2983. }
  2984. break;
  2985. case MODE_START_DMA:
  2986. case MODE_STOP_DMA:
  2987. case MODE_LIST_DMA_BUFFERS:
  2988. case MODE_READ_DMA_BUFFER:
  2989. if ((dma_channel)&&(*dma_channel)) {
  2990. itmp = strlen(dma_channel) - 1;
  2991. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2992. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2993. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2994. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2995. else {
  2996. num_offset = dma_channel + 3;
  2997. itmp -= 3;
  2998. }
  2999. if (bank) {
  3000. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  3001. }
  3002. if (!isnumber_n(num_offset, itmp))
  3003. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  3004. dma = atoi(num_offset);
  3005. }
  3006. break;
  3007. case MODE_LIST:
  3008. if (bank&&list_target) {
  3009. if (strcmp(list_target, bank))
  3010. Usage(argc, argv, "Conflicting banks are specified in list parameter (%s) and bank parameter (%s)", list_target, bank);
  3011. } else if (bank) {
  3012. list_target = bank;
  3013. }
  3014. break;
  3015. default:
  3016. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  3017. }
  3018. if (addr) {
  3019. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  3020. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  3021. if (bank) {
  3022. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  3023. } else {
  3024. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  3025. }
  3026. dma = atoi(addr + 3);
  3027. amode = ACCESS_DMA;
  3028. addr = NULL;
  3029. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  3030. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  3031. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  3032. bar = atoi(addr + 3);
  3033. amode = ACCESS_BAR;
  3034. addr = NULL;
  3035. } else if (!strcmp(addr, "config")) {
  3036. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  3037. amode = ACCESS_CONFIG;
  3038. addr = NULL;
  3039. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  3040. // check if the address in the register range
  3041. const pcilib_register_range_t *ranges = model_info->ranges;
  3042. if (ranges) {
  3043. for (i = 0; ranges[i].start != ranges[i].end; i++)
  3044. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  3045. // register access in plain mode
  3046. if (ranges[i].start != ranges[i].end) {
  3047. pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
  3048. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  3049. bank = model_info->banks[regbank].name;
  3050. start += ranges[i].addr_shift;
  3051. addr_shift = ranges[i].addr_shift;
  3052. ++mode;
  3053. }
  3054. }
  3055. } else {
  3056. const char *spec;
  3057. attr = strchr(addr, '@');
  3058. if (attr) {
  3059. size_t spec_size = strlen(addr) - strlen(attr);
  3060. spec = strndupa(addr, spec_size);
  3061. attr++;
  3062. } else {
  3063. spec = addr;
  3064. }
  3065. view = strchr(spec, '/');
  3066. unit = strchr((view?view:spec), ':');
  3067. if (view||unit) {
  3068. size_t reg_size = strlen(spec) - strlen(view?view:unit);
  3069. if (reg_size) reg = strndupa(spec, reg_size);
  3070. else reg = NULL;
  3071. if ((reg)&&(view)) view++;
  3072. if (unit) unit++;
  3073. if (view&&unit) {
  3074. view = strndupa(view, strlen(view) - strlen(unit) - 1);
  3075. } else if ((reg)&&(unit)) {
  3076. view = unit;
  3077. unit = NULL;
  3078. }
  3079. } else {
  3080. if (*spec) reg = spec;
  3081. else reg = NULL;
  3082. }
  3083. if (reg) {
  3084. if (pcilib_find_register(handle, bank, reg) == PCILIB_REGISTER_INVALID) {
  3085. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  3086. }
  3087. }
  3088. if (attr) {
  3089. if (mode == MODE_WRITE)
  3090. Error("Writting of attributes is not supported");
  3091. mode += 3;
  3092. } else if (reg) {
  3093. mode += 1;
  3094. } else {
  3095. mode += 2;
  3096. }
  3097. }
  3098. }
  3099. if (mode == MODE_GRAB) {
  3100. if (output) {
  3101. char fsname[128];
  3102. if (!get_file_fs(output, 127, fsname)) {
  3103. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  3104. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  3105. }
  3106. } else {
  3107. output = "/dev/null";
  3108. partition = PARTITION_NULL;
  3109. }
  3110. if (!timeout_set) {
  3111. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  3112. else timeout = PCILIB_EVENT_TIMEOUT;
  3113. }
  3114. if (!size_set) {
  3115. if (run_time) size = 0;
  3116. }
  3117. }
  3118. if (mode != MODE_GRAB) {
  3119. if (size == (size_t)-1)
  3120. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  3121. }
  3122. if ((bank)&&(amode == ACCESS_DMA)) {
  3123. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  3124. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  3125. else dma = itmp;
  3126. } else if (bank) {
  3127. switch (mode) {
  3128. case MODE_BENCHMARK:
  3129. case MODE_READ:
  3130. case MODE_WRITE:
  3131. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS))
  3132. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  3133. else bar = itmp;
  3134. break;
  3135. default:
  3136. if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  3137. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  3138. }
  3139. }
  3140. signal(SIGINT, signal_exit_handler);
  3141. if ((mode != MODE_GRAB)&&(output)) {
  3142. ofile = fopen(output, "a+");
  3143. if (!ofile) {
  3144. Error("Failed to open file \"%s\"", output);
  3145. }
  3146. }
  3147. // Requesting real-time priority when needed
  3148. switch (mode) {
  3149. case MODE_READ:
  3150. case MODE_WRITE:
  3151. if (amode != ACCESS_DMA)
  3152. break;
  3153. case MODE_BENCHMARK:
  3154. sched_param.sched_priority = sched_get_priority_max(SCHED_FIFO);
  3155. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  3156. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  3157. break;
  3158. case MODE_GRAB:
  3159. sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO);
  3160. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  3161. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  3162. break;
  3163. default:
  3164. ;
  3165. }
  3166. switch (mode) {
  3167. case MODE_VERSION:
  3168. Version(handle, model_info);
  3169. break;
  3170. case MODE_INFO:
  3171. Info(handle, model_info, info_target);
  3172. break;
  3173. case MODE_LIST:
  3174. if ((list_target)&&(*list_target == '/'))
  3175. ListProperties(handle, list_target, details);
  3176. else
  3177. List(handle, model_info, list_target, details);
  3178. break;
  3179. case MODE_BENCHMARK:
  3180. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  3181. break;
  3182. case MODE_READ:
  3183. if (amode == ACCESS_DMA) {
  3184. err = ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  3185. } else if (amode == ACCESS_CONFIG) {
  3186. err = ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  3187. } else if (addr) {
  3188. err = ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  3189. } else {
  3190. Error("Address to read is not specified");
  3191. }
  3192. break;
  3193. case MODE_READ_REGISTER:
  3194. case MODE_READ_PROPERTY:
  3195. case MODE_READ_ATTR:
  3196. if ((reg)||(view)||(attr)||(!addr)) ReadRegister(handle, model_info, bank, reg, view, unit, attr);
  3197. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  3198. break;
  3199. case MODE_WRITE:
  3200. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  3201. break;
  3202. case MODE_WRITE_REGISTER:
  3203. case MODE_WRITE_PROPERTY:
  3204. if (reg||view) WriteRegister(handle, model_info, bank, reg, view, unit, data);
  3205. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  3206. break;
  3207. case MODE_RESET:
  3208. pcilib_reset(handle);
  3209. break;
  3210. case MODE_GRAB:
  3211. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  3212. break;
  3213. case MODE_LIST_DMA:
  3214. ListDMA(handle, fpga_device, model_info);
  3215. break;
  3216. case MODE_LIST_DMA_BUFFERS:
  3217. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  3218. break;
  3219. case MODE_READ_DMA_BUFFER:
  3220. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  3221. break;
  3222. case MODE_START_DMA:
  3223. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  3224. break;
  3225. case MODE_STOP_DMA:
  3226. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  3227. break;
  3228. case MODE_ENABLE_IRQ:
  3229. EnableIRQ(handle, model_info, irq_type);
  3230. break;
  3231. case MODE_DISABLE_IRQ:
  3232. DisableIRQ(handle, model_info, irq_type);
  3233. break;
  3234. case MODE_ACK_IRQ:
  3235. AckIRQ(handle, model_info, irq_source);
  3236. break;
  3237. case MODE_WAIT_IRQ:
  3238. WaitIRQ(handle, model_info, irq_source, timeout);
  3239. break;
  3240. case MODE_SET_DMASK:
  3241. pcilib_set_dma_mask(handle, dma_mask);
  3242. break;
  3243. case MODE_SET_MPS:
  3244. pcilib_set_mps(handle, pcie_mps);
  3245. break;
  3246. case MODE_LIST_KMEM:
  3247. if (use) DetailKMEM(handle, fpga_device, use, block);
  3248. else ListKMEM(handle, fpga_device);
  3249. break;
  3250. case MODE_READ_KMEM:
  3251. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  3252. break;
  3253. case MODE_ALLOC_KMEM:
  3254. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  3255. break;
  3256. case MODE_FREE_KMEM:
  3257. FreeKMEM(handle, fpga_device, use, force);
  3258. break;
  3259. case MODE_LIST_LOCKS:
  3260. ListLocks(handle, verbose);
  3261. break;
  3262. case MODE_FREE_LOCKS:
  3263. FreeLocks(handle, force);
  3264. break;
  3265. case MODE_LOCK:
  3266. LockUnlock(handle, lock, 1, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3267. break;
  3268. case MODE_UNLOCK:
  3269. LockUnlock(handle, lock, 0, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3270. break;
  3271. case MODE_INVALID:
  3272. break;
  3273. }
  3274. if (ofile) fclose(ofile);
  3275. pcilib_close(handle);
  3276. if (data != argv + optind) free(data);
  3277. return err;
  3278. }