cli.c 103 KB

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  1. #define _XOPEN_SOURCE 700
  2. #define _POSIX_C_SOURCE 200112L
  3. #define _BSD_SOURCE
  4. #define _DEFAULT_SOURCE
  5. #include <stdio.h>
  6. #include <stdlib.h>
  7. #include <string.h>
  8. #include <strings.h>
  9. #include <stdint.h>
  10. #include <stdarg.h>
  11. #include <fcntl.h>
  12. #include <unistd.h>
  13. #include <sys/time.h>
  14. #include <sys/ioctl.h>
  15. #include <sys/mman.h>
  16. #include <errno.h>
  17. #include <alloca.h>
  18. #include <arpa/inet.h>
  19. #include <sys/types.h>
  20. #include <sys/stat.h>
  21. #include <dirent.h>
  22. #include <pthread.h>
  23. #include <signal.h>
  24. #include <dlfcn.h>
  25. #include <getopt.h>
  26. #include <fastwriter.h>
  27. #include "pcitool/sysinfo.h"
  28. #include "pcitool/formaters.h"
  29. #include "pci.h"
  30. #include "plugin.h"
  31. #include "config.h"
  32. #include "tools.h"
  33. #include "kmem.h"
  34. #include "error.h"
  35. #include "debug.h"
  36. #include "model.h"
  37. #include "locking.h"
  38. /* defines */
  39. #define MAX_KBUF 14
  40. //#define BIGBUFSIZE (512*1024*1024)
  41. #define BIGBUFSIZE (1024*1024)
  42. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  43. #define LINE_WIDTH 80
  44. #define SEPARATOR_WIDTH 2
  45. #define BLOCK_SEPARATOR_WIDTH 2
  46. #define BLOCK_SIZE 8
  47. #define BENCHMARK_ITERATIONS 128
  48. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  49. #define isnumber pcilib_isnumber
  50. #define isxnumber pcilib_isxnumber
  51. #define isnumber_n pcilib_isnumber_n
  52. #define isxnumber_n pcilib_isxnumber_n
  53. typedef uint8_t access_t;
  54. typedef enum {
  55. GRAB_MODE_GRAB = 1,
  56. GRAB_MODE_TRIGGER = 2
  57. } GRAB_MODE;
  58. typedef enum {
  59. MODE_INVALID,
  60. MODE_INFO,
  61. MODE_LIST,
  62. MODE_BENCHMARK,
  63. MODE_READ,
  64. MODE_READ_REGISTER,
  65. MODE_WRITE,
  66. MODE_WRITE_REGISTER,
  67. MODE_RESET,
  68. MODE_GRAB,
  69. MODE_START_DMA,
  70. MODE_STOP_DMA,
  71. MODE_LIST_DMA,
  72. MODE_LIST_DMA_BUFFERS,
  73. MODE_READ_DMA_BUFFER,
  74. MODE_ENABLE_IRQ,
  75. MODE_DISABLE_IRQ,
  76. MODE_ACK_IRQ,
  77. MODE_WAIT_IRQ,
  78. MODE_ALLOC_KMEM,
  79. MODE_LIST_KMEM,
  80. MODE_READ_KMEM,
  81. MODE_FREE_KMEM,
  82. MODE_LIST_LOCKS,
  83. MODE_FREE_LOCKS,
  84. MODE_LOCK,
  85. MODE_UNLOCK
  86. } MODE;
  87. typedef enum {
  88. ACCESS_BAR,
  89. ACCESS_DMA,
  90. ACCESS_FIFO,
  91. ACCESS_CONFIG
  92. } ACCESS_MODE;
  93. typedef enum {
  94. FLAG_MULTIPACKET = 1,
  95. FLAG_WAIT = 2
  96. } FLAGS;
  97. typedef enum {
  98. FORMAT_DEFAULT = 0,
  99. FORMAT_RAW,
  100. FORMAT_HEADER,
  101. FORMAT_RINGFS
  102. } FORMAT;
  103. typedef enum {
  104. PARTITION_UNKNOWN,
  105. PARTITION_RAW,
  106. PARTITION_EXT4,
  107. PARTITION_NULL
  108. } PARTITION;
  109. typedef enum {
  110. OPT_DEVICE = 'd',
  111. OPT_MODEL = 'm',
  112. OPT_BAR = 'b',
  113. OPT_ACCESS = 'a',
  114. OPT_ENDIANESS = 'e',
  115. OPT_SIZE = 's',
  116. OPT_OUTPUT = 'o',
  117. OPT_TIMEOUT = 't',
  118. OPT_INFO = 'i',
  119. OPT_LIST = 'l',
  120. OPT_READ = 'r',
  121. OPT_WRITE = 'w',
  122. OPT_GRAB = 'g',
  123. OPT_QUIETE = 'q',
  124. OPT_HELP = 'h',
  125. OPT_RESET = 128,
  126. OPT_BENCHMARK,
  127. OPT_TRIGGER,
  128. OPT_DATA_TYPE,
  129. OPT_EVENT,
  130. OPT_TRIGGER_RATE,
  131. OPT_TRIGGER_TIME,
  132. OPT_RUN_TIME,
  133. OPT_FORMAT,
  134. OPT_BUFFER,
  135. OPT_THREADS,
  136. OPT_LIST_DMA,
  137. OPT_LIST_DMA_BUFFERS,
  138. OPT_READ_DMA_BUFFER,
  139. OPT_START_DMA,
  140. OPT_STOP_DMA,
  141. OPT_ENABLE_IRQ,
  142. OPT_DISABLE_IRQ,
  143. OPT_ACK_IRQ,
  144. OPT_WAIT_IRQ,
  145. OPT_ITERATIONS,
  146. OPT_ALLOC_KMEM,
  147. OPT_LIST_KMEM,
  148. OPT_FREE_KMEM,
  149. OPT_READ_KMEM,
  150. OPT_LIST_LOCKS,
  151. OPT_FREE_LOCKS,
  152. OPT_LOCK,
  153. OPT_UNLOCK,
  154. OPT_BLOCK_SIZE,
  155. OPT_ALIGNMENT,
  156. OPT_TYPE,
  157. OPT_FORCE,
  158. OPT_VERIFY,
  159. OPT_WAIT,
  160. OPT_MULTIPACKET,
  161. OPT_VERBOSE
  162. } OPTIONS;
  163. static struct option long_options[] = {
  164. {"device", required_argument, 0, OPT_DEVICE },
  165. {"model", required_argument, 0, OPT_MODEL },
  166. {"bar", required_argument, 0, OPT_BAR },
  167. {"access", required_argument, 0, OPT_ACCESS },
  168. {"endianess", required_argument, 0, OPT_ENDIANESS },
  169. {"size", required_argument, 0, OPT_SIZE },
  170. {"output", required_argument, 0, OPT_OUTPUT },
  171. {"timeout", required_argument, 0, OPT_TIMEOUT },
  172. {"iterations", required_argument, 0, OPT_ITERATIONS },
  173. {"info", no_argument, 0, OPT_INFO },
  174. {"list", no_argument, 0, OPT_LIST },
  175. {"reset", no_argument, 0, OPT_RESET },
  176. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  177. {"read", optional_argument, 0, OPT_READ },
  178. {"write", optional_argument, 0, OPT_WRITE },
  179. {"grab", optional_argument, 0, OPT_GRAB },
  180. {"trigger", optional_argument, 0, OPT_TRIGGER },
  181. {"data", required_argument, 0, OPT_DATA_TYPE },
  182. {"event", required_argument, 0, OPT_EVENT },
  183. {"run-time", required_argument, 0, OPT_RUN_TIME },
  184. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  185. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  186. {"format", required_argument, 0, OPT_FORMAT },
  187. {"buffer", optional_argument, 0, OPT_BUFFER },
  188. {"threads", optional_argument, 0, OPT_THREADS },
  189. {"start-dma", required_argument, 0, OPT_START_DMA },
  190. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  191. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  192. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  193. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  194. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  195. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  196. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  197. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  198. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  199. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  200. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  201. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  202. {"list-locks", no_argument, 0, OPT_LIST_LOCKS },
  203. {"free-locks", no_argument, 0, OPT_FREE_LOCKS },
  204. {"lock", required_argument, 0, OPT_LOCK },
  205. {"unlock", required_argument, 0, OPT_UNLOCK },
  206. {"type", required_argument, 0, OPT_TYPE },
  207. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  208. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  209. {"quiete", no_argument, 0, OPT_QUIETE },
  210. {"verbose", optional_argument, 0, OPT_VERBOSE },
  211. {"force", no_argument, 0, OPT_FORCE },
  212. {"verify", no_argument, 0, OPT_VERIFY },
  213. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  214. {"wait", no_argument, 0, OPT_WAIT },
  215. {"help", no_argument, 0, OPT_HELP },
  216. { 0, 0, 0, 0 }
  217. };
  218. void Usage(int argc, char *argv[], const char *format, ...) {
  219. if (format) {
  220. va_list ap;
  221. va_start(ap, format);
  222. printf("Error %i: ", errno);
  223. vprintf(format, ap);
  224. printf("\n");
  225. va_end(ap);
  226. printf("\n");
  227. }
  228. printf(
  229. "Usage:\n"
  230. " %s <mode> [options] [hex data]\n"
  231. " Modes:\n"
  232. " -i - Device Info\n"
  233. " -l[l] - List (detailed) Data Banks & Registers\n"
  234. " -r <addr|reg|dmaX> - Read Data/Register\n"
  235. " -w <addr|reg|dmaX> - Write Data/Register\n"
  236. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  237. " --reset - Reset board\n"
  238. " --help - Help message\n"
  239. "\n"
  240. " Event Modes:\n"
  241. " --trigger [event] - Trigger Events\n"
  242. " -g [event] - Grab Events\n"
  243. "\n"
  244. " IRQ Modes:\n"
  245. " --enable-irq [type] - Enable IRQs\n"
  246. " --disable-irq [type] - Disable IRQs\n"
  247. " --acknowledge-irq <source> - Clean IRQ queue\n"
  248. " --wait-irq <source> - Wait for IRQ\n"
  249. " DMA Modes:\n"
  250. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  251. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  252. " --list-dma-engines - List active DMA engines\n"
  253. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  254. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  255. "\n"
  256. " Kernel Modes:\n"
  257. " --list-kernel-memory [use] - List kernel buffers\n"
  258. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  259. " block is specified as: use:block_number\n"
  260. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  261. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  262. " dma - Remove all buffers allocated by DMA subsystem\n"
  263. " #number - Remove all buffers with the specified use id\n"
  264. "\n"
  265. " --list-locks - List all registered locks\n"
  266. " --free-locks - Destroy all locks (DANGEROUS)\n"
  267. " --lock <lock name> - Obtain persistent lock\n"
  268. " --unlock <lock name> - Release persistent lock\n"
  269. "\n"
  270. " Addressing:\n"
  271. " -d <device> - FPGA device (/dev/fpga0)\n"
  272. " -m <model> - Memory model (autodetected)\n"
  273. " pci - Plain\n"
  274. " ipecamera - IPE Camera\n"
  275. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  276. "\n"
  277. " Options:\n"
  278. " -s <size> - Number of words (default: 1)\n"
  279. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  280. " -e <l|b> - Endianess Little/Big (default: host)\n"
  281. " -o <file> - Append output to file (default: stdout)\n"
  282. " -t <timeout|unlimited> - Timeout in microseconds\n"
  283. " --check - Verify write operations\n"
  284. "\n"
  285. " Event Options:\n"
  286. " --event <evt> - Specifies event for trigger and grab modes\n"
  287. " --data <type> - Data type to request for the events\n"
  288. " --run-time <us> - Limit time to grab/trigger events\n"
  289. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  290. " --trigger-rate <tps> - Generate tps triggers per second\n"
  291. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  292. " -s <num|unlimited> - Number of events to grab and trigger\n"
  293. " --format [type] - Specifies how event data should be stored\n"
  294. " raw - Just write all events sequentially\n"
  295. " add_header - Prefix events with 512 bit header:\n"
  296. " event(64), data(64), nope(64), size(64)\n"
  297. " seqnum(64), offset(64), timestamp(128)\n"
  298. //" ringfs - Write to RingFS\n"
  299. " --buffer [size] - Request data buffering, size in MB\n"
  300. " --threads [num] - Allow multithreaded processing\n"
  301. "\n"
  302. " DMA Options:\n"
  303. " --multipacket - Read multiple packets\n"
  304. " --wait - Wait until data arrives\n"
  305. "\n"
  306. " Kernel Options:\n"
  307. " --type <type> - Type of kernel memory to allocate\n"
  308. " consistent - Consistent memory\n"
  309. " s2c - DMA S2C (write) memory\n"
  310. " c2s - DMA C2S (read) memory\n"
  311. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  312. " -s <size> - Number of buffers to allocate (default: 1)\n"
  313. " --allignment <alignment> - Buffer alignment (default: page)\n"
  314. "\n"
  315. " Information:\n"
  316. " --verbose [level] - Announce details of ongoing operations\n"
  317. " -q - Quiete mode (suppress warnings)\n"
  318. "\n"
  319. " Data:\n"
  320. " Data can be specified as sequence of hexdecimal number or\n"
  321. " a single value prefixed with '*'. In this case it will be\n"
  322. " replicated the specified amount of times\n"
  323. "\n\n",
  324. argv[0]);
  325. exit(0);
  326. }
  327. static int StopFlag = 0;
  328. static void signal_exit_handler(int signo) {
  329. if (++StopFlag > 2)
  330. exit(-1);
  331. }
  332. void LogError(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, va_list ap) {
  333. vprintf(format, ap);
  334. if (prio == PCILIB_LOG_ERROR) {
  335. if (errno) printf("\nerrno: %i (%s)", errno, strerror(errno));
  336. }
  337. printf("\n");
  338. if (prio == PCILIB_LOG_ERROR) {
  339. printf("Exiting at [%s:%u]\n\n", file, line);
  340. exit(-1);
  341. }
  342. }
  343. void ErrorInternal(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, ...) {
  344. va_list ap;
  345. va_start(ap, format);
  346. LogError(arg, file, line, prio, format, ap);
  347. va_end(ap);
  348. }
  349. #define Error(...) ErrorInternal(NULL, __FILE__, __LINE__, PCILIB_LOG_ERROR, __VA_ARGS__)
  350. void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
  351. int i,j;
  352. const pcilib_register_bank_description_t *banks;
  353. const pcilib_register_description_t *registers;
  354. const pcilib_event_description_t *events;
  355. const pcilib_event_data_type_description_t *types;
  356. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  357. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  358. for (i = 0; i < PCILIB_MAX_BARS; i++) {
  359. if (board_info->bar_length[i] > 0) {
  360. printf(" BAR %d - ", i);
  361. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  362. case IORESOURCE_IO: printf(" IO"); break;
  363. case IORESOURCE_MEM: printf("MEM"); break;
  364. case IORESOURCE_IRQ: printf("IRQ"); break;
  365. case IORESOURCE_DMA: printf("DMA"); break;
  366. }
  367. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  368. else printf("32");
  369. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  370. }
  371. }
  372. printf("\n");
  373. if ((dma_info)&&(dma_info->engines)) {
  374. printf("DMA Engines: \n");
  375. for (i = 0; dma_info->engines[i].addr_bits; i++) {
  376. const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
  377. printf(" DMA %2d ", engine->addr);
  378. switch (engine->direction) {
  379. case PCILIB_DMA_FROM_DEVICE:
  380. printf("C2S");
  381. break;
  382. case PCILIB_DMA_TO_DEVICE:
  383. printf("S2C");
  384. break;
  385. case PCILIB_DMA_BIDIRECTIONAL:
  386. printf("BI ");
  387. break;
  388. }
  389. printf(" - Type: ");
  390. switch (engine->type) {
  391. case PCILIB_DMA_TYPE_BLOCK:
  392. printf("Block");
  393. break;
  394. case PCILIB_DMA_TYPE_PACKET:
  395. printf("Packet");
  396. break;
  397. default:
  398. printf("Unknown");
  399. }
  400. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  401. }
  402. printf("\n");
  403. }
  404. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  405. else banks = model_info->banks;
  406. if (banks) {
  407. printf("Banks: \n");
  408. for (i = 0; banks[i].access; i++) {
  409. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  410. if ((banks[i].description)&&(banks[i].description[0])) {
  411. printf(": %s", banks[i].description);
  412. }
  413. printf("\n");
  414. }
  415. printf("\n");
  416. }
  417. if (bank == (char*)-1) registers = NULL;
  418. else registers = model_info->registers;
  419. if (registers) {
  420. pcilib_register_bank_addr_t bank_addr = 0;
  421. if (bank) {
  422. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  423. const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  424. bank_addr = b->addr;
  425. if (b->description) printf("%s:\n", b->description);
  426. else if (b->name) printf("Registers of bank %s:\n", b->name);
  427. else printf("Registers of bank 0x%x:\n", b->addr);
  428. } else {
  429. printf("Registers: \n");
  430. }
  431. for (i = 0; registers[i].bits; i++) {
  432. const char *mode;
  433. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  434. if (registers[i].type == PCILIB_REGISTER_BITS) {
  435. if (!details) continue;
  436. if (registers[i].bits > 1) {
  437. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  438. } else {
  439. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  440. }
  441. continue;
  442. }
  443. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  444. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  445. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  446. else mode = " ";
  447. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  448. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  449. printf(": %s", registers[i].description);
  450. }
  451. printf("\n");
  452. }
  453. printf("\n");
  454. }
  455. if (bank == (char*)-1) events = NULL;
  456. else {
  457. events = model_info->events;
  458. types = model_info->data_types;
  459. }
  460. if (events) {
  461. printf("Events: \n");
  462. for (i = 0; events[i].name; i++) {
  463. printf(" %s", events[i].name);
  464. if ((events[i].description)&&(events[i].description[0])) {
  465. printf(": %s", events[i].description);
  466. }
  467. if (types) {
  468. for (j = 0; types[j].name; j++) {
  469. if (types[j].evid & events[i].evid) {
  470. printf("\n %s", types[j].name);
  471. if ((types[j].description)&&(types[j].description[0])) {
  472. printf(": %s", types[j].description);
  473. }
  474. }
  475. }
  476. }
  477. }
  478. printf("\n");
  479. }
  480. }
  481. void Info(pcilib_t *handle, const pcilib_model_description_t *model_info) {
  482. int i, j;
  483. DIR *dir;
  484. void *plugin;
  485. const char *path;
  486. struct dirent *entry;
  487. const pcilib_model_description_t *info = NULL;
  488. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  489. const pcilib_pcie_link_info_t *link_info = pcilib_get_pcie_link_info(handle);
  490. path = getenv("PCILIB_PLUGIN_DIR");
  491. if (!path) path = PCILIB_PLUGIN_DIR;
  492. if (board_info)
  493. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x, Model: %s\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func, handle->model);
  494. if (link_info) {
  495. printf(" PCIe x%u (gen%u), DMA Payload: %u (of %u)\n", link_info->link_width, link_info->link_speed, 1<<link_info->payload, 1<<link_info->max_payload);
  496. }
  497. if (board_info)
  498. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  499. List(handle, model_info, (char*)-1, 0);
  500. printf("\n");
  501. printf("Available models:\n");
  502. dir = opendir(path);
  503. if (dir) {
  504. while ((entry = readdir(dir))) {
  505. const char *suffix = strstr(entry->d_name, ".so");
  506. if ((!suffix)||(strlen(suffix) != 3)) continue;
  507. plugin = pcilib_plugin_load(entry->d_name);
  508. if (plugin) {
  509. info = pcilib_get_plugin_model(handle, plugin, 0, 0, NULL);
  510. if (info) {
  511. printf(" %s\n", entry->d_name);
  512. for (j = 0; info[j].name; j++) {
  513. pcilib_version_t version = info[j].api->version;
  514. printf(" %-12s %u.%u.%u - %s\n", info[j].name,
  515. PCILIB_VERSION_GET_MAJOR(version),
  516. PCILIB_VERSION_GET_MINOR(version),
  517. PCILIB_VERSION_GET_MICRO(version),
  518. info[j].description?info[j].description:"");
  519. }
  520. }
  521. pcilib_plugin_close(plugin);
  522. } else {
  523. const char *msg = dlerror();
  524. if (msg)
  525. printf(" %s: %s\n", entry->d_name, msg);
  526. }
  527. }
  528. closedir(dir);
  529. }
  530. // printf(" XML\n");
  531. printf(" Internal Models\n");
  532. for (i = 0; pcilib_dma[i].api; i++)
  533. printf(" %-12s - %s\n", pcilib_dma[i].name, pcilib_dma[i].description?pcilib_dma[i].description:"");
  534. printf(" %-12s - Plain PCI-access model\n\n", "pci");
  535. }
  536. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  537. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  538. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  539. int err;
  540. int i, j, errors;
  541. void *data, *buf, *check;
  542. void *fifo = NULL;
  543. struct timeval start, end;
  544. unsigned long time;
  545. size_t size, min_size, max_size;
  546. double mbs_in, mbs_out, mbs;
  547. size_t irqs;
  548. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  549. if (mode == ACCESS_CONFIG)
  550. Error("No benchmarking of configuration space acess is allowed");
  551. if (mode == ACCESS_DMA) {
  552. if (n) {
  553. min_size = n * access;
  554. max_size = n * access;
  555. } else {
  556. min_size = 1024;
  557. max_size = BENCH_MAX_DMA_SIZE;
  558. }
  559. for (size = min_size; size <= max_size; size *= 4) {
  560. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  561. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  562. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  563. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  564. if (err) irqs = 0;
  565. printf("%8zu KB - ", size / 1024);
  566. printf("RW: ");
  567. if (mbs < 0) printf("failed ... ");
  568. else printf("%8.2lf MB/s", mbs);
  569. printf(", R: ");
  570. if (mbs_in < 0) printf("failed ... ");
  571. else printf("%8.2lf MB/s", mbs_in);
  572. printf(", W: ");
  573. if (mbs_out < 0) printf("failed ... ");
  574. else printf("%8.2lf MB/s", mbs_out);
  575. if (irqs) {
  576. printf(", IRQs: %lu", irqs);
  577. }
  578. printf("\n");
  579. }
  580. return 0;
  581. }
  582. if (bar == PCILIB_BAR_INVALID) {
  583. unsigned long maxlength = 0;
  584. for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
  585. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  586. bar = i;
  587. break;
  588. }
  589. if (board_info->bar_length[i] > maxlength) {
  590. maxlength = board_info->bar_length[i];
  591. bar = i;
  592. }
  593. }
  594. if (bar < 0) Error("Data banks are not available");
  595. }
  596. if (n) {
  597. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  598. min_size = n * access;
  599. max_size = n * access;
  600. } else {
  601. min_size = access;
  602. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  603. else max_size = BENCH_MAX_FIFO_SIZE;
  604. }
  605. err = posix_memalign( (void**)&buf, 256, max_size );
  606. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  607. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  608. data = pcilib_map_bar(handle, bar);
  609. if (!data) Error("Can't map bar %i", bar);
  610. if (mode == ACCESS_FIFO) {
  611. fifo = data + (addr - board_info->bar_start[bar]) + (board_info->bar_start[bar] & pcilib_get_page_mask());
  612. // pcilib_resolve_register_address(handle, bar, addr);
  613. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  614. }
  615. if (mode == ACCESS_FIFO)
  616. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  617. else
  618. printf("Transfer time (Bank: %i):\n", bar);
  619. for (size = min_size ; size < max_size; size *= 8) {
  620. gettimeofday(&start,NULL);
  621. if (mode == ACCESS_BAR) {
  622. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  623. pcilib_memcpy(buf, data, size);
  624. }
  625. } else {
  626. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  627. for (j = 0; j < (size/access); j++) {
  628. pcilib_memcpy(buf + j * access, fifo, access);
  629. }
  630. }
  631. }
  632. gettimeofday(&end,NULL);
  633. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  634. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  635. fflush(0);
  636. gettimeofday(&start,NULL);
  637. if (mode == ACCESS_BAR) {
  638. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  639. pcilib_memcpy(data, buf, size);
  640. }
  641. } else {
  642. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  643. for (j = 0; j < (size/access); j++) {
  644. pcilib_memcpy(fifo, buf + j * access, access);
  645. }
  646. }
  647. }
  648. gettimeofday(&end,NULL);
  649. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  650. printf(", write: %8.2lf MB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  651. }
  652. pcilib_unmap_bar(handle, bar, data);
  653. printf("\n\nOpen-Transfer-Close time: \n");
  654. for (size = 4 ; size < max_size; size *= 8) {
  655. gettimeofday(&start,NULL);
  656. if (mode == ACCESS_BAR) {
  657. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  658. pcilib_read(handle, bar, 0, size, buf);
  659. }
  660. } else {
  661. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  662. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  663. }
  664. }
  665. gettimeofday(&end,NULL);
  666. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  667. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  668. fflush(0);
  669. gettimeofday(&start,NULL);
  670. if (mode == ACCESS_BAR) {
  671. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  672. pcilib_write(handle, bar, 0, size, buf);
  673. }
  674. } else {
  675. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  676. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  677. }
  678. }
  679. gettimeofday(&end,NULL);
  680. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  681. printf(", write: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  682. if (mode == ACCESS_BAR) {
  683. gettimeofday(&start,NULL);
  684. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  685. pcilib_write(handle, bar, 0, size, buf);
  686. pcilib_read(handle, bar, 0, size, check);
  687. if (memcmp(buf, check, size)) ++errors;
  688. }
  689. gettimeofday(&end,NULL);
  690. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  691. printf(", write-verify: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  692. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  693. }
  694. printf("\n");
  695. }
  696. printf("\n\n");
  697. free(check);
  698. free(buf);
  699. return 0;
  700. }
  701. #define pci2host16(endianess, value) endianess?
  702. /*
  703. typedef struct {
  704. size_t size;
  705. void *data;
  706. size_t pos;
  707. int multi_mode;
  708. } DMACallbackContext;
  709. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  710. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  711. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  712. ctx->size *= 2;
  713. ctx->data = realloc(ctx->data, ctx->size);
  714. if (!ctx->data) {
  715. Error("Allocation of %i bytes of memory have failed", ctx->size);
  716. return 0;
  717. }
  718. }
  719. memcpy(ctx->data + ctx->pos, buf, bufsize);
  720. ctx->pos += bufsize;
  721. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  722. return 1;
  723. }
  724. */
  725. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  726. void *buf;
  727. int i, err;
  728. size_t ret, bytes;
  729. size_t size = n * abs(access);
  730. int block_width, blocks_per_line;
  731. int numbers_per_block, numbers_per_line;
  732. pcilib_dma_engine_t dmaid;
  733. pcilib_dma_flags_t dma_flags = 0;
  734. int fd;
  735. char stmp[256];
  736. struct stat st;
  737. const pcilib_board_info_t *board_info;
  738. numbers_per_block = BLOCK_SIZE / access;
  739. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  740. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  741. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  742. numbers_per_line = blocks_per_line * numbers_per_block;
  743. if (size) {
  744. buf = malloc(size);
  745. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  746. } else {
  747. buf = NULL;
  748. }
  749. switch (mode) {
  750. case ACCESS_DMA:
  751. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  752. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  753. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  754. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  755. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  756. if (size) {
  757. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  758. if (err) Error("Error (%i) is reported by DMA engine", err);
  759. } else {
  760. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  761. size = 2048; bytes = 0;
  762. do {
  763. size *= 2;
  764. buf = realloc(buf, size);
  765. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  766. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  767. bytes += ret;
  768. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  769. err = PCILIB_ERROR_TOOBIG;
  770. if ((flags&FLAG_WAIT)==0) timeout = 0;
  771. }
  772. } while (err == PCILIB_ERROR_TOOBIG);
  773. }
  774. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  775. Error("Error (%i) during DMA read", err);
  776. }
  777. if (bytes <= 0) {
  778. pcilib_warning("No data is returned by DMA engine");
  779. return -1;
  780. }
  781. size = bytes;
  782. n = bytes / abs(access);
  783. addr = 0;
  784. break;
  785. case ACCESS_FIFO:
  786. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  787. addr = 0;
  788. break;
  789. case ACCESS_CONFIG:
  790. board_info = pcilib_get_board_info(handle);
  791. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  792. fd = open(stmp, O_RDONLY);
  793. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  794. if (st.st_size < addr)
  795. Error("Access beyond the end of PCI configuration space");
  796. if (st.st_size < (addr + size)) {
  797. n = (st.st_size - addr) / abs(access);
  798. size = n * abs(access);
  799. if (!n) Error("Access beyond the end of PCI configuration space");
  800. }
  801. lseek(fd, addr, SEEK_SET);
  802. ret = read(fd, buf, size);
  803. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  804. if (ret < size) {
  805. size = ret;
  806. n = ret / abs(access);
  807. }
  808. close(fd);
  809. break;
  810. default:
  811. pcilib_read(handle, bar, addr, size, buf);
  812. }
  813. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  814. if (o) {
  815. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  816. fwrite(buf, abs(access), n, o);
  817. } else {
  818. for (i = 0; i < n; i++) {
  819. if (i) {
  820. if (i%numbers_per_line == 0) printf("\n");
  821. else {
  822. printf("%*s", SEPARATOR_WIDTH, "");
  823. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  824. }
  825. }
  826. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  827. switch (access) {
  828. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  829. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  830. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  831. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  832. }
  833. }
  834. printf("\n\n");
  835. }
  836. free(buf);
  837. return 0;
  838. }
  839. int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg) {
  840. int i;
  841. int err;
  842. const char *format;
  843. pcilib_register_bank_t bank_id;
  844. pcilib_register_bank_addr_t bank_addr = 0;
  845. pcilib_register_value_t value;
  846. if (reg) {
  847. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  848. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
  849. format = model_info->banks[bank_id].format;
  850. if (!format) format = "%lu";
  851. err = pcilib_read_register_by_id(handle, regid, &value);
  852. // err = pcilib_read_register(handle, bank, reg, &value);
  853. if (err) printf("Error reading register %s\n", reg);
  854. else {
  855. printf("%s = ", reg);
  856. printf(format, value);
  857. printf("\n");
  858. }
  859. } else {
  860. // Adding DMA registers
  861. pcilib_get_dma_description(handle);
  862. if (model_info->registers) {
  863. if (bank) {
  864. bank_id = pcilib_find_register_bank(handle, bank);
  865. bank_addr = model_info->banks[bank_id].addr;
  866. }
  867. printf("Registers:\n");
  868. for (i = 0; model_info->registers[i].bits; i++) {
  869. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  870. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
  871. format = model_info->banks[bank_id].format;
  872. if (!format) format = "%lu";
  873. err = pcilib_read_register_by_id(handle, i, &value);
  874. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  875. else {
  876. printf(" %s = ", model_info->registers[i].name);
  877. printf(format, value);
  878. }
  879. printf(" [");
  880. printf(format, model_info->registers[i].defvalue);
  881. printf("]");
  882. printf("\n");
  883. }
  884. }
  885. } else {
  886. printf("No registers");
  887. }
  888. printf("\n");
  889. }
  890. return 0;
  891. }
  892. #define WRITE_REGVAL(buf, n, access, o) {\
  893. uint##access##_t tbuf[n]; \
  894. for (i = 0; i < n; i++) { \
  895. tbuf[i] = (uint##access##_t)buf[i]; \
  896. } \
  897. fwrite(tbuf, access/8, n, o); \
  898. }
  899. int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  900. int err;
  901. int i;
  902. const pcilib_register_bank_description_t *banks = model_info->banks;
  903. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  904. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  905. if (bank) Error("Invalid register bank is specified (%s)", bank);
  906. else Error("Register bank should be specified");
  907. }
  908. int access = banks[bank_id].access / 8;
  909. // int size = n * abs(access);
  910. int block_width, blocks_per_line;
  911. int numbers_per_block, numbers_per_line;
  912. numbers_per_block = BLOCK_SIZE / access;
  913. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  914. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  915. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  916. numbers_per_line = blocks_per_line * numbers_per_block;
  917. pcilib_register_value_t buf[n];
  918. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  919. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  920. if (o) {
  921. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  922. switch (access) {
  923. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  924. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  925. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  926. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  927. }
  928. } else {
  929. for (i = 0; i < n; i++) {
  930. if (i) {
  931. if (i%numbers_per_line == 0) printf("\n");
  932. else {
  933. printf("%*s", SEPARATOR_WIDTH, "");
  934. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  935. }
  936. }
  937. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  938. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  939. }
  940. printf("\n\n");
  941. }
  942. return 0;
  943. }
  944. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  945. int read_back = 0;
  946. void *buf, *check;
  947. int res = 0, i, err;
  948. int size = n * abs(access);
  949. size_t ret;
  950. pcilib_dma_engine_t dmaid;
  951. if (mode == ACCESS_CONFIG)
  952. Error("Writting to PCI configuration space is not supported");
  953. err = posix_memalign( (void**)&buf, 256, size );
  954. if (!err) err = posix_memalign( (void**)&check, 256, size );
  955. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  956. for (i = 0; i < n; i++) {
  957. switch (access) {
  958. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  959. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  960. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  961. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  962. default: Error("Unexpected data size (%lu)", access);
  963. }
  964. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  965. }
  966. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  967. switch (mode) {
  968. case ACCESS_DMA:
  969. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  970. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  971. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  972. if ((err)||(ret != size)) {
  973. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  974. else if (err) Error("DMA engine returned a error while writing the data");
  975. else if (!ret) Error("No data is written by DMA engine");
  976. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  977. }
  978. break;
  979. case ACCESS_FIFO:
  980. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  981. break;
  982. default:
  983. pcilib_write(handle, bar, addr, size, buf);
  984. if (verify) {
  985. pcilib_read(handle, bar, addr, size, check);
  986. read_back = 1;
  987. }
  988. }
  989. if ((read_back)&&(memcmp(buf, check, size))) {
  990. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  991. if (endianess) pcilib_swap(check, check, abs(access), n);
  992. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  993. exit(-1);
  994. }
  995. free(check);
  996. free(buf);
  997. return 0;
  998. }
  999. int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  1000. pcilib_register_value_t *buf, *check;
  1001. int res, i, err;
  1002. unsigned long value;
  1003. int size = n * sizeof(pcilib_register_value_t);
  1004. err = posix_memalign( (void**)&buf, 256, size );
  1005. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1006. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1007. for (i = 0; i < n; i++) {
  1008. res = sscanf(data[i], "%lx", &value);
  1009. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1010. buf[i] = value;
  1011. }
  1012. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  1013. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1014. err = pcilib_read_register_space(handle, bank, addr, n, check);
  1015. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1016. if (memcmp(buf, check, size)) {
  1017. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1018. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  1019. exit(-1);
  1020. }
  1021. free(check);
  1022. free(buf);
  1023. return 0;
  1024. }
  1025. int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, char ** data) {
  1026. int err;
  1027. unsigned long val;
  1028. pcilib_register_value_t value;
  1029. const char *format = NULL;
  1030. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1031. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  1032. /*
  1033. pcilib_register_bank_t bank_id;
  1034. pcilib_register_bank_addr_t bank_addr;
  1035. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  1036. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  1037. format = model_info->banks[bank_id].format;
  1038. if (!format) format = "%lu";
  1039. */
  1040. if (isnumber(*data)) {
  1041. if (sscanf(*data, "%li", &val) != 1) {
  1042. Error("Can't parse data value (%s) is not valid decimal number", *data);
  1043. }
  1044. format = "%li";
  1045. } else if (isxnumber(*data)) {
  1046. if (sscanf(*data, "%lx", &val) != 1) {
  1047. Error("Can't parse data value (%s) is not valid decimal number", *data);
  1048. }
  1049. format = "0x%lx";
  1050. } else {
  1051. Error("Can't parse data value (%s) is not valid decimal number", *data);
  1052. }
  1053. value = val;
  1054. err = pcilib_write_register(handle, bank, reg, value);
  1055. if (err) Error("Error writting register %s\n", reg);
  1056. if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) {
  1057. err = pcilib_read_register(handle, bank, reg, &value);
  1058. if (err) Error("Error reading back register %s for verification\n", reg);
  1059. if (val != value) {
  1060. Error("Failed to write register %s: %lu is written and %lu is read back", reg, val, value);
  1061. } else {
  1062. printf("%s = ", reg);
  1063. printf(format, value);
  1064. printf("\n");
  1065. }
  1066. } else {
  1067. printf("%s is written\n ", reg);
  1068. }
  1069. return 0;
  1070. }
  1071. typedef struct {
  1072. pcilib_t *handle;
  1073. pcilib_event_t event;
  1074. pcilib_event_data_type_t data;
  1075. fastwriter_t *writer;
  1076. int verbose;
  1077. pcilib_timeout_t timeout;
  1078. size_t run_time;
  1079. size_t trigger_time;
  1080. size_t max_triggers;
  1081. pcilib_event_flags_t flags;
  1082. FORMAT format;
  1083. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1084. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1085. volatile int started; /**< Indicates that recording is started */
  1086. volatile int run_flag;
  1087. volatile int writing_flag;
  1088. struct timeval first_frame;
  1089. struct timeval last_frame;
  1090. size_t last_num, last_id;
  1091. size_t trigger_failed;
  1092. size_t trigger_count;
  1093. size_t event_count; /**< Total number of events (including bad ones, but excluding events expected, but not reported by hardware) */
  1094. size_t incomplete_count; /**< Broken events, we even can't extract appropriate block of raw data */
  1095. size_t broken_count; /**< Broken events, error while decoding in the requested format */
  1096. size_t empty_count; /**< Broken events, no associated data or unknown */
  1097. size_t missing_count; /**< Missing events, not received from the hardware */
  1098. size_t dropped_count; /**< Missing events, dropped due slow decoding/copying performance */
  1099. size_t storage_count; /**< Missing events, dropped due to slowness of the storage subsystem */
  1100. struct timeval start_time;
  1101. struct timeval stop_time;
  1102. } GRABContext;
  1103. int GrabCallback(pcilib_event_id_t event_id, pcilib_event_info_t *info, void *user) {
  1104. int err = 0;
  1105. void *data;
  1106. size_t size;
  1107. GRABContext *ctx = (GRABContext*)user;
  1108. pcilib_t *handle = ctx->handle;
  1109. gettimeofday(&ctx->last_frame, NULL);
  1110. if (!ctx->event_count) {
  1111. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1112. }
  1113. ctx->event_pending = 0;
  1114. ctx->event_count++;
  1115. if (ctx->last_num) {
  1116. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1117. ctx->missing_count += missing_count;
  1118. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1119. if (missing_count)
  1120. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu (hwid: %zu) and %zu (hwid: %zu)", missing_count, ctx->last_id, ctx->last_num, event_id, info->seqnum);
  1121. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1122. }
  1123. ctx->last_num = info->seqnum;
  1124. ctx->last_id = event_id;
  1125. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1126. ctx->incomplete_count++;
  1127. return PCILIB_STREAMING_CONTINUE;
  1128. }
  1129. switch (ctx->format) {
  1130. case FORMAT_DEFAULT:
  1131. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_DATA, &size);
  1132. break;
  1133. default:
  1134. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_RAW_DATA, &size);
  1135. }
  1136. if (!data) {
  1137. int err = (int)size;
  1138. switch (err) {
  1139. case PCILIB_ERROR_OVERWRITTEN:
  1140. ctx->dropped_count++;
  1141. break;
  1142. case PCILIB_ERROR_INVALID_DATA:
  1143. ctx->broken_count++;
  1144. break;
  1145. default:
  1146. ctx->empty_count++;
  1147. }
  1148. return PCILIB_STREAMING_CONTINUE;
  1149. }
  1150. if (ctx->format == FORMAT_HEADER) {
  1151. uint64_t header[8];
  1152. header[0] = info->type;
  1153. header[1] = ctx->data;
  1154. header[2] = 0;
  1155. header[3] = size;
  1156. header[4] = info->seqnum;
  1157. header[5] = info->offset;
  1158. memcpy(header + 6, &info->timestamp, 16);
  1159. err = fastwriter_push(ctx->writer, 64, header);
  1160. }
  1161. if (!err)
  1162. err = fastwriter_push(ctx->writer, size, data);
  1163. if (err) {
  1164. fastwriter_cancel(ctx->writer);
  1165. if (err != EWOULDBLOCK)
  1166. Error("Storage error %i", err);
  1167. ctx->storage_count++;
  1168. pcilib_return_data(handle, event_id, ctx->data, data);
  1169. return PCILIB_STREAMING_CONTINUE;
  1170. }
  1171. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1172. if (err) {
  1173. ctx->dropped_count++;
  1174. fastwriter_cancel(ctx->writer);
  1175. return PCILIB_STREAMING_CONTINUE;
  1176. }
  1177. err = fastwriter_commit(ctx->writer);
  1178. if (err) Error("Error commiting data to storage, Error: %i", err);
  1179. return PCILIB_STREAMING_CONTINUE;
  1180. }
  1181. int raw_data(pcilib_event_id_t event_id, pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1182. int err;
  1183. GRABContext *ctx = (GRABContext*)user;
  1184. // pcilib_t *handle = ctx->handle;
  1185. if ((info)&&(info->seqnum != ctx->last_num)) {
  1186. gettimeofday(&ctx->last_frame, NULL);
  1187. if (!ctx->event_count) {
  1188. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1189. }
  1190. ctx->event_count++;
  1191. if (ctx->last_num) {
  1192. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1193. ctx->missing_count += missing_count;
  1194. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1195. if (missing_count)
  1196. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu and %zu", missing_count, ctx->last_num, info->seqnum);
  1197. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1198. }
  1199. ctx->last_num = info->seqnum;
  1200. }
  1201. err = fastwriter_push_data(ctx->writer, size, data);
  1202. if (err) {
  1203. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1204. Error("Storage error %i", err);
  1205. }
  1206. return PCILIB_STREAMING_CONTINUE;
  1207. }
  1208. void *Trigger(void *user) {
  1209. int err;
  1210. struct timeval start;
  1211. GRABContext *ctx = (GRABContext*)user;
  1212. size_t trigger_time = ctx->trigger_time;
  1213. size_t max_triggers = ctx->max_triggers;
  1214. ctx->trigger_thread_started = 1;
  1215. ctx->event_pending = 1;
  1216. while (!ctx->started) ;
  1217. gettimeofday(&start, NULL);
  1218. do {
  1219. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1220. if (err) ctx->trigger_failed++;
  1221. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1222. if (trigger_time) {
  1223. pcilib_add_timeout(&start, trigger_time);
  1224. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1225. pcilib_sleep_until_deadline(&start);
  1226. } else {
  1227. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1228. ctx->event_pending = 1;
  1229. }
  1230. } while (ctx->run_flag);
  1231. ctx->trigger_thread_started = 0;
  1232. return NULL;
  1233. }
  1234. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1235. int verbose;
  1236. pcilib_timeout_t duration, fps_duration;
  1237. struct timeval cur;
  1238. double fps = 0, good_fps = 0;
  1239. size_t total, good, pending = 0;
  1240. verbose = ctx->verbose;
  1241. if (end_time) {
  1242. if (verbose++) {
  1243. printf("-------------------------------------------------------------------------------\n");
  1244. }
  1245. } else {
  1246. gettimeofday(&cur, NULL);
  1247. end_time = &cur;
  1248. }
  1249. // if ((ctx->event_count + ctx->missing_count) == 0)
  1250. // return;
  1251. duration = pcilib_timediff(&ctx->start_time, end_time);
  1252. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1253. if (ctx->trigger_count) {
  1254. total = ctx->trigger_count;
  1255. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1256. } else {
  1257. total = ctx->event_count + ctx->missing_count;
  1258. }
  1259. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count - ctx->empty_count - ctx->dropped_count;
  1260. if (ctx->event_count > 1) {
  1261. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1262. }
  1263. if (good > 1) {
  1264. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1265. }
  1266. printf("Run: ");
  1267. PrintTime(duration);
  1268. if (ctx->trigger_count) {
  1269. printf(", Triggers: ");
  1270. PrintNumber(ctx->trigger_count);
  1271. }
  1272. printf(", Captured: ");
  1273. PrintNumber(ctx->event_count);
  1274. printf(" FPS %5.0lf", fps);
  1275. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1276. printf(", Stored: ");
  1277. PrintNumber(good);
  1278. printf(" FPS %5.0lf", good_fps);
  1279. }
  1280. printf("\n");
  1281. if (verbose > 2) {
  1282. if (ctx->trigger_count) {
  1283. printf("Trig: ");
  1284. PrintNumber(ctx->trigger_count);
  1285. printf(" Issued: ");
  1286. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1287. printf(" (");
  1288. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1289. printf("%%) Failed: ");
  1290. PrintNumber(ctx->trigger_failed);
  1291. printf( " (");
  1292. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1293. printf( "%%); Pending: ");
  1294. PrintNumber(pending);
  1295. printf( " (");
  1296. PrintPercent(pending, ctx->trigger_count);
  1297. printf( "%%)\n");
  1298. }
  1299. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1300. printf("Captured: ");
  1301. PrintNumber(good);
  1302. } else {
  1303. printf("Good: ");
  1304. PrintNumber(good);
  1305. printf(", Dropped: ");
  1306. PrintNumber(ctx->dropped_count + ctx->storage_count);
  1307. printf(", Bad: ");
  1308. PrintNumber(ctx->incomplete_count + ctx->broken_count);
  1309. printf(", Empty: ");
  1310. PrintNumber(ctx->empty_count);
  1311. }
  1312. printf(", Lost: ");
  1313. PrintNumber(ctx->missing_count);
  1314. printf("\n");
  1315. }
  1316. if (verbose > 1) {
  1317. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1318. printf("Captured: ");
  1319. PrintPercent(good, total);
  1320. } else {
  1321. printf("Good: ");
  1322. PrintPercent(good, total);
  1323. printf("%% Dropped: ");
  1324. PrintPercent(ctx->dropped_count + ctx->storage_count, total);
  1325. printf("%% Bad: ");
  1326. PrintPercent(ctx->incomplete_count + ctx->broken_count, total);
  1327. printf("%% Empty: ");
  1328. PrintPercent(ctx->empty_count, total);
  1329. }
  1330. printf("%% Lost: ");
  1331. PrintPercent(ctx->missing_count, total);
  1332. printf("%%");
  1333. printf("\n");
  1334. }
  1335. }
  1336. void StorageStats(GRABContext *ctx) {
  1337. int err;
  1338. fastwriter_stats_t st;
  1339. pcilib_timeout_t duration;
  1340. struct timeval cur;
  1341. gettimeofday(&cur, NULL);
  1342. duration = pcilib_timediff(&ctx->start_time, &cur);
  1343. err = fastwriter_get_stats(ctx->writer, &st);
  1344. if (err) return;
  1345. printf("Wrote ");
  1346. PrintSize(st.written);
  1347. printf(" of ");
  1348. PrintSize(st.commited);
  1349. printf(" at ");
  1350. PrintSize(1000000.*st.written / duration);
  1351. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1352. printf(" of ");
  1353. PrintSize(st.buffer_size);
  1354. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1355. }
  1356. void *Monitor(void *user) {
  1357. struct timeval deadline;
  1358. struct timeval nextinfo;
  1359. GRABContext *ctx = (GRABContext*)user;
  1360. int verbose = ctx->verbose;
  1361. pcilib_timeout_t timeout = ctx->timeout;
  1362. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1363. // while (!ctx->started);
  1364. if (timeout) {
  1365. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1366. pcilib_add_timeout(&deadline, timeout);
  1367. }
  1368. if (verbose > 0) {
  1369. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1370. }
  1371. while (ctx->run_flag) {
  1372. if (StopFlag) {
  1373. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1374. break;
  1375. }
  1376. if (timeout) {
  1377. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1378. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1379. pcilib_add_timeout(&deadline, timeout);
  1380. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1381. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1382. break;
  1383. }
  1384. }
  1385. }
  1386. if (verbose > 0) {
  1387. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1388. GrabStats(ctx, NULL);
  1389. StorageStats(ctx);
  1390. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1391. }
  1392. }
  1393. usleep(100000);
  1394. }
  1395. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1396. while (ctx->writing_flag) {
  1397. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1398. if (verbose >= 0) StorageStats(ctx);
  1399. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1400. }
  1401. usleep(100000);
  1402. }
  1403. return NULL;
  1404. }
  1405. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1406. int err;
  1407. GRABContext ctx;
  1408. // void *data = NULL;
  1409. // size_t size, written;
  1410. pcilib_event_t event;
  1411. pcilib_event_t listen_events;
  1412. pcilib_event_data_type_t data;
  1413. pthread_t monitor_thread;
  1414. pthread_t trigger_thread;
  1415. pthread_attr_t attr;
  1416. struct sched_param sched;
  1417. struct timeval end_time;
  1418. pcilib_event_flags_t flags;
  1419. if (evname) {
  1420. event = pcilib_find_event(handle, evname);
  1421. if (event == PCILIB_EVENT_INVALID)
  1422. Error("Can't find event (%s)", evname);
  1423. listen_events = event;
  1424. } else {
  1425. listen_events = PCILIB_EVENTS_ALL;
  1426. event = PCILIB_EVENT0;
  1427. }
  1428. if (data_type) {
  1429. data = pcilib_find_event_data_type(handle, event, data_type);
  1430. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1431. Error("Can't find data type (%s)", data_type);
  1432. } else {
  1433. data = PCILIB_EVENT_DATA;
  1434. }
  1435. memset(&ctx, 0, sizeof(GRABContext));
  1436. ctx.handle = handle;
  1437. ctx.event = event;
  1438. ctx.data = data;
  1439. ctx.run_time = run_time;
  1440. ctx.timeout = timeout;
  1441. ctx.format = format;
  1442. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1443. else ctx.verbose = 0;
  1444. if (grab_mode&GRAB_MODE_GRAB) {
  1445. ctx.writer = fastwriter_init(output, 0);
  1446. if (!ctx.writer)
  1447. Error("Can't initialize fastwritter library");
  1448. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1449. err = fastwriter_open(ctx.writer, output, 0);
  1450. if (err)
  1451. Error("Error opening file (%s), Error: %i\n", output, err);
  1452. ctx.writing_flag = 1;
  1453. }
  1454. ctx.run_flag = 1;
  1455. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1456. if (data == PCILIB_EVENT_RAW_DATA) {
  1457. if (format == FORMAT_RAW) {
  1458. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1459. }
  1460. } else {
  1461. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1462. }
  1463. ctx.flags = flags;
  1464. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1465. pcilib_configure_autostop(handle, num, run_time);
  1466. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1467. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1468. }
  1469. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1470. pcilib_configure_preprocessing_threads(handle, threads);
  1471. }
  1472. if (grab_mode&GRAB_MODE_TRIGGER) {
  1473. if (trigger_time) {
  1474. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1475. timeout = 2 * trigger_time;
  1476. ctx.timeout = timeout;
  1477. }
  1478. } else {
  1479. // Otherwise, we will trigger next event after previous one is read
  1480. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1481. }
  1482. ctx.max_triggers = num;
  1483. ctx.trigger_count = 0;
  1484. ctx.trigger_time = trigger_time;
  1485. // We don't really care if RT priority is imposible
  1486. pthread_attr_init(&attr);
  1487. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1488. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1489. pthread_attr_setschedparam(&attr, &sched);
  1490. }
  1491. // Start triggering thread and wait until it is schedulled
  1492. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1493. Error("Error spawning trigger thread");
  1494. while (!ctx.trigger_thread_started) usleep(10);
  1495. }
  1496. gettimeofday(&ctx.start_time, NULL);
  1497. if (grab_mode&GRAB_MODE_GRAB) {
  1498. err = pcilib_start(handle, listen_events, flags);
  1499. if (err) Error("Failed to start event engine, error %i", err);
  1500. }
  1501. ctx.started = 1;
  1502. if (run_time) {
  1503. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1504. if (ctx.stop_time.tv_usec > 999999) {
  1505. ctx.stop_time.tv_usec -= 1000000;
  1506. __sync_synchronize();
  1507. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1508. } else {
  1509. __sync_synchronize();
  1510. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1511. }
  1512. }
  1513. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1514. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1515. Error("Error spawning monitoring thread");
  1516. if (grab_mode&GRAB_MODE_GRAB) {
  1517. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1518. if (err) Error("Error streaming events, error %i", err);
  1519. }
  1520. ctx.run_flag = 0;
  1521. if (grab_mode&GRAB_MODE_TRIGGER) {
  1522. while (ctx.trigger_thread_started) usleep(10);
  1523. }
  1524. if (grab_mode&GRAB_MODE_GRAB) {
  1525. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1526. }
  1527. gettimeofday(&end_time, NULL);
  1528. if (grab_mode&GRAB_MODE_TRIGGER) {
  1529. pthread_join(trigger_thread, NULL);
  1530. }
  1531. if (grab_mode&GRAB_MODE_GRAB) {
  1532. if (verbose >= 0)
  1533. printf("Grabbing is finished, flushing results....\n");
  1534. err = fastwriter_close(ctx.writer);
  1535. if (err) Error("Storage problems, error %i", err);
  1536. }
  1537. ctx.writing_flag = 0;
  1538. pthread_join(monitor_thread, NULL);
  1539. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1540. GrabStats(&ctx, &end_time);
  1541. StorageStats(&ctx);
  1542. }
  1543. fastwriter_destroy(ctx.writer);
  1544. return 0;
  1545. }
  1546. int StartStopDMA(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1547. int err;
  1548. pcilib_dma_engine_t dmaid;
  1549. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1550. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  1551. if (start) Error("DMA engine should be specified");
  1552. for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
  1553. err = pcilib_start_dma(handle, dmaid, 0);
  1554. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1555. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1556. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1557. }
  1558. return 0;
  1559. }
  1560. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1561. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1562. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1563. if (start) {
  1564. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1565. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1566. } else {
  1567. err = pcilib_start_dma(handle, dmaid, 0);
  1568. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1569. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1570. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1571. }
  1572. }
  1573. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1574. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1575. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1576. if (start) {
  1577. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1578. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1579. } else {
  1580. err = pcilib_start_dma(handle, dmaid, 0);
  1581. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1582. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1583. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1584. }
  1585. }
  1586. return 0;
  1587. }
  1588. typedef struct {
  1589. pcilib_kmem_use_t use;
  1590. int referenced;
  1591. int hw_lock;
  1592. int reusable;
  1593. int persistent;
  1594. int open;
  1595. size_t count;
  1596. size_t size;
  1597. } kmem_use_info_t;
  1598. #define MAX_USES 64
  1599. pcilib_kmem_use_t ParseUse(const char *use) {
  1600. unsigned long utmp;
  1601. if (use) {
  1602. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1603. if (strlen(use) < 5)
  1604. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1605. else
  1606. return utmp;
  1607. }
  1608. Error("Kernel memory use is not specified");
  1609. return 0;
  1610. }
  1611. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1612. size_t i, n = *n_uses;
  1613. if (uses[n - 1].use == use) return n - 1;
  1614. for (i = 1; i < (n - 1); i++) {
  1615. if (uses[i].use == use) return i;
  1616. }
  1617. if (n == MAX_USES) return 0;
  1618. memset(&uses[n], 0, sizeof(kmem_use_info_t));
  1619. uses[n].use = use;
  1620. return (*n_uses)++;
  1621. }
  1622. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1623. size_t i;
  1624. for (i = 0; i < n_uses; i++) {
  1625. if (uses[i].use == use) {
  1626. if (uses[i].count) return uses + i;
  1627. else return NULL;
  1628. }
  1629. }
  1630. return NULL;
  1631. }
  1632. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  1633. DIR *dir;
  1634. struct dirent *entry;
  1635. const char *pos;
  1636. char sysdir[256];
  1637. char fname[256];
  1638. char info[256];
  1639. size_t useid, n_uses = 1; // Use 0 is for others
  1640. memset(uses, 0, sizeof(kmem_use_info_t));
  1641. pos = strrchr(device, '/');
  1642. if (pos) ++pos;
  1643. else pos = device;
  1644. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1645. dir = opendir(sysdir);
  1646. if (!dir) Error("Can't open directory (%s)", sysdir);
  1647. while ((entry = readdir(dir)) != NULL) {
  1648. FILE *f;
  1649. unsigned long use = 0;
  1650. unsigned long size = 0;
  1651. unsigned long refs = 0;
  1652. unsigned long mode = 0;
  1653. unsigned long hwref = 0;
  1654. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1655. if (!isnumber(entry->d_name+4)) continue;
  1656. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1657. f = fopen(fname, "r");
  1658. if (!f) Error("Can't access file (%s)", fname);
  1659. while(!feof(f)) {
  1660. if (!fgets(info, 256, f))
  1661. break;
  1662. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1663. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1664. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1665. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1666. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1667. }
  1668. fclose(f);
  1669. useid = FindUse(&n_uses, uses, use);
  1670. uses[useid].count++;
  1671. uses[useid].size += size;
  1672. if (refs) uses[useid].referenced = 1;
  1673. if (hwref) uses[useid].hw_lock = 1;
  1674. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  1675. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  1676. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  1677. }
  1678. closedir(dir);
  1679. *uses_number = n_uses;
  1680. return 0;
  1681. }
  1682. int ListKMEM(pcilib_t *handle, const char *device) {
  1683. int err;
  1684. char stmp[256];
  1685. size_t i, useid, n_uses;
  1686. kmem_use_info_t uses[MAX_USES];
  1687. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  1688. err = ParseKMEM(handle, device, &n_uses, uses);
  1689. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1690. if ((n_uses == 1)&&(uses[0].count == 0)) {
  1691. printf("No kernel memory is allocated\n");
  1692. return 0;
  1693. }
  1694. printf("Use Type Count Total Size REF Mode \n");
  1695. printf("--------------------------------------------------------------------------------\n");
  1696. for (useid = 0; useid < n_uses; useid++) {
  1697. if (useid + 1 == n_uses) {
  1698. if (!uses[0].count) continue;
  1699. i = 0;
  1700. } else i = useid + 1;
  1701. printf("%08x ", uses[i].use);
  1702. if (i) {
  1703. switch(PCILIB_KMEM_USE_TYPE(uses[i].use)) {
  1704. case PCILIB_KMEM_USE_DMA_RING:
  1705. printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1706. break;
  1707. case PCILIB_KMEM_USE_DMA_PAGES:
  1708. printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1709. break;
  1710. case PCILIB_KMEM_USE_SOFTWARE_REGISTERS: {
  1711. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  1712. if (bank == PCILIB_REGISTER_BANK_INVALID)
  1713. printf("SoftRegs (%8u)", PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  1714. else
  1715. printf("SoftRegs (%8s)", model_info->banks[bank].name);
  1716. break;
  1717. }
  1718. case PCILIB_KMEM_USE_LOCKS:
  1719. printf("Locks ");
  1720. break;
  1721. case PCILIB_KMEM_USE_USER:
  1722. printf("User %04x ", uses[i].use&0xFFFF);
  1723. break;
  1724. default:
  1725. printf (" ");
  1726. }
  1727. } else printf("All Others ");
  1728. printf(" ");
  1729. printf("%6zu", uses[i].count);
  1730. printf(" ");
  1731. printf("%10s", GetPrintSize(stmp, uses[i].size));
  1732. printf(" ");
  1733. if ((uses[i].referenced)&&(uses[i].hw_lock)) printf("HW+SW");
  1734. else if (uses[i].referenced) printf(" SW");
  1735. else if (uses[i].hw_lock) printf("HW ");
  1736. else printf(" - ");
  1737. printf(" ");
  1738. if (uses[i].persistent) printf("Persistent");
  1739. else if (uses[i].open) printf("Open ");
  1740. else if (uses[i].reusable) printf("Reusable ");
  1741. else printf("Closed ");
  1742. printf("\n");
  1743. }
  1744. printf("--------------------------------------------------------------------------------\n");
  1745. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  1746. return 0;
  1747. }
  1748. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  1749. int err;
  1750. size_t i, n;
  1751. pcilib_kmem_handle_t *kbuf;
  1752. pcilib_kmem_use_t useid = ParseUse(use);
  1753. size_t n_uses;
  1754. kmem_use_info_t uses[MAX_USES];
  1755. kmem_use_info_t *use_info;
  1756. if (block == (size_t)-1) {
  1757. err = ParseKMEM(handle, device, &n_uses, uses);
  1758. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1759. use_info = GetUse(n_uses, uses, useid);
  1760. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  1761. i = 0;
  1762. n = use_info->count;
  1763. } else {
  1764. i = block;
  1765. n = block + 1;
  1766. }
  1767. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1768. if (!kbuf) {
  1769. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  1770. return 0;
  1771. }
  1772. printf("Buffer Address Hardware Address Bus Address\n");
  1773. printf("--------------------------------------------------------------------------------\n");
  1774. for (; i < n; i++) {
  1775. void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  1776. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  1777. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  1778. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  1779. }
  1780. printf("\n");
  1781. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1782. return 0;
  1783. }
  1784. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  1785. int err;
  1786. void *data;
  1787. size_t size;
  1788. pcilib_kmem_handle_t *kbuf;
  1789. if (block == (size_t)-1) block = 0;
  1790. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1791. if (!kbuf) {
  1792. Error("The specified kernel buffer is not allocated\n");
  1793. return 0;
  1794. }
  1795. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  1796. if (err) {
  1797. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1798. Error("The synchronization of kernel buffer has failed\n");
  1799. return 0;
  1800. }
  1801. data = pcilib_kmem_get_block_ua(handle, kbuf, block);
  1802. if (data) {
  1803. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  1804. if ((max_size)&&(size > max_size)) size = max_size;
  1805. fwrite(data, 1, size, o?o:stdout);
  1806. } else {
  1807. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1808. Error("The specified block is not existing\n");
  1809. return 0;
  1810. }
  1811. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1812. return 0;
  1813. }
  1814. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  1815. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  1816. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  1817. pcilib_kmem_handle_t *kbuf;
  1818. pcilib_kmem_use_t useid = ParseUse(use);
  1819. long page_size = sysconf(_SC_PAGESIZE);
  1820. if (type) {
  1821. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  1822. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  1823. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  1824. else Error("Invalid memory type (%s) is specified", type);
  1825. }
  1826. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  1827. Error("Selected memory type does not allow custom size");
  1828. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  1829. if (!kbuf) Error("Allocation of kernel memory has failed");
  1830. pcilib_free_kernel_memory(handle, kbuf, flags);
  1831. return 0;
  1832. }
  1833. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  1834. int err;
  1835. int i;
  1836. pcilib_kmem_use_t useid;
  1837. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  1838. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  1839. if (!strcasecmp(use, "dma")) {
  1840. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  1841. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  1842. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  1843. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  1844. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  1845. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  1846. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  1847. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  1848. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  1849. }
  1850. return 0;
  1851. }
  1852. useid = ParseUse(use);
  1853. err = pcilib_clean_kernel_memory(handle, useid, flags);
  1854. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  1855. return 0;
  1856. }
  1857. int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
  1858. int err;
  1859. DIR *dir;
  1860. struct dirent *entry;
  1861. const char *pos;
  1862. char sysdir[256];
  1863. char fname[256];
  1864. char info[256];
  1865. char stmp[256];
  1866. pcilib_dma_engine_t dmaid;
  1867. pcilib_dma_engine_status_t status;
  1868. pos = strrchr(device, '/');
  1869. if (pos) ++pos;
  1870. else pos = device;
  1871. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1872. dir = opendir(sysdir);
  1873. if (!dir) Error("Can't open directory (%s)", sysdir);
  1874. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  1875. printf("--------------------------------------------------------------------------------\n");
  1876. while ((entry = readdir(dir)) != NULL) {
  1877. FILE *f;
  1878. unsigned long use = 0;
  1879. // unsigned long size = 0;
  1880. // unsigned long refs = 0;
  1881. unsigned long mode = 0;
  1882. // unsigned long hwref = 0;
  1883. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1884. if (!isnumber(entry->d_name+4)) continue;
  1885. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1886. f = fopen(fname, "r");
  1887. if (!f) Error("Can't access file (%s)", fname);
  1888. while(!feof(f)) {
  1889. if (!fgets(info, 256, f))
  1890. break;
  1891. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1892. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1893. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1894. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1895. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1896. }
  1897. fclose(f);
  1898. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  1899. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  1900. if (use&0x80) {
  1901. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  1902. } else {
  1903. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  1904. }
  1905. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  1906. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  1907. err = pcilib_start_dma(handle, dmaid, 0);
  1908. if (err) {
  1909. printf("-- Wrong state, start is failed\n");
  1910. continue;
  1911. }
  1912. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1913. if (err) {
  1914. printf("-- Wrong state, failed to obtain status\n");
  1915. pcilib_stop_dma(handle, dmaid, 0);
  1916. continue;
  1917. }
  1918. pcilib_stop_dma(handle, dmaid, 0);
  1919. if (status.started) printf("S");
  1920. else printf(" ");
  1921. if (status.ring_head == status.ring_tail) printf(" ");
  1922. else printf("D");
  1923. printf(" ");
  1924. printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  1925. printf(" ");
  1926. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  1927. printf("\n");
  1928. }
  1929. closedir(dir);
  1930. printf("--------------------------------------------------------------------------------\n");
  1931. printf("S - Started, D - Data in buffers\n");
  1932. return 0;
  1933. }
  1934. int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  1935. int err;
  1936. size_t i;
  1937. pcilib_dma_engine_t dmaid;
  1938. pcilib_dma_engine_status_t status;
  1939. pcilib_dma_buffer_status_t *buffer;
  1940. char stmp[256];
  1941. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  1942. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  1943. err = pcilib_start_dma(handle, dmaid, 0);
  1944. if (err) Error("Error starting the specified DMA engine");
  1945. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1946. if (err) Error("Failed to obtain status of the specified DMA engine");
  1947. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  1948. if (!buffer) Error("Failed to allocate memory for status buffer");
  1949. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  1950. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  1951. printf("Buffer Status Total Size \n");
  1952. printf("--------------------------------------------------------------------------------\n");
  1953. for (i = 0; i < status.ring_size; i++) {
  1954. printf("%8zu ", i);
  1955. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  1956. printf("%10s", GetPrintSize(stmp, buffer[i].size));
  1957. printf("\n");
  1958. }
  1959. printf("--------------------------------------------------------------------------------\n");
  1960. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  1961. free(buffer);
  1962. pcilib_stop_dma(handle, dmaid, 0);
  1963. return 0;
  1964. }
  1965. int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  1966. int err;
  1967. pcilib_dma_engine_t dmaid;
  1968. pcilib_dma_engine_status_t status;
  1969. pcilib_dma_buffer_status_t *buffer;
  1970. size_t size;
  1971. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  1972. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  1973. err = pcilib_start_dma(handle, dmaid, 0);
  1974. if (err) Error("Error starting the specified DMA engine");
  1975. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1976. if (err) Error("Failed to obtain status of the specified DMA engine");
  1977. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  1978. if (!buffer) Error("Failed to allocate memory for status buffer");
  1979. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  1980. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  1981. if (block == (size_t)-1) {
  1982. // get current
  1983. }
  1984. size = buffer[block].size;
  1985. free(buffer);
  1986. pcilib_stop_dma(handle, dmaid, 0);
  1987. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  1988. }
  1989. int ListLocks(pcilib_t *ctx, int verbose) {
  1990. int err;
  1991. pcilib_lock_id_t i;
  1992. if (verbose)
  1993. printf("ID Refs Flags Locked Name\n");
  1994. else
  1995. printf("ID Refs Flags Name\n");
  1996. printf("--------------------------------------------------------------------------------\n");
  1997. for (i = 0; i < PCILIB_MAX_LOCKS; i++) {
  1998. pcilib_lock_t *lock = pcilib_get_lock_by_id(ctx, i);
  1999. const char *name = pcilib_lock_get_name(lock);
  2000. if (!name) break;
  2001. pcilib_lock_flags_t flags = pcilib_lock_get_flags(lock);
  2002. size_t refs = pcilib_lock_get_refs(lock);
  2003. printf("%4u %4zu ", i, refs);
  2004. if (flags&PCILIB_LOCK_FLAG_PERSISTENT) printf("P");
  2005. else printf(" ");
  2006. printf(" ");
  2007. if (verbose) {
  2008. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, PCILIB_TIMEOUT_IMMEDIATE);
  2009. switch (err) {
  2010. case 0:
  2011. pcilib_unlock(lock);
  2012. printf("No ");
  2013. break;
  2014. case PCILIB_ERROR_TIMEOUT:
  2015. printf("Yes ");
  2016. break;
  2017. default:
  2018. printf("Err: %3i ", err);
  2019. }
  2020. }
  2021. printf("%s\n", name);
  2022. }
  2023. printf("--------------------------------------------------------------------------------\n");
  2024. printf("P - Persistent\n");
  2025. return 0;
  2026. }
  2027. int FreeLocks(pcilib_t *handle, int force) {
  2028. return pcilib_destroy_all_locks(handle, force);
  2029. }
  2030. int LockUnlock(pcilib_t *handle, const char *name, int do_lock, pcilib_timeout_t timeout) {
  2031. int err = 0;
  2032. pcilib_lock_t *lock = pcilib_get_lock(handle, PCILIB_LOCK_FLAG_PERSISTENT, name);
  2033. if (!lock) Error("Error getting persistent lock %s", name);
  2034. if (do_lock)
  2035. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, timeout);
  2036. else
  2037. pcilib_unlock(lock);
  2038. if (err) {
  2039. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2040. switch (err) {
  2041. case PCILIB_ERROR_TIMEOUT:
  2042. printf("Timeout locking %s\n", name);
  2043. break;
  2044. default:
  2045. Error("Error (%i) locking %s", err, name);
  2046. }
  2047. } else if (do_lock) {
  2048. pcilib_lock_ref(lock);
  2049. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2050. printf("%s is locked\n", name);
  2051. } else {
  2052. pcilib_lock_unref(lock);
  2053. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2054. }
  2055. return err;
  2056. }
  2057. int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2058. int err;
  2059. err = pcilib_enable_irq(handle, irq_type, 0);
  2060. if (err) {
  2061. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2062. Error("Error enabling IRQs");
  2063. }
  2064. return err;
  2065. }
  2066. int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2067. int err;
  2068. err = pcilib_disable_irq(handle, 0);
  2069. if (err) {
  2070. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2071. Error("Error disabling IRQs");
  2072. }
  2073. return err;
  2074. }
  2075. int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  2076. pcilib_clear_irq(handle, irq_source);
  2077. return 0;
  2078. }
  2079. int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  2080. int err;
  2081. size_t count;
  2082. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  2083. if (err) {
  2084. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  2085. else Error("Error waiting for IRQ");
  2086. }
  2087. return 0;
  2088. }
  2089. int main(int argc, char **argv) {
  2090. int err = 0;
  2091. int i;
  2092. long itmp;
  2093. size_t ztmp;
  2094. unsigned char c;
  2095. const char *stmp;
  2096. const char *num_offset;
  2097. int details = 0;
  2098. int verbose = 0;
  2099. int quiete = 0;
  2100. int force = 0;
  2101. int verify = 0;
  2102. pcilib_log_priority_t log_priority;
  2103. const char *model = NULL;
  2104. const pcilib_model_description_t *model_info;
  2105. const pcilib_dma_description_t *dma_info;
  2106. MODE mode = MODE_INVALID;
  2107. GRAB_MODE grab_mode = 0;
  2108. size_t trigger_time = 0;
  2109. size_t run_time = 0;
  2110. size_t buffer = 0;
  2111. size_t threads = 1;
  2112. FORMAT format = FORMAT_DEFAULT;
  2113. PARTITION partition = PARTITION_UNKNOWN;
  2114. FLAGS flags = 0;
  2115. const char *atype = NULL;
  2116. const char *type = NULL;
  2117. ACCESS_MODE amode = ACCESS_BAR;
  2118. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  2119. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  2120. const char *addr = NULL;
  2121. const char *reg = NULL;
  2122. const char *bank = NULL;
  2123. char **data = NULL;
  2124. const char *event = NULL;
  2125. const char *data_type = NULL;
  2126. const char *dma_channel = NULL;
  2127. const char *use = NULL;
  2128. const char *lock = NULL;
  2129. size_t block = (size_t)-1;
  2130. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  2131. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  2132. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  2133. pcilib_kmem_use_t useid = 0;
  2134. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  2135. long addr_shift = 0;
  2136. uintptr_t start = -1;
  2137. size_t block_size = 0;
  2138. size_t size = 1;
  2139. access_t access = 4;
  2140. // int skip = 0;
  2141. int endianess = 0;
  2142. size_t timeout = 0;
  2143. size_t alignment = 0;
  2144. const char *output = NULL;
  2145. FILE *ofile = NULL;
  2146. size_t iterations = BENCHMARK_ITERATIONS;
  2147. pcilib_t *handle;
  2148. int size_set = 0;
  2149. int timeout_set = 0;
  2150. // int run_time_set = 0;
  2151. struct sched_param sched_param = {0};
  2152. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  2153. extern int optind;
  2154. switch (c) {
  2155. case OPT_HELP:
  2156. Usage(argc, argv, NULL);
  2157. break;
  2158. case OPT_INFO:
  2159. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2160. mode = MODE_INFO;
  2161. break;
  2162. case OPT_LIST:
  2163. if (mode == MODE_LIST) details++;
  2164. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2165. mode = MODE_LIST;
  2166. break;
  2167. case OPT_RESET:
  2168. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2169. mode = MODE_RESET;
  2170. break;
  2171. case OPT_BENCHMARK:
  2172. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2173. mode = MODE_BENCHMARK;
  2174. if (optarg) addr = optarg;
  2175. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2176. break;
  2177. case OPT_READ:
  2178. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2179. mode = MODE_READ;
  2180. if (optarg) addr = optarg;
  2181. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2182. break;
  2183. case OPT_WRITE:
  2184. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2185. mode = MODE_WRITE;
  2186. if (optarg) addr = optarg;
  2187. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2188. break;
  2189. case OPT_GRAB:
  2190. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  2191. mode = MODE_GRAB;
  2192. grab_mode |= GRAB_MODE_GRAB;
  2193. stmp = NULL;
  2194. if (optarg) stmp = optarg;
  2195. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2196. if (stmp) {
  2197. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2198. event = stmp;
  2199. }
  2200. break;
  2201. case OPT_TRIGGER:
  2202. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  2203. mode = MODE_GRAB;
  2204. grab_mode |= GRAB_MODE_TRIGGER;
  2205. stmp = NULL;
  2206. if (optarg) stmp = optarg;
  2207. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2208. if (stmp) {
  2209. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2210. event = stmp;
  2211. }
  2212. break;
  2213. case OPT_LIST_DMA:
  2214. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2215. mode = MODE_LIST_DMA;
  2216. break;
  2217. case OPT_LIST_DMA_BUFFERS:
  2218. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2219. mode = MODE_LIST_DMA_BUFFERS;
  2220. dma_channel = optarg;
  2221. break;
  2222. case OPT_READ_DMA_BUFFER:
  2223. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2224. mode = MODE_READ_DMA_BUFFER;
  2225. num_offset = strchr(optarg, ':');
  2226. if (num_offset) {
  2227. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2228. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2229. *(char*)num_offset = 0;
  2230. } else block = (size_t)-1;
  2231. dma_channel = optarg;
  2232. break;
  2233. case OPT_START_DMA:
  2234. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2235. mode = MODE_START_DMA;
  2236. if (optarg) dma_channel = optarg;
  2237. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2238. break;
  2239. case OPT_STOP_DMA:
  2240. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2241. mode = MODE_STOP_DMA;
  2242. if (optarg) dma_channel = optarg;
  2243. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2244. break;
  2245. case OPT_ENABLE_IRQ:
  2246. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2247. mode = MODE_ENABLE_IRQ;
  2248. if (optarg) num_offset = optarg;
  2249. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2250. else num_offset = NULL;
  2251. if (num_offset) {
  2252. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2253. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2254. irq_type = itmp;
  2255. }
  2256. break;
  2257. case OPT_DISABLE_IRQ:
  2258. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2259. mode = MODE_DISABLE_IRQ;
  2260. if (optarg) num_offset = optarg;
  2261. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2262. else num_offset = NULL;
  2263. if (num_offset) {
  2264. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2265. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2266. irq_type = itmp;
  2267. }
  2268. break;
  2269. case OPT_ACK_IRQ:
  2270. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2271. mode = MODE_ACK_IRQ;
  2272. if (optarg) num_offset = optarg;
  2273. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2274. else num_offset = NULL;
  2275. if (num_offset) {
  2276. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2277. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2278. irq_source = itmp;
  2279. }
  2280. break;
  2281. case OPT_WAIT_IRQ:
  2282. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2283. mode = MODE_WAIT_IRQ;
  2284. if (optarg) num_offset = optarg;
  2285. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2286. else num_offset = NULL;
  2287. if (num_offset) {
  2288. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2289. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2290. irq_source = itmp;
  2291. }
  2292. break;
  2293. case OPT_LIST_KMEM:
  2294. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2295. mode = MODE_LIST_KMEM;
  2296. if (optarg) use = optarg;
  2297. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2298. else use = NULL;
  2299. if (use) {
  2300. num_offset = strchr(use, ':');
  2301. if (num_offset) {
  2302. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2303. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2304. *(char*)num_offset = 0;
  2305. }
  2306. }
  2307. break;
  2308. case OPT_READ_KMEM:
  2309. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2310. mode = MODE_READ_KMEM;
  2311. if (!model) model = "pci";
  2312. num_offset = strchr(optarg, ':');
  2313. if (num_offset) {
  2314. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2315. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2316. *(char*)num_offset = 0;
  2317. }
  2318. use = optarg;
  2319. useid = ParseUse(use);
  2320. break;
  2321. case OPT_ALLOC_KMEM:
  2322. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2323. mode = MODE_ALLOC_KMEM;
  2324. model = "pci";
  2325. if (optarg) use = optarg;
  2326. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2327. break;
  2328. case OPT_FREE_KMEM:
  2329. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2330. mode = MODE_FREE_KMEM;
  2331. if (!model) model = "pci";
  2332. if (optarg) use = optarg;
  2333. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2334. break;
  2335. case OPT_LIST_LOCKS:
  2336. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2337. mode = MODE_LIST_LOCKS;
  2338. break;
  2339. case OPT_FREE_LOCKS:
  2340. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2341. mode = MODE_FREE_LOCKS;
  2342. model = "maintenance";
  2343. break;
  2344. case OPT_LOCK:
  2345. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2346. mode = MODE_LOCK;
  2347. lock = optarg;
  2348. break;
  2349. case OPT_UNLOCK:
  2350. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2351. mode = MODE_UNLOCK;
  2352. lock = optarg;
  2353. break;
  2354. case OPT_DEVICE:
  2355. fpga_device = optarg;
  2356. break;
  2357. case OPT_MODEL:
  2358. model = optarg;
  2359. /* if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2360. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2361. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2362. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
  2363. break;
  2364. case OPT_BAR:
  2365. bank = optarg;
  2366. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2367. // else bar = itmp;
  2368. break;
  2369. case OPT_ALIGNMENT:
  2370. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2371. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2372. }
  2373. break;
  2374. case OPT_ACCESS:
  2375. if (!strncasecmp(optarg, "fifo", 4)) {
  2376. atype = "fifo";
  2377. num_offset = optarg + 4;
  2378. amode = ACCESS_FIFO;
  2379. } else if (!strncasecmp(optarg, "dma", 3)) {
  2380. atype = "dma";
  2381. num_offset = optarg + 3;
  2382. amode = ACCESS_DMA;
  2383. } else if (!strncasecmp(optarg, "bar", 3)) {
  2384. atype = "plain";
  2385. num_offset = optarg + 3;
  2386. amode = ACCESS_BAR;
  2387. } else if (!strncasecmp(optarg, "config", 6)) {
  2388. atype = "config";
  2389. num_offset = optarg + 6;
  2390. amode = ACCESS_CONFIG;
  2391. } else if (!strncasecmp(optarg, "plain", 5)) {
  2392. atype = "plain";
  2393. num_offset = optarg + 5;
  2394. amode = ACCESS_BAR;
  2395. } else {
  2396. num_offset = optarg;
  2397. }
  2398. if (*num_offset) {
  2399. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2400. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2401. switch (itmp) {
  2402. case 8: access = 1; break;
  2403. case 16: access = 2; break;
  2404. case 32: access = 4; break;
  2405. case 64: access = 8; break;
  2406. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2407. }
  2408. }
  2409. break;
  2410. case OPT_SIZE:
  2411. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2412. if (strcasecmp(optarg, "unlimited"))
  2413. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2414. else
  2415. size = 0;//(size_t)-1;
  2416. }
  2417. size_set = 1;
  2418. break;
  2419. case OPT_BLOCK_SIZE:
  2420. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2421. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2422. }
  2423. break;
  2424. case OPT_ENDIANESS:
  2425. if ((*optarg == 'b')||(*optarg == 'B')) {
  2426. if (ntohs(1) == 1) endianess = 0;
  2427. else endianess = 1;
  2428. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2429. if (ntohs(1) == 1) endianess = 1;
  2430. else endianess = 0;
  2431. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2432. break;
  2433. case OPT_TIMEOUT:
  2434. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2435. if (strcasecmp(optarg, "unlimited"))
  2436. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2437. else
  2438. timeout = PCILIB_TIMEOUT_INFINITE;
  2439. }
  2440. timeout_set = 1;
  2441. break;
  2442. case OPT_OUTPUT:
  2443. output = optarg;
  2444. break;
  2445. case OPT_ITERATIONS:
  2446. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2447. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2448. break;
  2449. case OPT_EVENT:
  2450. event = optarg;
  2451. break;
  2452. case OPT_TYPE:
  2453. type = optarg;
  2454. break;
  2455. case OPT_DATA_TYPE:
  2456. data_type = optarg;
  2457. break;
  2458. case OPT_RUN_TIME:
  2459. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2460. if (strcasecmp(optarg, "unlimited"))
  2461. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2462. else
  2463. run_time = 0;
  2464. }
  2465. // run_time_set = 1;
  2466. break;
  2467. case OPT_TRIGGER_TIME:
  2468. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2469. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2470. break;
  2471. case OPT_TRIGGER_RATE:
  2472. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2473. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2474. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2475. break;
  2476. case OPT_BUFFER:
  2477. if (optarg) num_offset = optarg;
  2478. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2479. else num_offset = NULL;
  2480. if (num_offset) {
  2481. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2482. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2483. buffer *= 1024 * 1024;
  2484. } else {
  2485. buffer = get_free_memory();
  2486. if (buffer < 256) Error("Not enough free memory (%lz MB) for buffering", buffer / 1024 / 1024);
  2487. buffer -= 128 + buffer/16;
  2488. }
  2489. break;
  2490. case OPT_THREADS:
  2491. if (optarg) num_offset = optarg;
  2492. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2493. else num_offset = NULL;
  2494. if (num_offset) {
  2495. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2496. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2497. } else {
  2498. threads = 0;
  2499. }
  2500. break;
  2501. case OPT_FORMAT:
  2502. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2503. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2504. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2505. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2506. break;
  2507. case OPT_QUIETE:
  2508. quiete = 1;
  2509. verbose = -1;
  2510. break;
  2511. case OPT_VERBOSE:
  2512. if (optarg) num_offset = optarg;
  2513. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2514. else num_offset = NULL;
  2515. if (num_offset) {
  2516. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2517. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2518. } else {
  2519. verbose = 1;
  2520. }
  2521. break;
  2522. case OPT_FORCE:
  2523. force = 1;
  2524. break;
  2525. case OPT_VERIFY:
  2526. verify = 1;
  2527. break;
  2528. case OPT_MULTIPACKET:
  2529. flags |= FLAG_MULTIPACKET;
  2530. break;
  2531. case OPT_WAIT:
  2532. flags |= FLAG_WAIT;
  2533. break;
  2534. default:
  2535. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2536. }
  2537. }
  2538. if (mode == MODE_INVALID) {
  2539. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2540. else Usage(argc, argv, NULL);
  2541. }
  2542. if (verbose) log_priority = PCILIB_LOG_INFO;
  2543. else if (quiete) log_priority = PCILIB_LOG_ERROR;
  2544. else log_priority = PCILIB_LOG_WARNING;
  2545. pcilib_set_logger(log_priority, &LogError, NULL);
  2546. handle = pcilib_open(fpga_device, model);
  2547. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2548. model_info = pcilib_get_model_description(handle);
  2549. dma_info = pcilib_get_dma_description(handle);
  2550. switch (mode) {
  2551. case MODE_WRITE:
  2552. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2553. int vallen = strlen(argv[optind]);
  2554. if (vallen > 1) {
  2555. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2556. if (!data) Error("Error allocating memory for data array");
  2557. for (i = 0; i < size; i++) {
  2558. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2559. strcpy(data[i], argv[optind] + 1);
  2560. }
  2561. } else {
  2562. data = (char**)malloc(size * (9 + sizeof(char*)));
  2563. if (!data) Error("Error allocating memory for data array");
  2564. for (i = 0; i < size; i++) {
  2565. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2566. sprintf(data[i], "%x", i);
  2567. }
  2568. }
  2569. } else if ((argc - optind) == size) data = argv + optind;
  2570. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2571. case MODE_READ:
  2572. if (!addr) {
  2573. if (((!dma_info)||(!dma_info->api))&&(!model_info->api)) {
  2574. // if (model == PCILIB_MODEL_PCI) {
  2575. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2576. Usage(argc, argv, "The address is not specified");
  2577. } else ++mode;
  2578. }
  2579. break;
  2580. case MODE_START_DMA:
  2581. case MODE_STOP_DMA:
  2582. case MODE_LIST_DMA_BUFFERS:
  2583. case MODE_READ_DMA_BUFFER:
  2584. if ((dma_channel)&&(*dma_channel)) {
  2585. itmp = strlen(dma_channel) - 1;
  2586. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2587. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2588. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2589. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2590. else {
  2591. num_offset = dma_channel + 3;
  2592. itmp -= 3;
  2593. }
  2594. if (bank) {
  2595. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  2596. }
  2597. if (!isnumber_n(num_offset, itmp))
  2598. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  2599. dma = atoi(num_offset);
  2600. }
  2601. break;
  2602. default:
  2603. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  2604. }
  2605. if (addr) {
  2606. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2607. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  2608. if (bank) {
  2609. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2610. } else {
  2611. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  2612. }
  2613. dma = atoi(addr + 3);
  2614. amode = ACCESS_DMA;
  2615. addr = NULL;
  2616. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2617. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  2618. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2619. bar = atoi(addr + 3);
  2620. amode = ACCESS_BAR;
  2621. addr = NULL;
  2622. } else if (!strcmp(addr, "config")) {
  2623. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  2624. amode = ACCESS_CONFIG;
  2625. addr = NULL;
  2626. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  2627. // check if the address in the register range
  2628. const pcilib_register_range_t *ranges = model_info->ranges;
  2629. if (ranges) {
  2630. for (i = 0; ranges[i].start != ranges[i].end; i++)
  2631. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  2632. // register access in plain mode
  2633. if (ranges[i].start != ranges[i].end) {
  2634. pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
  2635. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  2636. bank = model_info->banks[regbank].name;
  2637. start += ranges[i].addr_shift;
  2638. addr_shift = ranges[i].addr_shift;
  2639. ++mode;
  2640. }
  2641. }
  2642. } else {
  2643. if (pcilib_find_register(handle, bank, addr) == PCILIB_REGISTER_INVALID) {
  2644. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  2645. } else {
  2646. reg = addr;
  2647. ++mode;
  2648. }
  2649. }
  2650. }
  2651. if (mode == MODE_GRAB) {
  2652. if (output) {
  2653. char fsname[128];
  2654. if (!get_file_fs(output, 127, fsname)) {
  2655. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  2656. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  2657. }
  2658. } else {
  2659. output = "/dev/null";
  2660. partition = PARTITION_NULL;
  2661. }
  2662. if (!timeout_set) {
  2663. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  2664. else timeout = PCILIB_EVENT_TIMEOUT;
  2665. }
  2666. if (!size_set) {
  2667. if (run_time) size = 0;
  2668. }
  2669. }
  2670. if (mode != MODE_GRAB) {
  2671. if (size == (size_t)-1)
  2672. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  2673. }
  2674. if ((bank)&&(amode == ACCESS_DMA)) {
  2675. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  2676. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  2677. else dma = itmp;
  2678. } else if (bank) {
  2679. switch (mode) {
  2680. case MODE_BENCHMARK:
  2681. case MODE_READ:
  2682. case MODE_WRITE:
  2683. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS))
  2684. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2685. else bar = itmp;
  2686. break;
  2687. default:
  2688. if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  2689. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2690. }
  2691. }
  2692. signal(SIGINT, signal_exit_handler);
  2693. if ((mode != MODE_GRAB)&&(output)) {
  2694. ofile = fopen(output, "a+");
  2695. if (!ofile) {
  2696. Error("Failed to open file \"%s\"", output);
  2697. }
  2698. }
  2699. // Requesting real-time priority when needed
  2700. switch (mode) {
  2701. case MODE_READ:
  2702. case MODE_WRITE:
  2703. if (amode != ACCESS_DMA)
  2704. break;
  2705. case MODE_BENCHMARK:
  2706. case MODE_GRAB:
  2707. sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO);
  2708. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  2709. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  2710. break;
  2711. default:
  2712. ;
  2713. }
  2714. switch (mode) {
  2715. case MODE_INFO:
  2716. Info(handle, model_info);
  2717. break;
  2718. case MODE_LIST:
  2719. List(handle, model_info, bank, details);
  2720. break;
  2721. case MODE_BENCHMARK:
  2722. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  2723. break;
  2724. case MODE_READ:
  2725. if (amode == ACCESS_DMA) {
  2726. err = ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  2727. } else if (amode == ACCESS_CONFIG) {
  2728. err = ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  2729. } else if (addr) {
  2730. err = ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  2731. } else {
  2732. Error("Address to read is not specified");
  2733. }
  2734. break;
  2735. case MODE_READ_REGISTER:
  2736. if ((reg)||(!addr)) ReadRegister(handle, model_info, bank, reg);
  2737. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  2738. break;
  2739. case MODE_WRITE:
  2740. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  2741. break;
  2742. case MODE_WRITE_REGISTER:
  2743. if (reg) WriteRegister(handle, model_info, bank, reg, data);
  2744. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  2745. break;
  2746. case MODE_RESET:
  2747. pcilib_reset(handle);
  2748. break;
  2749. case MODE_GRAB:
  2750. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  2751. break;
  2752. case MODE_LIST_DMA:
  2753. ListDMA(handle, fpga_device, model_info);
  2754. break;
  2755. case MODE_LIST_DMA_BUFFERS:
  2756. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  2757. break;
  2758. case MODE_READ_DMA_BUFFER:
  2759. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  2760. break;
  2761. case MODE_START_DMA:
  2762. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  2763. break;
  2764. case MODE_STOP_DMA:
  2765. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  2766. break;
  2767. case MODE_ENABLE_IRQ:
  2768. EnableIRQ(handle, model_info, irq_type);
  2769. break;
  2770. case MODE_DISABLE_IRQ:
  2771. DisableIRQ(handle, model_info, irq_type);
  2772. break;
  2773. case MODE_ACK_IRQ:
  2774. AckIRQ(handle, model_info, irq_source);
  2775. break;
  2776. case MODE_WAIT_IRQ:
  2777. WaitIRQ(handle, model_info, irq_source, timeout);
  2778. break;
  2779. case MODE_LIST_KMEM:
  2780. if (use) DetailKMEM(handle, fpga_device, use, block);
  2781. else ListKMEM(handle, fpga_device);
  2782. break;
  2783. case MODE_READ_KMEM:
  2784. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  2785. break;
  2786. case MODE_ALLOC_KMEM:
  2787. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  2788. break;
  2789. case MODE_FREE_KMEM:
  2790. FreeKMEM(handle, fpga_device, use, force);
  2791. break;
  2792. case MODE_LIST_LOCKS:
  2793. ListLocks(handle, verbose);
  2794. break;
  2795. case MODE_FREE_LOCKS:
  2796. FreeLocks(handle, force);
  2797. break;
  2798. case MODE_LOCK:
  2799. LockUnlock(handle, lock, 1, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  2800. break;
  2801. case MODE_UNLOCK:
  2802. LockUnlock(handle, lock, 0, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  2803. break;
  2804. case MODE_INVALID:
  2805. break;
  2806. }
  2807. if (ofile) fclose(ofile);
  2808. pcilib_close(handle);
  2809. if (data != argv + optind) free(data);
  2810. return err;
  2811. }