cli.c 117 KB

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  1. #define _XOPEN_SOURCE 700
  2. #define _POSIX_C_SOURCE 200112L
  3. #define _BSD_SOURCE
  4. #define _GNU_SOURCE
  5. #define _DEFAULT_SOURCE
  6. #include <stdio.h>
  7. #include <stdlib.h>
  8. #include <string.h>
  9. #include <strings.h>
  10. #include <stdint.h>
  11. #include <stdarg.h>
  12. #include <fcntl.h>
  13. #include <unistd.h>
  14. #include <sys/time.h>
  15. #include <sys/ioctl.h>
  16. #include <sys/mman.h>
  17. #include <errno.h>
  18. #include <alloca.h>
  19. #include <arpa/inet.h>
  20. #include <sys/types.h>
  21. #include <sys/stat.h>
  22. #include <dirent.h>
  23. #include <pthread.h>
  24. #include <signal.h>
  25. #include <dlfcn.h>
  26. #include <getopt.h>
  27. #include <fastwriter.h>
  28. #include "pcitool/sysinfo.h"
  29. #include "pcitool/formaters.h"
  30. #include "views/transform.h"
  31. #include "views/enum.h"
  32. #include "pci.h"
  33. #include "plugin.h"
  34. #include "config.h"
  35. #include "tools.h"
  36. #include "kmem.h"
  37. #include "error.h"
  38. #include "debug.h"
  39. #include "model.h"
  40. #include "locking.h"
  41. /* defines */
  42. #define MAX_KBUF 14
  43. //#define BIGBUFSIZE (512*1024*1024)
  44. #define BIGBUFSIZE (1024*1024)
  45. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  46. #define LINE_WIDTH 80
  47. #define SEPARATOR_WIDTH 2
  48. #define BLOCK_SEPARATOR_WIDTH 2
  49. #define BLOCK_SIZE 8
  50. #define BENCHMARK_ITERATIONS 128
  51. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  52. #define isnumber pcilib_isnumber
  53. #define isxnumber pcilib_isxnumber
  54. #define isnumber_n pcilib_isnumber_n
  55. #define isxnumber_n pcilib_isxnumber_n
  56. typedef uint8_t access_t;
  57. typedef enum {
  58. GRAB_MODE_GRAB = 1,
  59. GRAB_MODE_TRIGGER = 2
  60. } GRAB_MODE;
  61. typedef enum {
  62. MODE_INVALID,
  63. MODE_INFO,
  64. MODE_LIST,
  65. MODE_BENCHMARK,
  66. MODE_READ,
  67. MODE_READ_REGISTER,
  68. MODE_READ_PROPERTY,
  69. MODE_READ_ATTR,
  70. MODE_WRITE,
  71. MODE_WRITE_REGISTER,
  72. MODE_WRITE_PROPERTY,
  73. MODE_RESET,
  74. MODE_GRAB,
  75. MODE_START_DMA,
  76. MODE_STOP_DMA,
  77. MODE_LIST_DMA,
  78. MODE_LIST_DMA_BUFFERS,
  79. MODE_READ_DMA_BUFFER,
  80. MODE_ENABLE_IRQ,
  81. MODE_DISABLE_IRQ,
  82. MODE_ACK_IRQ,
  83. MODE_WAIT_IRQ,
  84. MODE_ALLOC_KMEM,
  85. MODE_LIST_KMEM,
  86. MODE_READ_KMEM,
  87. MODE_FREE_KMEM,
  88. MODE_LIST_LOCKS,
  89. MODE_FREE_LOCKS,
  90. MODE_LOCK,
  91. MODE_UNLOCK
  92. } MODE;
  93. typedef enum {
  94. ACCESS_BAR,
  95. ACCESS_DMA,
  96. ACCESS_FIFO,
  97. ACCESS_CONFIG
  98. } ACCESS_MODE;
  99. typedef enum {
  100. FLAG_MULTIPACKET = 1,
  101. FLAG_WAIT = 2
  102. } FLAGS;
  103. typedef enum {
  104. FORMAT_DEFAULT = 0,
  105. FORMAT_RAW,
  106. FORMAT_HEADER,
  107. FORMAT_RINGFS
  108. } FORMAT;
  109. typedef enum {
  110. PARTITION_UNKNOWN,
  111. PARTITION_RAW,
  112. PARTITION_EXT4,
  113. PARTITION_NULL
  114. } PARTITION;
  115. typedef enum {
  116. OPT_DEVICE = 'd',
  117. OPT_MODEL = 'm',
  118. OPT_BAR = 'b',
  119. OPT_ACCESS = 'a',
  120. OPT_ENDIANESS = 'e',
  121. OPT_SIZE = 's',
  122. OPT_OUTPUT = 'o',
  123. OPT_TIMEOUT = 't',
  124. OPT_INFO = 'i',
  125. OPT_LIST = 'l',
  126. OPT_READ = 'r',
  127. OPT_WRITE = 'w',
  128. OPT_GRAB = 'g',
  129. OPT_QUIETE = 'q',
  130. OPT_HELP = 'h',
  131. OPT_RESET = 128,
  132. OPT_BENCHMARK,
  133. OPT_TRIGGER,
  134. OPT_DATA_TYPE,
  135. OPT_EVENT,
  136. OPT_TRIGGER_RATE,
  137. OPT_TRIGGER_TIME,
  138. OPT_RUN_TIME,
  139. OPT_FORMAT,
  140. OPT_BUFFER,
  141. OPT_THREADS,
  142. OPT_LIST_DMA,
  143. OPT_LIST_DMA_BUFFERS,
  144. OPT_READ_DMA_BUFFER,
  145. OPT_START_DMA,
  146. OPT_STOP_DMA,
  147. OPT_ENABLE_IRQ,
  148. OPT_DISABLE_IRQ,
  149. OPT_ACK_IRQ,
  150. OPT_WAIT_IRQ,
  151. OPT_ITERATIONS,
  152. OPT_ALLOC_KMEM,
  153. OPT_LIST_KMEM,
  154. OPT_FREE_KMEM,
  155. OPT_READ_KMEM,
  156. OPT_LIST_LOCKS,
  157. OPT_FREE_LOCKS,
  158. OPT_LOCK,
  159. OPT_UNLOCK,
  160. OPT_BLOCK_SIZE,
  161. OPT_ALIGNMENT,
  162. OPT_TYPE,
  163. OPT_FORCE,
  164. OPT_VERIFY,
  165. OPT_WAIT,
  166. OPT_MULTIPACKET,
  167. OPT_VERBOSE
  168. } OPTIONS;
  169. static struct option long_options[] = {
  170. {"device", required_argument, 0, OPT_DEVICE },
  171. {"model", required_argument, 0, OPT_MODEL },
  172. {"bar", required_argument, 0, OPT_BAR },
  173. {"access", required_argument, 0, OPT_ACCESS },
  174. {"endianess", required_argument, 0, OPT_ENDIANESS },
  175. {"size", required_argument, 0, OPT_SIZE },
  176. {"output", required_argument, 0, OPT_OUTPUT },
  177. {"timeout", required_argument, 0, OPT_TIMEOUT },
  178. {"iterations", required_argument, 0, OPT_ITERATIONS },
  179. {"info", optional_argument, 0, OPT_INFO },
  180. {"list", optional_argument, 0, OPT_LIST },
  181. {"reset", no_argument, 0, OPT_RESET },
  182. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  183. {"read", optional_argument, 0, OPT_READ },
  184. {"write", optional_argument, 0, OPT_WRITE },
  185. {"grab", optional_argument, 0, OPT_GRAB },
  186. {"trigger", optional_argument, 0, OPT_TRIGGER },
  187. {"data", required_argument, 0, OPT_DATA_TYPE },
  188. {"event", required_argument, 0, OPT_EVENT },
  189. {"run-time", required_argument, 0, OPT_RUN_TIME },
  190. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  191. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  192. {"format", required_argument, 0, OPT_FORMAT },
  193. {"buffer", optional_argument, 0, OPT_BUFFER },
  194. {"threads", optional_argument, 0, OPT_THREADS },
  195. {"start-dma", required_argument, 0, OPT_START_DMA },
  196. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  197. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  198. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  199. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  200. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  201. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  202. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  203. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  204. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  205. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  206. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  207. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  208. {"list-locks", no_argument, 0, OPT_LIST_LOCKS },
  209. {"free-locks", no_argument, 0, OPT_FREE_LOCKS },
  210. {"lock", required_argument, 0, OPT_LOCK },
  211. {"unlock", required_argument, 0, OPT_UNLOCK },
  212. {"type", required_argument, 0, OPT_TYPE },
  213. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  214. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  215. {"quiete", no_argument, 0, OPT_QUIETE },
  216. {"verbose", optional_argument, 0, OPT_VERBOSE },
  217. {"force", no_argument, 0, OPT_FORCE },
  218. {"verify", no_argument, 0, OPT_VERIFY },
  219. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  220. {"wait", no_argument, 0, OPT_WAIT },
  221. {"help", no_argument, 0, OPT_HELP },
  222. { 0, 0, 0, 0 }
  223. };
  224. void Usage(int argc, char *argv[], const char *format, ...) {
  225. if (format) {
  226. va_list ap;
  227. va_start(ap, format);
  228. printf("Error %i: ", errno);
  229. vprintf(format, ap);
  230. printf("\n");
  231. va_end(ap);
  232. printf("\n");
  233. }
  234. printf(
  235. "Usage:\n"
  236. " %s <mode> [options] [hex data]\n"
  237. " Modes:\n"
  238. " -i [target] - Device or Register (target) Info\n"
  239. " -l[l] [bank|/branch] - List (detailed) Data Banks & Registers\n"
  240. " -r <addr|dmaX|reg|prop> - Read Data/Register/Property\n"
  241. " -w <addr|dmaX|reg|prop> - Write Data/Register/Property\n"
  242. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  243. " --reset - Reset board\n"
  244. " --help - Help message\n"
  245. "\n"
  246. " Property/Register Modes:\n"
  247. " -r <reg>/view[:unit] - Read register view\n"
  248. " -w <reg>/view[:unit] - Write register view\n"
  249. " -r <reg>/unit - Read register, detect view based on unit\n"
  250. " -w <reg>/unit - Write register, detect view based on unt\n"
  251. " -r <prop>[:unit] - Read property\n"
  252. " -w <prop>[:unit] - Write property\n"
  253. " -r <prop|reg>@attr - Read register/property attribute\n"
  254. "\n"
  255. " Event Modes:\n"
  256. " --trigger [event] - Trigger Events\n"
  257. " -g [event] - Grab Events\n"
  258. "\n"
  259. " IRQ Modes:\n"
  260. " --enable-irq [type] - Enable IRQs\n"
  261. " --disable-irq [type] - Disable IRQs\n"
  262. " --acknowledge-irq <source> - Clean IRQ queue\n"
  263. " --wait-irq <source> - Wait for IRQ\n"
  264. " DMA Modes:\n"
  265. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  266. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  267. " --list-dma-engines - List active DMA engines\n"
  268. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  269. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  270. "\n"
  271. " Kernel Modes:\n"
  272. " --list-kernel-memory [use] - List kernel buffers\n"
  273. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  274. " block is specified as: use:block_number\n"
  275. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  276. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  277. " dma - Remove all buffers allocated by DMA subsystem\n"
  278. " #number - Remove all buffers with the specified use id\n"
  279. "\n"
  280. " --list-locks - List all registered locks\n"
  281. " --free-locks - Destroy all locks (DANGEROUS)\n"
  282. " --lock <lock name> - Obtain persistent lock\n"
  283. " --unlock <lock name> - Release persistent lock\n"
  284. "\n"
  285. " Addressing:\n"
  286. " -d <device> - FPGA device (/dev/fpga0)\n"
  287. " -m <model> - Memory model (autodetected)\n"
  288. " pci - Plain\n"
  289. " ipecamera - IPE Camera\n"
  290. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  291. "\n"
  292. " Options:\n"
  293. " -s <size> - Number of words (default: 1)\n"
  294. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  295. " -e <l|b> - Endianess Little/Big (default: host)\n"
  296. " -o <file> - Append output to file (default: stdout)\n"
  297. " -t <timeout|unlimited> - Timeout in microseconds\n"
  298. " --check - Verify write operations\n"
  299. "\n"
  300. " Event Options:\n"
  301. " --event <evt> - Specifies event for trigger and grab modes\n"
  302. " --data <type> - Data type to request for the events\n"
  303. " --run-time <us> - Limit time to grab/trigger events\n"
  304. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  305. " --trigger-rate <tps> - Generate tps triggers per second\n"
  306. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  307. " -s <num|unlimited> - Number of events to grab and trigger\n"
  308. " --format [type] - Specifies how event data should be stored\n"
  309. " raw - Just write all events sequentially\n"
  310. " add_header - Prefix events with 512 bit header:\n"
  311. " event(64), data(64), nope(64), size(64)\n"
  312. " seqnum(64), offset(64), timestamp(128)\n"
  313. //" ringfs - Write to RingFS\n"
  314. " --buffer [size] - Request data buffering, size in MB\n"
  315. " --threads [num] - Allow multithreaded processing\n"
  316. "\n"
  317. " DMA Options:\n"
  318. " --multipacket - Read multiple packets\n"
  319. " --wait - Wait until data arrives\n"
  320. "\n"
  321. " Kernel Options:\n"
  322. " --type <type> - Type of kernel memory to allocate\n"
  323. " consistent - Consistent memory\n"
  324. " s2c - DMA S2C (write) memory\n"
  325. " c2s - DMA C2S (read) memory\n"
  326. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  327. " -s <size> - Number of buffers to allocate (default: 1)\n"
  328. " --allignment <alignment> - Buffer alignment (default: page)\n"
  329. "\n"
  330. " Information:\n"
  331. " --verbose [level] - Announce details of ongoing operations\n"
  332. " -q - Quiete mode (suppress warnings)\n"
  333. "\n"
  334. " Data:\n"
  335. " Data can be specified as sequence of hexdecimal number or\n"
  336. " a single value prefixed with '*'. In this case it will be\n"
  337. " replicated the specified amount of times\n"
  338. "\n\n",
  339. argv[0]);
  340. exit(0);
  341. }
  342. static int StopFlag = 0;
  343. static void signal_exit_handler(int signo) {
  344. if (++StopFlag > 2)
  345. exit(-1);
  346. }
  347. void LogError(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, va_list ap) {
  348. vprintf(format, ap);
  349. if (prio == PCILIB_LOG_ERROR) {
  350. if (errno) printf("\nerrno: %i (%s)", errno, strerror(errno));
  351. }
  352. printf("\n");
  353. if (prio == PCILIB_LOG_ERROR) {
  354. printf("Exiting at [%s:%u]\n\n", file, line);
  355. exit(-1);
  356. }
  357. }
  358. void ErrorInternal(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, ...) {
  359. va_list ap;
  360. va_start(ap, format);
  361. LogError(arg, file, line, prio, format, ap);
  362. va_end(ap);
  363. }
  364. #define Error(...) ErrorInternal(NULL, __FILE__, __LINE__, PCILIB_LOG_ERROR, __VA_ARGS__)
  365. int RegisterCompare(const void *aptr, const void *bptr, void *registers) {
  366. pcilib_register_description_t *a = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)aptr];
  367. pcilib_register_description_t *b = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)bptr];
  368. if (a->bank < b->bank) return -1;
  369. if (a->bank > b->bank) return 1;
  370. if (a->addr < b->addr) return -1;
  371. if (a->addr > b->addr) return 1;
  372. if ((a->type != PCILIB_REGISTER_BITS)&&(b->type == PCILIB_REGISTER_BITS)) return -1;
  373. if ((a->type == PCILIB_REGISTER_BITS)&&(b->type != PCILIB_REGISTER_BITS)) return 1;
  374. if (a->offset < b->offset) return -1;
  375. if (a->offset > b->offset) return 0;
  376. return 0;
  377. }
  378. void ListProperties(pcilib_t *handle, const char *branch, int details) {
  379. int i;
  380. pcilib_property_info_t *props;
  381. props = pcilib_get_property_list(handle, branch, 0);
  382. if (!props) Error("Error getting properties");
  383. if (props[0].path) {
  384. printf("Properties: \n");
  385. for (i = 0; props[i].path; i++) {
  386. const char *mode;
  387. const char *type;
  388. switch (props[i].type) {
  389. case PCILIB_TYPE_LONG:
  390. type = "int ";
  391. break;
  392. case PCILIB_TYPE_DOUBLE:
  393. type = "float ";
  394. break;
  395. case PCILIB_TYPE_STRING:
  396. type = "string ";
  397. break;
  398. case PCILIB_TYPE_INVALID:
  399. type = NULL;
  400. break;
  401. default:
  402. type = "unknown";
  403. }
  404. switch (props[i].mode) {
  405. case PCILIB_ACCESS_RW:
  406. mode = "RW";
  407. break;
  408. case PCILIB_ACCESS_R:
  409. mode = "R ";
  410. break;
  411. case PCILIB_ACCESS_W:
  412. mode = "W ";
  413. break;
  414. default:
  415. mode = " ";
  416. }
  417. if (type)
  418. printf(" (%s %s) ", type, mode);
  419. else
  420. printf(" %12s", "");
  421. if (props[i].flags&PCILIB_LIST_FLAG_CHILDS)
  422. printf(" + ");
  423. else
  424. printf(" ");
  425. if (details > 0) {
  426. printf("%s", props[i].name);
  427. if ((props[i].description)&&(props[i].description[0])) {
  428. printf(": %s", props[i].description);
  429. }
  430. } else {
  431. printf("%s", props[i].path);
  432. }
  433. printf("\n");
  434. }
  435. printf("\n");
  436. pcilib_free_property_info(handle, props);
  437. }
  438. }
  439. void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
  440. int i, j, k;
  441. const pcilib_register_bank_description_t *banks;
  442. const pcilib_register_description_t *registers;
  443. const pcilib_event_description_t *events;
  444. const pcilib_event_data_type_description_t *types;
  445. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  446. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  447. for (i = 0; i < PCILIB_MAX_BARS; i++) {
  448. if (board_info->bar_length[i] > 0) {
  449. printf(" BAR %d - ", i);
  450. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  451. case IORESOURCE_IO: printf(" IO"); break;
  452. case IORESOURCE_MEM: printf("MEM"); break;
  453. case IORESOURCE_IRQ: printf("IRQ"); break;
  454. case IORESOURCE_DMA: printf("DMA"); break;
  455. }
  456. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  457. else printf("32");
  458. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  459. }
  460. }
  461. printf("\n");
  462. if ((dma_info)&&(dma_info->engines)) {
  463. printf("DMA Engines: \n");
  464. for (i = 0; dma_info->engines[i].addr_bits; i++) {
  465. const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
  466. printf(" DMA %2d ", engine->addr);
  467. switch (engine->direction) {
  468. case PCILIB_DMA_FROM_DEVICE:
  469. printf("C2S");
  470. break;
  471. case PCILIB_DMA_TO_DEVICE:
  472. printf("S2C");
  473. break;
  474. case PCILIB_DMA_BIDIRECTIONAL:
  475. printf("BI ");
  476. break;
  477. }
  478. printf(" - Type: ");
  479. switch (engine->type) {
  480. case PCILIB_DMA_TYPE_BLOCK:
  481. printf("Block");
  482. break;
  483. case PCILIB_DMA_TYPE_PACKET:
  484. printf("Packet");
  485. break;
  486. default:
  487. printf("Unknown");
  488. }
  489. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  490. }
  491. printf("\n");
  492. }
  493. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  494. else banks = model_info->banks;
  495. if (banks) {
  496. printf("Banks: \n");
  497. for (i = 0; banks[i].access; i++) {
  498. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  499. if ((banks[i].description)&&(banks[i].description[0])) {
  500. printf(": %s", banks[i].description);
  501. }
  502. printf("\n");
  503. }
  504. printf("\n");
  505. }
  506. if (bank == (char*)-1) registers = NULL;
  507. else registers = model_info->registers;
  508. if (registers) {
  509. pcilib_register_t regsort[handle->num_reg];
  510. pcilib_register_bank_addr_t bank_addr = 0;
  511. if (bank) {
  512. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  513. const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  514. bank_addr = b->addr;
  515. if (b->description) printf("%s:\n", b->description);
  516. else if (b->name) printf("Registers of bank %s:\n", b->name);
  517. else printf("Registers of bank 0x%x:\n", b->addr);
  518. } else {
  519. printf("Registers: \n");
  520. }
  521. // sorting
  522. for (i = 0, k = 0; registers[i].bits; i++) {
  523. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  524. if ((registers[i].type == PCILIB_REGISTER_BITS)&&(!details)) continue;
  525. regsort[k++] = i;
  526. }
  527. qsort_r(regsort, k, sizeof(pcilib_register_t), &RegisterCompare, (void*)registers);
  528. for (j = 0; j < k; j++) {
  529. const char *mode;
  530. i = regsort[j];
  531. if (registers[i].type == PCILIB_REGISTER_BITS) {
  532. if (!details) continue;
  533. if (registers[i].bits > 1) {
  534. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  535. } else {
  536. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  537. }
  538. continue;
  539. }
  540. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  541. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  542. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  543. else mode = " ";
  544. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  545. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  546. printf(": %s", registers[i].description);
  547. }
  548. printf("\n");
  549. }
  550. printf("\n");
  551. }
  552. ListProperties(handle, "/", details);
  553. if (bank == (char*)-1) events = NULL;
  554. else {
  555. events = model_info->events;
  556. types = model_info->data_types;
  557. }
  558. if (events) {
  559. printf("Events: \n");
  560. for (i = 0; events[i].name; i++) {
  561. printf(" %s", events[i].name);
  562. if ((events[i].description)&&(events[i].description[0])) {
  563. printf(": %s", events[i].description);
  564. }
  565. if (types) {
  566. for (j = 0; types[j].name; j++) {
  567. if (types[j].evid & events[i].evid) {
  568. printf("\n %s", types[j].name);
  569. if ((types[j].description)&&(types[j].description[0])) {
  570. printf(": %s", types[j].description);
  571. }
  572. }
  573. }
  574. }
  575. }
  576. printf("\n");
  577. }
  578. }
  579. void ViewInfo(pcilib_t *handle, pcilib_register_t reg, size_t id) {
  580. int err;
  581. int i;
  582. pcilib_value_t val = {0};
  583. pcilib_register_value_name_t *vnames;
  584. pcilib_view_t view;
  585. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  586. const pcilib_register_description_t *r;
  587. const pcilib_view_description_t *v;
  588. if (reg == PCILIB_REGISTER_INVALID) {
  589. r = NULL;
  590. view = id;
  591. } else {
  592. r = &model_info->registers[reg];
  593. view = pcilib_find_view_by_name(handle, r->views[id].view);
  594. }
  595. if (view == PCILIB_VIEW_INVALID) return;
  596. v = model_info->views[view];
  597. if (r) {
  598. printf(" View %s (", r->views[id].name);
  599. } else {
  600. printf("%s\n", v->name);
  601. printf(" Data type : ");
  602. }
  603. switch (v->type) {
  604. case PCILIB_TYPE_STRING:
  605. printf("char*");
  606. break;
  607. case PCILIB_TYPE_DOUBLE:
  608. printf("double");
  609. break;
  610. case PCILIB_TYPE_LONG:
  611. printf("long");
  612. break;
  613. default:
  614. printf("unknown");
  615. }
  616. if (r) printf(")");
  617. printf("\n");
  618. if (v->mode&PCILIB_ACCESS_R) {
  619. if (r) {
  620. err = pcilib_read_register_view_by_id(handle, reg, r->views[id].name, &val);
  621. } else {
  622. err = pcilib_get_property(handle, v->name, &val);
  623. }
  624. if (!err) err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  625. } else {
  626. err = PCILIB_ERROR_NOTPERMITED;
  627. }
  628. if (err) {
  629. if (err == PCILIB_ERROR_NOTPERMITED)
  630. printf(" Current value : no read access\n");
  631. else
  632. printf(" Current value : error %i\n", err);
  633. } else {
  634. printf(" Current value : %s", val.sval);
  635. if (v->unit) printf(" (units: %s)", v->unit);
  636. printf("\n");
  637. }
  638. if (v->unit) {
  639. pcilib_unit_t unit = pcilib_find_unit_by_name(handle, v->unit);
  640. printf(" Supported units: %s", v->unit);
  641. if (unit != PCILIB_UNIT_INVALID) {
  642. const pcilib_unit_description_t *u = &model_info->units[unit];
  643. for (i = 0; u->transforms[i].unit; i++)
  644. printf(", %s", u->transforms[i].unit);
  645. }
  646. printf("\n");
  647. }
  648. printf(" Access : ");
  649. if ((v->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  650. if (v->mode&PCILIB_REGISTER_R) printf("R");
  651. if (v->mode&PCILIB_REGISTER_W) printf("W");
  652. printf("\n");
  653. if ((v->api == &pcilib_enum_view_static_api)||(v->api == &pcilib_enum_view_xml_api)) {
  654. vnames = ((pcilib_enum_view_description_t*)v)->names;
  655. printf(" Value aliases :");
  656. for (i = 0; vnames[i].name; i++) {
  657. if (i) printf(",");
  658. printf(" %s = %lu", vnames[i].name, vnames[i].value);
  659. if (vnames[i].min != vnames[i].max)
  660. printf(" (%lu - %lu)", vnames[i].min, vnames[i].max);
  661. }
  662. printf("\n");
  663. } else if (v->api == &pcilib_transform_view_api) {
  664. const pcilib_transform_view_description_t *tv = (const pcilib_transform_view_description_t*)v;
  665. if (tv->read_from_reg)
  666. printf(" Read function : %s\n", tv->read_from_reg);
  667. if (tv->write_to_reg)
  668. printf(" Write function : %s\n", tv->write_to_reg);
  669. }
  670. if (v->description)
  671. printf(" Description : %s\n", v->description);
  672. }
  673. void RegisterInfo(pcilib_t *handle, pcilib_register_t reg) {
  674. int err;
  675. int i;
  676. pcilib_register_value_t regval;
  677. pcilib_register_info_t *info;
  678. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  679. const pcilib_register_description_t *r = &model_info->registers[reg];
  680. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, r->bank);
  681. const pcilib_register_bank_description_t *b = &model_info->banks[bank];
  682. if (r->mode&PCILIB_ACCESS_R) {
  683. err = pcilib_read_register_by_id(handle, reg, &regval);
  684. } else {
  685. err = PCILIB_ERROR_NOTPERMITED;
  686. }
  687. info = pcilib_get_register_info(handle, b->name, r->name, 0);
  688. if (!info) Error("Can't obtain register info for %s", r->name);
  689. printf("%s/%s\n", b->name, r->name);
  690. printf(" Current value: ");
  691. if (err) {
  692. if (err == PCILIB_ERROR_NOTPERMITED) printf("no read access");
  693. else printf("error %i", err);
  694. } else printf(b->format, regval);
  695. if (r->mode&PCILIB_REGISTER_W) {
  696. printf(" (default: ");
  697. printf(b->format, r->defvalue);
  698. if (info->range) {
  699. printf(", range: ");
  700. printf(b->format, info->range->min);
  701. printf (" - ");
  702. printf(b->format, info->range->max);
  703. }
  704. printf(")");
  705. }
  706. printf("\n");
  707. printf(" Address : 0x%x [%u:%u]\n", r->addr, r->offset, r->offset + r->bits);
  708. if ((info->values)&&(info->values[0].name)) {
  709. printf(" Value aliases:");
  710. for (i = 0; info->values[i].name; i++)
  711. printf(" %s", info->values[i].name);
  712. printf("\n");
  713. }
  714. printf(" Access : ");
  715. if ((r->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  716. if (r->mode&PCILIB_REGISTER_R) printf("R");
  717. if (r->mode&PCILIB_REGISTER_W) printf("W");
  718. if (r->mode&PCILIB_REGISTER_W1C) printf("/reset");
  719. if (r->mode&PCILIB_REGISTER_W1I) printf("/invert");
  720. printf("\n");
  721. if (r->description)
  722. printf(" Description : %s\n", r->description);
  723. if (r->views) {
  724. printf("\nSupported Views:\n");
  725. for (i = 0; r->views[i].name; i++) {
  726. ViewInfo(handle, reg, i);
  727. }
  728. }
  729. pcilib_free_register_info(handle, info);
  730. }
  731. void Info(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *target) {
  732. int i, j;
  733. DIR *dir;
  734. void *plugin;
  735. const char *path;
  736. struct dirent *entry;
  737. const pcilib_model_description_t *info = NULL;
  738. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  739. const pcilib_pcie_link_info_t *link_info = pcilib_get_pcie_link_info(handle);
  740. path = getenv("PCILIB_PLUGIN_DIR");
  741. if (!path) path = PCILIB_PLUGIN_DIR;
  742. if (board_info)
  743. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x, Model: %s\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func, handle->model);
  744. if (link_info) {
  745. printf(" PCIe x%u (gen%u), DMA Payload: %u (of %u)\n", link_info->link_width, link_info->link_speed, 1<<link_info->payload, 1<<link_info->max_payload);
  746. }
  747. if (board_info)
  748. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  749. printf("\n");
  750. if (target) {
  751. if (*target == '/') {
  752. pcilib_view_t view;
  753. view = pcilib_find_view_by_name(handle, target);
  754. if (view != PCILIB_VIEW_INVALID)
  755. return ViewInfo(handle, PCILIB_REGISTER_INVALID, view);
  756. Error(" No property %s is found", target);
  757. } else {
  758. pcilib_register_t reg;
  759. reg = pcilib_find_register(handle, NULL, target);
  760. if (reg != PCILIB_REGISTER_INVALID)
  761. return RegisterInfo(handle, reg);
  762. Error(" No register %s is found", target);
  763. }
  764. }
  765. List(handle, model_info, (char*)-1, 0);
  766. printf("Available models:\n");
  767. dir = opendir(path);
  768. if (dir) {
  769. while ((entry = readdir(dir))) {
  770. const char *suffix = strstr(entry->d_name, ".so");
  771. if ((!suffix)||(strlen(suffix) != 3)) continue;
  772. plugin = pcilib_plugin_load(entry->d_name);
  773. if (plugin) {
  774. info = pcilib_get_plugin_model(handle, plugin, 0, 0, NULL);
  775. if (info) {
  776. printf(" %s\n", entry->d_name);
  777. for (j = 0; info[j].name; j++) {
  778. pcilib_version_t version = info[j].api->version;
  779. printf(" %-12s %u.%u.%u - %s\n", info[j].name,
  780. PCILIB_VERSION_GET_MAJOR(version),
  781. PCILIB_VERSION_GET_MINOR(version),
  782. PCILIB_VERSION_GET_MICRO(version),
  783. info[j].description?info[j].description:"");
  784. }
  785. }
  786. pcilib_plugin_close(plugin);
  787. } else {
  788. const char *msg = dlerror();
  789. if (msg)
  790. printf(" %s: %s\n", entry->d_name, msg);
  791. }
  792. }
  793. closedir(dir);
  794. }
  795. // printf(" XML\n");
  796. printf(" Internal Models\n");
  797. for (i = 0; pcilib_dma[i].api; i++)
  798. printf(" %-12s - %s\n", pcilib_dma[i].name, pcilib_dma[i].description?pcilib_dma[i].description:"");
  799. printf(" %-12s - Plain PCI-access model\n\n", "pci");
  800. }
  801. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  802. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  803. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  804. int err;
  805. int i, j, errors;
  806. void *data, *buf, *check;
  807. void *fifo = NULL;
  808. struct timeval start, end;
  809. unsigned long time;
  810. size_t size, min_size, max_size;
  811. double mbs_in, mbs_out, mbs;
  812. size_t irqs;
  813. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  814. if (mode == ACCESS_CONFIG)
  815. Error("No benchmarking of configuration space acess is allowed");
  816. if (mode == ACCESS_DMA) {
  817. if (n) {
  818. min_size = n * access;
  819. max_size = n * access;
  820. } else {
  821. min_size = 1024;
  822. max_size = BENCH_MAX_DMA_SIZE;
  823. }
  824. for (size = min_size; size <= max_size; size *= 4) {
  825. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  826. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  827. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  828. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  829. if (err) irqs = 0;
  830. printf("%8zu KiB - ", size / 1024);
  831. printf("RW: ");
  832. if (mbs < 0) printf("failed ... ");
  833. else printf("%8.2lf MiB/s", mbs);
  834. printf(", R: ");
  835. if (mbs_in < 0) printf("failed ... ");
  836. else printf("%8.2lf MiB/s", mbs_in);
  837. printf(", W: ");
  838. if (mbs_out < 0) printf("failed ... ");
  839. else printf("%8.2lf MiB/s", mbs_out);
  840. if (irqs) {
  841. printf(", IRQs: %lu", irqs);
  842. }
  843. printf("\n");
  844. }
  845. return 0;
  846. }
  847. if (bar == PCILIB_BAR_INVALID) {
  848. unsigned long maxlength = 0;
  849. for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
  850. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  851. bar = i;
  852. break;
  853. }
  854. if (board_info->bar_length[i] > maxlength) {
  855. maxlength = board_info->bar_length[i];
  856. bar = i;
  857. }
  858. }
  859. if (bar < 0) Error("Data banks are not available");
  860. }
  861. if (n) {
  862. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  863. min_size = n * access;
  864. max_size = n * access;
  865. } else {
  866. min_size = access;
  867. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  868. else max_size = BENCH_MAX_FIFO_SIZE;
  869. }
  870. err = posix_memalign( (void**)&buf, 256, max_size );
  871. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  872. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  873. if (mode == ACCESS_FIFO) {
  874. fifo = pcilib_resolve_bar_address(handle, bar, addr);
  875. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  876. } else {
  877. data = pcilib_resolve_bar_address(handle, bar, 0);
  878. if (!data) Error("Can't resolve start of bar (%u)", bar);
  879. }
  880. if (mode == ACCESS_FIFO)
  881. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  882. else
  883. printf("Transfer time (Bank: %i):\n", bar);
  884. for (size = min_size ; size < max_size; size *= 8) {
  885. gettimeofday(&start,NULL);
  886. if (mode == ACCESS_BAR) {
  887. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  888. pcilib_memcpy(buf, data, size);
  889. }
  890. } else {
  891. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  892. for (j = 0; j < (size/access); j++) {
  893. pcilib_memcpy(buf + j * access, fifo, access);
  894. }
  895. }
  896. }
  897. gettimeofday(&end,NULL);
  898. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  899. printf("%8zu bytes - read: %8.2lf MiB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  900. fflush(0);
  901. gettimeofday(&start,NULL);
  902. if (mode == ACCESS_BAR) {
  903. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  904. pcilib_memcpy(data, buf, size);
  905. }
  906. } else {
  907. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  908. for (j = 0; j < (size/access); j++) {
  909. pcilib_memcpy(fifo, buf + j * access, access);
  910. }
  911. }
  912. }
  913. gettimeofday(&end,NULL);
  914. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  915. printf(", write: %8.2lf MiB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  916. }
  917. printf("\n\nOpen-Transfer-Close time: \n");
  918. for (size = 4 ; size < max_size; size *= 8) {
  919. gettimeofday(&start,NULL);
  920. if (mode == ACCESS_BAR) {
  921. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  922. pcilib_read(handle, bar, 0, size, buf);
  923. }
  924. } else {
  925. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  926. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  927. }
  928. }
  929. gettimeofday(&end,NULL);
  930. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  931. printf("%8zu bytes - read: %8.2lf MiB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  932. fflush(0);
  933. gettimeofday(&start,NULL);
  934. if (mode == ACCESS_BAR) {
  935. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  936. pcilib_write(handle, bar, 0, size, buf);
  937. }
  938. } else {
  939. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  940. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  941. }
  942. }
  943. gettimeofday(&end,NULL);
  944. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  945. printf(", write: %8.2lf MiB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  946. if (mode == ACCESS_BAR) {
  947. gettimeofday(&start,NULL);
  948. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  949. pcilib_write(handle, bar, 0, size, buf);
  950. pcilib_read(handle, bar, 0, size, check);
  951. if (memcmp(buf, check, size)) ++errors;
  952. }
  953. gettimeofday(&end,NULL);
  954. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  955. printf(", write-verify: %8.2lf MiB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  956. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  957. }
  958. printf("\n");
  959. }
  960. printf("\n\n");
  961. free(check);
  962. free(buf);
  963. return 0;
  964. }
  965. #define pci2host16(endianess, value) endianess?
  966. /*
  967. typedef struct {
  968. size_t size;
  969. void *data;
  970. size_t pos;
  971. int multi_mode;
  972. } DMACallbackContext;
  973. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  974. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  975. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  976. ctx->size *= 2;
  977. ctx->data = realloc(ctx->data, ctx->size);
  978. if (!ctx->data) {
  979. Error("Allocation of %i bytes of memory have failed", ctx->size);
  980. return 0;
  981. }
  982. }
  983. memcpy(ctx->data + ctx->pos, buf, bufsize);
  984. ctx->pos += bufsize;
  985. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  986. return 1;
  987. }
  988. */
  989. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  990. void *buf;
  991. int i, err;
  992. size_t ret, bytes;
  993. size_t size = n * abs(access);
  994. int block_width, blocks_per_line;
  995. int numbers_per_block, numbers_per_line;
  996. pcilib_dma_engine_t dmaid;
  997. pcilib_dma_flags_t dma_flags = 0;
  998. int fd;
  999. char stmp[256];
  1000. struct stat st;
  1001. const pcilib_board_info_t *board_info;
  1002. numbers_per_block = BLOCK_SIZE / access;
  1003. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1004. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1005. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1006. numbers_per_line = blocks_per_line * numbers_per_block;
  1007. if (size) {
  1008. buf = malloc(size);
  1009. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  1010. } else {
  1011. buf = NULL;
  1012. }
  1013. switch (mode) {
  1014. case ACCESS_DMA:
  1015. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  1016. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1017. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1018. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  1019. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  1020. if (size) {
  1021. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  1022. if (err) Error("Error (%i) is reported by DMA engine", err);
  1023. } else {
  1024. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  1025. size = 2048; bytes = 0;
  1026. do {
  1027. size *= 2;
  1028. buf = realloc(buf, size);
  1029. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  1030. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  1031. bytes += ret;
  1032. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  1033. err = PCILIB_ERROR_TOOBIG;
  1034. if ((flags&FLAG_WAIT)==0) timeout = 0;
  1035. }
  1036. } while (err == PCILIB_ERROR_TOOBIG);
  1037. }
  1038. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  1039. Error("Error (%i) during DMA read", err);
  1040. }
  1041. if (bytes <= 0) {
  1042. pcilib_warning("No data is returned by DMA engine");
  1043. return -1;
  1044. }
  1045. size = bytes;
  1046. n = bytes / abs(access);
  1047. addr = 0;
  1048. break;
  1049. case ACCESS_FIFO:
  1050. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  1051. addr = 0;
  1052. break;
  1053. case ACCESS_CONFIG:
  1054. board_info = pcilib_get_board_info(handle);
  1055. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  1056. fd = open(stmp, O_RDONLY);
  1057. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  1058. if (st.st_size < addr)
  1059. Error("Access beyond the end of PCI configuration space");
  1060. if (st.st_size < (addr + size)) {
  1061. n = (st.st_size - addr) / abs(access);
  1062. size = n * abs(access);
  1063. if (!n) Error("Access beyond the end of PCI configuration space");
  1064. }
  1065. lseek(fd, addr, SEEK_SET);
  1066. ret = read(fd, buf, size);
  1067. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  1068. if (ret < size) {
  1069. size = ret;
  1070. n = ret / abs(access);
  1071. }
  1072. close(fd);
  1073. break;
  1074. default:
  1075. pcilib_read(handle, bar, addr, size, buf);
  1076. }
  1077. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1078. if (o) {
  1079. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1080. fwrite(buf, abs(access), n, o);
  1081. } else {
  1082. for (i = 0; i < n; i++) {
  1083. if (i) {
  1084. if (i%numbers_per_line == 0) printf("\n");
  1085. else {
  1086. printf("%*s", SEPARATOR_WIDTH, "");
  1087. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1088. }
  1089. }
  1090. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  1091. switch (access) {
  1092. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  1093. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  1094. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  1095. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  1096. }
  1097. }
  1098. printf("\n\n");
  1099. }
  1100. free(buf);
  1101. return 0;
  1102. }
  1103. int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, const char *attr) {
  1104. int i;
  1105. int err;
  1106. const char *format;
  1107. pcilib_register_bank_t bank_id;
  1108. pcilib_register_bank_addr_t bank_addr = 0;
  1109. pcilib_register_value_t value;
  1110. // Adding DMA registers
  1111. pcilib_get_dma_description(handle);
  1112. if (reg||view||attr) {
  1113. pcilib_value_t val = {0};
  1114. if (attr) {
  1115. if (reg) err = pcilib_get_register_attr(handle, bank, reg, attr, &val);
  1116. else if (view) err = pcilib_get_property_attr(handle, view, attr, &val);
  1117. else if (bank) err = pcilib_get_register_bank_attr(handle, bank, attr, &val);
  1118. else err = PCILIB_ERROR_INVALID_ARGUMENT;
  1119. if (err) {
  1120. if (err == PCILIB_ERROR_NOTFOUND)
  1121. Error("Attribute %s is not found", attr);
  1122. else
  1123. Error("Error (%i) reading attribute %s", err, attr);
  1124. }
  1125. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1126. if (err) Error("Error converting attribute %s to string", attr);
  1127. printf("%s = %s", attr, val.sval);
  1128. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1129. printf(" %s", val.unit);
  1130. printf(" (for %s)\n", (reg?reg:(view?view:bank)));
  1131. } else if (view) {
  1132. if (reg) {
  1133. err = pcilib_read_register_view(handle, bank, reg, view, &val);
  1134. if (err) Error("Error reading view %s of register %s", view, reg);
  1135. } else {
  1136. err = pcilib_get_property(handle, view, &val);
  1137. if (err) Error("Error reading property %s", view);
  1138. }
  1139. if (unit) {
  1140. err = pcilib_convert_value_unit(handle, &val, unit);
  1141. if (err) {
  1142. if (reg) Error("Error converting view %s of register %s to unit %s", view, reg, unit);
  1143. else Error("Error converting property %s to unit %s", view, unit);
  1144. }
  1145. }
  1146. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1147. if (err) {
  1148. if (reg) Error("Error converting view %s of register %s to string", view);
  1149. else Error("Error converting property %s to string", view);
  1150. }
  1151. printf("%s = %s", (reg?reg:view), val.sval);
  1152. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1153. printf(" %s", val.unit);
  1154. printf("\n");
  1155. } else {
  1156. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1157. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
  1158. format = model_info->banks[bank_id].format;
  1159. if (!format) format = "%lu";
  1160. err = pcilib_read_register_by_id(handle, regid, &value);
  1161. if (err) Error("Error reading register %s", reg);
  1162. printf("%s = ", reg);
  1163. printf(format, value);
  1164. printf("\n");
  1165. }
  1166. } else {
  1167. if (model_info->registers) {
  1168. if (bank) {
  1169. bank_id = pcilib_find_register_bank(handle, bank);
  1170. bank_addr = model_info->banks[bank_id].addr;
  1171. }
  1172. printf("Registers:\n");
  1173. for (i = 0; model_info->registers[i].bits; i++) {
  1174. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  1175. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
  1176. format = model_info->banks[bank_id].format;
  1177. if (!format) format = "%lu";
  1178. err = pcilib_read_register_by_id(handle, i, &value);
  1179. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  1180. else {
  1181. printf(" %s = ", model_info->registers[i].name);
  1182. printf(format, value);
  1183. }
  1184. printf(" [");
  1185. printf(format, model_info->registers[i].defvalue);
  1186. printf("]");
  1187. printf("\n");
  1188. }
  1189. }
  1190. } else {
  1191. printf("No registers");
  1192. }
  1193. printf("\n");
  1194. }
  1195. return 0;
  1196. }
  1197. #define WRITE_REGVAL(buf, n, access, o) {\
  1198. uint##access##_t tbuf[n]; \
  1199. for (i = 0; i < n; i++) { \
  1200. tbuf[i] = (uint##access##_t)buf[i]; \
  1201. } \
  1202. fwrite(tbuf, access/8, n, o); \
  1203. }
  1204. int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  1205. int err;
  1206. int i;
  1207. const pcilib_register_bank_description_t *banks = model_info->banks;
  1208. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  1209. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  1210. if (bank) Error("Invalid register bank is specified (%s)", bank);
  1211. else Error("Register bank should be specified");
  1212. }
  1213. int access = banks[bank_id].access / 8;
  1214. // int size = n * abs(access);
  1215. int block_width, blocks_per_line;
  1216. int numbers_per_block, numbers_per_line;
  1217. numbers_per_block = BLOCK_SIZE / access;
  1218. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1219. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1220. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1221. numbers_per_line = blocks_per_line * numbers_per_block;
  1222. pcilib_register_value_t buf[n];
  1223. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  1224. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1225. if (o) {
  1226. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1227. switch (access) {
  1228. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  1229. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  1230. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  1231. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  1232. }
  1233. } else {
  1234. for (i = 0; i < n; i++) {
  1235. if (i) {
  1236. if (i%numbers_per_line == 0) printf("\n");
  1237. else {
  1238. printf("%*s", SEPARATOR_WIDTH, "");
  1239. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1240. }
  1241. }
  1242. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  1243. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  1244. }
  1245. printf("\n\n");
  1246. }
  1247. return 0;
  1248. }
  1249. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  1250. int read_back = 0;
  1251. void *buf, *check;
  1252. int res = 0, i, err;
  1253. int size = n * abs(access);
  1254. size_t ret;
  1255. pcilib_dma_engine_t dmaid;
  1256. if (mode == ACCESS_CONFIG)
  1257. Error("Writting to PCI configuration space is not supported");
  1258. err = posix_memalign( (void**)&buf, 256, size );
  1259. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1260. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1261. for (i = 0; i < n; i++) {
  1262. switch (access) {
  1263. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  1264. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  1265. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  1266. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  1267. default: Error("Unexpected data size (%lu)", access);
  1268. }
  1269. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1270. }
  1271. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1272. switch (mode) {
  1273. case ACCESS_DMA:
  1274. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1275. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1276. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  1277. if ((err)||(ret != size)) {
  1278. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  1279. else if (err) Error("DMA engine returned a error while writing the data");
  1280. else if (!ret) Error("No data is written by DMA engine");
  1281. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  1282. }
  1283. break;
  1284. case ACCESS_FIFO:
  1285. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  1286. break;
  1287. default:
  1288. pcilib_write(handle, bar, addr, size, buf);
  1289. if (verify) {
  1290. pcilib_read(handle, bar, addr, size, check);
  1291. read_back = 1;
  1292. }
  1293. }
  1294. if ((read_back)&&(memcmp(buf, check, size))) {
  1295. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1296. if (endianess) pcilib_swap(check, check, abs(access), n);
  1297. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  1298. exit(-1);
  1299. }
  1300. free(check);
  1301. free(buf);
  1302. return 0;
  1303. }
  1304. int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  1305. pcilib_register_value_t *buf, *check;
  1306. int res, i, err;
  1307. unsigned long value;
  1308. int size = n * sizeof(pcilib_register_value_t);
  1309. err = posix_memalign( (void**)&buf, 256, size );
  1310. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1311. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1312. for (i = 0; i < n; i++) {
  1313. res = sscanf(data[i], "%lx", &value);
  1314. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1315. buf[i] = value;
  1316. }
  1317. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  1318. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1319. err = pcilib_read_register_space(handle, bank, addr, n, check);
  1320. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1321. if (memcmp(buf, check, size)) {
  1322. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1323. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  1324. exit(-1);
  1325. }
  1326. free(check);
  1327. free(buf);
  1328. return 0;
  1329. }
  1330. int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, char **data) {
  1331. int err = 0;
  1332. pcilib_value_t val = {0};
  1333. pcilib_register_value_t value, verify;
  1334. /*
  1335. pcilib_register_bank_t bank_id;
  1336. pcilib_register_bank_addr_t bank_addr;
  1337. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  1338. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  1339. format = model_info->banks[bank_id].format;
  1340. if (!format) format = "%lu";
  1341. */
  1342. err = pcilib_set_value_from_static_string(handle, &val, *data);
  1343. if (err) Error("Error (%i) setting value", err);
  1344. if (view) {
  1345. if (unit)
  1346. val.unit = unit;
  1347. if (reg) {
  1348. err = pcilib_write_register_view(handle, bank, reg, view, &val);
  1349. if (err) Error("Error writting view %s of register %s", view, reg);
  1350. printf("%s is written\n ", reg);
  1351. } else {
  1352. err = pcilib_set_property(handle, view, &val);
  1353. if (err) Error("Error setting property %s", view);
  1354. printf("%s is written\n ", view);
  1355. }
  1356. } else {
  1357. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1358. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  1359. value = pcilib_get_value_as_register_value(handle, &val, &err);
  1360. if (err) Error("Error (%i) parsing data value (%s)", *data);
  1361. err = pcilib_write_register(handle, bank, reg, value);
  1362. if (err) Error("Error writting register %s\n", reg);
  1363. if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) {
  1364. const char *format = (val.format?val.format:"%u");
  1365. err = pcilib_read_register(handle, bank, reg, &verify);
  1366. if (err) Error("Error reading back register %s for verification\n", reg);
  1367. if (verify != value) {
  1368. Error("Failed to write register %s: %lu is written and %lu is read back", reg, value, verify);
  1369. } else {
  1370. printf("%s = ", reg);
  1371. printf(format, verify);
  1372. printf("\n");
  1373. }
  1374. } else {
  1375. printf("%s is written\n ", reg);
  1376. }
  1377. }
  1378. return 0;
  1379. }
  1380. typedef struct {
  1381. pcilib_t *handle;
  1382. pcilib_event_t event;
  1383. pcilib_event_data_type_t data;
  1384. fastwriter_t *writer;
  1385. int verbose;
  1386. pcilib_timeout_t timeout;
  1387. size_t run_time;
  1388. size_t trigger_time;
  1389. size_t max_triggers;
  1390. pcilib_event_flags_t flags;
  1391. FORMAT format;
  1392. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1393. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1394. volatile int started; /**< Indicates that recording is started */
  1395. volatile int run_flag;
  1396. volatile int writing_flag;
  1397. struct timeval first_frame;
  1398. struct timeval last_frame;
  1399. size_t last_num, last_id;
  1400. size_t trigger_failed;
  1401. size_t trigger_count;
  1402. size_t event_count; /**< Total number of events (including bad ones, but excluding events expected, but not reported by hardware) */
  1403. size_t incomplete_count; /**< Broken events, we even can't extract appropriate block of raw data */
  1404. size_t broken_count; /**< Broken events, error while decoding in the requested format */
  1405. size_t empty_count; /**< Broken events, no associated data or unknown */
  1406. size_t missing_count; /**< Missing events, not received from the hardware */
  1407. size_t dropped_count; /**< Missing events, dropped due slow decoding/copying performance */
  1408. size_t storage_count; /**< Missing events, dropped due to slowness of the storage subsystem */
  1409. struct timeval start_time;
  1410. struct timeval stop_time;
  1411. } GRABContext;
  1412. int GrabCallback(pcilib_event_id_t event_id, const pcilib_event_info_t *info, void *user) {
  1413. int err = 0;
  1414. void *data;
  1415. size_t size;
  1416. GRABContext *ctx = (GRABContext*)user;
  1417. pcilib_t *handle = ctx->handle;
  1418. gettimeofday(&ctx->last_frame, NULL);
  1419. if (!ctx->event_count) {
  1420. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1421. }
  1422. ctx->event_pending = 0;
  1423. ctx->event_count++;
  1424. if (ctx->last_num) {
  1425. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1426. ctx->missing_count += missing_count;
  1427. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1428. if (missing_count)
  1429. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu (hwid: %zu) and %zu (hwid: %zu)", missing_count, ctx->last_id, ctx->last_num, event_id, info->seqnum);
  1430. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1431. }
  1432. ctx->last_num = info->seqnum;
  1433. ctx->last_id = event_id;
  1434. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1435. ctx->incomplete_count++;
  1436. return PCILIB_STREAMING_CONTINUE;
  1437. }
  1438. switch (ctx->format) {
  1439. case FORMAT_DEFAULT:
  1440. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_DATA, &size);
  1441. break;
  1442. default:
  1443. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_RAW_DATA, &size);
  1444. }
  1445. if (!data) {
  1446. int err = (int)size;
  1447. switch (err) {
  1448. case PCILIB_ERROR_OVERWRITTEN:
  1449. ctx->dropped_count++;
  1450. break;
  1451. case PCILIB_ERROR_INVALID_DATA:
  1452. ctx->broken_count++;
  1453. break;
  1454. default:
  1455. ctx->empty_count++;
  1456. }
  1457. return PCILIB_STREAMING_CONTINUE;
  1458. }
  1459. if (ctx->format == FORMAT_HEADER) {
  1460. uint64_t header[8];
  1461. header[0] = info->type;
  1462. header[1] = ctx->data;
  1463. header[2] = 0;
  1464. header[3] = size;
  1465. header[4] = info->seqnum;
  1466. header[5] = info->offset;
  1467. memcpy(header + 6, &info->timestamp, 16);
  1468. err = fastwriter_push(ctx->writer, 64, header);
  1469. }
  1470. if (!err)
  1471. err = fastwriter_push(ctx->writer, size, data);
  1472. if (err) {
  1473. fastwriter_cancel(ctx->writer);
  1474. if (err != EWOULDBLOCK)
  1475. Error("Storage error %i", err);
  1476. ctx->storage_count++;
  1477. pcilib_return_data(handle, event_id, ctx->data, data);
  1478. return PCILIB_STREAMING_CONTINUE;
  1479. }
  1480. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1481. if (err) {
  1482. ctx->dropped_count++;
  1483. fastwriter_cancel(ctx->writer);
  1484. return PCILIB_STREAMING_CONTINUE;
  1485. }
  1486. err = fastwriter_commit(ctx->writer);
  1487. if (err) Error("Error commiting data to storage, Error: %i", err);
  1488. return PCILIB_STREAMING_CONTINUE;
  1489. }
  1490. int raw_data(pcilib_event_id_t event_id, const pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1491. int err;
  1492. GRABContext *ctx = (GRABContext*)user;
  1493. // pcilib_t *handle = ctx->handle;
  1494. if ((info)&&(info->seqnum != ctx->last_num)) {
  1495. gettimeofday(&ctx->last_frame, NULL);
  1496. if (!ctx->event_count) {
  1497. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1498. }
  1499. ctx->event_count++;
  1500. if (ctx->last_num) {
  1501. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1502. ctx->missing_count += missing_count;
  1503. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1504. if (missing_count)
  1505. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu and %zu", missing_count, ctx->last_num, info->seqnum);
  1506. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1507. }
  1508. ctx->last_num = info->seqnum;
  1509. }
  1510. err = fastwriter_push_data(ctx->writer, size, data);
  1511. if (err) {
  1512. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1513. Error("Storage error %i", err);
  1514. }
  1515. return PCILIB_STREAMING_CONTINUE;
  1516. }
  1517. void *Trigger(void *user) {
  1518. int err;
  1519. struct timeval start;
  1520. GRABContext *ctx = (GRABContext*)user;
  1521. size_t trigger_time = ctx->trigger_time;
  1522. size_t max_triggers = ctx->max_triggers;
  1523. ctx->trigger_thread_started = 1;
  1524. ctx->event_pending = 1;
  1525. while (!ctx->started) ;
  1526. gettimeofday(&start, NULL);
  1527. do {
  1528. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1529. if (err) ctx->trigger_failed++;
  1530. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1531. if (trigger_time) {
  1532. pcilib_add_timeout(&start, trigger_time);
  1533. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1534. pcilib_sleep_until_deadline(&start);
  1535. } else {
  1536. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1537. ctx->event_pending = 1;
  1538. }
  1539. } while (ctx->run_flag);
  1540. ctx->trigger_thread_started = 0;
  1541. return NULL;
  1542. }
  1543. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1544. int verbose;
  1545. pcilib_timeout_t duration, fps_duration;
  1546. struct timeval cur;
  1547. double fps = 0, good_fps = 0;
  1548. size_t total, good, pending = 0;
  1549. verbose = ctx->verbose;
  1550. if (end_time) {
  1551. if (verbose++) {
  1552. printf("-------------------------------------------------------------------------------\n");
  1553. }
  1554. } else {
  1555. gettimeofday(&cur, NULL);
  1556. end_time = &cur;
  1557. }
  1558. // if ((ctx->event_count + ctx->missing_count) == 0)
  1559. // return;
  1560. duration = pcilib_timediff(&ctx->start_time, end_time);
  1561. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1562. if (ctx->trigger_count) {
  1563. total = ctx->trigger_count;
  1564. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1565. } else {
  1566. total = ctx->event_count + ctx->missing_count;
  1567. }
  1568. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count - ctx->empty_count - ctx->dropped_count;
  1569. if (ctx->event_count > 1) {
  1570. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1571. }
  1572. if (good > 1) {
  1573. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1574. }
  1575. printf("Run: ");
  1576. PrintTime(duration);
  1577. if (ctx->trigger_count) {
  1578. printf(", Triggers: ");
  1579. PrintNumber(ctx->trigger_count);
  1580. }
  1581. printf(", Captured: ");
  1582. PrintNumber(ctx->event_count);
  1583. printf(" FPS %5.0lf", fps);
  1584. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1585. printf(", Stored: ");
  1586. PrintNumber(good);
  1587. printf(" FPS %5.0lf", good_fps);
  1588. }
  1589. printf("\n");
  1590. if (verbose > 2) {
  1591. if (ctx->trigger_count) {
  1592. printf("Trig: ");
  1593. PrintNumber(ctx->trigger_count);
  1594. printf(" Issued: ");
  1595. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1596. printf(" (");
  1597. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1598. printf("%%) Failed: ");
  1599. PrintNumber(ctx->trigger_failed);
  1600. printf( " (");
  1601. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1602. printf( "%%); Pending: ");
  1603. PrintNumber(pending);
  1604. printf( " (");
  1605. PrintPercent(pending, ctx->trigger_count);
  1606. printf( "%%)\n");
  1607. }
  1608. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1609. printf("Captured: ");
  1610. PrintNumber(good);
  1611. } else {
  1612. printf("Good: ");
  1613. PrintNumber(good);
  1614. printf(", Dropped: ");
  1615. PrintNumber(ctx->dropped_count + ctx->storage_count);
  1616. printf(", Bad: ");
  1617. PrintNumber(ctx->incomplete_count + ctx->broken_count);
  1618. printf(", Empty: ");
  1619. PrintNumber(ctx->empty_count);
  1620. }
  1621. printf(", Lost: ");
  1622. PrintNumber(ctx->missing_count);
  1623. printf("\n");
  1624. }
  1625. if (verbose > 1) {
  1626. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1627. printf("Captured: ");
  1628. PrintPercent(good, total);
  1629. } else {
  1630. printf("Good: ");
  1631. PrintPercent(good, total);
  1632. printf("%% Dropped: ");
  1633. PrintPercent(ctx->dropped_count + ctx->storage_count, total);
  1634. printf("%% Bad: ");
  1635. PrintPercent(ctx->incomplete_count + ctx->broken_count, total);
  1636. printf("%% Empty: ");
  1637. PrintPercent(ctx->empty_count, total);
  1638. }
  1639. printf("%% Lost: ");
  1640. PrintPercent(ctx->missing_count, total);
  1641. printf("%%");
  1642. printf("\n");
  1643. }
  1644. }
  1645. void StorageStats(GRABContext *ctx) {
  1646. int err;
  1647. fastwriter_stats_t st;
  1648. pcilib_timeout_t duration;
  1649. struct timeval cur;
  1650. gettimeofday(&cur, NULL);
  1651. duration = pcilib_timediff(&ctx->start_time, &cur);
  1652. err = fastwriter_get_stats(ctx->writer, &st);
  1653. if (err) return;
  1654. printf("Wrote ");
  1655. PrintSize(st.written);
  1656. printf(" of ");
  1657. PrintSize(st.commited);
  1658. printf(" at ");
  1659. PrintSize(1000000.*st.written / duration);
  1660. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1661. printf(" of ");
  1662. PrintSize(st.buffer_size);
  1663. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1664. }
  1665. void *Monitor(void *user) {
  1666. struct timeval deadline;
  1667. struct timeval nextinfo;
  1668. GRABContext *ctx = (GRABContext*)user;
  1669. int verbose = ctx->verbose;
  1670. pcilib_timeout_t timeout = ctx->timeout;
  1671. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1672. // while (!ctx->started);
  1673. if (timeout) {
  1674. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1675. pcilib_add_timeout(&deadline, timeout);
  1676. }
  1677. if (verbose > 0) {
  1678. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1679. }
  1680. while (ctx->run_flag) {
  1681. if (StopFlag) {
  1682. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1683. break;
  1684. }
  1685. if (timeout) {
  1686. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1687. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1688. pcilib_add_timeout(&deadline, timeout);
  1689. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1690. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1691. break;
  1692. }
  1693. }
  1694. }
  1695. if (verbose > 0) {
  1696. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1697. GrabStats(ctx, NULL);
  1698. StorageStats(ctx);
  1699. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1700. }
  1701. }
  1702. usleep(100000);
  1703. }
  1704. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1705. while (ctx->writing_flag) {
  1706. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1707. if (verbose >= 0) StorageStats(ctx);
  1708. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1709. }
  1710. usleep(100000);
  1711. }
  1712. return NULL;
  1713. }
  1714. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1715. int err;
  1716. GRABContext ctx;
  1717. // void *data = NULL;
  1718. // size_t size, written;
  1719. pcilib_event_t event;
  1720. pcilib_event_t listen_events;
  1721. pcilib_event_data_type_t data;
  1722. pthread_t monitor_thread;
  1723. pthread_t trigger_thread;
  1724. pthread_attr_t attr;
  1725. struct sched_param sched;
  1726. struct timeval end_time;
  1727. pcilib_event_flags_t flags;
  1728. if (evname) {
  1729. event = pcilib_find_event(handle, evname);
  1730. if (event == PCILIB_EVENT_INVALID)
  1731. Error("Can't find event (%s)", evname);
  1732. listen_events = event;
  1733. } else {
  1734. listen_events = PCILIB_EVENTS_ALL;
  1735. event = PCILIB_EVENT0;
  1736. }
  1737. if (data_type) {
  1738. data = pcilib_find_event_data_type(handle, event, data_type);
  1739. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1740. Error("Can't find data type (%s)", data_type);
  1741. } else {
  1742. data = PCILIB_EVENT_DATA;
  1743. }
  1744. memset(&ctx, 0, sizeof(GRABContext));
  1745. ctx.handle = handle;
  1746. ctx.event = event;
  1747. ctx.data = data;
  1748. ctx.run_time = run_time;
  1749. ctx.timeout = timeout;
  1750. ctx.format = format;
  1751. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1752. else ctx.verbose = 0;
  1753. if (grab_mode&GRAB_MODE_GRAB) {
  1754. ctx.writer = fastwriter_init(output, 0);
  1755. if (!ctx.writer)
  1756. Error("Can't initialize fastwritter library");
  1757. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1758. err = fastwriter_open(ctx.writer, output, 0);
  1759. if (err)
  1760. Error("Error opening file (%s), Error: %i\n", output, err);
  1761. ctx.writing_flag = 1;
  1762. }
  1763. ctx.run_flag = 1;
  1764. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1765. if (data == PCILIB_EVENT_RAW_DATA) {
  1766. if (format == FORMAT_RAW) {
  1767. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1768. }
  1769. } else {
  1770. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1771. }
  1772. ctx.flags = flags;
  1773. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1774. pcilib_configure_autostop(handle, num, run_time);
  1775. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1776. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1777. }
  1778. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1779. pcilib_write_register(handle, "conf", "max_threads", threads);
  1780. }
  1781. if (grab_mode&GRAB_MODE_TRIGGER) {
  1782. if (trigger_time) {
  1783. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1784. timeout = 2 * trigger_time;
  1785. ctx.timeout = timeout;
  1786. }
  1787. } else {
  1788. // Otherwise, we will trigger next event after previous one is read
  1789. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1790. }
  1791. ctx.max_triggers = num;
  1792. ctx.trigger_count = 0;
  1793. ctx.trigger_time = trigger_time;
  1794. // We don't really care if RT priority is imposible
  1795. pthread_attr_init(&attr);
  1796. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1797. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1798. pthread_attr_setschedparam(&attr, &sched);
  1799. }
  1800. // Start triggering thread and wait until it is schedulled
  1801. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1802. Error("Error spawning trigger thread");
  1803. while (!ctx.trigger_thread_started) usleep(10);
  1804. }
  1805. gettimeofday(&ctx.start_time, NULL);
  1806. if (grab_mode&GRAB_MODE_GRAB) {
  1807. err = pcilib_start(handle, listen_events, flags);
  1808. if (err) Error("Failed to start event engine, error %i", err);
  1809. }
  1810. ctx.started = 1;
  1811. if (run_time) {
  1812. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1813. if (ctx.stop_time.tv_usec > 999999) {
  1814. ctx.stop_time.tv_usec -= 1000000;
  1815. __sync_synchronize();
  1816. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1817. } else {
  1818. __sync_synchronize();
  1819. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1820. }
  1821. }
  1822. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1823. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1824. Error("Error spawning monitoring thread");
  1825. if (grab_mode&GRAB_MODE_GRAB) {
  1826. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1827. if (err) Error("Error streaming events, error %i", err);
  1828. }
  1829. ctx.run_flag = 0;
  1830. if (grab_mode&GRAB_MODE_TRIGGER) {
  1831. while (ctx.trigger_thread_started) usleep(10);
  1832. }
  1833. if (grab_mode&GRAB_MODE_GRAB) {
  1834. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1835. }
  1836. gettimeofday(&end_time, NULL);
  1837. if (grab_mode&GRAB_MODE_TRIGGER) {
  1838. pthread_join(trigger_thread, NULL);
  1839. }
  1840. if (grab_mode&GRAB_MODE_GRAB) {
  1841. if (verbose >= 0)
  1842. printf("Grabbing is finished, flushing results....\n");
  1843. err = fastwriter_close(ctx.writer);
  1844. if (err) Error("Storage problems, error %i", err);
  1845. }
  1846. ctx.writing_flag = 0;
  1847. pthread_join(monitor_thread, NULL);
  1848. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1849. GrabStats(&ctx, &end_time);
  1850. StorageStats(&ctx);
  1851. }
  1852. fastwriter_destroy(ctx.writer);
  1853. return 0;
  1854. }
  1855. int StartStopDMA(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1856. int err;
  1857. pcilib_dma_engine_t dmaid;
  1858. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1859. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  1860. if (start) Error("DMA engine should be specified");
  1861. for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
  1862. err = pcilib_start_dma(handle, dmaid, 0);
  1863. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1864. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1865. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1866. }
  1867. return 0;
  1868. }
  1869. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1870. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1871. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1872. if (start) {
  1873. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1874. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1875. } else {
  1876. err = pcilib_start_dma(handle, dmaid, 0);
  1877. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1878. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1879. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1880. }
  1881. }
  1882. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1883. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1884. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1885. if (start) {
  1886. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1887. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1888. } else {
  1889. err = pcilib_start_dma(handle, dmaid, 0);
  1890. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1891. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1892. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1893. }
  1894. }
  1895. return 0;
  1896. }
  1897. typedef struct {
  1898. pcilib_kmem_use_t use;
  1899. int referenced;
  1900. int hw_lock;
  1901. int reusable;
  1902. int persistent;
  1903. int open;
  1904. size_t count;
  1905. size_t size;
  1906. } kmem_use_info_t;
  1907. #define MAX_USES 64
  1908. pcilib_kmem_use_t ParseUse(const char *use) {
  1909. unsigned long utmp;
  1910. if (use) {
  1911. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1912. if (strlen(use) < 5)
  1913. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1914. else
  1915. return utmp;
  1916. }
  1917. Error("Kernel memory use is not specified");
  1918. return 0;
  1919. }
  1920. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1921. size_t i, n = *n_uses;
  1922. if (uses[n - 1].use == use) return n - 1;
  1923. for (i = 1; i < (n - 1); i++) {
  1924. if (uses[i].use == use) return i;
  1925. }
  1926. if (n == MAX_USES) return 0;
  1927. memset(&uses[n], 0, sizeof(kmem_use_info_t));
  1928. uses[n].use = use;
  1929. return (*n_uses)++;
  1930. }
  1931. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1932. size_t i;
  1933. for (i = 0; i < n_uses; i++) {
  1934. if (uses[i].use == use) {
  1935. if (uses[i].count) return uses + i;
  1936. else return NULL;
  1937. }
  1938. }
  1939. return NULL;
  1940. }
  1941. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  1942. DIR *dir;
  1943. struct dirent *entry;
  1944. const char *pos;
  1945. char sysdir[256];
  1946. char fname[256];
  1947. char info[256];
  1948. size_t useid, n_uses = 1; // Use 0 is for others
  1949. memset(uses, 0, sizeof(kmem_use_info_t));
  1950. pos = strrchr(device, '/');
  1951. if (pos) ++pos;
  1952. else pos = device;
  1953. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1954. dir = opendir(sysdir);
  1955. if (!dir) Error("Can't open directory (%s)", sysdir);
  1956. while ((entry = readdir(dir)) != NULL) {
  1957. FILE *f;
  1958. unsigned long use = 0;
  1959. unsigned long size = 0;
  1960. unsigned long refs = 0;
  1961. unsigned long mode = 0;
  1962. unsigned long hwref = 0;
  1963. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1964. if (!isnumber(entry->d_name+4)) continue;
  1965. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1966. f = fopen(fname, "r");
  1967. if (!f) Error("Can't access file (%s)", fname);
  1968. while(!feof(f)) {
  1969. if (!fgets(info, 256, f))
  1970. break;
  1971. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1972. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1973. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1974. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1975. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1976. }
  1977. fclose(f);
  1978. useid = FindUse(&n_uses, uses, use);
  1979. uses[useid].count++;
  1980. uses[useid].size += size;
  1981. if (refs) uses[useid].referenced = 1;
  1982. if (hwref) uses[useid].hw_lock = 1;
  1983. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  1984. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  1985. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  1986. }
  1987. closedir(dir);
  1988. *uses_number = n_uses;
  1989. return 0;
  1990. }
  1991. int ListKMEM(pcilib_t *handle, const char *device) {
  1992. int err;
  1993. char stmp[256];
  1994. size_t i, useid, n_uses;
  1995. kmem_use_info_t uses[MAX_USES];
  1996. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  1997. err = ParseKMEM(handle, device, &n_uses, uses);
  1998. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1999. if ((n_uses == 1)&&(uses[0].count == 0)) {
  2000. printf("No kernel memory is allocated\n");
  2001. return 0;
  2002. }
  2003. printf("Use Type Count Total Size REF Mode \n");
  2004. printf("--------------------------------------------------------------------------------\n");
  2005. for (useid = 0; useid < n_uses; useid++) {
  2006. if (useid + 1 == n_uses) {
  2007. if (!uses[0].count) continue;
  2008. i = 0;
  2009. } else i = useid + 1;
  2010. printf("%08x ", uses[i].use);
  2011. if (i) {
  2012. switch(PCILIB_KMEM_USE_TYPE(uses[i].use)) {
  2013. case PCILIB_KMEM_USE_DMA_RING:
  2014. printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  2015. break;
  2016. case PCILIB_KMEM_USE_DMA_PAGES:
  2017. printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  2018. break;
  2019. case PCILIB_KMEM_USE_SOFTWARE_REGISTERS: {
  2020. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  2021. if (bank == PCILIB_REGISTER_BANK_INVALID)
  2022. printf("SoftRegs (%8u)", PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  2023. else
  2024. printf("SoftRegs (%8s)", model_info->banks[bank].name);
  2025. break;
  2026. }
  2027. case PCILIB_KMEM_USE_LOCKS:
  2028. printf("Locks ");
  2029. break;
  2030. case PCILIB_KMEM_USE_USER:
  2031. printf("User %04x ", uses[i].use&0xFFFF);
  2032. break;
  2033. default:
  2034. printf (" ");
  2035. }
  2036. } else printf("All Others ");
  2037. printf(" ");
  2038. printf("%6zu", uses[i].count);
  2039. printf(" ");
  2040. printf("%10s", GetPrintSize(stmp, uses[i].size));
  2041. printf(" ");
  2042. if ((uses[i].referenced)&&(uses[i].hw_lock)) printf("HW+SW");
  2043. else if (uses[i].referenced) printf(" SW");
  2044. else if (uses[i].hw_lock) printf("HW ");
  2045. else printf(" - ");
  2046. printf(" ");
  2047. if (uses[i].persistent) printf("Persistent");
  2048. else if (uses[i].open) printf("Open ");
  2049. else if (uses[i].reusable) printf("Reusable ");
  2050. else printf("Closed ");
  2051. printf("\n");
  2052. }
  2053. printf("--------------------------------------------------------------------------------\n");
  2054. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  2055. return 0;
  2056. }
  2057. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  2058. int err;
  2059. size_t i, n;
  2060. pcilib_kmem_handle_t *kbuf;
  2061. pcilib_kmem_use_t useid = ParseUse(use);
  2062. size_t n_uses;
  2063. kmem_use_info_t uses[MAX_USES];
  2064. kmem_use_info_t *use_info;
  2065. if (block == (size_t)-1) {
  2066. err = ParseKMEM(handle, device, &n_uses, uses);
  2067. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  2068. use_info = GetUse(n_uses, uses, useid);
  2069. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  2070. i = 0;
  2071. n = use_info->count;
  2072. } else {
  2073. i = block;
  2074. n = block + 1;
  2075. }
  2076. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  2077. if (!kbuf) {
  2078. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  2079. return 0;
  2080. }
  2081. printf("Buffer Address Hardware Address Bus Address\n");
  2082. printf("--------------------------------------------------------------------------------\n");
  2083. for (; i < n; i++) {
  2084. void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  2085. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  2086. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  2087. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  2088. }
  2089. printf("\n");
  2090. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2091. return 0;
  2092. }
  2093. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  2094. int err;
  2095. void *data;
  2096. size_t size;
  2097. pcilib_kmem_handle_t *kbuf;
  2098. if (block == (size_t)-1) block = 0;
  2099. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  2100. if (!kbuf) {
  2101. Error("The specified kernel buffer is not allocated\n");
  2102. return 0;
  2103. }
  2104. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  2105. if (err) {
  2106. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2107. Error("The synchronization of kernel buffer has failed\n");
  2108. return 0;
  2109. }
  2110. data = pcilib_kmem_get_block_ua(handle, kbuf, block);
  2111. if (data) {
  2112. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  2113. if ((max_size)&&(size > max_size)) size = max_size;
  2114. fwrite(data, 1, size, o?o:stdout);
  2115. } else {
  2116. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2117. Error("The specified block is not existing\n");
  2118. return 0;
  2119. }
  2120. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2121. return 0;
  2122. }
  2123. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  2124. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  2125. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  2126. pcilib_kmem_handle_t *kbuf;
  2127. pcilib_kmem_use_t useid = ParseUse(use);
  2128. long page_size = sysconf(_SC_PAGESIZE);
  2129. if (type) {
  2130. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  2131. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  2132. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  2133. else Error("Invalid memory type (%s) is specified", type);
  2134. }
  2135. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  2136. Error("Selected memory type does not allow custom size");
  2137. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  2138. if (!kbuf) Error("Allocation of kernel memory has failed");
  2139. pcilib_free_kernel_memory(handle, kbuf, flags);
  2140. return 0;
  2141. }
  2142. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  2143. int err;
  2144. int i;
  2145. pcilib_kmem_use_t useid;
  2146. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  2147. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  2148. if (!strcasecmp(use, "dma")) {
  2149. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  2150. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  2151. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  2152. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  2153. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  2154. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  2155. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  2156. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  2157. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  2158. }
  2159. return 0;
  2160. }
  2161. useid = ParseUse(use);
  2162. err = pcilib_clean_kernel_memory(handle, useid, flags);
  2163. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  2164. return 0;
  2165. }
  2166. int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
  2167. int err;
  2168. DIR *dir;
  2169. struct dirent *entry;
  2170. const char *pos;
  2171. char sysdir[256];
  2172. char fname[256];
  2173. char info[256];
  2174. char stmp[256];
  2175. pcilib_dma_engine_t dmaid;
  2176. pcilib_dma_engine_status_t status;
  2177. pos = strrchr(device, '/');
  2178. if (pos) ++pos;
  2179. else pos = device;
  2180. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  2181. dir = opendir(sysdir);
  2182. if (!dir) Error("Can't open directory (%s)", sysdir);
  2183. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  2184. printf("--------------------------------------------------------------------------------\n");
  2185. while ((entry = readdir(dir)) != NULL) {
  2186. FILE *f;
  2187. unsigned long use = 0;
  2188. // unsigned long size = 0;
  2189. // unsigned long refs = 0;
  2190. unsigned long mode = 0;
  2191. // unsigned long hwref = 0;
  2192. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  2193. if (!isnumber(entry->d_name+4)) continue;
  2194. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  2195. f = fopen(fname, "r");
  2196. if (!f) Error("Can't access file (%s)", fname);
  2197. while(!feof(f)) {
  2198. if (!fgets(info, 256, f))
  2199. break;
  2200. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  2201. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  2202. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  2203. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2204. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2205. }
  2206. fclose(f);
  2207. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  2208. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  2209. if (use&0x80) {
  2210. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  2211. } else {
  2212. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  2213. }
  2214. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  2215. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  2216. err = pcilib_start_dma(handle, dmaid, 0);
  2217. if (err) {
  2218. printf("-- Wrong state, start is failed\n");
  2219. continue;
  2220. }
  2221. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2222. if (err) {
  2223. printf("-- Wrong state, failed to obtain status\n");
  2224. pcilib_stop_dma(handle, dmaid, 0);
  2225. continue;
  2226. }
  2227. pcilib_stop_dma(handle, dmaid, 0);
  2228. if (status.started) printf("S");
  2229. else printf(" ");
  2230. if (status.ring_head == status.ring_tail) printf(" ");
  2231. else printf("D");
  2232. printf(" ");
  2233. printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  2234. printf(" ");
  2235. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  2236. printf("\n");
  2237. }
  2238. closedir(dir);
  2239. printf("--------------------------------------------------------------------------------\n");
  2240. printf("S - Started, D - Data in buffers\n");
  2241. return 0;
  2242. }
  2243. int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  2244. int err;
  2245. size_t i;
  2246. pcilib_dma_engine_t dmaid;
  2247. pcilib_dma_engine_status_t status;
  2248. pcilib_dma_buffer_status_t *buffer;
  2249. char stmp[256];
  2250. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2251. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2252. err = pcilib_start_dma(handle, dmaid, 0);
  2253. if (err) Error("Error starting the specified DMA engine");
  2254. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2255. if (err) Error("Failed to obtain status of the specified DMA engine");
  2256. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2257. if (!buffer) Error("Failed to allocate memory for status buffer");
  2258. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2259. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2260. printf("Buffer Status Total Size \n");
  2261. printf("--------------------------------------------------------------------------------\n");
  2262. for (i = 0; i < status.ring_size; i++) {
  2263. printf("%8zu ", i);
  2264. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  2265. printf("%10s", GetPrintSize(stmp, buffer[i].size));
  2266. printf("\n");
  2267. }
  2268. printf("--------------------------------------------------------------------------------\n");
  2269. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  2270. free(buffer);
  2271. pcilib_stop_dma(handle, dmaid, 0);
  2272. return 0;
  2273. }
  2274. int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  2275. int err;
  2276. pcilib_dma_engine_t dmaid;
  2277. pcilib_dma_engine_status_t status;
  2278. pcilib_dma_buffer_status_t *buffer;
  2279. size_t size;
  2280. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2281. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2282. err = pcilib_start_dma(handle, dmaid, 0);
  2283. if (err) Error("Error starting the specified DMA engine");
  2284. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2285. if (err) Error("Failed to obtain status of the specified DMA engine");
  2286. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2287. if (!buffer) Error("Failed to allocate memory for status buffer");
  2288. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2289. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2290. if (block == (size_t)-1) {
  2291. // get current
  2292. }
  2293. size = buffer[block].size;
  2294. free(buffer);
  2295. pcilib_stop_dma(handle, dmaid, 0);
  2296. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  2297. }
  2298. int ListLocks(pcilib_t *ctx, int verbose) {
  2299. int err;
  2300. pcilib_lock_id_t i;
  2301. if (verbose)
  2302. printf("ID Refs Flags Locked Name\n");
  2303. else
  2304. printf("ID Refs Flags Name\n");
  2305. printf("--------------------------------------------------------------------------------\n");
  2306. for (i = 0; i < PCILIB_MAX_LOCKS; i++) {
  2307. pcilib_lock_t *lock = pcilib_get_lock_by_id(ctx, i);
  2308. const char *name = pcilib_lock_get_name(lock);
  2309. if (!name) break;
  2310. pcilib_lock_flags_t flags = pcilib_lock_get_flags(lock);
  2311. size_t refs = pcilib_lock_get_refs(lock);
  2312. printf("%4u %4zu ", i, refs);
  2313. if (flags&PCILIB_LOCK_FLAG_PERSISTENT) printf("P");
  2314. else printf(" ");
  2315. printf(" ");
  2316. if (verbose) {
  2317. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, PCILIB_TIMEOUT_IMMEDIATE);
  2318. switch (err) {
  2319. case 0:
  2320. pcilib_unlock(lock);
  2321. printf("No ");
  2322. break;
  2323. case PCILIB_ERROR_TIMEOUT:
  2324. printf("Yes ");
  2325. break;
  2326. default:
  2327. printf("Err: %3i ", err);
  2328. }
  2329. }
  2330. printf("%s\n", name);
  2331. }
  2332. printf("--------------------------------------------------------------------------------\n");
  2333. printf("P - Persistent\n");
  2334. return 0;
  2335. }
  2336. int FreeLocks(pcilib_t *handle, int force) {
  2337. return pcilib_destroy_all_locks(handle, force);
  2338. }
  2339. int LockUnlock(pcilib_t *handle, const char *name, int do_lock, pcilib_timeout_t timeout) {
  2340. int err = 0;
  2341. pcilib_lock_t *lock = pcilib_get_lock(handle, PCILIB_LOCK_FLAG_PERSISTENT, name);
  2342. if (!lock) Error("Error getting persistent lock %s", name);
  2343. if (do_lock)
  2344. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, timeout);
  2345. else
  2346. pcilib_unlock(lock);
  2347. if (err) {
  2348. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2349. switch (err) {
  2350. case PCILIB_ERROR_TIMEOUT:
  2351. printf("Timeout locking %s\n", name);
  2352. break;
  2353. default:
  2354. Error("Error (%i) locking %s", err, name);
  2355. }
  2356. } else if (do_lock) {
  2357. pcilib_lock_ref(lock);
  2358. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2359. printf("%s is locked\n", name);
  2360. } else {
  2361. pcilib_lock_unref(lock);
  2362. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2363. }
  2364. return err;
  2365. }
  2366. int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2367. int err;
  2368. err = pcilib_enable_irq(handle, irq_type, 0);
  2369. if (err) {
  2370. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2371. Error("Error enabling IRQs");
  2372. }
  2373. return err;
  2374. }
  2375. int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2376. int err;
  2377. err = pcilib_disable_irq(handle, 0);
  2378. if (err) {
  2379. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2380. Error("Error disabling IRQs");
  2381. }
  2382. return err;
  2383. }
  2384. int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  2385. pcilib_clear_irq(handle, irq_source);
  2386. return 0;
  2387. }
  2388. int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  2389. int err;
  2390. size_t count;
  2391. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  2392. if (err) {
  2393. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  2394. else Error("Error waiting for IRQ");
  2395. }
  2396. return 0;
  2397. }
  2398. int main(int argc, char **argv) {
  2399. int err = 0;
  2400. int i;
  2401. long itmp;
  2402. size_t ztmp;
  2403. unsigned char c;
  2404. const char *stmp;
  2405. const char *num_offset;
  2406. int details = 0;
  2407. int verbose = 0;
  2408. int quiete = 0;
  2409. int force = 0;
  2410. int verify = 0;
  2411. pcilib_log_priority_t log_priority;
  2412. const char *model = NULL;
  2413. const pcilib_model_description_t *model_info;
  2414. const pcilib_dma_description_t *dma_info;
  2415. MODE mode = MODE_INVALID;
  2416. GRAB_MODE grab_mode = 0;
  2417. size_t trigger_time = 0;
  2418. size_t run_time = 0;
  2419. size_t buffer = 0;
  2420. size_t threads = 1;
  2421. FORMAT format = FORMAT_DEFAULT;
  2422. PARTITION partition = PARTITION_UNKNOWN;
  2423. FLAGS flags = 0;
  2424. const char *atype = NULL;
  2425. const char *type = NULL;
  2426. ACCESS_MODE amode = ACCESS_BAR;
  2427. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  2428. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  2429. const char *addr = NULL;
  2430. const char *reg = NULL;
  2431. const char *view = NULL;
  2432. const char *unit = NULL;
  2433. const char *attr = NULL;
  2434. const char *bank = NULL;
  2435. char **data = NULL;
  2436. const char *event = NULL;
  2437. const char *data_type = NULL;
  2438. const char *dma_channel = NULL;
  2439. const char *use = NULL;
  2440. const char *lock = NULL;
  2441. const char *info_target = NULL;
  2442. const char *list_target = NULL;
  2443. size_t block = (size_t)-1;
  2444. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  2445. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  2446. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  2447. pcilib_kmem_use_t useid = 0;
  2448. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  2449. long addr_shift = 0;
  2450. uintptr_t start = -1;
  2451. size_t block_size = 0;
  2452. size_t size = 1;
  2453. access_t access = 4;
  2454. // int skip = 0;
  2455. int endianess = 0;
  2456. size_t timeout = 0;
  2457. size_t alignment = 0;
  2458. const char *output = NULL;
  2459. FILE *ofile = NULL;
  2460. size_t iterations = BENCHMARK_ITERATIONS;
  2461. pcilib_t *handle;
  2462. int size_set = 0;
  2463. int timeout_set = 0;
  2464. // int run_time_set = 0;
  2465. struct sched_param sched_param = {0};
  2466. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  2467. extern int optind;
  2468. switch (c) {
  2469. case OPT_HELP:
  2470. Usage(argc, argv, NULL);
  2471. break;
  2472. case OPT_INFO:
  2473. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2474. if (optarg) info_target = optarg;
  2475. else if ((optind < argc)&&(argv[optind][0] != '-')) info_target = argv[optind++];
  2476. mode = MODE_INFO;
  2477. break;
  2478. case OPT_LIST:
  2479. if (mode == MODE_LIST) details++;
  2480. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2481. if (optarg) list_target = optarg;
  2482. else if ((optind < argc)&&(argv[optind][0] != '-')) list_target = argv[optind++];
  2483. mode = MODE_LIST;
  2484. break;
  2485. case OPT_RESET:
  2486. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2487. mode = MODE_RESET;
  2488. break;
  2489. case OPT_BENCHMARK:
  2490. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2491. mode = MODE_BENCHMARK;
  2492. if (optarg) addr = optarg;
  2493. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2494. break;
  2495. case OPT_READ:
  2496. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2497. mode = MODE_READ;
  2498. if (optarg) addr = optarg;
  2499. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2500. break;
  2501. case OPT_WRITE:
  2502. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2503. mode = MODE_WRITE;
  2504. if (optarg) addr = optarg;
  2505. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2506. break;
  2507. case OPT_GRAB:
  2508. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  2509. mode = MODE_GRAB;
  2510. grab_mode |= GRAB_MODE_GRAB;
  2511. stmp = NULL;
  2512. if (optarg) stmp = optarg;
  2513. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2514. if (stmp) {
  2515. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2516. event = stmp;
  2517. }
  2518. break;
  2519. case OPT_TRIGGER:
  2520. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  2521. mode = MODE_GRAB;
  2522. grab_mode |= GRAB_MODE_TRIGGER;
  2523. stmp = NULL;
  2524. if (optarg) stmp = optarg;
  2525. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2526. if (stmp) {
  2527. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2528. event = stmp;
  2529. }
  2530. break;
  2531. case OPT_LIST_DMA:
  2532. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2533. mode = MODE_LIST_DMA;
  2534. break;
  2535. case OPT_LIST_DMA_BUFFERS:
  2536. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2537. mode = MODE_LIST_DMA_BUFFERS;
  2538. dma_channel = optarg;
  2539. break;
  2540. case OPT_READ_DMA_BUFFER:
  2541. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2542. mode = MODE_READ_DMA_BUFFER;
  2543. num_offset = strchr(optarg, ':');
  2544. if (num_offset) {
  2545. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2546. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2547. *(char*)num_offset = 0;
  2548. } else block = (size_t)-1;
  2549. dma_channel = optarg;
  2550. break;
  2551. case OPT_START_DMA:
  2552. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2553. mode = MODE_START_DMA;
  2554. if (optarg) dma_channel = optarg;
  2555. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2556. break;
  2557. case OPT_STOP_DMA:
  2558. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2559. mode = MODE_STOP_DMA;
  2560. if (optarg) dma_channel = optarg;
  2561. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2562. break;
  2563. case OPT_ENABLE_IRQ:
  2564. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2565. mode = MODE_ENABLE_IRQ;
  2566. if (optarg) num_offset = optarg;
  2567. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2568. else num_offset = NULL;
  2569. if (num_offset) {
  2570. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2571. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2572. irq_type = itmp;
  2573. }
  2574. break;
  2575. case OPT_DISABLE_IRQ:
  2576. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2577. mode = MODE_DISABLE_IRQ;
  2578. if (optarg) num_offset = optarg;
  2579. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2580. else num_offset = NULL;
  2581. if (num_offset) {
  2582. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2583. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2584. irq_type = itmp;
  2585. }
  2586. break;
  2587. case OPT_ACK_IRQ:
  2588. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2589. mode = MODE_ACK_IRQ;
  2590. if (optarg) num_offset = optarg;
  2591. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2592. else num_offset = NULL;
  2593. if (num_offset) {
  2594. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2595. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2596. irq_source = itmp;
  2597. }
  2598. break;
  2599. case OPT_WAIT_IRQ:
  2600. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2601. mode = MODE_WAIT_IRQ;
  2602. if (optarg) num_offset = optarg;
  2603. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2604. else num_offset = NULL;
  2605. if (num_offset) {
  2606. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2607. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2608. irq_source = itmp;
  2609. }
  2610. break;
  2611. case OPT_LIST_KMEM:
  2612. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2613. mode = MODE_LIST_KMEM;
  2614. if (optarg) use = optarg;
  2615. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2616. else use = NULL;
  2617. if (use) {
  2618. num_offset = strchr(use, ':');
  2619. if (num_offset) {
  2620. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2621. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2622. *(char*)num_offset = 0;
  2623. }
  2624. }
  2625. break;
  2626. case OPT_READ_KMEM:
  2627. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2628. mode = MODE_READ_KMEM;
  2629. if (!model) model = "pci";
  2630. num_offset = strchr(optarg, ':');
  2631. if (num_offset) {
  2632. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2633. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2634. *(char*)num_offset = 0;
  2635. }
  2636. use = optarg;
  2637. useid = ParseUse(use);
  2638. break;
  2639. case OPT_ALLOC_KMEM:
  2640. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2641. mode = MODE_ALLOC_KMEM;
  2642. model = "pci";
  2643. if (optarg) use = optarg;
  2644. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2645. break;
  2646. case OPT_FREE_KMEM:
  2647. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2648. mode = MODE_FREE_KMEM;
  2649. if (!model) model = "pci";
  2650. if (optarg) use = optarg;
  2651. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2652. break;
  2653. case OPT_LIST_LOCKS:
  2654. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2655. mode = MODE_LIST_LOCKS;
  2656. break;
  2657. case OPT_FREE_LOCKS:
  2658. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2659. mode = MODE_FREE_LOCKS;
  2660. model = "maintenance";
  2661. break;
  2662. case OPT_LOCK:
  2663. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2664. mode = MODE_LOCK;
  2665. lock = optarg;
  2666. break;
  2667. case OPT_UNLOCK:
  2668. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2669. mode = MODE_UNLOCK;
  2670. lock = optarg;
  2671. break;
  2672. case OPT_DEVICE:
  2673. fpga_device = optarg;
  2674. break;
  2675. case OPT_MODEL:
  2676. model = optarg;
  2677. /* if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2678. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2679. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2680. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
  2681. break;
  2682. case OPT_BAR:
  2683. bank = optarg;
  2684. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2685. // else bar = itmp;
  2686. break;
  2687. case OPT_ALIGNMENT:
  2688. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2689. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2690. }
  2691. break;
  2692. case OPT_ACCESS:
  2693. if (!strncasecmp(optarg, "fifo", 4)) {
  2694. atype = "fifo";
  2695. num_offset = optarg + 4;
  2696. amode = ACCESS_FIFO;
  2697. } else if (!strncasecmp(optarg, "dma", 3)) {
  2698. atype = "dma";
  2699. num_offset = optarg + 3;
  2700. amode = ACCESS_DMA;
  2701. } else if (!strncasecmp(optarg, "bar", 3)) {
  2702. atype = "plain";
  2703. num_offset = optarg + 3;
  2704. amode = ACCESS_BAR;
  2705. } else if (!strncasecmp(optarg, "config", 6)) {
  2706. atype = "config";
  2707. num_offset = optarg + 6;
  2708. amode = ACCESS_CONFIG;
  2709. } else if (!strncasecmp(optarg, "plain", 5)) {
  2710. atype = "plain";
  2711. num_offset = optarg + 5;
  2712. amode = ACCESS_BAR;
  2713. } else {
  2714. num_offset = optarg;
  2715. }
  2716. if (*num_offset) {
  2717. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2718. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2719. switch (itmp) {
  2720. case 8: access = 1; break;
  2721. case 16: access = 2; break;
  2722. case 32: access = 4; break;
  2723. case 64: access = 8; break;
  2724. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2725. }
  2726. }
  2727. break;
  2728. case OPT_SIZE:
  2729. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2730. if (strcasecmp(optarg, "unlimited"))
  2731. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2732. else
  2733. size = 0;//(size_t)-1;
  2734. }
  2735. size_set = 1;
  2736. break;
  2737. case OPT_BLOCK_SIZE:
  2738. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2739. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2740. }
  2741. break;
  2742. case OPT_ENDIANESS:
  2743. if ((*optarg == 'b')||(*optarg == 'B')) {
  2744. if (ntohs(1) == 1) endianess = 0;
  2745. else endianess = 1;
  2746. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2747. if (ntohs(1) == 1) endianess = 1;
  2748. else endianess = 0;
  2749. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2750. break;
  2751. case OPT_TIMEOUT:
  2752. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2753. if (strcasecmp(optarg, "unlimited"))
  2754. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2755. else
  2756. timeout = PCILIB_TIMEOUT_INFINITE;
  2757. }
  2758. timeout_set = 1;
  2759. break;
  2760. case OPT_OUTPUT:
  2761. output = optarg;
  2762. break;
  2763. case OPT_ITERATIONS:
  2764. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2765. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2766. break;
  2767. case OPT_EVENT:
  2768. event = optarg;
  2769. break;
  2770. case OPT_TYPE:
  2771. type = optarg;
  2772. break;
  2773. case OPT_DATA_TYPE:
  2774. data_type = optarg;
  2775. break;
  2776. case OPT_RUN_TIME:
  2777. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2778. if (strcasecmp(optarg, "unlimited"))
  2779. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2780. else
  2781. run_time = 0;
  2782. }
  2783. // run_time_set = 1;
  2784. break;
  2785. case OPT_TRIGGER_TIME:
  2786. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2787. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2788. break;
  2789. case OPT_TRIGGER_RATE:
  2790. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2791. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2792. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2793. break;
  2794. case OPT_BUFFER:
  2795. if (optarg) num_offset = optarg;
  2796. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2797. else num_offset = NULL;
  2798. if (num_offset) {
  2799. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2800. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2801. buffer *= 1024 * 1024;
  2802. } else {
  2803. buffer = get_free_memory();
  2804. if (buffer < 256) Error("Not enough free memory (%lz MiB) for buffering", buffer / 1024 / 1024);
  2805. buffer -= 128 + buffer/16;
  2806. }
  2807. break;
  2808. case OPT_THREADS:
  2809. if (optarg) num_offset = optarg;
  2810. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2811. else num_offset = NULL;
  2812. if (num_offset) {
  2813. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2814. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2815. } else {
  2816. threads = 0;
  2817. }
  2818. break;
  2819. case OPT_FORMAT:
  2820. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2821. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2822. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2823. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2824. break;
  2825. case OPT_QUIETE:
  2826. quiete = 1;
  2827. verbose = -1;
  2828. break;
  2829. case OPT_VERBOSE:
  2830. if (optarg) num_offset = optarg;
  2831. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2832. else num_offset = NULL;
  2833. if (num_offset) {
  2834. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2835. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2836. } else {
  2837. verbose = 1;
  2838. }
  2839. break;
  2840. case OPT_FORCE:
  2841. force = 1;
  2842. break;
  2843. case OPT_VERIFY:
  2844. verify = 1;
  2845. break;
  2846. case OPT_MULTIPACKET:
  2847. flags |= FLAG_MULTIPACKET;
  2848. break;
  2849. case OPT_WAIT:
  2850. flags |= FLAG_WAIT;
  2851. break;
  2852. default:
  2853. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2854. }
  2855. }
  2856. if (mode == MODE_INVALID) {
  2857. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2858. else Usage(argc, argv, NULL);
  2859. }
  2860. if (verbose) log_priority = PCILIB_LOG_INFO;
  2861. else if (quiete) log_priority = PCILIB_LOG_ERROR;
  2862. else log_priority = PCILIB_LOG_WARNING;
  2863. pcilib_set_logger(log_priority, &LogError, NULL);
  2864. handle = pcilib_open(fpga_device, model);
  2865. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2866. model_info = pcilib_get_model_description(handle);
  2867. dma_info = pcilib_get_dma_description(handle);
  2868. switch (mode) {
  2869. case MODE_WRITE:
  2870. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2871. int vallen = strlen(argv[optind]);
  2872. if (vallen > 1) {
  2873. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2874. if (!data) Error("Error allocating memory for data array");
  2875. for (i = 0; i < size; i++) {
  2876. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2877. strcpy(data[i], argv[optind] + 1);
  2878. }
  2879. } else {
  2880. data = (char**)malloc(size * (9 + sizeof(char*)));
  2881. if (!data) Error("Error allocating memory for data array");
  2882. for (i = 0; i < size; i++) {
  2883. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2884. sprintf(data[i], "%x", i);
  2885. }
  2886. }
  2887. } else if ((argc - optind) == size) data = argv + optind;
  2888. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2889. case MODE_READ:
  2890. if (!addr) {
  2891. if (((!dma_info)||(!dma_info->api))&&(!model_info->api)&&(!handle->num_reg)) {
  2892. // if (model == PCILIB_MODEL_PCI) {
  2893. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2894. Usage(argc, argv, "The address is not specified");
  2895. } else ++mode;
  2896. }
  2897. break;
  2898. case MODE_START_DMA:
  2899. case MODE_STOP_DMA:
  2900. case MODE_LIST_DMA_BUFFERS:
  2901. case MODE_READ_DMA_BUFFER:
  2902. if ((dma_channel)&&(*dma_channel)) {
  2903. itmp = strlen(dma_channel) - 1;
  2904. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2905. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2906. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2907. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2908. else {
  2909. num_offset = dma_channel + 3;
  2910. itmp -= 3;
  2911. }
  2912. if (bank) {
  2913. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  2914. }
  2915. if (!isnumber_n(num_offset, itmp))
  2916. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  2917. dma = atoi(num_offset);
  2918. }
  2919. break;
  2920. case MODE_LIST:
  2921. if (bank&&list_target) {
  2922. if (strcmp(list_target, bank))
  2923. Usage(argc, argv, "Conflicting banks are specified in list parameter (%s) and bank parameter (%s)", list_target, bank);
  2924. } else if (bank) {
  2925. list_target = bank;
  2926. }
  2927. break;
  2928. default:
  2929. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  2930. }
  2931. if (addr) {
  2932. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2933. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  2934. if (bank) {
  2935. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2936. } else {
  2937. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  2938. }
  2939. dma = atoi(addr + 3);
  2940. amode = ACCESS_DMA;
  2941. addr = NULL;
  2942. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2943. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  2944. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2945. bar = atoi(addr + 3);
  2946. amode = ACCESS_BAR;
  2947. addr = NULL;
  2948. } else if (!strcmp(addr, "config")) {
  2949. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  2950. amode = ACCESS_CONFIG;
  2951. addr = NULL;
  2952. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  2953. // check if the address in the register range
  2954. const pcilib_register_range_t *ranges = model_info->ranges;
  2955. if (ranges) {
  2956. for (i = 0; ranges[i].start != ranges[i].end; i++)
  2957. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  2958. // register access in plain mode
  2959. if (ranges[i].start != ranges[i].end) {
  2960. pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
  2961. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  2962. bank = model_info->banks[regbank].name;
  2963. start += ranges[i].addr_shift;
  2964. addr_shift = ranges[i].addr_shift;
  2965. ++mode;
  2966. }
  2967. }
  2968. } else {
  2969. const char *spec;
  2970. attr = strchr(addr, '@');
  2971. if (attr) {
  2972. size_t spec_size = strlen(addr) - strlen(attr);
  2973. spec = strndupa(addr, spec_size);
  2974. attr++;
  2975. } else {
  2976. spec = addr;
  2977. }
  2978. view = strchr(spec, '/');
  2979. unit = strchr((view?view:spec), ':');
  2980. if (view||unit) {
  2981. size_t reg_size = strlen(spec) - strlen(view?view:unit);
  2982. if (reg_size) reg = strndupa(spec, reg_size);
  2983. else reg = NULL;
  2984. if ((reg)&&(view)) view++;
  2985. if (unit) unit++;
  2986. if (view&&unit) {
  2987. view = strndupa(view, strlen(view) - strlen(unit) - 1);
  2988. } else if ((reg)&&(unit)) {
  2989. view = unit;
  2990. unit = NULL;
  2991. }
  2992. } else {
  2993. if (*spec) reg = spec;
  2994. else reg = NULL;
  2995. }
  2996. if (reg) {
  2997. if (pcilib_find_register(handle, bank, reg) == PCILIB_REGISTER_INVALID) {
  2998. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  2999. }
  3000. }
  3001. if (attr) {
  3002. if (mode == MODE_WRITE)
  3003. Error("Writting of attributes is not supported");
  3004. mode += 3;
  3005. } else if (reg) {
  3006. mode += 1;
  3007. } else {
  3008. mode += 2;
  3009. }
  3010. }
  3011. }
  3012. if (mode == MODE_GRAB) {
  3013. if (output) {
  3014. char fsname[128];
  3015. if (!get_file_fs(output, 127, fsname)) {
  3016. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  3017. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  3018. }
  3019. } else {
  3020. output = "/dev/null";
  3021. partition = PARTITION_NULL;
  3022. }
  3023. if (!timeout_set) {
  3024. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  3025. else timeout = PCILIB_EVENT_TIMEOUT;
  3026. }
  3027. if (!size_set) {
  3028. if (run_time) size = 0;
  3029. }
  3030. }
  3031. if (mode != MODE_GRAB) {
  3032. if (size == (size_t)-1)
  3033. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  3034. }
  3035. if ((bank)&&(amode == ACCESS_DMA)) {
  3036. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  3037. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  3038. else dma = itmp;
  3039. } else if (bank) {
  3040. switch (mode) {
  3041. case MODE_BENCHMARK:
  3042. case MODE_READ:
  3043. case MODE_WRITE:
  3044. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS))
  3045. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  3046. else bar = itmp;
  3047. break;
  3048. default:
  3049. if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  3050. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  3051. }
  3052. }
  3053. signal(SIGINT, signal_exit_handler);
  3054. if ((mode != MODE_GRAB)&&(output)) {
  3055. ofile = fopen(output, "a+");
  3056. if (!ofile) {
  3057. Error("Failed to open file \"%s\"", output);
  3058. }
  3059. }
  3060. // Requesting real-time priority when needed
  3061. switch (mode) {
  3062. case MODE_READ:
  3063. case MODE_WRITE:
  3064. if (amode != ACCESS_DMA)
  3065. break;
  3066. case MODE_BENCHMARK:
  3067. sched_param.sched_priority = sched_get_priority_max(SCHED_FIFO);
  3068. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  3069. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  3070. break;
  3071. case MODE_GRAB:
  3072. sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO);
  3073. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  3074. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  3075. break;
  3076. default:
  3077. ;
  3078. }
  3079. switch (mode) {
  3080. case MODE_INFO:
  3081. Info(handle, model_info, info_target);
  3082. break;
  3083. case MODE_LIST:
  3084. if ((list_target)&&(*list_target == '/'))
  3085. ListProperties(handle, list_target, details);
  3086. else
  3087. List(handle, model_info, list_target, details);
  3088. break;
  3089. case MODE_BENCHMARK:
  3090. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  3091. break;
  3092. case MODE_READ:
  3093. if (amode == ACCESS_DMA) {
  3094. err = ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  3095. } else if (amode == ACCESS_CONFIG) {
  3096. err = ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  3097. } else if (addr) {
  3098. err = ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  3099. } else {
  3100. Error("Address to read is not specified");
  3101. }
  3102. break;
  3103. case MODE_READ_REGISTER:
  3104. case MODE_READ_PROPERTY:
  3105. case MODE_READ_ATTR:
  3106. if ((reg)||(view)||(attr)||(!addr)) ReadRegister(handle, model_info, bank, reg, view, unit, attr);
  3107. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  3108. break;
  3109. case MODE_WRITE:
  3110. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  3111. break;
  3112. case MODE_WRITE_REGISTER:
  3113. case MODE_WRITE_PROPERTY:
  3114. if (reg||view) WriteRegister(handle, model_info, bank, reg, view, unit, data);
  3115. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  3116. break;
  3117. case MODE_RESET:
  3118. pcilib_reset(handle);
  3119. break;
  3120. case MODE_GRAB:
  3121. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  3122. break;
  3123. case MODE_LIST_DMA:
  3124. ListDMA(handle, fpga_device, model_info);
  3125. break;
  3126. case MODE_LIST_DMA_BUFFERS:
  3127. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  3128. break;
  3129. case MODE_READ_DMA_BUFFER:
  3130. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  3131. break;
  3132. case MODE_START_DMA:
  3133. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  3134. break;
  3135. case MODE_STOP_DMA:
  3136. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  3137. break;
  3138. case MODE_ENABLE_IRQ:
  3139. EnableIRQ(handle, model_info, irq_type);
  3140. break;
  3141. case MODE_DISABLE_IRQ:
  3142. DisableIRQ(handle, model_info, irq_type);
  3143. break;
  3144. case MODE_ACK_IRQ:
  3145. AckIRQ(handle, model_info, irq_source);
  3146. break;
  3147. case MODE_WAIT_IRQ:
  3148. WaitIRQ(handle, model_info, irq_source, timeout);
  3149. break;
  3150. case MODE_LIST_KMEM:
  3151. if (use) DetailKMEM(handle, fpga_device, use, block);
  3152. else ListKMEM(handle, fpga_device);
  3153. break;
  3154. case MODE_READ_KMEM:
  3155. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  3156. break;
  3157. case MODE_ALLOC_KMEM:
  3158. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  3159. break;
  3160. case MODE_FREE_KMEM:
  3161. FreeKMEM(handle, fpga_device, use, force);
  3162. break;
  3163. case MODE_LIST_LOCKS:
  3164. ListLocks(handle, verbose);
  3165. break;
  3166. case MODE_FREE_LOCKS:
  3167. FreeLocks(handle, force);
  3168. break;
  3169. case MODE_LOCK:
  3170. LockUnlock(handle, lock, 1, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3171. break;
  3172. case MODE_UNLOCK:
  3173. LockUnlock(handle, lock, 0, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3174. break;
  3175. case MODE_INVALID:
  3176. break;
  3177. }
  3178. if (ofile) fclose(ofile);
  3179. pcilib_close(handle);
  3180. if (data != argv + optind) free(data);
  3181. return err;
  3182. }