cli.c 94 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108
  1. #define _POSIX_C_SOURCE 200112L
  2. #define _BSD_SOURCE
  3. #include <stdio.h>
  4. #include <stdlib.h>
  5. #include <string.h>
  6. #include <strings.h>
  7. #include <stdint.h>
  8. #include <stdarg.h>
  9. #include <fcntl.h>
  10. #include <unistd.h>
  11. #include <sys/time.h>
  12. #include <sys/ioctl.h>
  13. #include <sys/mman.h>
  14. #include <errno.h>
  15. #include <alloca.h>
  16. #include <arpa/inet.h>
  17. #include <sys/types.h>
  18. #include <sys/stat.h>
  19. #include <dirent.h>
  20. #include <pthread.h>
  21. #include <signal.h>
  22. #include <getopt.h>
  23. #include <fastwriter.h>
  24. #include "pcitool/sysinfo.h"
  25. #include "pcitool/formaters.h"
  26. #include "pci.h"
  27. #include "tools.h"
  28. #include "kmem.h"
  29. #include "error.h"
  30. #include "model.h"
  31. /* defines */
  32. #define MAX_KBUF 14
  33. //#define BIGBUFSIZE (512*1024*1024)
  34. #define BIGBUFSIZE (1024*1024)
  35. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  36. #define LINE_WIDTH 80
  37. #define SEPARATOR_WIDTH 2
  38. #define BLOCK_SEPARATOR_WIDTH 2
  39. #define BLOCK_SIZE 8
  40. #define BENCHMARK_ITERATIONS 128
  41. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  42. #define isnumber pcilib_isnumber
  43. #define isxnumber pcilib_isxnumber
  44. #define isnumber_n pcilib_isnumber_n
  45. #define isxnumber_n pcilib_isxnumber_n
  46. typedef uint8_t access_t;
  47. typedef enum {
  48. GRAB_MODE_GRAB = 1,
  49. GRAB_MODE_TRIGGER = 2
  50. } GRAB_MODE;
  51. typedef enum {
  52. MODE_INVALID,
  53. MODE_INFO,
  54. MODE_LIST,
  55. MODE_BENCHMARK,
  56. MODE_READ,
  57. MODE_READ_REGISTER,
  58. MODE_WRITE,
  59. MODE_WRITE_REGISTER,
  60. MODE_RESET,
  61. MODE_GRAB,
  62. MODE_START_DMA,
  63. MODE_STOP_DMA,
  64. MODE_LIST_DMA,
  65. MODE_LIST_DMA_BUFFERS,
  66. MODE_READ_DMA_BUFFER,
  67. MODE_ENABLE_IRQ,
  68. MODE_DISABLE_IRQ,
  69. MODE_ACK_IRQ,
  70. MODE_WAIT_IRQ,
  71. MODE_ALLOC_KMEM,
  72. MODE_LIST_KMEM,
  73. MODE_READ_KMEM,
  74. MODE_FREE_KMEM
  75. } MODE;
  76. typedef enum {
  77. ACCESS_BAR,
  78. ACCESS_DMA,
  79. ACCESS_FIFO,
  80. ACCESS_CONFIG
  81. } ACCESS_MODE;
  82. typedef enum {
  83. FLAG_MULTIPACKET = 1,
  84. FLAG_WAIT = 2
  85. } FLAGS;
  86. typedef enum {
  87. FORMAT_DEFAULT = 0,
  88. FORMAT_RAW,
  89. FORMAT_HEADER,
  90. FORMAT_RINGFS
  91. } FORMAT;
  92. typedef enum {
  93. PARTITION_UNKNOWN,
  94. PARTITION_RAW,
  95. PARTITION_EXT4,
  96. PARTITION_NULL
  97. } PARTITION;
  98. typedef enum {
  99. OPT_DEVICE = 'd',
  100. OPT_MODEL = 'm',
  101. OPT_BAR = 'b',
  102. OPT_ACCESS = 'a',
  103. OPT_ENDIANESS = 'e',
  104. OPT_SIZE = 's',
  105. OPT_OUTPUT = 'o',
  106. OPT_TIMEOUT = 't',
  107. OPT_INFO = 'i',
  108. OPT_LIST = 'l',
  109. OPT_READ = 'r',
  110. OPT_WRITE = 'w',
  111. OPT_GRAB = 'g',
  112. OPT_QUIETE = 'q',
  113. OPT_HELP = 'h',
  114. OPT_RESET = 128,
  115. OPT_BENCHMARK,
  116. OPT_TRIGGER,
  117. OPT_DATA_TYPE,
  118. OPT_EVENT,
  119. OPT_TRIGGER_RATE,
  120. OPT_TRIGGER_TIME,
  121. OPT_RUN_TIME,
  122. OPT_FORMAT,
  123. OPT_BUFFER,
  124. OPT_THREADS,
  125. OPT_LIST_DMA,
  126. OPT_LIST_DMA_BUFFERS,
  127. OPT_READ_DMA_BUFFER,
  128. OPT_START_DMA,
  129. OPT_STOP_DMA,
  130. OPT_ENABLE_IRQ,
  131. OPT_DISABLE_IRQ,
  132. OPT_ACK_IRQ,
  133. OPT_WAIT_IRQ,
  134. OPT_ITERATIONS,
  135. OPT_ALLOC_KMEM,
  136. OPT_LIST_KMEM,
  137. OPT_FREE_KMEM,
  138. OPT_READ_KMEM,
  139. OPT_BLOCK_SIZE,
  140. OPT_ALIGNMENT,
  141. OPT_TYPE,
  142. OPT_FORCE,
  143. OPT_VERIFY,
  144. OPT_WAIT,
  145. OPT_MULTIPACKET,
  146. OPT_VERBOSE
  147. } OPTIONS;
  148. static struct option long_options[] = {
  149. {"device", required_argument, 0, OPT_DEVICE },
  150. {"model", required_argument, 0, OPT_MODEL },
  151. {"bar", required_argument, 0, OPT_BAR },
  152. {"access", required_argument, 0, OPT_ACCESS },
  153. {"endianess", required_argument, 0, OPT_ENDIANESS },
  154. {"size", required_argument, 0, OPT_SIZE },
  155. {"output", required_argument, 0, OPT_OUTPUT },
  156. {"timeout", required_argument, 0, OPT_TIMEOUT },
  157. {"iterations", required_argument, 0, OPT_ITERATIONS },
  158. {"info", no_argument, 0, OPT_INFO },
  159. {"list", no_argument, 0, OPT_LIST },
  160. {"reset", no_argument, 0, OPT_RESET },
  161. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  162. {"read", optional_argument, 0, OPT_READ },
  163. {"write", optional_argument, 0, OPT_WRITE },
  164. {"grab", optional_argument, 0, OPT_GRAB },
  165. {"trigger", optional_argument, 0, OPT_TRIGGER },
  166. {"data", required_argument, 0, OPT_DATA_TYPE },
  167. {"event", required_argument, 0, OPT_EVENT },
  168. {"run-time", required_argument, 0, OPT_RUN_TIME },
  169. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  170. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  171. {"format", required_argument, 0, OPT_FORMAT },
  172. {"buffer", optional_argument, 0, OPT_BUFFER },
  173. {"threads", optional_argument, 0, OPT_THREADS },
  174. {"start-dma", required_argument, 0, OPT_START_DMA },
  175. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  176. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  177. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  178. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  179. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  180. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  181. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  182. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  183. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  184. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  185. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  186. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  187. {"type", required_argument, 0, OPT_TYPE },
  188. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  189. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  190. {"quiete", no_argument, 0, OPT_QUIETE },
  191. {"verbose", optional_argument, 0, OPT_VERBOSE },
  192. {"force", no_argument, 0, OPT_FORCE },
  193. {"verify", no_argument, 0, OPT_VERIFY },
  194. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  195. {"wait", no_argument, 0, OPT_WAIT },
  196. {"help", no_argument, 0, OPT_HELP },
  197. { 0, 0, 0, 0 }
  198. };
  199. void Usage(int argc, char *argv[], const char *format, ...) {
  200. if (format) {
  201. va_list ap;
  202. va_start(ap, format);
  203. printf("Error %i: ", errno);
  204. vprintf(format, ap);
  205. printf("\n");
  206. va_end(ap);
  207. printf("\n");
  208. }
  209. printf(
  210. "Usage:\n"
  211. " %s <mode> [options] [hex data]\n"
  212. " Modes:\n"
  213. " -i - Device Info\n"
  214. " -l[l] - List (detailed) Data Banks & Registers\n"
  215. " -r <addr|reg|dmaX> - Read Data/Register\n"
  216. " -w <addr|reg|dmaX> - Write Data/Register\n"
  217. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  218. " --reset - Reset board\n"
  219. " --help - Help message\n"
  220. "\n"
  221. " Event Modes:\n"
  222. " --trigger [event] - Trigger Events\n"
  223. " -g [event] - Grab Events\n"
  224. "\n"
  225. " IRQ Modes:\n"
  226. " --enable-irq [type] - Enable IRQs\n"
  227. " --disable-irq [type] - Disable IRQs\n"
  228. " --acknowledge-irq <source> - Clean IRQ queue\n"
  229. " --wait-irq <source> - Wait for IRQ\n"
  230. " DMA Modes:\n"
  231. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  232. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  233. " --list-dma-engines - List active DMA engines\n"
  234. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  235. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  236. "\n"
  237. " Kernel Modes:\n"
  238. " --list-kernel-memory [use] - List kernel buffers\n"
  239. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  240. " block is specified as: use:block_number\n"
  241. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  242. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  243. " dma - Remove all buffers allocated by DMA subsystem\n"
  244. " #number - Remove all buffers with the specified use id\n"
  245. "\n"
  246. " Addressing:\n"
  247. " -d <device> - FPGA device (/dev/fpga0)\n"
  248. " -m <model> - Memory model (autodetected)\n"
  249. " pci - Plain\n"
  250. " ipecamera - IPE Camera\n"
  251. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  252. "\n"
  253. " Options:\n"
  254. " -s <size> - Number of words (default: 1)\n"
  255. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  256. " -e <l|b> - Endianess Little/Big (default: host)\n"
  257. " -o <file> - Append output to file (default: stdout)\n"
  258. " -t <timeout|unlimited> - Timeout in microseconds\n"
  259. " --check - Verify write operations\n"
  260. "\n"
  261. " Event Options:\n"
  262. " --event <evt> - Specifies event for trigger and grab modes\n"
  263. " --data <type> - Data type to request for the events\n"
  264. " --run-time <us> - Limit time to grab/trigger events\n"
  265. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  266. " --trigger-rate <tps> - Generate tps triggers per second\n"
  267. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  268. " -s <num|unlimited> - Number of events to grab and trigger\n"
  269. " --format [type] - Specifies how event data should be stored\n"
  270. " raw - Just write all events sequentially\n"
  271. " add_header - Prefix events with 512 bit header:\n"
  272. " event(64), data(64), nope(64), size(64)\n"
  273. " seqnum(64), offset(64), timestamp(128)\n"
  274. //" ringfs - Write to RingFS\n"
  275. " --buffer [size] - Request data buffering, size in MB\n"
  276. " --threads [num] - Allow multithreaded processing\n"
  277. "\n"
  278. " DMA Options:\n"
  279. " --multipacket - Read multiple packets\n"
  280. " --wait - Wait until data arrives\n"
  281. "\n"
  282. " Kernel Options:\n"
  283. " --type <type> - Type of kernel memory to allocate\n"
  284. " consistent - Consistent memory\n"
  285. " s2c - DMA S2C (write) memory\n"
  286. " c2s - DMA C2S (read) memory\n"
  287. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  288. " -s <size> - Number of buffers to allocate (default: 1)\n"
  289. " --allignment <alignment> - Buffer alignment (default: page)\n"
  290. "\n"
  291. " Information:\n"
  292. " --verbose [level] - Announce details of ongoing operations\n"
  293. " -q - Quiete mode (suppress warnings)\n"
  294. "\n"
  295. " Data:\n"
  296. " Data can be specified as sequence of hexdecimal number or\n"
  297. " a single value prefixed with '*'. In this case it will be\n"
  298. " replicated the specified amount of times\n"
  299. "\n\n",
  300. argv[0]);
  301. exit(0);
  302. }
  303. static int StopFlag = 0;
  304. static void signal_exit_handler(int signo) {
  305. if (++StopFlag > 2)
  306. exit(-1);
  307. }
  308. void Error(const char *format, ...) {
  309. va_list ap;
  310. va_start(ap, format);
  311. printf("Error %i: ", errno);
  312. vprintf(format, ap);
  313. if (errno) printf("\n errno: %s", strerror(errno));
  314. printf("\n\n");
  315. va_end(ap);
  316. exit(-1);
  317. }
  318. void Silence(const char *format, ...) {
  319. }
  320. void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
  321. int i,j;
  322. const pcilib_register_bank_description_t *banks;
  323. const pcilib_register_description_t *registers;
  324. const pcilib_event_description_t *events;
  325. const pcilib_event_data_type_description_t *types;
  326. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  327. const pcilib_dma_description_t *dma_info = pcilib_get_dma_info(handle);
  328. for (i = 0; i < PCILIB_MAX_BARS; i++) {
  329. if (board_info->bar_length[i] > 0) {
  330. printf(" BAR %d - ", i);
  331. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  332. case IORESOURCE_IO: printf(" IO"); break;
  333. case IORESOURCE_MEM: printf("MEM"); break;
  334. case IORESOURCE_IRQ: printf("IRQ"); break;
  335. case IORESOURCE_DMA: printf("DMA"); break;
  336. }
  337. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  338. else printf("32");
  339. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  340. }
  341. }
  342. printf("\n");
  343. if ((dma_info)&&(dma_info->engines)) {
  344. printf("DMA Engines: \n");
  345. for (i = 0; dma_info->engines[i].addr_bits; i++) {
  346. const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
  347. printf(" DMA %2d ", engine->addr);
  348. switch (engine->direction) {
  349. case PCILIB_DMA_FROM_DEVICE:
  350. printf("C2S");
  351. break;
  352. case PCILIB_DMA_TO_DEVICE:
  353. printf("S2C");
  354. break;
  355. case PCILIB_DMA_BIDIRECTIONAL:
  356. printf("BI ");
  357. break;
  358. }
  359. printf(" - Type: ");
  360. switch (engine->type) {
  361. case PCILIB_DMA_TYPE_BLOCK:
  362. printf("Block");
  363. break;
  364. case PCILIB_DMA_TYPE_PACKET:
  365. printf("Packet");
  366. break;
  367. default:
  368. printf("Unknown");
  369. }
  370. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  371. }
  372. printf("\n");
  373. }
  374. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  375. else banks = model_info->banks;
  376. if (banks) {
  377. printf("Banks: \n");
  378. for (i = 0; banks[i].access; i++) {
  379. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  380. if ((banks[i].description)&&(banks[i].description[0])) {
  381. printf(": %s", banks[i].description);
  382. }
  383. printf("\n");
  384. }
  385. printf("\n");
  386. }
  387. if (bank == (char*)-1) registers = NULL;
  388. else registers = model_info->registers;
  389. if (registers) {
  390. pcilib_register_bank_addr_t bank_addr = 0;
  391. if (bank) {
  392. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  393. const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  394. bank_addr = b->addr;
  395. if (b->description) printf("%s:\n", b->description);
  396. else if (b->name) printf("Registers of bank %s:\n", b->name);
  397. else printf("Registers of bank 0x%x:\n", b->addr);
  398. } else {
  399. printf("Registers: \n");
  400. }
  401. for (i = 0; registers[i].bits; i++) {
  402. const char *mode;
  403. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  404. if (registers[i].type == PCILIB_REGISTER_BITS) {
  405. if (!details) continue;
  406. if (registers[i].bits > 1) {
  407. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  408. } else {
  409. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  410. }
  411. continue;
  412. }
  413. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  414. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  415. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  416. else mode = " ";
  417. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  418. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  419. printf(": %s", registers[i].description);
  420. }
  421. printf("\n");
  422. }
  423. printf("\n");
  424. }
  425. if (bank == (char*)-1) events = NULL;
  426. else {
  427. events = model_info->events;
  428. types = model_info->data_types;
  429. }
  430. if (events) {
  431. printf("Events: \n");
  432. for (i = 0; events[i].name; i++) {
  433. printf(" %s", events[i].name);
  434. if ((events[i].description)&&(events[i].description[0])) {
  435. printf(": %s", events[i].description);
  436. }
  437. if (types) {
  438. for (j = 0; types[j].name; j++) {
  439. if (types[j].evid & events[i].evid) {
  440. printf("\n %s", types[j].name);
  441. if ((types[j].description)&&(types[j].description[0])) {
  442. printf(": %s", types[j].description);
  443. }
  444. }
  445. }
  446. }
  447. }
  448. printf("\n");
  449. }
  450. }
  451. void Info(pcilib_t *handle, const pcilib_model_description_t *model_info) {
  452. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  453. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func);
  454. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  455. List(handle, model_info, (char*)-1, 0);
  456. }
  457. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  458. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  459. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  460. int err;
  461. int i, j, errors;
  462. void *data, *buf, *check;
  463. void *fifo = NULL;
  464. struct timeval start, end;
  465. unsigned long time;
  466. size_t size, min_size, max_size;
  467. double mbs_in, mbs_out, mbs;
  468. size_t irqs;
  469. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  470. if (mode == ACCESS_CONFIG)
  471. Error("No benchmarking of configuration space acess is allowed");
  472. if (mode == ACCESS_DMA) {
  473. if (n) {
  474. min_size = n * access;
  475. max_size = n * access;
  476. } else {
  477. min_size = 1024;
  478. max_size = BENCH_MAX_DMA_SIZE;
  479. }
  480. for (size = min_size; size <= max_size; size *= 4) {
  481. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  482. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  483. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  484. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  485. if (err) irqs = 0;
  486. printf("%8zu KB - ", size / 1024);
  487. printf("RW: ");
  488. if (mbs < 0) printf("failed ... ");
  489. else printf("%8.2lf MB/s", mbs);
  490. printf(", R: ");
  491. if (mbs_in < 0) printf("failed ... ");
  492. else printf("%8.2lf MB/s", mbs_in);
  493. printf(", W: ");
  494. if (mbs_out < 0) printf("failed ... ");
  495. else printf("%8.2lf MB/s", mbs_out);
  496. if (irqs) {
  497. printf(", IRQs: %lu", irqs);
  498. }
  499. printf("\n");
  500. }
  501. return 0;
  502. }
  503. if (bar == PCILIB_BAR_INVALID) {
  504. unsigned long maxlength = 0;
  505. for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
  506. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  507. bar = i;
  508. break;
  509. }
  510. if (board_info->bar_length[i] > maxlength) {
  511. maxlength = board_info->bar_length[i];
  512. bar = i;
  513. }
  514. }
  515. if (bar < 0) Error("Data banks are not available");
  516. }
  517. if (n) {
  518. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  519. min_size = n * access;
  520. max_size = n * access;
  521. } else {
  522. min_size = access;
  523. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  524. else max_size = BENCH_MAX_FIFO_SIZE;
  525. }
  526. err = posix_memalign( (void**)&buf, 256, max_size );
  527. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  528. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  529. data = pcilib_map_bar(handle, bar);
  530. if (!data) Error("Can't map bar %i", bar);
  531. if (mode == ACCESS_FIFO) {
  532. fifo = data + (addr - board_info->bar_start[bar]) + (board_info->bar_start[bar] & pcilib_get_page_mask());
  533. // pcilib_resolve_register_address(handle, bar, addr);
  534. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  535. }
  536. if (mode == ACCESS_FIFO)
  537. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  538. else
  539. printf("Transfer time (Bank: %i):\n", bar);
  540. for (size = min_size ; size < max_size; size *= 8) {
  541. gettimeofday(&start,NULL);
  542. if (mode == ACCESS_BAR) {
  543. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  544. pcilib_memcpy(buf, data, size);
  545. }
  546. } else {
  547. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  548. for (j = 0; j < (size/access); j++) {
  549. pcilib_memcpy(buf + j * access, fifo, access);
  550. }
  551. }
  552. }
  553. gettimeofday(&end,NULL);
  554. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  555. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  556. fflush(0);
  557. gettimeofday(&start,NULL);
  558. if (mode == ACCESS_BAR) {
  559. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  560. pcilib_memcpy(data, buf, size);
  561. }
  562. } else {
  563. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  564. for (j = 0; j < (size/access); j++) {
  565. pcilib_memcpy(fifo, buf + j * access, access);
  566. }
  567. }
  568. }
  569. gettimeofday(&end,NULL);
  570. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  571. printf(", write: %8.2lf MB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  572. }
  573. pcilib_unmap_bar(handle, bar, data);
  574. printf("\n\nOpen-Transfer-Close time: \n");
  575. for (size = 4 ; size < max_size; size *= 8) {
  576. gettimeofday(&start,NULL);
  577. if (mode == ACCESS_BAR) {
  578. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  579. pcilib_read(handle, bar, 0, size, buf);
  580. }
  581. } else {
  582. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  583. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  584. }
  585. }
  586. gettimeofday(&end,NULL);
  587. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  588. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  589. fflush(0);
  590. gettimeofday(&start,NULL);
  591. if (mode == ACCESS_BAR) {
  592. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  593. pcilib_write(handle, bar, 0, size, buf);
  594. }
  595. } else {
  596. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  597. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  598. }
  599. }
  600. gettimeofday(&end,NULL);
  601. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  602. printf(", write: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  603. if (mode == ACCESS_BAR) {
  604. gettimeofday(&start,NULL);
  605. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  606. pcilib_write(handle, bar, 0, size, buf);
  607. pcilib_read(handle, bar, 0, size, check);
  608. if (memcmp(buf, check, size)) ++errors;
  609. }
  610. gettimeofday(&end,NULL);
  611. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  612. printf(", write-verify: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  613. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  614. }
  615. printf("\n");
  616. }
  617. printf("\n\n");
  618. free(check);
  619. free(buf);
  620. return 0;
  621. }
  622. #define pci2host16(endianess, value) endianess?
  623. /*
  624. typedef struct {
  625. size_t size;
  626. void *data;
  627. size_t pos;
  628. int multi_mode;
  629. } DMACallbackContext;
  630. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  631. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  632. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  633. ctx->size *= 2;
  634. ctx->data = realloc(ctx->data, ctx->size);
  635. if (!ctx->data) {
  636. Error("Allocation of %i bytes of memory have failed", ctx->size);
  637. return 0;
  638. }
  639. }
  640. memcpy(ctx->data + ctx->pos, buf, bufsize);
  641. ctx->pos += bufsize;
  642. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  643. return 1;
  644. }
  645. */
  646. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  647. void *buf;
  648. int i, err;
  649. size_t ret, bytes;
  650. size_t size = n * abs(access);
  651. int block_width, blocks_per_line;
  652. int numbers_per_block, numbers_per_line;
  653. pcilib_dma_engine_t dmaid;
  654. pcilib_dma_flags_t dma_flags = 0;
  655. int fd;
  656. char stmp[256];
  657. struct stat st;
  658. const pcilib_board_info_t *board_info;
  659. numbers_per_block = BLOCK_SIZE / access;
  660. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  661. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  662. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  663. numbers_per_line = blocks_per_line * numbers_per_block;
  664. if (size) {
  665. buf = malloc(size);
  666. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  667. } else {
  668. buf = NULL;
  669. }
  670. switch (mode) {
  671. case ACCESS_DMA:
  672. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  673. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  674. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  675. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  676. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  677. if (size) {
  678. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  679. if (err) Error("Error (%i) is reported by DMA engine", err);
  680. } else {
  681. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  682. size = 2048; bytes = 0;
  683. do {
  684. size *= 2;
  685. buf = realloc(buf, size);
  686. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  687. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  688. bytes += ret;
  689. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  690. err = PCILIB_ERROR_TOOBIG;
  691. if ((flags&FLAG_WAIT)==0) timeout = 0;
  692. }
  693. } while (err == PCILIB_ERROR_TOOBIG);
  694. }
  695. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  696. Error("Error (%i) during DMA read", err);
  697. }
  698. if (bytes <= 0) {
  699. pcilib_warning("No data is returned by DMA engine");
  700. return 0;
  701. }
  702. size = bytes;
  703. n = bytes / abs(access);
  704. addr = 0;
  705. break;
  706. case ACCESS_FIFO:
  707. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  708. addr = 0;
  709. break;
  710. case ACCESS_CONFIG:
  711. board_info = pcilib_get_board_info(handle);
  712. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  713. fd = open(stmp, O_RDONLY);
  714. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  715. if (st.st_size < addr)
  716. Error("Access beyond the end of PCI configuration space");
  717. if (st.st_size < (addr + size)) {
  718. n = (st.st_size - addr) / abs(access);
  719. size = n * abs(access);
  720. if (!n) Error("Access beyond the end of PCI configuration space");
  721. }
  722. lseek(fd, addr, SEEK_SET);
  723. ret = read(fd, buf, size);
  724. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  725. if (ret < size) {
  726. size = ret;
  727. n = ret / abs(access);
  728. }
  729. close(fd);
  730. break;
  731. default:
  732. pcilib_read(handle, bar, addr, size, buf);
  733. }
  734. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  735. if (o) {
  736. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  737. fwrite(buf, abs(access), n, o);
  738. } else {
  739. for (i = 0; i < n; i++) {
  740. if (i) {
  741. if (i%numbers_per_line == 0) printf("\n");
  742. else {
  743. printf("%*s", SEPARATOR_WIDTH, "");
  744. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  745. }
  746. }
  747. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  748. switch (access) {
  749. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  750. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  751. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  752. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  753. }
  754. }
  755. printf("\n\n");
  756. }
  757. free(buf);
  758. return 0;
  759. }
  760. int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg) {
  761. int i;
  762. int err;
  763. const char *format;
  764. pcilib_register_bank_t bank_id;
  765. pcilib_register_bank_addr_t bank_addr = 0;
  766. pcilib_register_value_t value;
  767. if (reg) {
  768. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  769. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
  770. format = model_info->banks[bank_id].format;
  771. if (!format) format = "%lu";
  772. err = pcilib_read_register_by_id(handle, regid, &value);
  773. // err = pcilib_read_register(handle, bank, reg, &value);
  774. if (err) printf("Error reading register %s\n", reg);
  775. else {
  776. printf("%s = ", reg);
  777. printf(format, value);
  778. printf("\n");
  779. }
  780. } else {
  781. // Adding DMA registers
  782. pcilib_get_dma_info(handle);
  783. if (model_info->registers) {
  784. if (bank) {
  785. bank_id = pcilib_find_register_bank(handle, bank);
  786. bank_addr = model_info->banks[bank_id].addr;
  787. }
  788. printf("Registers:\n");
  789. for (i = 0; model_info->registers[i].bits; i++) {
  790. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  791. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
  792. format = model_info->banks[bank_id].format;
  793. if (!format) format = "%lu";
  794. err = pcilib_read_register_by_id(handle, i, &value);
  795. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  796. else {
  797. printf(" %s = ", model_info->registers[i].name);
  798. printf(format, value);
  799. }
  800. printf(" [");
  801. printf(format, model_info->registers[i].defvalue);
  802. printf("]");
  803. printf("\n");
  804. }
  805. }
  806. } else {
  807. printf("No registers");
  808. }
  809. printf("\n");
  810. }
  811. return 0;
  812. }
  813. #define WRITE_REGVAL(buf, n, access, o) {\
  814. uint##access##_t tbuf[n]; \
  815. for (i = 0; i < n; i++) { \
  816. tbuf[i] = (uint##access##_t)buf[i]; \
  817. } \
  818. fwrite(tbuf, access/8, n, o); \
  819. }
  820. int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  821. int err;
  822. int i;
  823. const pcilib_register_bank_description_t *banks = model_info->banks;
  824. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  825. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  826. if (bank) Error("Invalid register bank is specified (%s)", bank);
  827. else Error("Register bank should be specified");
  828. }
  829. int access = banks[bank_id].access / 8;
  830. // int size = n * abs(access);
  831. int block_width, blocks_per_line;
  832. int numbers_per_block, numbers_per_line;
  833. numbers_per_block = BLOCK_SIZE / access;
  834. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  835. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  836. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  837. numbers_per_line = blocks_per_line * numbers_per_block;
  838. pcilib_register_value_t buf[n];
  839. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  840. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  841. if (o) {
  842. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  843. switch (access) {
  844. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  845. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  846. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  847. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  848. }
  849. } else {
  850. for (i = 0; i < n; i++) {
  851. if (i) {
  852. if (i%numbers_per_line == 0) printf("\n");
  853. else {
  854. printf("%*s", SEPARATOR_WIDTH, "");
  855. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  856. }
  857. }
  858. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  859. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  860. }
  861. printf("\n\n");
  862. }
  863. return 0;
  864. }
  865. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  866. int read_back = 0;
  867. void *buf, *check;
  868. int res = 0, i, err;
  869. int size = n * abs(access);
  870. size_t ret;
  871. pcilib_dma_engine_t dmaid;
  872. if (mode == ACCESS_CONFIG)
  873. Error("Writting to PCI configuration space is not supported");
  874. err = posix_memalign( (void**)&buf, 256, size );
  875. if (!err) err = posix_memalign( (void**)&check, 256, size );
  876. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  877. for (i = 0; i < n; i++) {
  878. switch (access) {
  879. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  880. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  881. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  882. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  883. default: Error("Unexpected data size (%lu)", access);
  884. }
  885. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  886. }
  887. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  888. switch (mode) {
  889. case ACCESS_DMA:
  890. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  891. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  892. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  893. if ((err)||(ret != size)) {
  894. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  895. else if (err) Error("DMA engine returned a error while writing the data");
  896. else if (!ret) Error("No data is written by DMA engine");
  897. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  898. }
  899. break;
  900. case ACCESS_FIFO:
  901. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  902. break;
  903. default:
  904. pcilib_write(handle, bar, addr, size, buf);
  905. if (verify) {
  906. pcilib_read(handle, bar, addr, size, check);
  907. read_back = 1;
  908. }
  909. }
  910. if ((read_back)&&(memcmp(buf, check, size))) {
  911. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  912. if (endianess) pcilib_swap(check, check, abs(access), n);
  913. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  914. exit(-1);
  915. }
  916. free(check);
  917. free(buf);
  918. return 0;
  919. }
  920. int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  921. pcilib_register_value_t *buf, *check;
  922. int res, i, err;
  923. unsigned long value;
  924. int size = n * sizeof(pcilib_register_value_t);
  925. err = posix_memalign( (void**)&buf, 256, size );
  926. if (!err) err = posix_memalign( (void**)&check, 256, size );
  927. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  928. for (i = 0; i < n; i++) {
  929. res = sscanf(data[i], "%lx", &value);
  930. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  931. buf[i] = value;
  932. }
  933. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  934. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  935. err = pcilib_read_register_space(handle, bank, addr, n, check);
  936. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  937. if (memcmp(buf, check, size)) {
  938. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  939. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  940. exit(-1);
  941. }
  942. free(check);
  943. free(buf);
  944. return 0;
  945. }
  946. int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, char ** data) {
  947. int err;
  948. unsigned long val;
  949. pcilib_register_value_t value;
  950. const char *format = NULL;
  951. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  952. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  953. /*
  954. pcilib_register_bank_t bank_id;
  955. pcilib_register_bank_addr_t bank_addr;
  956. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  957. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  958. format = model_info->banks[bank_id].format;
  959. if (!format) format = "%lu";
  960. */
  961. if (isnumber(*data)) {
  962. if (sscanf(*data, "%li", &val) != 1) {
  963. Error("Can't parse data value (%s) is not valid decimal number", *data);
  964. }
  965. format = "%li";
  966. } else if (isxnumber(*data)) {
  967. if (sscanf(*data, "%lx", &val) != 1) {
  968. Error("Can't parse data value (%s) is not valid decimal number", *data);
  969. }
  970. format = "0x%lx";
  971. } else {
  972. Error("Can't parse data value (%s) is not valid decimal number", *data);
  973. }
  974. value = val;
  975. err = pcilib_write_register(handle, bank, reg, value);
  976. if (err) Error("Error writting register %s\n", reg);
  977. if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) {
  978. err = pcilib_read_register(handle, bank, reg, &value);
  979. if (err) Error("Error reading back register %s for verification\n", reg);
  980. if (val != value) {
  981. Error("Failed to write register %s: %lu is written and %lu is read back", reg, val, value);
  982. } else {
  983. printf("%s = ", reg);
  984. printf(format, value);
  985. printf("\n");
  986. }
  987. } else {
  988. printf("%s is written\n ", reg);
  989. }
  990. return 0;
  991. }
  992. typedef struct {
  993. pcilib_t *handle;
  994. pcilib_event_t event;
  995. pcilib_event_data_type_t data;
  996. fastwriter_t *writer;
  997. int verbose;
  998. pcilib_timeout_t timeout;
  999. size_t run_time;
  1000. size_t trigger_time;
  1001. size_t max_triggers;
  1002. pcilib_event_flags_t flags;
  1003. FORMAT format;
  1004. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1005. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1006. volatile int started; /**< Indicates that recording is started */
  1007. volatile int run_flag;
  1008. volatile int writing_flag;
  1009. struct timeval first_frame;
  1010. struct timeval last_frame;
  1011. size_t last_num;
  1012. size_t trigger_failed;
  1013. size_t trigger_count;
  1014. size_t event_count;
  1015. size_t incomplete_count;
  1016. size_t broken_count;
  1017. size_t missing_count;
  1018. size_t storage_count;
  1019. struct timeval start_time;
  1020. struct timeval stop_time;
  1021. } GRABContext;
  1022. int GrabCallback(pcilib_event_id_t event_id, pcilib_event_info_t *info, void *user) {
  1023. int err = 0;
  1024. void *data;
  1025. size_t size;
  1026. GRABContext *ctx = (GRABContext*)user;
  1027. pcilib_t *handle = ctx->handle;
  1028. gettimeofday(&ctx->last_frame, NULL);
  1029. if (!ctx->event_count) {
  1030. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1031. }
  1032. ctx->event_pending = 0;
  1033. ctx->event_count++;
  1034. ctx->missing_count += (info->seqnum - ctx->last_num) - 1;
  1035. ctx->last_num = info->seqnum;
  1036. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1037. ctx->incomplete_count++;
  1038. return PCILIB_STREAMING_CONTINUE;
  1039. }
  1040. switch (ctx->format) {
  1041. case FORMAT_DEFAULT:
  1042. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_DATA, &size);
  1043. break;
  1044. default:
  1045. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_RAW_DATA, &size);
  1046. }
  1047. if (!data) {
  1048. ctx->broken_count++;
  1049. return PCILIB_STREAMING_CONTINUE;
  1050. }
  1051. if (ctx->format == FORMAT_HEADER) {
  1052. uint64_t header[8];
  1053. header[0] = info->type;
  1054. header[1] = ctx->data;
  1055. header[2] = 0;
  1056. header[3] = size;
  1057. header[4] = info->seqnum;
  1058. header[5] = info->offset;
  1059. memcpy(header + 6, &info->timestamp, 16);
  1060. err = fastwriter_push(ctx->writer, 64, header);
  1061. }
  1062. if (!err)
  1063. err = fastwriter_push(ctx->writer, size, data);
  1064. if (err) {
  1065. fastwriter_cancel(ctx->writer);
  1066. if (err != EWOULDBLOCK)
  1067. Error("Storage error %i", err);
  1068. ctx->storage_count++;
  1069. pcilib_return_data(handle, event_id, ctx->data, data);
  1070. return PCILIB_STREAMING_CONTINUE;
  1071. }
  1072. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1073. if (err) {
  1074. ctx->missing_count++;
  1075. fastwriter_cancel(ctx->writer);
  1076. return PCILIB_STREAMING_CONTINUE;
  1077. }
  1078. err = fastwriter_commit(ctx->writer);
  1079. if (err) Error("Error commiting data to storage, Error: %i", err);
  1080. return PCILIB_STREAMING_CONTINUE;
  1081. }
  1082. int raw_data(pcilib_event_id_t event_id, pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1083. int err;
  1084. GRABContext *ctx = (GRABContext*)user;
  1085. // pcilib_t *handle = ctx->handle;
  1086. if ((info)&&(info->seqnum != ctx->last_num)) {
  1087. gettimeofday(&ctx->last_frame, NULL);
  1088. if (!ctx->event_count) {
  1089. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1090. }
  1091. ctx->event_count++;
  1092. ctx->missing_count += (info->seqnum - ctx->last_num) - 1;
  1093. ctx->last_num = info->seqnum;
  1094. }
  1095. err = fastwriter_push_data(ctx->writer, size, data);
  1096. if (err) {
  1097. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1098. Error("Storage error %i", err);
  1099. }
  1100. return PCILIB_STREAMING_CONTINUE;
  1101. }
  1102. void *Trigger(void *user) {
  1103. int err;
  1104. struct timeval start;
  1105. GRABContext *ctx = (GRABContext*)user;
  1106. size_t trigger_time = ctx->trigger_time;
  1107. size_t max_triggers = ctx->max_triggers;
  1108. ctx->trigger_thread_started = 1;
  1109. ctx->event_pending = 1;
  1110. while (!ctx->started) ;
  1111. gettimeofday(&start, NULL);
  1112. do {
  1113. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1114. if (err) ctx->trigger_failed++;
  1115. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1116. if (trigger_time) {
  1117. pcilib_add_timeout(&start, trigger_time);
  1118. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1119. pcilib_sleep_until_deadline(&start);
  1120. } else {
  1121. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1122. ctx->event_pending = 1;
  1123. }
  1124. } while (ctx->run_flag);
  1125. ctx->trigger_thread_started = 0;
  1126. return NULL;
  1127. }
  1128. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1129. int verbose;
  1130. pcilib_timeout_t duration, fps_duration;
  1131. struct timeval cur;
  1132. double fps = 0, good_fps = 0;
  1133. size_t total, good, pending = 0;
  1134. verbose = ctx->verbose;
  1135. if (end_time) {
  1136. if (verbose++) {
  1137. printf("-------------------------------------------------------------------------------\n");
  1138. }
  1139. } else {
  1140. gettimeofday(&cur, NULL);
  1141. end_time = &cur;
  1142. }
  1143. // if ((ctx->event_count + ctx->missing_count) == 0)
  1144. // return;
  1145. duration = pcilib_timediff(&ctx->start_time, end_time);
  1146. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1147. if (ctx->trigger_count) {
  1148. total = ctx->trigger_count;
  1149. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1150. } else {
  1151. total = ctx->event_count + ctx->missing_count;
  1152. }
  1153. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count;
  1154. if (ctx->event_count > 1) {
  1155. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1156. }
  1157. if (good > 1) {
  1158. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1159. }
  1160. printf("Run: ");
  1161. PrintTime(duration);
  1162. if (ctx->trigger_count) {
  1163. printf(", Triggers: ");
  1164. PrintNumber(ctx->trigger_count);
  1165. }
  1166. printf(", Captured: ");
  1167. PrintNumber(ctx->event_count);
  1168. printf(" FPS %5.0lf", fps);
  1169. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1170. printf(", Stored: ");
  1171. PrintNumber(good);
  1172. printf(" FPS %5.0lf", good_fps);
  1173. }
  1174. printf("\n");
  1175. if (verbose > 2) {
  1176. if (ctx->trigger_count) {
  1177. printf("Trig: ");
  1178. PrintNumber(ctx->trigger_count);
  1179. printf(" Issued: ");
  1180. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1181. printf(" (");
  1182. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1183. printf("%%) Failed: ");
  1184. PrintNumber(ctx->trigger_failed);
  1185. printf( " (");
  1186. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1187. printf( "%%); Pending: ");
  1188. PrintNumber(pending);
  1189. printf( " (");
  1190. PrintPercent(pending, ctx->trigger_count);
  1191. printf( "%%)\n");
  1192. }
  1193. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1194. printf("Captured: ");
  1195. PrintNumber(good);
  1196. } else {
  1197. printf("Good: ");
  1198. PrintNumber(good);
  1199. printf(", Dropped: ");
  1200. PrintNumber(ctx->storage_count);
  1201. printf(", Bad: ");
  1202. PrintNumber(ctx->incomplete_count);
  1203. printf(", Empty: ");
  1204. PrintNumber(ctx->broken_count);
  1205. }
  1206. printf(", Lost: ");
  1207. PrintNumber(ctx->missing_count);
  1208. printf("\n");
  1209. }
  1210. if (verbose > 1) {
  1211. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1212. printf("Captured: ");
  1213. PrintPercent(good, total);
  1214. } else {
  1215. printf("Good: ");
  1216. PrintPercent(good, total);
  1217. printf("%% Dropped: ");
  1218. PrintPercent(ctx->storage_count, total);
  1219. printf("%% Bad: ");
  1220. PrintPercent(ctx->incomplete_count, total);
  1221. printf("%% Empty: ");
  1222. PrintPercent(ctx->broken_count, total);
  1223. }
  1224. printf("%% Lost: ");
  1225. PrintPercent(ctx->missing_count, total);
  1226. printf("%%");
  1227. printf("\n");
  1228. }
  1229. }
  1230. void StorageStats(GRABContext *ctx) {
  1231. int err;
  1232. fastwriter_stats_t st;
  1233. pcilib_timeout_t duration;
  1234. struct timeval cur;
  1235. gettimeofday(&cur, NULL);
  1236. duration = pcilib_timediff(&ctx->start_time, &cur);
  1237. err = fastwriter_get_stats(ctx->writer, &st);
  1238. if (err) return;
  1239. printf("Wrote ");
  1240. PrintSize(st.written);
  1241. printf(" of ");
  1242. PrintSize(st.commited);
  1243. printf(" at ");
  1244. PrintSize(1000000.*st.written / duration);
  1245. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1246. printf(" of ");
  1247. PrintSize(st.buffer_size);
  1248. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1249. }
  1250. void *Monitor(void *user) {
  1251. struct timeval deadline;
  1252. struct timeval nextinfo;
  1253. GRABContext *ctx = (GRABContext*)user;
  1254. int verbose = ctx->verbose;
  1255. pcilib_timeout_t timeout = ctx->timeout;
  1256. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1257. // while (!ctx->started);
  1258. if (timeout) {
  1259. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1260. pcilib_add_timeout(&deadline, timeout);
  1261. }
  1262. if (verbose > 0) {
  1263. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1264. }
  1265. while (ctx->run_flag) {
  1266. if (StopFlag) {
  1267. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1268. break;
  1269. }
  1270. if (timeout) {
  1271. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1272. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1273. pcilib_add_timeout(&deadline, timeout);
  1274. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1275. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1276. break;
  1277. }
  1278. }
  1279. }
  1280. if (verbose > 0) {
  1281. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1282. GrabStats(ctx, NULL);
  1283. StorageStats(ctx);
  1284. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1285. }
  1286. }
  1287. usleep(100000);
  1288. }
  1289. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1290. while (ctx->writing_flag) {
  1291. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1292. if (verbose >= 0) StorageStats(ctx);
  1293. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1294. }
  1295. usleep(100000);
  1296. }
  1297. return NULL;
  1298. }
  1299. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1300. int err;
  1301. GRABContext ctx;
  1302. // void *data = NULL;
  1303. // size_t size, written;
  1304. pcilib_event_t event;
  1305. pcilib_event_t listen_events;
  1306. pcilib_event_data_type_t data;
  1307. pthread_t monitor_thread;
  1308. pthread_t trigger_thread;
  1309. pthread_attr_t attr;
  1310. struct sched_param sched;
  1311. struct timeval end_time;
  1312. pcilib_event_flags_t flags;
  1313. if (evname) {
  1314. event = pcilib_find_event(handle, evname);
  1315. if (event == PCILIB_EVENT_INVALID)
  1316. Error("Can't find event (%s)", evname);
  1317. listen_events = event;
  1318. } else {
  1319. listen_events = PCILIB_EVENTS_ALL;
  1320. event = PCILIB_EVENT0;
  1321. }
  1322. if (data_type) {
  1323. data = pcilib_find_event_data_type(handle, event, data_type);
  1324. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1325. Error("Can't find data type (%s)", data_type);
  1326. } else {
  1327. data = PCILIB_EVENT_DATA;
  1328. }
  1329. memset(&ctx, 0, sizeof(GRABContext));
  1330. ctx.handle = handle;
  1331. ctx.event = event;
  1332. ctx.data = data;
  1333. ctx.run_time = run_time;
  1334. ctx.timeout = timeout;
  1335. ctx.format = format;
  1336. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1337. else ctx.verbose = 0;
  1338. if (grab_mode&GRAB_MODE_GRAB) {
  1339. ctx.writer = fastwriter_init(output, 0);
  1340. if (!ctx.writer)
  1341. Error("Can't initialize fastwritter library");
  1342. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1343. err = fastwriter_open(ctx.writer, output, 0);
  1344. if (err)
  1345. Error("Error opening file (%s), Error: %i\n", output, err);
  1346. ctx.writing_flag = 1;
  1347. }
  1348. ctx.run_flag = 1;
  1349. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1350. if (data == PCILIB_EVENT_RAW_DATA) {
  1351. if (format == FORMAT_RAW) {
  1352. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1353. }
  1354. } else {
  1355. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1356. }
  1357. ctx.flags = flags;
  1358. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1359. pcilib_configure_autostop(handle, num, run_time);
  1360. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1361. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1362. }
  1363. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1364. pcilib_configure_preprocessing_threads(handle, threads);
  1365. }
  1366. if (grab_mode&GRAB_MODE_TRIGGER) {
  1367. if (trigger_time) {
  1368. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1369. timeout = 2 * trigger_time;
  1370. ctx.timeout = timeout;
  1371. }
  1372. } else {
  1373. // Otherwise, we will trigger next event after previous one is read
  1374. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1375. }
  1376. ctx.max_triggers = num;
  1377. ctx.trigger_count = 0;
  1378. ctx.trigger_time = trigger_time;
  1379. // We don't really care if RT priority is imposible
  1380. pthread_attr_init(&attr);
  1381. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1382. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1383. pthread_attr_setschedparam(&attr, &sched);
  1384. }
  1385. // Start triggering thread and wait until it is schedulled
  1386. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1387. Error("Error spawning trigger thread");
  1388. while (!ctx.trigger_thread_started) usleep(10);
  1389. }
  1390. gettimeofday(&ctx.start_time, NULL);
  1391. if (grab_mode&GRAB_MODE_GRAB) {
  1392. err = pcilib_start(handle, listen_events, flags);
  1393. if (err) Error("Failed to start event engine, error %i", err);
  1394. }
  1395. ctx.started = 1;
  1396. if (run_time) {
  1397. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1398. if (ctx.stop_time.tv_usec > 999999) {
  1399. ctx.stop_time.tv_usec -= 1000000;
  1400. __sync_synchronize();
  1401. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1402. } else {
  1403. __sync_synchronize();
  1404. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1405. }
  1406. }
  1407. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1408. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1409. Error("Error spawning monitoring thread");
  1410. if (grab_mode&GRAB_MODE_GRAB) {
  1411. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1412. if (err) Error("Error streaming events, error %i", err);
  1413. }
  1414. ctx.run_flag = 0;
  1415. if (grab_mode&GRAB_MODE_TRIGGER) {
  1416. while (ctx.trigger_thread_started) usleep(10);
  1417. }
  1418. if (grab_mode&GRAB_MODE_GRAB) {
  1419. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1420. }
  1421. gettimeofday(&end_time, NULL);
  1422. if (grab_mode&GRAB_MODE_TRIGGER) {
  1423. pthread_join(trigger_thread, NULL);
  1424. }
  1425. if (grab_mode&GRAB_MODE_GRAB) {
  1426. if (verbose >= 0)
  1427. printf("Grabbing is finished, flushing results....\n");
  1428. err = fastwriter_close(ctx.writer);
  1429. if (err) Error("Storage problems, error %i", err);
  1430. }
  1431. ctx.writing_flag = 0;
  1432. pthread_join(monitor_thread, NULL);
  1433. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1434. GrabStats(&ctx, &end_time);
  1435. StorageStats(&ctx);
  1436. }
  1437. fastwriter_destroy(ctx.writer);
  1438. return 0;
  1439. }
  1440. int StartStopDMA(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1441. int err;
  1442. pcilib_dma_engine_t dmaid;
  1443. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1444. const pcilib_dma_description_t *dma_info = pcilib_get_dma_info(handle);
  1445. if (start) Error("DMA engine should be specified");
  1446. for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
  1447. err = pcilib_start_dma(handle, dmaid, 0);
  1448. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1449. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1450. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1451. }
  1452. return 0;
  1453. }
  1454. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1455. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1456. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1457. if (start) {
  1458. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1459. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1460. } else {
  1461. err = pcilib_start_dma(handle, dmaid, 0);
  1462. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1463. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1464. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1465. }
  1466. }
  1467. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1468. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1469. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1470. if (start) {
  1471. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1472. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1473. } else {
  1474. err = pcilib_start_dma(handle, dmaid, 0);
  1475. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1476. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1477. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1478. }
  1479. }
  1480. return 0;
  1481. }
  1482. typedef struct {
  1483. pcilib_kmem_use_t use;
  1484. int referenced;
  1485. int hw_lock;
  1486. int reusable;
  1487. int persistent;
  1488. int open;
  1489. size_t count;
  1490. size_t size;
  1491. } kmem_use_info_t;
  1492. #define MAX_USES 64
  1493. pcilib_kmem_use_t ParseUse(const char *use) {
  1494. unsigned long utmp;
  1495. if (use) {
  1496. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1497. if (strlen(use) < 5)
  1498. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1499. else
  1500. return utmp;
  1501. }
  1502. Error("Kernel memory use is not specified");
  1503. return 0;
  1504. }
  1505. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1506. size_t i, n = *n_uses;
  1507. if (uses[n - 1].use == use) return n - 1;
  1508. for (i = 1; i < (n - 1); i++) {
  1509. if (uses[i].use == use) return i;
  1510. }
  1511. if (n == MAX_USES) return 0;
  1512. memset(&uses[n], 0, sizeof(pcilib_kmem_use_t));
  1513. uses[n].use = use;
  1514. return (*n_uses)++;
  1515. }
  1516. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1517. size_t i;
  1518. for (i = 0; i < n_uses; i++) {
  1519. if (uses[i].use == use) {
  1520. if (uses[i].count) return uses + i;
  1521. else return NULL;
  1522. }
  1523. }
  1524. return NULL;
  1525. }
  1526. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  1527. DIR *dir;
  1528. struct dirent *entry;
  1529. const char *pos;
  1530. char sysdir[256];
  1531. char fname[256];
  1532. char info[256];
  1533. size_t useid, n_uses = 1; // Use 0 is for others
  1534. memset(uses, 0, sizeof(kmem_use_info_t));
  1535. pos = strrchr(device, '/');
  1536. if (pos) ++pos;
  1537. else pos = device;
  1538. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1539. dir = opendir(sysdir);
  1540. if (!dir) Error("Can't open directory (%s)", sysdir);
  1541. while ((entry = readdir(dir)) != NULL) {
  1542. FILE *f;
  1543. unsigned long use = 0;
  1544. unsigned long size = 0;
  1545. unsigned long refs = 0;
  1546. unsigned long mode = 0;
  1547. unsigned long hwref = 0;
  1548. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1549. if (!isnumber(entry->d_name+4)) continue;
  1550. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1551. f = fopen(fname, "r");
  1552. if (!f) Error("Can't access file (%s)", fname);
  1553. while(!feof(f)) {
  1554. if (!fgets(info, 256, f))
  1555. break;
  1556. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1557. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1558. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1559. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1560. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1561. }
  1562. fclose(f);
  1563. useid = FindUse(&n_uses, uses, use);
  1564. uses[useid].count++;
  1565. uses[useid].size += size;
  1566. if (refs) uses[useid].referenced = 1;
  1567. if (hwref) uses[useid].hw_lock = 1;
  1568. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  1569. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  1570. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  1571. }
  1572. closedir(dir);
  1573. *uses_number = n_uses;
  1574. return 0;
  1575. }
  1576. int ListKMEM(pcilib_t *handle, const char *device) {
  1577. int err;
  1578. char stmp[256];
  1579. size_t i, useid, n_uses;
  1580. kmem_use_info_t uses[MAX_USES];
  1581. err = ParseKMEM(handle, device, &n_uses, uses);
  1582. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1583. if ((n_uses == 1)&&(uses[0].count == 0)) {
  1584. printf("No kernel memory is allocated\n");
  1585. return 0;
  1586. }
  1587. printf("Use Type Count Total Size REF Mode \n");
  1588. printf("--------------------------------------------------------------------------------\n");
  1589. for (useid = 0; useid < n_uses; useid++) {
  1590. if (useid + 1 == n_uses) {
  1591. if (!uses[0].count) continue;
  1592. i = 0;
  1593. } else i = useid + 1;
  1594. printf("%08x ", uses[i].use);
  1595. if (!i) printf("All Others ");
  1596. else if ((uses[i].use >> 16) == PCILIB_KMEM_USE_DMA_RING) printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1597. else if ((uses[i].use >> 16) == PCILIB_KMEM_USE_DMA_PAGES) printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1598. else if ((uses[i].use >> 16) == PCILIB_KMEM_USE_USER) printf("User %04x ", uses[i].use&0xFFFF);
  1599. else printf (" ");
  1600. printf(" ");
  1601. printf("%6zu", uses[i].count);
  1602. printf(" ");
  1603. printf("%10s", GetPrintSize(stmp, uses[i].size));
  1604. printf(" ");
  1605. if (uses[i].referenced&&uses[i].hw_lock) printf("HW+SW");
  1606. else if (uses[i].referenced) printf(" SW");
  1607. else if (uses[i].hw_lock) printf("HW ");
  1608. else printf(" - ");
  1609. printf(" ");
  1610. if (uses[i].persistent) printf("Persistent");
  1611. else if (uses[i].open) printf("Open ");
  1612. else if (uses[i].reusable) printf("Reusable ");
  1613. else printf("Closed ");
  1614. printf("\n");
  1615. }
  1616. printf("--------------------------------------------------------------------------------\n");
  1617. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  1618. return 0;
  1619. }
  1620. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  1621. int err;
  1622. size_t i, n;
  1623. pcilib_kmem_handle_t *kbuf;
  1624. pcilib_kmem_use_t useid = ParseUse(use);
  1625. size_t n_uses;
  1626. kmem_use_info_t uses[MAX_USES];
  1627. kmem_use_info_t *use_info;
  1628. if (block == (size_t)-1) {
  1629. err = ParseKMEM(handle, device, &n_uses, uses);
  1630. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1631. use_info = GetUse(n_uses, uses, useid);
  1632. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  1633. i = 0;
  1634. n = use_info->count;
  1635. } else {
  1636. i = block;
  1637. n = block + 1;
  1638. }
  1639. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1640. if (!kbuf) {
  1641. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  1642. return 0;
  1643. }
  1644. printf("Buffer Address Hardware Address Bus Address\n");
  1645. printf("--------------------------------------------------------------------------------\n");
  1646. for (; i < n; i++) {
  1647. void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  1648. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  1649. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  1650. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  1651. }
  1652. printf("\n");
  1653. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1654. return 0;
  1655. }
  1656. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  1657. int err;
  1658. void *data;
  1659. size_t size;
  1660. pcilib_kmem_handle_t *kbuf;
  1661. if (block == (size_t)-1) block = 0;
  1662. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1663. if (!kbuf) {
  1664. Error("The specified kernel buffer is not allocated\n");
  1665. return 0;
  1666. }
  1667. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  1668. if (err) {
  1669. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1670. Error("The synchronization of kernel buffer has failed\n");
  1671. return 0;
  1672. }
  1673. data = pcilib_kmem_get_block_ua(handle, kbuf, block);
  1674. if (data) {
  1675. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  1676. if ((max_size)&&(size > max_size)) size = max_size;
  1677. fwrite(data, 1, size, o?o:stdout);
  1678. } else {
  1679. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1680. Error("The specified block is not existing\n");
  1681. return 0;
  1682. }
  1683. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1684. return 0;
  1685. }
  1686. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  1687. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  1688. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  1689. pcilib_kmem_handle_t *kbuf;
  1690. pcilib_kmem_use_t useid = ParseUse(use);
  1691. long page_size = sysconf(_SC_PAGESIZE);
  1692. if (type) {
  1693. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  1694. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  1695. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  1696. else Error("Invalid memory type (%s) is specified", type);
  1697. }
  1698. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  1699. Error("Selected memory type does not allow custom size");
  1700. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  1701. if (!kbuf) Error("Allocation of kernel memory has failed");
  1702. pcilib_free_kernel_memory(handle, kbuf, flags);
  1703. return 0;
  1704. }
  1705. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  1706. int err;
  1707. int i;
  1708. pcilib_kmem_use_t useid;
  1709. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  1710. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  1711. if (!strcasecmp(use, "dma")) {
  1712. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  1713. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  1714. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  1715. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  1716. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  1717. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  1718. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  1719. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  1720. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  1721. }
  1722. return 0;
  1723. }
  1724. useid = ParseUse(use);
  1725. err = pcilib_clean_kernel_memory(handle, useid, flags);
  1726. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  1727. return 0;
  1728. }
  1729. int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
  1730. int err;
  1731. DIR *dir;
  1732. struct dirent *entry;
  1733. const char *pos;
  1734. char sysdir[256];
  1735. char fname[256];
  1736. char info[256];
  1737. char stmp[256];
  1738. pcilib_dma_engine_t dmaid;
  1739. pcilib_dma_engine_status_t status;
  1740. pos = strrchr(device, '/');
  1741. if (pos) ++pos;
  1742. else pos = device;
  1743. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1744. dir = opendir(sysdir);
  1745. if (!dir) Error("Can't open directory (%s)", sysdir);
  1746. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  1747. printf("--------------------------------------------------------------------------------\n");
  1748. while ((entry = readdir(dir)) != NULL) {
  1749. FILE *f;
  1750. unsigned long use = 0;
  1751. // unsigned long size = 0;
  1752. // unsigned long refs = 0;
  1753. unsigned long mode = 0;
  1754. // unsigned long hwref = 0;
  1755. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1756. if (!isnumber(entry->d_name+4)) continue;
  1757. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1758. f = fopen(fname, "r");
  1759. if (!f) Error("Can't access file (%s)", fname);
  1760. while(!feof(f)) {
  1761. if (!fgets(info, 256, f))
  1762. break;
  1763. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1764. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1765. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1766. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1767. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1768. }
  1769. fclose(f);
  1770. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  1771. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  1772. if (use&0x80) {
  1773. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  1774. } else {
  1775. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  1776. }
  1777. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  1778. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  1779. err = pcilib_start_dma(handle, dmaid, 0);
  1780. if (err) {
  1781. printf("-- Wrong state, start is failed\n");
  1782. continue;
  1783. }
  1784. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1785. if (err) {
  1786. printf("-- Wrong state, failed to obtain status\n");
  1787. pcilib_stop_dma(handle, dmaid, 0);
  1788. continue;
  1789. }
  1790. pcilib_stop_dma(handle, dmaid, 0);
  1791. if (status.started) printf("S");
  1792. else printf(" ");
  1793. if (status.ring_head == status.ring_tail) printf(" ");
  1794. else printf("D");
  1795. printf(" ");
  1796. printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  1797. printf(" ");
  1798. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  1799. printf("\n");
  1800. }
  1801. closedir(dir);
  1802. printf("--------------------------------------------------------------------------------\n");
  1803. printf("S - Started, D - Data in buffers\n");
  1804. return 0;
  1805. }
  1806. int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  1807. int err;
  1808. size_t i;
  1809. pcilib_dma_engine_t dmaid;
  1810. pcilib_dma_engine_status_t status;
  1811. pcilib_dma_buffer_status_t *buffer;
  1812. char stmp[256];
  1813. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  1814. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  1815. err = pcilib_start_dma(handle, dmaid, 0);
  1816. if (err) Error("Error starting the specified DMA engine");
  1817. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1818. if (err) Error("Failed to obtain status of the specified DMA engine");
  1819. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  1820. if (!buffer) Error("Failed to allocate memory for status buffer");
  1821. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  1822. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  1823. printf("Buffer Status Total Size \n");
  1824. printf("--------------------------------------------------------------------------------\n");
  1825. for (i = 0; i < status.ring_size; i++) {
  1826. printf("%8zu ", i);
  1827. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  1828. printf("%10s", GetPrintSize(stmp, buffer[i].size));
  1829. printf("\n");
  1830. }
  1831. printf("--------------------------------------------------------------------------------\n");
  1832. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  1833. free(buffer);
  1834. pcilib_stop_dma(handle, dmaid, 0);
  1835. return 0;
  1836. }
  1837. int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  1838. int err;
  1839. pcilib_dma_engine_t dmaid;
  1840. pcilib_dma_engine_status_t status;
  1841. pcilib_dma_buffer_status_t *buffer;
  1842. size_t size;
  1843. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  1844. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  1845. err = pcilib_start_dma(handle, dmaid, 0);
  1846. if (err) Error("Error starting the specified DMA engine");
  1847. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  1848. if (err) Error("Failed to obtain status of the specified DMA engine");
  1849. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  1850. if (!buffer) Error("Failed to allocate memory for status buffer");
  1851. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  1852. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  1853. if (block == (size_t)-1) {
  1854. // get current
  1855. }
  1856. size = buffer[block].size;
  1857. free(buffer);
  1858. pcilib_stop_dma(handle, dmaid, 0);
  1859. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  1860. }
  1861. int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  1862. int err;
  1863. err = pcilib_enable_irq(handle, irq_type, 0);
  1864. if (err) {
  1865. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  1866. Error("Error enabling IRQs");
  1867. }
  1868. return err;
  1869. }
  1870. int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  1871. int err;
  1872. err = pcilib_disable_irq(handle, 0);
  1873. if (err) {
  1874. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  1875. Error("Error disabling IRQs");
  1876. }
  1877. return err;
  1878. }
  1879. int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  1880. pcilib_clear_irq(handle, irq_source);
  1881. return 0;
  1882. }
  1883. int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  1884. int err;
  1885. size_t count;
  1886. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  1887. if (err) {
  1888. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  1889. else Error("Error waiting for IRQ");
  1890. }
  1891. return 0;
  1892. }
  1893. int main(int argc, char **argv) {
  1894. int i;
  1895. long itmp;
  1896. size_t ztmp;
  1897. unsigned char c;
  1898. const char *stmp;
  1899. const char *num_offset;
  1900. int details = 0;
  1901. int verbose = 0;
  1902. int quiete = 0;
  1903. int force = 0;
  1904. int verify = 0;
  1905. const char *model = NULL;
  1906. const pcilib_model_description_t *model_info;
  1907. MODE mode = MODE_INVALID;
  1908. GRAB_MODE grab_mode = 0;
  1909. size_t trigger_time = 0;
  1910. size_t run_time = 0;
  1911. size_t buffer = 0;
  1912. size_t threads = 1;
  1913. FORMAT format = FORMAT_DEFAULT;
  1914. PARTITION partition = PARTITION_UNKNOWN;
  1915. FLAGS flags = 0;
  1916. const char *atype = NULL;
  1917. const char *type = NULL;
  1918. ACCESS_MODE amode = ACCESS_BAR;
  1919. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  1920. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  1921. const char *addr = NULL;
  1922. const char *reg = NULL;
  1923. const char *bank = NULL;
  1924. char **data = NULL;
  1925. const char *event = NULL;
  1926. const char *data_type = NULL;
  1927. const char *dma_channel = NULL;
  1928. const char *use = NULL;
  1929. size_t block = (size_t)-1;
  1930. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  1931. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  1932. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  1933. pcilib_kmem_use_t useid = 0;
  1934. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  1935. long addr_shift = 0;
  1936. uintptr_t start = -1;
  1937. size_t block_size = 0;
  1938. size_t size = 1;
  1939. access_t access = 4;
  1940. // int skip = 0;
  1941. int endianess = 0;
  1942. size_t timeout = 0;
  1943. size_t alignment = 0;
  1944. const char *output = NULL;
  1945. FILE *ofile = NULL;
  1946. size_t iterations = BENCHMARK_ITERATIONS;
  1947. pcilib_t *handle;
  1948. int size_set = 0;
  1949. int timeout_set = 0;
  1950. // int run_time_set = 0;
  1951. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  1952. extern int optind;
  1953. switch (c) {
  1954. case OPT_HELP:
  1955. Usage(argc, argv, NULL);
  1956. break;
  1957. case OPT_INFO:
  1958. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1959. mode = MODE_INFO;
  1960. break;
  1961. case OPT_LIST:
  1962. if (mode == MODE_LIST) details++;
  1963. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1964. mode = MODE_LIST;
  1965. break;
  1966. case OPT_RESET:
  1967. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1968. mode = MODE_RESET;
  1969. break;
  1970. case OPT_BENCHMARK:
  1971. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1972. mode = MODE_BENCHMARK;
  1973. if (optarg) addr = optarg;
  1974. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  1975. break;
  1976. case OPT_READ:
  1977. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1978. mode = MODE_READ;
  1979. if (optarg) addr = optarg;
  1980. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  1981. break;
  1982. case OPT_WRITE:
  1983. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  1984. mode = MODE_WRITE;
  1985. if (optarg) addr = optarg;
  1986. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  1987. break;
  1988. case OPT_GRAB:
  1989. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  1990. mode = MODE_GRAB;
  1991. grab_mode |= GRAB_MODE_GRAB;
  1992. stmp = NULL;
  1993. if (optarg) stmp = optarg;
  1994. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  1995. if (stmp) {
  1996. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  1997. event = stmp;
  1998. }
  1999. break;
  2000. case OPT_TRIGGER:
  2001. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  2002. mode = MODE_GRAB;
  2003. grab_mode |= GRAB_MODE_TRIGGER;
  2004. stmp = NULL;
  2005. if (optarg) stmp = optarg;
  2006. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2007. if (stmp) {
  2008. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2009. event = stmp;
  2010. }
  2011. break;
  2012. case OPT_LIST_DMA:
  2013. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2014. mode = MODE_LIST_DMA;
  2015. break;
  2016. case OPT_LIST_DMA_BUFFERS:
  2017. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2018. mode = MODE_LIST_DMA_BUFFERS;
  2019. dma_channel = optarg;
  2020. break;
  2021. case OPT_READ_DMA_BUFFER:
  2022. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2023. mode = MODE_READ_DMA_BUFFER;
  2024. num_offset = strchr(optarg, ':');
  2025. if (num_offset) {
  2026. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2027. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2028. *(char*)num_offset = 0;
  2029. } else block = (size_t)-1;
  2030. dma_channel = optarg;
  2031. break;
  2032. case OPT_START_DMA:
  2033. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2034. mode = MODE_START_DMA;
  2035. if (optarg) dma_channel = optarg;
  2036. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2037. break;
  2038. case OPT_STOP_DMA:
  2039. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2040. mode = MODE_STOP_DMA;
  2041. if (optarg) dma_channel = optarg;
  2042. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2043. break;
  2044. case OPT_ENABLE_IRQ:
  2045. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2046. mode = MODE_ENABLE_IRQ;
  2047. if (optarg) num_offset = optarg;
  2048. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2049. else num_offset = NULL;
  2050. if (num_offset) {
  2051. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2052. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2053. irq_type = itmp;
  2054. }
  2055. break;
  2056. case OPT_DISABLE_IRQ:
  2057. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2058. mode = MODE_DISABLE_IRQ;
  2059. if (optarg) num_offset = optarg;
  2060. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2061. else num_offset = NULL;
  2062. if (num_offset) {
  2063. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2064. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2065. irq_type = itmp;
  2066. }
  2067. break;
  2068. case OPT_ACK_IRQ:
  2069. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2070. mode = MODE_ACK_IRQ;
  2071. if (optarg) num_offset = optarg;
  2072. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2073. else num_offset = NULL;
  2074. if (num_offset) {
  2075. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2076. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2077. irq_source = itmp;
  2078. }
  2079. break;
  2080. case OPT_WAIT_IRQ:
  2081. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2082. mode = MODE_WAIT_IRQ;
  2083. if (optarg) num_offset = optarg;
  2084. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2085. else num_offset = NULL;
  2086. if (num_offset) {
  2087. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2088. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2089. irq_source = itmp;
  2090. }
  2091. break;
  2092. case OPT_LIST_KMEM:
  2093. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2094. mode = MODE_LIST_KMEM;
  2095. if (optarg) use = optarg;
  2096. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2097. else use = NULL;
  2098. if (use) {
  2099. num_offset = strchr(use, ':');
  2100. if (num_offset) {
  2101. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2102. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2103. *(char*)num_offset = 0;
  2104. }
  2105. }
  2106. break;
  2107. case OPT_READ_KMEM:
  2108. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2109. mode = MODE_READ_KMEM;
  2110. num_offset = strchr(optarg, ':');
  2111. if (num_offset) {
  2112. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2113. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2114. *(char*)num_offset = 0;
  2115. }
  2116. use = optarg;
  2117. useid = ParseUse(use);
  2118. break;
  2119. case OPT_ALLOC_KMEM:
  2120. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2121. mode = MODE_ALLOC_KMEM;
  2122. if (optarg) use = optarg;
  2123. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2124. break;
  2125. case OPT_FREE_KMEM:
  2126. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2127. mode = MODE_FREE_KMEM;
  2128. if (optarg) use = optarg;
  2129. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2130. break;
  2131. case OPT_DEVICE:
  2132. fpga_device = optarg;
  2133. break;
  2134. case OPT_MODEL:
  2135. model = optarg;
  2136. /* if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2137. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2138. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2139. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
  2140. break;
  2141. case OPT_BAR:
  2142. bank = optarg;
  2143. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2144. // else bar = itmp;
  2145. break;
  2146. case OPT_ALIGNMENT:
  2147. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2148. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2149. }
  2150. break;
  2151. case OPT_ACCESS:
  2152. if (!strncasecmp(optarg, "fifo", 4)) {
  2153. atype = "fifo";
  2154. num_offset = optarg + 4;
  2155. amode = ACCESS_FIFO;
  2156. } else if (!strncasecmp(optarg, "dma", 3)) {
  2157. atype = "dma";
  2158. num_offset = optarg + 3;
  2159. amode = ACCESS_DMA;
  2160. } else if (!strncasecmp(optarg, "bar", 3)) {
  2161. atype = "plain";
  2162. num_offset = optarg + 3;
  2163. amode = ACCESS_BAR;
  2164. } else if (!strncasecmp(optarg, "config", 6)) {
  2165. atype = "config";
  2166. num_offset = optarg + 6;
  2167. amode = ACCESS_CONFIG;
  2168. } else if (!strncasecmp(optarg, "plain", 5)) {
  2169. atype = "plain";
  2170. num_offset = optarg + 5;
  2171. amode = ACCESS_BAR;
  2172. } else {
  2173. num_offset = optarg;
  2174. }
  2175. if (*num_offset) {
  2176. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2177. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2178. switch (itmp) {
  2179. case 8: access = 1; break;
  2180. case 16: access = 2; break;
  2181. case 32: access = 4; break;
  2182. case 64: access = 8; break;
  2183. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2184. }
  2185. }
  2186. break;
  2187. case OPT_SIZE:
  2188. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2189. if (strcasecmp(optarg, "unlimited"))
  2190. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2191. else
  2192. size = 0;//(size_t)-1;
  2193. }
  2194. size_set = 1;
  2195. break;
  2196. case OPT_BLOCK_SIZE:
  2197. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2198. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2199. }
  2200. break;
  2201. case OPT_ENDIANESS:
  2202. if ((*optarg == 'b')||(*optarg == 'B')) {
  2203. if (ntohs(1) == 1) endianess = 0;
  2204. else endianess = 1;
  2205. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2206. if (ntohs(1) == 1) endianess = 1;
  2207. else endianess = 0;
  2208. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2209. break;
  2210. case OPT_TIMEOUT:
  2211. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2212. if (strcasecmp(optarg, "unlimited"))
  2213. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2214. else
  2215. timeout = PCILIB_TIMEOUT_INFINITE;
  2216. }
  2217. timeout_set = 1;
  2218. break;
  2219. case OPT_OUTPUT:
  2220. output = optarg;
  2221. break;
  2222. case OPT_ITERATIONS:
  2223. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2224. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2225. break;
  2226. case OPT_EVENT:
  2227. event = optarg;
  2228. break;
  2229. case OPT_TYPE:
  2230. type = optarg;
  2231. break;
  2232. case OPT_DATA_TYPE:
  2233. data_type = optarg;
  2234. break;
  2235. case OPT_RUN_TIME:
  2236. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2237. if (strcasecmp(optarg, "unlimited"))
  2238. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2239. else
  2240. run_time = 0;
  2241. }
  2242. // run_time_set = 1;
  2243. break;
  2244. case OPT_TRIGGER_TIME:
  2245. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2246. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2247. break;
  2248. case OPT_TRIGGER_RATE:
  2249. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2250. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2251. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2252. break;
  2253. case OPT_BUFFER:
  2254. if (optarg) num_offset = optarg;
  2255. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2256. else num_offset = NULL;
  2257. if (num_offset) {
  2258. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2259. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2260. buffer *= 1024 * 1024;
  2261. } else {
  2262. buffer = get_free_memory();
  2263. if (buffer < 256) Error("Not enough free memory (%lz MB) for buffering", buffer / 1024 / 1024);
  2264. buffer -= 128 + buffer/16;
  2265. }
  2266. break;
  2267. case OPT_THREADS:
  2268. if (optarg) num_offset = optarg;
  2269. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2270. else num_offset = NULL;
  2271. if (num_offset) {
  2272. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2273. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2274. } else {
  2275. threads = 0;
  2276. }
  2277. break;
  2278. case OPT_FORMAT:
  2279. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2280. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2281. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2282. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2283. break;
  2284. case OPT_QUIETE:
  2285. quiete = 1;
  2286. verbose = -1;
  2287. break;
  2288. case OPT_VERBOSE:
  2289. if (optarg) num_offset = optarg;
  2290. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2291. else num_offset = NULL;
  2292. if (num_offset) {
  2293. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2294. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2295. } else {
  2296. verbose = 1;
  2297. }
  2298. break;
  2299. case OPT_FORCE:
  2300. force = 1;
  2301. break;
  2302. case OPT_VERIFY:
  2303. verify = 1;
  2304. break;
  2305. case OPT_MULTIPACKET:
  2306. flags |= FLAG_MULTIPACKET;
  2307. break;
  2308. case OPT_WAIT:
  2309. flags |= FLAG_WAIT;
  2310. break;
  2311. default:
  2312. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2313. }
  2314. }
  2315. if (mode == MODE_INVALID) {
  2316. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2317. else Usage(argc, argv, NULL);
  2318. }
  2319. pcilib_set_error_handler(&Error, quiete?Silence:NULL);
  2320. handle = pcilib_open(fpga_device, model);
  2321. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2322. model_info = pcilib_get_model_description(handle);
  2323. switch (mode) {
  2324. case MODE_WRITE:
  2325. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2326. int vallen = strlen(argv[optind]);
  2327. if (vallen > 1) {
  2328. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2329. if (!data) Error("Error allocating memory for data array");
  2330. for (i = 0; i < size; i++) {
  2331. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2332. strcpy(data[i], argv[optind] + 1);
  2333. }
  2334. } else {
  2335. data = (char**)malloc(size * (9 + sizeof(char*)));
  2336. if (!data) Error("Error allocating memory for data array");
  2337. for (i = 0; i < size; i++) {
  2338. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2339. sprintf(data[i], "%x", i);
  2340. }
  2341. }
  2342. } else if ((argc - optind) == size) data = argv + optind;
  2343. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2344. case MODE_READ:
  2345. if (!addr) {
  2346. if (((!model_info->dma)||(!model_info->dma->api))&&(!model_info->api)) {
  2347. // if (model == PCILIB_MODEL_PCI) {
  2348. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2349. Usage(argc, argv, "The address is not specified");
  2350. } else ++mode;
  2351. }
  2352. break;
  2353. case MODE_START_DMA:
  2354. case MODE_STOP_DMA:
  2355. case MODE_LIST_DMA_BUFFERS:
  2356. case MODE_READ_DMA_BUFFER:
  2357. if ((dma_channel)&&(*dma_channel)) {
  2358. itmp = strlen(dma_channel) - 1;
  2359. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2360. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2361. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2362. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2363. else {
  2364. num_offset = dma_channel + 3;
  2365. itmp -= 3;
  2366. }
  2367. if (bank) {
  2368. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  2369. }
  2370. if (!isnumber_n(num_offset, itmp))
  2371. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  2372. dma = atoi(num_offset);
  2373. }
  2374. break;
  2375. default:
  2376. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  2377. }
  2378. if (addr) {
  2379. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2380. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  2381. if (bank) {
  2382. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2383. } else {
  2384. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  2385. }
  2386. dma = atoi(addr + 3);
  2387. amode = ACCESS_DMA;
  2388. addr = NULL;
  2389. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2390. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  2391. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2392. bar = atoi(addr + 3);
  2393. amode = ACCESS_BAR;
  2394. addr = NULL;
  2395. } else if (!strcmp(addr, "config")) {
  2396. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  2397. amode = ACCESS_CONFIG;
  2398. addr = NULL;
  2399. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  2400. // check if the address in the register range
  2401. const pcilib_register_range_t *ranges = model_info->ranges;
  2402. if (ranges) {
  2403. for (i = 0; ranges[i].start != ranges[i].end; i++)
  2404. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  2405. // register access in plain mode
  2406. if (ranges[i].start != ranges[i].end) {
  2407. pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
  2408. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  2409. bank = model_info->banks[regbank].name;
  2410. start += ranges[i].addr_shift;
  2411. addr_shift = ranges[i].addr_shift;
  2412. ++mode;
  2413. }
  2414. }
  2415. } else {
  2416. if (pcilib_find_register(handle, bank, addr) == PCILIB_REGISTER_INVALID) {
  2417. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  2418. } else {
  2419. reg = addr;
  2420. ++mode;
  2421. }
  2422. }
  2423. }
  2424. if (mode == MODE_GRAB) {
  2425. if (output) {
  2426. char fsname[128];
  2427. if (!get_file_fs(output, 127, fsname)) {
  2428. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  2429. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  2430. }
  2431. } else {
  2432. output = "/dev/null";
  2433. partition = PARTITION_NULL;
  2434. }
  2435. if (!timeout_set) {
  2436. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  2437. else timeout = PCILIB_EVENT_TIMEOUT;
  2438. }
  2439. if (!size_set) {
  2440. if (run_time) size = 0;
  2441. }
  2442. }
  2443. if (mode != MODE_GRAB) {
  2444. if (size == (size_t)-1)
  2445. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  2446. }
  2447. if ((bank)&&(amode == ACCESS_DMA)) {
  2448. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  2449. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  2450. else dma = itmp;
  2451. } else if (bank) {
  2452. switch (mode) {
  2453. case MODE_BENCHMARK:
  2454. case MODE_READ:
  2455. case MODE_WRITE:
  2456. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS))
  2457. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2458. else bar = itmp;
  2459. break;
  2460. default:
  2461. if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  2462. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2463. }
  2464. }
  2465. signal(SIGINT, signal_exit_handler);
  2466. if ((mode != MODE_GRAB)&&(output)) {
  2467. ofile = fopen(output, "a+");
  2468. if (!ofile) {
  2469. Error("Failed to open file \"%s\"", output);
  2470. }
  2471. }
  2472. switch (mode) {
  2473. case MODE_INFO:
  2474. Info(handle, model_info);
  2475. break;
  2476. case MODE_LIST:
  2477. List(handle, model_info, bank, details);
  2478. break;
  2479. case MODE_BENCHMARK:
  2480. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  2481. break;
  2482. case MODE_READ:
  2483. if (amode == ACCESS_DMA) {
  2484. ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  2485. } else if (amode == ACCESS_CONFIG) {
  2486. ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  2487. } else if (addr) {
  2488. ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  2489. } else {
  2490. Error("Address to read is not specified");
  2491. }
  2492. break;
  2493. case MODE_READ_REGISTER:
  2494. if ((reg)||(!addr)) ReadRegister(handle, model_info, bank, reg);
  2495. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  2496. break;
  2497. case MODE_WRITE:
  2498. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  2499. break;
  2500. case MODE_WRITE_REGISTER:
  2501. if (reg) WriteRegister(handle, model_info, bank, reg, data);
  2502. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  2503. break;
  2504. case MODE_RESET:
  2505. pcilib_reset(handle);
  2506. break;
  2507. case MODE_GRAB:
  2508. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  2509. break;
  2510. case MODE_LIST_DMA:
  2511. ListDMA(handle, fpga_device, model_info);
  2512. break;
  2513. case MODE_LIST_DMA_BUFFERS:
  2514. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  2515. break;
  2516. case MODE_READ_DMA_BUFFER:
  2517. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  2518. break;
  2519. case MODE_START_DMA:
  2520. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  2521. break;
  2522. case MODE_STOP_DMA:
  2523. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  2524. break;
  2525. case MODE_ENABLE_IRQ:
  2526. EnableIRQ(handle, model_info, irq_type);
  2527. break;
  2528. case MODE_DISABLE_IRQ:
  2529. DisableIRQ(handle, model_info, irq_type);
  2530. break;
  2531. case MODE_ACK_IRQ:
  2532. AckIRQ(handle, model_info, irq_source);
  2533. break;
  2534. case MODE_WAIT_IRQ:
  2535. WaitIRQ(handle, model_info, irq_source, timeout);
  2536. break;
  2537. case MODE_LIST_KMEM:
  2538. if (use) DetailKMEM(handle, fpga_device, use, block);
  2539. else ListKMEM(handle, fpga_device);
  2540. break;
  2541. case MODE_READ_KMEM:
  2542. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  2543. break;
  2544. case MODE_ALLOC_KMEM:
  2545. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  2546. break;
  2547. case MODE_FREE_KMEM:
  2548. FreeKMEM(handle, fpga_device, use, force);
  2549. break;
  2550. case MODE_INVALID:
  2551. break;
  2552. }
  2553. if (ofile) fclose(ofile);
  2554. pcilib_close(handle);
  2555. if (data != argv + optind) free(data);
  2556. }