pciDriver.h 7.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220
  1. #ifndef PCIDRIVER_H_
  2. #define PCIDRIVER_H_
  3. /**
  4. * This is a full rewrite of the pciDriver.
  5. * New default is to support kernel 2.6, using kernel 2.6 APIs.
  6. *
  7. * This header defines the interface to the outside world.
  8. *
  9. * $Revision: 1.6 $
  10. * $Date: 2008-01-24 14:21:36 $
  11. *
  12. */
  13. /*
  14. * Change History:
  15. *
  16. * $Log: not supported by cvs2svn $
  17. * Revision 1.5 2008-01-11 10:15:14 marcus
  18. * Removed unused interrupt code.
  19. * Added intSource to the wait interrupt call.
  20. *
  21. * Revision 1.4 2006/11/17 18:44:42 marcus
  22. * Type of SG list can now be selected at runtime. Added type to sglist.
  23. *
  24. * Revision 1.3 2006/11/17 16:23:02 marcus
  25. * Added slot number to the PCI info IOctl.
  26. *
  27. * Revision 1.2 2006/11/13 12:29:09 marcus
  28. * Added a IOctl call, to confiure the interrupt response. (testing pending).
  29. * Basic interrupts are now supported.
  30. *
  31. * Revision 1.1 2006/10/10 14:46:52 marcus
  32. * Initial commit of the new pciDriver for kernel 2.6
  33. *
  34. * Revision 1.7 2006/10/06 15:18:06 marcus
  35. * Updated PCI info and PCI cmd
  36. *
  37. * Revision 1.6 2006/09/25 16:51:07 marcus
  38. * Added PCI config IOctls, and implemented basic mmap functions.
  39. *
  40. * Revision 1.5 2006/09/18 17:13:12 marcus
  41. * backup commit.
  42. *
  43. * Revision 1.4 2006/09/15 15:44:41 marcus
  44. * backup commit.
  45. *
  46. * Revision 1.3 2006/08/15 11:40:02 marcus
  47. * backup commit.
  48. *
  49. * Revision 1.2 2006/08/12 18:28:42 marcus
  50. * Sync with the laptop
  51. *
  52. * Revision 1.1 2006/08/11 15:30:46 marcus
  53. * Sync with the laptop
  54. *
  55. */
  56. #include <linux/ioctl.h>
  57. /* Identifies the PCI-E Xilinx ML605 */
  58. #define PCIE_XILINX_VENDOR_ID 0x10ee
  59. #define PCIE_ML605_DEVICE_ID 0x6024
  60. /* Identifies the PCI-E IPE Hardware */
  61. #define PCIE_IPECAMERA_DEVICE_ID 0x6081
  62. #define PCIE_KAPTURE_DEVICE_ID 0x6028
  63. /* Possible values for ioctl commands */
  64. /* PCI mmap areas */
  65. #define PCIDRIVER_BAR0 0
  66. #define PCIDRIVER_BAR1 1
  67. #define PCIDRIVER_BAR2 2
  68. #define PCIDRIVER_BAR3 3
  69. #define PCIDRIVER_BAR4 4
  70. #define PCIDRIVER_BAR5 5
  71. /* mmap mode of the device */
  72. #define PCIDRIVER_MMAP_PCI 0
  73. #define PCIDRIVER_MMAP_KMEM 1
  74. /* Direction of a DMA operation */
  75. #define PCIDRIVER_DMA_BIDIRECTIONAL 0
  76. #define PCIDRIVER_DMA_TODEVICE 1//PCILIB_KMEM_SYNC_TODEVICE
  77. #define PCIDRIVER_DMA_FROMDEVICE 2//PCILIB_KMEM_SYNC_FROMDEVICE
  78. /* Possible sizes in a PCI command */
  79. #define PCIDRIVER_PCI_CFG_SZ_BYTE 1
  80. #define PCIDRIVER_PCI_CFG_SZ_WORD 2
  81. #define PCIDRIVER_PCI_CFG_SZ_DWORD 3
  82. /* Possible types of SG lists */
  83. #define PCIDRIVER_SG_NONMERGED 0
  84. #define PCIDRIVER_SG_MERGED 1
  85. /* Maximum number of interrupt sources */
  86. #define PCIDRIVER_INT_MAXSOURCES 16
  87. #define KMEM_REF_HW 0x80000000 /**< Special reference to indicate hardware access */
  88. #define KMEM_REF_COUNT 0x0FFFFFFF /**< Mask of reference counter (mmap/munmap), couting in mmaped memory pages */
  89. #define KMEM_MODE_REUSABLE 0x80000000 /**< Indicates reusable buffer */
  90. #define KMEM_MODE_EXCLUSIVE 0x40000000 /**< Only a single process is allowed to mmap the buffer */
  91. #define KMEM_MODE_PERSISTENT 0x20000000 /**< Persistent mode instructs kmem_free to preserve buffer in memory */
  92. #define KMEM_MODE_COUNT 0x0FFFFFFF /**< Mask of reuse counter (alloc/free) */
  93. #define KMEM_FLAG_REUSE PCILIB_KMEM_FLAG_REUSE /**< Try to reuse existing buffer with the same use & item */
  94. #define KMEM_FLAG_EXCLUSIVE PCILIB_KMEM_FLAG_EXCLUSIVE /**< Allow only a single application accessing a specified use & item */
  95. #define KMEM_FLAG_PERSISTENT PCILIB_KMEM_FLAG_PERSISTENT /**< Sets persistent mode */
  96. #define KMEM_FLAG_HW PCILIB_KMEM_FLAG_HARDWARE /**< The buffer may be accessed by hardware, the hardware access will not occur any more if passed to _free function */
  97. #define KMEM_FLAG_FORCE PCILIB_KMEM_FLAG_FORCE /**< Force memory cleanup even if references are present */
  98. #define KMEM_FLAG_MASS PCILIB_KMEM_FLAG_MASS /**< Apply to all buffers of selected use */
  99. #define KMEM_FLAG_TRY PCILIB_KMEM_FLAG_TRY /**< Do not allocate buffers, try to reuse and fail if not possible */
  100. #define KMEM_FLAG_REUSED PCILIB_KMEM_FLAG_REUSE /**< Indicates if buffer with specified use & item was already allocated and reused */
  101. #define KMEM_FLAG_REUSED_PERSISTENT PCILIB_KMEM_FLAG_PERSISTENT /**< Indicates that reused buffer was persistent before the call */
  102. #define KMEM_FLAG_REUSED_HW PCILIB_KMEM_FLAG_HARDWARE /**< Indicates that reused buffer had a HW reference before the call */
  103. /* Types */
  104. typedef struct {
  105. unsigned short vendor_id;
  106. unsigned short device_id;
  107. unsigned short bus;
  108. unsigned short slot;
  109. unsigned short func;
  110. unsigned short devfn;
  111. unsigned char interrupt_pin;
  112. unsigned char interrupt_line;
  113. unsigned int irq;
  114. unsigned long bar_start[6];
  115. unsigned long bar_length[6];
  116. unsigned long bar_flags[6];
  117. } pcilib_board_info_t;
  118. typedef struct {
  119. unsigned long type;
  120. unsigned long pa;
  121. unsigned long size;
  122. unsigned long align;
  123. unsigned long use;
  124. unsigned long item;
  125. int flags;
  126. int handle_id;
  127. } kmem_handle_t;
  128. typedef struct {
  129. unsigned long addr;
  130. unsigned long size;
  131. } umem_sgentry_t;
  132. typedef struct {
  133. int handle_id;
  134. int type;
  135. int nents;
  136. umem_sgentry_t *sg;
  137. } umem_sglist_t;
  138. typedef struct {
  139. unsigned long vma;
  140. unsigned long size;
  141. int handle_id;
  142. int dir;
  143. } umem_handle_t;
  144. typedef struct {
  145. kmem_handle_t handle;
  146. int dir;
  147. } kmem_sync_t;
  148. typedef struct {
  149. unsigned long count;
  150. unsigned long timeout; // microseconds
  151. unsigned int source;
  152. } interrupt_wait_t;
  153. typedef struct {
  154. int size;
  155. int addr;
  156. union {
  157. unsigned char byte;
  158. unsigned short word;
  159. unsigned int dword; /* not strict C, but if not can have problems */
  160. } val;
  161. } pci_cfg_cmd;
  162. /* ioctl interface */
  163. /* See documentation for a detailed usage explanation */
  164. /*
  165. * one of the problems of ioctl, is that requires a type definition.
  166. * This type is only 8-bits wide, and half-documented in
  167. * <linux-src>/Documentation/ioctl-number.txt.
  168. * previous SHL -> 'S' definition, conflicts with several devices,
  169. * so I changed it to be pci -> 'p', in the range 0xA0-AF
  170. */
  171. #define PCIDRIVER_IOC_MAGIC 'p'
  172. #define PCIDRIVER_IOC_BASE 0xA0
  173. #define PCIDRIVER_IOC_MMAP_MODE _IO( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 0 )
  174. #define PCIDRIVER_IOC_MMAP_AREA _IO( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 1 )
  175. #define PCIDRIVER_IOC_KMEM_ALLOC _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 2, kmem_handle_t * )
  176. #define PCIDRIVER_IOC_KMEM_FREE _IOW ( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 3, kmem_handle_t * )
  177. #define PCIDRIVER_IOC_KMEM_SYNC _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 4, kmem_sync_t * )
  178. #define PCIDRIVER_IOC_UMEM_SGMAP _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 5, umem_handle_t * )
  179. #define PCIDRIVER_IOC_UMEM_SGUNMAP _IOW( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 6, umem_handle_t * )
  180. #define PCIDRIVER_IOC_UMEM_SGGET _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 7, umem_sglist_t * )
  181. #define PCIDRIVER_IOC_UMEM_SYNC _IOW( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 8, umem_handle_t * )
  182. #define PCIDRIVER_IOC_WAITI _IO( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 9 )
  183. /* And now, the methods to access the PCI configuration area */
  184. #define PCIDRIVER_IOC_PCI_CFG_RD _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 10, pci_cfg_cmd * )
  185. #define PCIDRIVER_IOC_PCI_CFG_WR _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 11, pci_cfg_cmd * )
  186. #define PCIDRIVER_IOC_PCI_INFO _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 12, pcilib_board_info_t * )
  187. /* Clear interrupt queues */
  188. #define PCIDRIVER_IOC_CLEAR_IOQ _IO( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 13 )
  189. #endif