cli.c 120 KB

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  1. #define _XOPEN_SOURCE 700
  2. #define _POSIX_C_SOURCE 200112L
  3. #define _BSD_SOURCE
  4. #define _GNU_SOURCE
  5. #define _DEFAULT_SOURCE
  6. #include <stdio.h>
  7. #include <stdlib.h>
  8. #include <string.h>
  9. #include <strings.h>
  10. #include <stdint.h>
  11. #include <stdarg.h>
  12. #include <fcntl.h>
  13. #include <unistd.h>
  14. #include <sys/time.h>
  15. #include <sys/ioctl.h>
  16. #include <sys/mman.h>
  17. #include <errno.h>
  18. #include <alloca.h>
  19. #include <arpa/inet.h>
  20. #include <sys/types.h>
  21. #include <sys/stat.h>
  22. #include <dirent.h>
  23. #include <pthread.h>
  24. #include <signal.h>
  25. #include <dlfcn.h>
  26. #include <getopt.h>
  27. #include <fastwriter.h>
  28. #include "pcitool/sysinfo.h"
  29. #include "pcitool/formaters.h"
  30. #include "pcitool/buildinfo.h"
  31. #include "views/transform.h"
  32. #include "views/enum.h"
  33. #include "pcilib/pci.h"
  34. #include "pcilib/plugin.h"
  35. #include "pcilib/config.h"
  36. #include "pcilib/tools.h"
  37. #include "pcilib/kmem.h"
  38. #include "pcilib/error.h"
  39. #include "pcilib/debug.h"
  40. #include "pcilib/model.h"
  41. #include "pcilib/locking.h"
  42. /* defines */
  43. #define MAX_KBUF 14
  44. //#define BIGBUFSIZE (512*1024*1024)
  45. #define BIGBUFSIZE (1024*1024)
  46. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  47. #define LINE_WIDTH 80
  48. #define SEPARATOR_WIDTH 2
  49. #define BLOCK_SEPARATOR_WIDTH 2
  50. #define BLOCK_SIZE 8
  51. #define BENCHMARK_ITERATIONS 128
  52. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  53. #define isnumber pcilib_isnumber
  54. #define isxnumber pcilib_isxnumber
  55. #define isnumber_n pcilib_isnumber_n
  56. #define isxnumber_n pcilib_isxnumber_n
  57. typedef uint8_t access_t;
  58. typedef enum {
  59. GRAB_MODE_GRAB = 1,
  60. GRAB_MODE_TRIGGER = 2
  61. } GRAB_MODE;
  62. typedef enum {
  63. MODE_INVALID,
  64. MODE_VERSION,
  65. MODE_INFO,
  66. MODE_LIST,
  67. MODE_BENCHMARK,
  68. MODE_READ,
  69. MODE_READ_REGISTER,
  70. MODE_READ_PROPERTY,
  71. MODE_READ_ATTR,
  72. MODE_WRITE,
  73. MODE_WRITE_REGISTER,
  74. MODE_WRITE_PROPERTY,
  75. MODE_RESET,
  76. MODE_GRAB,
  77. MODE_START_DMA,
  78. MODE_STOP_DMA,
  79. MODE_LIST_DMA,
  80. MODE_LIST_DMA_BUFFERS,
  81. MODE_READ_DMA_BUFFER,
  82. MODE_ENABLE_IRQ,
  83. MODE_DISABLE_IRQ,
  84. MODE_ACK_IRQ,
  85. MODE_WAIT_IRQ,
  86. MODE_SET_DMASK,
  87. MODE_SET_MPS,
  88. MODE_ALLOC_KMEM,
  89. MODE_LIST_KMEM,
  90. MODE_READ_KMEM,
  91. MODE_FREE_KMEM,
  92. MODE_LIST_LOCKS,
  93. MODE_FREE_LOCKS,
  94. MODE_LOCK,
  95. MODE_UNLOCK
  96. } MODE;
  97. typedef enum {
  98. ACCESS_BAR,
  99. ACCESS_DMA,
  100. ACCESS_FIFO,
  101. ACCESS_CONFIG
  102. } ACCESS_MODE;
  103. typedef enum {
  104. FLAG_MULTIPACKET = 1,
  105. FLAG_WAIT = 2
  106. } FLAGS;
  107. typedef enum {
  108. FORMAT_DEFAULT = 0,
  109. FORMAT_RAW,
  110. FORMAT_HEADER,
  111. FORMAT_RINGFS
  112. } FORMAT;
  113. typedef enum {
  114. PARTITION_UNKNOWN,
  115. PARTITION_RAW,
  116. PARTITION_EXT4,
  117. PARTITION_NULL
  118. } PARTITION;
  119. typedef enum {
  120. OPT_DEVICE = 'd',
  121. OPT_MODEL = 'm',
  122. OPT_BAR = 'b',
  123. OPT_ACCESS = 'a',
  124. OPT_ENDIANESS = 'e',
  125. OPT_SIZE = 's',
  126. OPT_OUTPUT = 'o',
  127. OPT_TIMEOUT = 't',
  128. OPT_INFO = 'i',
  129. OPT_LIST = 'l',
  130. OPT_READ = 'r',
  131. OPT_WRITE = 'w',
  132. OPT_GRAB = 'g',
  133. OPT_QUIETE = 'q',
  134. OPT_HELP = 'h',
  135. OPT_VERSION = 128,
  136. OPT_RESET,
  137. OPT_BENCHMARK,
  138. OPT_TRIGGER,
  139. OPT_DATA_TYPE,
  140. OPT_EVENT,
  141. OPT_TRIGGER_RATE,
  142. OPT_TRIGGER_TIME,
  143. OPT_RUN_TIME,
  144. OPT_FORMAT,
  145. OPT_BUFFER,
  146. OPT_THREADS,
  147. OPT_LIST_DMA,
  148. OPT_LIST_DMA_BUFFERS,
  149. OPT_READ_DMA_BUFFER,
  150. OPT_START_DMA,
  151. OPT_STOP_DMA,
  152. OPT_ENABLE_IRQ,
  153. OPT_DISABLE_IRQ,
  154. OPT_ACK_IRQ,
  155. OPT_WAIT_IRQ,
  156. OPT_ITERATIONS,
  157. OPT_SET_DMASK,
  158. OPT_SET_MPS,
  159. OPT_ALLOC_KMEM,
  160. OPT_LIST_KMEM,
  161. OPT_FREE_KMEM,
  162. OPT_READ_KMEM,
  163. OPT_LIST_LOCKS,
  164. OPT_FREE_LOCKS,
  165. OPT_LOCK,
  166. OPT_UNLOCK,
  167. OPT_BLOCK_SIZE,
  168. OPT_ALIGNMENT,
  169. OPT_TYPE,
  170. OPT_FORCE,
  171. OPT_VERIFY,
  172. OPT_WAIT,
  173. OPT_MULTIPACKET,
  174. OPT_VERBOSE
  175. } OPTIONS;
  176. static struct option long_options[] = {
  177. {"device", required_argument, 0, OPT_DEVICE },
  178. {"model", required_argument, 0, OPT_MODEL },
  179. {"bar", required_argument, 0, OPT_BAR },
  180. {"access", required_argument, 0, OPT_ACCESS },
  181. {"endianess", required_argument, 0, OPT_ENDIANESS },
  182. {"size", required_argument, 0, OPT_SIZE },
  183. {"output", required_argument, 0, OPT_OUTPUT },
  184. {"timeout", required_argument, 0, OPT_TIMEOUT },
  185. {"iterations", required_argument, 0, OPT_ITERATIONS },
  186. {"info", optional_argument, 0, OPT_INFO },
  187. {"list", optional_argument, 0, OPT_LIST },
  188. {"reset", no_argument, 0, OPT_RESET },
  189. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  190. {"read", optional_argument, 0, OPT_READ },
  191. {"write", optional_argument, 0, OPT_WRITE },
  192. {"grab", optional_argument, 0, OPT_GRAB },
  193. {"trigger", optional_argument, 0, OPT_TRIGGER },
  194. {"data", required_argument, 0, OPT_DATA_TYPE },
  195. {"event", required_argument, 0, OPT_EVENT },
  196. {"run-time", required_argument, 0, OPT_RUN_TIME },
  197. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  198. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  199. {"format", required_argument, 0, OPT_FORMAT },
  200. {"buffer", optional_argument, 0, OPT_BUFFER },
  201. {"threads", optional_argument, 0, OPT_THREADS },
  202. {"start-dma", required_argument, 0, OPT_START_DMA },
  203. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  204. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  205. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  206. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  207. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  208. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  209. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  210. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  211. {"set-dma-mask", required_argument, 0, OPT_SET_DMASK },
  212. {"set-mps", required_argument, 0, OPT_SET_MPS },
  213. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  214. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  215. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  216. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  217. {"list-locks", no_argument, 0, OPT_LIST_LOCKS },
  218. {"free-locks", no_argument, 0, OPT_FREE_LOCKS },
  219. {"lock", required_argument, 0, OPT_LOCK },
  220. {"unlock", required_argument, 0, OPT_UNLOCK },
  221. {"type", required_argument, 0, OPT_TYPE },
  222. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  223. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  224. {"quiete", no_argument, 0, OPT_QUIETE },
  225. {"verbose", optional_argument, 0, OPT_VERBOSE },
  226. {"force", no_argument, 0, OPT_FORCE },
  227. {"verify", no_argument, 0, OPT_VERIFY },
  228. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  229. {"wait", no_argument, 0, OPT_WAIT },
  230. {"version", no_argument, 0, OPT_VERSION },
  231. {"help", no_argument, 0, OPT_HELP },
  232. { 0, 0, 0, 0 }
  233. };
  234. void Usage(int argc, char *argv[], const char *format, ...) {
  235. if (format) {
  236. va_list ap;
  237. va_start(ap, format);
  238. printf("Error %i: ", errno);
  239. vprintf(format, ap);
  240. printf("\n");
  241. va_end(ap);
  242. printf("\n");
  243. }
  244. printf(
  245. "Usage:\n"
  246. " %s <mode> [options] [hex data]\n"
  247. " Modes:\n"
  248. " -i [target] - Device or Register (target) Info\n"
  249. " -l[l] [bank|/branch] - List (detailed) Data Banks & Registers\n"
  250. " -r <addr|dmaX|reg|prop> - Read Data/Register/Property\n"
  251. " -w <addr|dmaX|reg|prop> - Write Data/Register/Property\n"
  252. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  253. " --reset - Reset board\n"
  254. " --version - Version information\n"
  255. " --help - Help message\n"
  256. "\n"
  257. " Property/Register Modes:\n"
  258. " -r <reg>/view[:unit] - Read register view\n"
  259. " -w <reg>/view[:unit] - Write register view\n"
  260. " -r <reg>/unit - Read register, detect view based on unit\n"
  261. " -w <reg>/unit - Write register, detect view based on unt\n"
  262. " -r <prop>[:unit] - Read property\n"
  263. " -w <prop>[:unit] - Write property\n"
  264. " -r <prop|reg>@attr - Read register/property attribute\n"
  265. "\n"
  266. " Event Modes:\n"
  267. " --trigger [event] - Trigger Events\n"
  268. " -g [event] - Grab Events\n"
  269. "\n"
  270. " IRQ Modes:\n"
  271. " --enable-irq [type] - Enable IRQs\n"
  272. " --disable-irq [type] - Disable IRQs\n"
  273. " --acknowledge-irq <source> - Clean IRQ queue\n"
  274. " --wait-irq <source> - Wait for IRQ\n"
  275. "\n"
  276. " DMA Modes:\n"
  277. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  278. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  279. " --list-dma-engines - List active DMA engines\n"
  280. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  281. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  282. "\n"
  283. " PCI Configuration:\n"
  284. " --set-dma-mask [bits] - Set DMA address width (DANGEROUS)\n"
  285. " --set-mps [bits] - Set PCIe Payload Size (DANGEROUS)\n"
  286. "\n"
  287. " Kernel Memory Modes:\n"
  288. " --list-kernel-memory [use] - List kernel buffers\n"
  289. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  290. " block is specified as: use:block_number\n"
  291. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  292. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  293. " dma - Remove all buffers allocated by DMA subsystem\n"
  294. " #number - Remove all buffers with the specified use id\n"
  295. "\n"
  296. " --list-locks - List all registered locks\n"
  297. " --free-locks - Destroy all locks (DANGEROUS)\n"
  298. " --lock <lock name> - Obtain persistent lock\n"
  299. " --unlock <lock name> - Release persistent lock\n"
  300. "\n"
  301. " Addressing:\n"
  302. " -d <device> - FPGA device (/dev/fpga0)\n"
  303. " -m <model> - Memory model (autodetected)\n"
  304. " pci - Plain\n"
  305. " ipecamera - IPE Camera\n"
  306. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  307. "\n"
  308. " Options:\n"
  309. " -s <size> - Number of words (default: 1)\n"
  310. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  311. " -e <l|b> - Endianess Little/Big (default: host)\n"
  312. " -o <file> - Append output to file (default: stdout)\n"
  313. " -t <timeout|unlimited> - Timeout in microseconds\n"
  314. " --check - Verify write operations\n"
  315. "\n"
  316. " Event Options:\n"
  317. " --event <evt> - Specifies event for trigger and grab modes\n"
  318. " --data <type> - Data type to request for the events\n"
  319. " --run-time <us> - Limit time to grab/trigger events\n"
  320. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  321. " --trigger-rate <tps> - Generate tps triggers per second\n"
  322. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  323. " -s <num|unlimited> - Number of events to grab and trigger\n"
  324. " --format [type] - Specifies how event data should be stored\n"
  325. " raw - Just write all events sequentially\n"
  326. " add_header - Prefix events with 512 bit header:\n"
  327. " event(64), data(64), nope(64), size(64)\n"
  328. " seqnum(64), offset(64), timestamp(128)\n"
  329. //" ringfs - Write to RingFS\n"
  330. " --buffer [size] - Request data buffering, size in MB\n"
  331. " --threads [num] - Allow multithreaded processing\n"
  332. "\n"
  333. " DMA Options:\n"
  334. " --multipacket - Read multiple packets\n"
  335. " --wait - Wait until data arrives\n"
  336. "\n"
  337. " Kernel Options:\n"
  338. " --type <type> - Type of kernel memory to allocate\n"
  339. " consistent - Consistent memory\n"
  340. " s2c - DMA S2C (write) memory\n"
  341. " c2s - DMA C2S (read) memory\n"
  342. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  343. " -s <size> - Number of buffers to allocate (default: 1)\n"
  344. " --allignment <alignment> - Buffer alignment (default: page)\n"
  345. "\n"
  346. " Information:\n"
  347. " --verbose [level] - Announce details of ongoing operations\n"
  348. " -q - Quiete mode (suppress warnings)\n"
  349. "\n"
  350. " Data:\n"
  351. " Data can be specified as sequence of hexdecimal number or\n"
  352. " a single value prefixed with '*'. In this case it will be\n"
  353. " replicated the specified amount of times\n"
  354. "\n\n",
  355. argv[0]);
  356. exit(0);
  357. }
  358. static int StopFlag = 0;
  359. static void signal_exit_handler(int signo) {
  360. if (++StopFlag > 2)
  361. exit(-1);
  362. }
  363. void LogError(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, va_list ap) {
  364. vprintf(format, ap);
  365. if (prio == PCILIB_LOG_ERROR) {
  366. if (errno) printf("\nerrno: %i (%s)", errno, strerror(errno));
  367. }
  368. printf("\n");
  369. if (prio == PCILIB_LOG_ERROR) {
  370. printf("Exiting at [%s:%u]\n\n", file, line);
  371. exit(-1);
  372. }
  373. }
  374. void ErrorInternal(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, ...) {
  375. va_list ap;
  376. va_start(ap, format);
  377. LogError(arg, file, line, prio, format, ap);
  378. va_end(ap);
  379. }
  380. #define Error(...) ErrorInternal(NULL, __FILE__, __LINE__, PCILIB_LOG_ERROR, __VA_ARGS__)
  381. int RegisterCompare(const void *aptr, const void *bptr, void *registers) {
  382. pcilib_register_description_t *a = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)aptr];
  383. pcilib_register_description_t *b = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)bptr];
  384. if (a->bank < b->bank) return -1;
  385. if (a->bank > b->bank) return 1;
  386. if (a->addr < b->addr) return -1;
  387. if (a->addr > b->addr) return 1;
  388. if ((a->type != PCILIB_REGISTER_BITS)&&(b->type == PCILIB_REGISTER_BITS)) return -1;
  389. if ((a->type == PCILIB_REGISTER_BITS)&&(b->type != PCILIB_REGISTER_BITS)) return 1;
  390. if (a->offset < b->offset) return -1;
  391. if (a->offset > b->offset) return 0;
  392. return 0;
  393. }
  394. void ListProperties(pcilib_t *handle, const char *branch, int details) {
  395. int i;
  396. pcilib_property_info_t *props;
  397. props = pcilib_get_property_list(handle, branch, 0);
  398. if (!props) Error("Error getting properties");
  399. if (props[0].path) {
  400. printf("Properties: \n");
  401. for (i = 0; props[i].path; i++) {
  402. const char *mode;
  403. const char *type;
  404. switch (props[i].type) {
  405. case PCILIB_TYPE_LONG:
  406. type = "int ";
  407. break;
  408. case PCILIB_TYPE_DOUBLE:
  409. type = "float ";
  410. break;
  411. case PCILIB_TYPE_STRING:
  412. type = "string ";
  413. break;
  414. case PCILIB_TYPE_INVALID:
  415. type = NULL;
  416. break;
  417. default:
  418. type = "unknown";
  419. }
  420. switch (props[i].mode) {
  421. case PCILIB_ACCESS_RW:
  422. mode = "RW";
  423. break;
  424. case PCILIB_ACCESS_R:
  425. mode = "R ";
  426. break;
  427. case PCILIB_ACCESS_W:
  428. mode = "W ";
  429. break;
  430. default:
  431. mode = " ";
  432. }
  433. if (type)
  434. printf(" (%s %s) ", type, mode);
  435. else
  436. printf(" %12s", "");
  437. if (props[i].flags&PCILIB_LIST_FLAG_CHILDS)
  438. printf(" + ");
  439. else
  440. printf(" ");
  441. if (details > 0) {
  442. printf("%s", props[i].name);
  443. if ((props[i].description)&&(props[i].description[0])) {
  444. printf(": %s", props[i].description);
  445. }
  446. } else {
  447. printf("%s", props[i].path);
  448. }
  449. printf("\n");
  450. }
  451. printf("\n");
  452. pcilib_free_property_info(handle, props);
  453. }
  454. }
  455. void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
  456. int i, j, k;
  457. const pcilib_register_bank_description_t *banks;
  458. const pcilib_register_description_t *registers;
  459. const pcilib_event_description_t *events;
  460. const pcilib_event_data_type_description_t *types;
  461. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  462. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  463. for (i = 0; i < PCILIB_MAX_BARS; i++) {
  464. if (board_info->bar_length[i] > 0) {
  465. printf(" BAR %d - ", i);
  466. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  467. case IORESOURCE_IO: printf(" IO"); break;
  468. case IORESOURCE_MEM: printf("MEM"); break;
  469. case IORESOURCE_IRQ: printf("IRQ"); break;
  470. case IORESOURCE_DMA: printf("DMA"); break;
  471. }
  472. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  473. else printf("32");
  474. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  475. }
  476. }
  477. printf("\n");
  478. if ((dma_info)&&(dma_info->engines)) {
  479. printf("DMA Engines: \n");
  480. for (i = 0; dma_info->engines[i].addr_bits; i++) {
  481. const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
  482. printf(" DMA %2d ", engine->addr);
  483. switch (engine->direction) {
  484. case PCILIB_DMA_FROM_DEVICE:
  485. printf("C2S");
  486. break;
  487. case PCILIB_DMA_TO_DEVICE:
  488. printf("S2C");
  489. break;
  490. case PCILIB_DMA_BIDIRECTIONAL:
  491. printf("BI ");
  492. break;
  493. }
  494. printf(" - Type: ");
  495. switch (engine->type) {
  496. case PCILIB_DMA_TYPE_BLOCK:
  497. printf("Block");
  498. break;
  499. case PCILIB_DMA_TYPE_PACKET:
  500. printf("Packet");
  501. break;
  502. default:
  503. printf("Unknown");
  504. }
  505. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  506. }
  507. printf("\n");
  508. }
  509. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  510. else banks = model_info->banks;
  511. if (banks) {
  512. printf("Banks: \n");
  513. for (i = 0; banks[i].access; i++) {
  514. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  515. if ((banks[i].description)&&(banks[i].description[0])) {
  516. printf(": %s", banks[i].description);
  517. }
  518. printf("\n");
  519. }
  520. printf("\n");
  521. }
  522. if (bank == (char*)-1) registers = NULL;
  523. else registers = model_info->registers;
  524. if (registers) {
  525. pcilib_register_t regsort[handle->num_reg];
  526. pcilib_register_bank_addr_t bank_addr = 0;
  527. if (bank) {
  528. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  529. const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  530. bank_addr = b->addr;
  531. if (b->description) printf("%s:\n", b->description);
  532. else if (b->name) printf("Registers of bank %s:\n", b->name);
  533. else printf("Registers of bank 0x%x:\n", b->addr);
  534. } else {
  535. printf("Registers: \n");
  536. }
  537. // sorting
  538. for (i = 0, k = 0; registers[i].bits; i++) {
  539. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  540. if ((registers[i].type == PCILIB_REGISTER_BITS)&&(!details)) continue;
  541. regsort[k++] = i;
  542. }
  543. qsort_r(regsort, k, sizeof(pcilib_register_t), &RegisterCompare, (void*)registers);
  544. for (j = 0; j < k; j++) {
  545. const char *mode;
  546. i = regsort[j];
  547. if (registers[i].type == PCILIB_REGISTER_BITS) {
  548. if (!details) continue;
  549. if (registers[i].bits > 1) {
  550. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  551. } else {
  552. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  553. }
  554. continue;
  555. }
  556. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  557. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  558. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  559. else mode = " ";
  560. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  561. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  562. printf(": %s", registers[i].description);
  563. }
  564. printf("\n");
  565. }
  566. printf("\n");
  567. }
  568. ListProperties(handle, "/", details);
  569. if (bank == (char*)-1) events = NULL;
  570. else {
  571. events = model_info->events;
  572. types = model_info->data_types;
  573. }
  574. if (events) {
  575. printf("Events: \n");
  576. for (i = 0; events[i].name; i++) {
  577. printf(" %s", events[i].name);
  578. if ((events[i].description)&&(events[i].description[0])) {
  579. printf(": %s", events[i].description);
  580. }
  581. if (types) {
  582. for (j = 0; types[j].name; j++) {
  583. if (types[j].evid & events[i].evid) {
  584. printf("\n %s", types[j].name);
  585. if ((types[j].description)&&(types[j].description[0])) {
  586. printf(": %s", types[j].description);
  587. }
  588. }
  589. }
  590. }
  591. }
  592. printf("\n");
  593. }
  594. }
  595. void ViewInfo(pcilib_t *handle, pcilib_register_t reg, size_t id) {
  596. int err;
  597. int i;
  598. pcilib_value_t val = {0};
  599. pcilib_register_value_name_t *vnames;
  600. pcilib_view_t view;
  601. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  602. const pcilib_register_description_t *r;
  603. const pcilib_view_description_t *v;
  604. if (reg == PCILIB_REGISTER_INVALID) {
  605. r = NULL;
  606. view = id;
  607. } else {
  608. r = &model_info->registers[reg];
  609. view = pcilib_find_view_by_name(handle, r->views[id].view);
  610. }
  611. if (view == PCILIB_VIEW_INVALID) return;
  612. v = model_info->views[view];
  613. if (r) {
  614. printf(" View %s (", r->views[id].name);
  615. } else {
  616. printf("%s\n", v->name);
  617. printf(" Data type : ");
  618. }
  619. switch (v->type) {
  620. case PCILIB_TYPE_STRING:
  621. printf("char*");
  622. break;
  623. case PCILIB_TYPE_DOUBLE:
  624. printf("double");
  625. break;
  626. case PCILIB_TYPE_LONG:
  627. printf("long");
  628. break;
  629. default:
  630. printf("unknown");
  631. }
  632. if (r) printf(")");
  633. printf("\n");
  634. if (v->mode&PCILIB_ACCESS_R) {
  635. if (r) {
  636. err = pcilib_read_register_view_by_id(handle, reg, r->views[id].name, &val);
  637. } else {
  638. err = pcilib_get_property(handle, v->name, &val);
  639. }
  640. if (!err) err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  641. } else {
  642. err = PCILIB_ERROR_NOTPERMITED;
  643. }
  644. if (err) {
  645. if (err == PCILIB_ERROR_NOTPERMITED)
  646. printf(" Current value : no read access\n");
  647. else
  648. printf(" Current value : error %i\n", err);
  649. } else {
  650. printf(" Current value : %s", val.sval);
  651. if (v->unit) printf(" (units: %s)", v->unit);
  652. printf("\n");
  653. }
  654. if (v->unit) {
  655. pcilib_unit_t unit = pcilib_find_unit_by_name(handle, v->unit);
  656. printf(" Supported units: %s", v->unit);
  657. if (unit != PCILIB_UNIT_INVALID) {
  658. const pcilib_unit_description_t *u = &model_info->units[unit];
  659. for (i = 0; u->transforms[i].unit; i++)
  660. printf(", %s", u->transforms[i].unit);
  661. }
  662. printf("\n");
  663. }
  664. printf(" Access : ");
  665. if ((v->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  666. if (v->mode&PCILIB_REGISTER_R) printf("R");
  667. if (v->mode&PCILIB_REGISTER_W) printf("W");
  668. printf("\n");
  669. if ((v->api == &pcilib_enum_view_static_api)||(v->api == &pcilib_enum_view_xml_api)) {
  670. vnames = ((pcilib_enum_view_description_t*)v)->names;
  671. printf(" Value aliases :");
  672. for (i = 0; vnames[i].name; i++) {
  673. if (i) printf(",");
  674. printf(" %s = %lu", vnames[i].name, vnames[i].value);
  675. if (vnames[i].min != vnames[i].max)
  676. printf(" (%lu - %lu)", vnames[i].min, vnames[i].max);
  677. }
  678. printf("\n");
  679. } else if (v->api == &pcilib_transform_view_api) {
  680. const pcilib_transform_view_description_t *tv = (const pcilib_transform_view_description_t*)v;
  681. if (tv->read_from_reg)
  682. printf(" Read function : %s\n", tv->read_from_reg);
  683. if (tv->write_to_reg)
  684. printf(" Write function : %s\n", tv->write_to_reg);
  685. }
  686. if (v->description)
  687. printf(" Description : %s\n", v->description);
  688. }
  689. void RegisterInfo(pcilib_t *handle, pcilib_register_t reg) {
  690. int err;
  691. int i;
  692. pcilib_register_value_t regval;
  693. pcilib_register_info_t *info;
  694. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  695. const pcilib_register_description_t *r = &model_info->registers[reg];
  696. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, r->bank);
  697. const pcilib_register_bank_description_t *b = &model_info->banks[bank];
  698. if (r->mode&PCILIB_ACCESS_R) {
  699. err = pcilib_read_register_by_id(handle, reg, &regval);
  700. } else {
  701. err = PCILIB_ERROR_NOTPERMITED;
  702. }
  703. info = pcilib_get_register_info(handle, b->name, r->name, 0);
  704. if (!info) Error("Can't obtain register info for %s", r->name);
  705. printf("%s/%s\n", b->name, r->name);
  706. printf(" Current value: ");
  707. if (err) {
  708. if (err == PCILIB_ERROR_NOTPERMITED) printf("no read access");
  709. else printf("error %i", err);
  710. } else printf(b->format, regval);
  711. if (r->mode&PCILIB_REGISTER_W) {
  712. printf(" (default: ");
  713. printf(b->format, r->defvalue);
  714. if (info->range) {
  715. printf(", range: ");
  716. printf(b->format, info->range->min);
  717. printf (" - ");
  718. printf(b->format, info->range->max);
  719. }
  720. printf(")");
  721. }
  722. printf("\n");
  723. printf(" Address : 0x%x [%u:%u]\n", r->addr, r->offset, r->offset + r->bits);
  724. if ((info->values)&&(info->values[0].name)) {
  725. printf(" Value aliases:");
  726. for (i = 0; info->values[i].name; i++)
  727. printf(" %s", info->values[i].name);
  728. printf("\n");
  729. }
  730. printf(" Access : ");
  731. if ((r->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  732. if (r->mode&PCILIB_REGISTER_R) printf("R");
  733. if (r->mode&PCILIB_REGISTER_W) printf("W");
  734. if (r->mode&PCILIB_REGISTER_W1C) printf("/reset");
  735. if (r->mode&PCILIB_REGISTER_W1I) printf("/invert");
  736. printf("\n");
  737. if (r->description)
  738. printf(" Description : %s\n", r->description);
  739. if (r->views) {
  740. printf("\nSupported Views:\n");
  741. for (i = 0; r->views[i].name; i++) {
  742. ViewInfo(handle, reg, i);
  743. }
  744. }
  745. pcilib_free_register_info(handle, info);
  746. }
  747. void Version(pcilib_t *handle, const pcilib_model_description_t *model_info) {
  748. const pcilib_driver_version_t *driver_version;
  749. driver_version = pcilib_get_driver_version(handle);
  750. printf("pcilib version: %u.%u.%u\n",
  751. PCILIB_VERSION_GET_MAJOR(PCILIB_VERSION),
  752. PCILIB_VERSION_GET_MINOR(PCILIB_VERSION),
  753. PCILIB_VERSION_GET_MICRO(PCILIB_VERSION)
  754. );
  755. printf("driver version: %lu.%lu.%lu, interface: 0x%lx, registered ioctls: %lu\n",
  756. PCILIB_VERSION_GET_MAJOR(driver_version->version),
  757. PCILIB_VERSION_GET_MINOR(driver_version->version),
  758. PCILIB_VERSION_GET_MICRO(driver_version->version),
  759. driver_version->interface,
  760. driver_version->ioctls
  761. );
  762. if (model_info) {
  763. pcilib_version_t version = model_info->interface_version;
  764. printf("Model: %s", handle->model);
  765. if (version) {
  766. printf(", version: %u.%u.%u\n",
  767. PCILIB_VERSION_GET_MAJOR(version),
  768. PCILIB_VERSION_GET_MINOR(version),
  769. PCILIB_VERSION_GET_MICRO(version)
  770. );
  771. } else {
  772. printf(" (embedded)\n");
  773. }
  774. }
  775. if (model_info->dma) {
  776. pcilib_version_t version = model_info->dma->api->version;
  777. printf("DMA Engine: %s, version: %u.%u.%u\n", model_info->dma->name,
  778. PCILIB_VERSION_GET_MAJOR(version),
  779. PCILIB_VERSION_GET_MINOR(version),
  780. PCILIB_VERSION_GET_MICRO(version)
  781. );
  782. }
  783. BuildInfo();
  784. }
  785. void Info(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *target) {
  786. int i, j;
  787. DIR *dir;
  788. void *plugin;
  789. const char *path;
  790. struct dirent *entry;
  791. const pcilib_model_description_t *info = NULL;
  792. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  793. const pcilib_pcie_link_info_t *link_info = pcilib_get_pcie_link_info(handle);
  794. int have_state;
  795. pcilib_device_state_t state;
  796. path = getenv("PCILIB_PLUGIN_DIR");
  797. if (!path) path = PCILIB_PLUGIN_DIR;
  798. have_state = !pcilib_get_device_state(handle, &state);
  799. if (board_info)
  800. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x, Model: %s\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func, handle->model);
  801. if (link_info) {
  802. printf(" PCIe x%u (gen%u), DMA Payload: %u (of %u)", link_info->link_width, link_info->link_speed, 1<<link_info->payload, 1<<link_info->max_payload);
  803. if (have_state) {
  804. int bits = 0;
  805. unsigned long mask;
  806. for (mask = state.dma_mask; mask&1; mask>>=1) bits++;
  807. printf(", DMA Mask: ");
  808. if (mask) printf("0x%lx", state.dma_mask);
  809. else printf("%u bits", bits);
  810. printf(", IOMMU: %s", state.iommu?"on":"off");
  811. }
  812. printf("\n");
  813. }
  814. if (board_info)
  815. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  816. printf("\n");
  817. if (target) {
  818. if (*target == '/') {
  819. pcilib_view_t view;
  820. view = pcilib_find_view_by_name(handle, target);
  821. if (view != PCILIB_VIEW_INVALID)
  822. return ViewInfo(handle, PCILIB_REGISTER_INVALID, view);
  823. Error(" No property %s is found", target);
  824. } else {
  825. pcilib_register_t reg;
  826. reg = pcilib_find_register(handle, NULL, target);
  827. if (reg != PCILIB_REGISTER_INVALID)
  828. return RegisterInfo(handle, reg);
  829. Error(" No register %s is found", target);
  830. }
  831. }
  832. List(handle, model_info, (char*)-1, 0);
  833. printf("Available models:\n");
  834. dir = opendir(path);
  835. if (dir) {
  836. while ((entry = readdir(dir))) {
  837. const char *suffix = strstr(entry->d_name, ".so");
  838. if ((!suffix)||(strlen(suffix) != 3)) continue;
  839. plugin = pcilib_plugin_load(entry->d_name);
  840. if (plugin) {
  841. info = pcilib_get_plugin_model(handle, plugin, 0, 0, NULL);
  842. if (info) {
  843. printf(" %s\n", entry->d_name);
  844. for (j = 0; info[j].name; j++) {
  845. pcilib_version_t version = info[j].api->version;
  846. printf(" %-12s %u.%u.%u - %s\n", info[j].name,
  847. PCILIB_VERSION_GET_MAJOR(version),
  848. PCILIB_VERSION_GET_MINOR(version),
  849. PCILIB_VERSION_GET_MICRO(version),
  850. info[j].description?info[j].description:"");
  851. }
  852. }
  853. pcilib_plugin_close(plugin);
  854. } else {
  855. const char *msg = dlerror();
  856. if (msg)
  857. printf(" %s: %s\n", entry->d_name, msg);
  858. }
  859. }
  860. closedir(dir);
  861. }
  862. // printf(" XML\n");
  863. printf(" Internal Models\n");
  864. for (i = 0; pcilib_dma[i].api; i++)
  865. printf(" %-12s - %s\n", pcilib_dma[i].name, pcilib_dma[i].description?pcilib_dma[i].description:"");
  866. printf(" %-12s - Plain PCI-access model\n\n", "pci");
  867. }
  868. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  869. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  870. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  871. int err;
  872. int i, j, errors;
  873. void *data, *buf, *check;
  874. void *fifo = NULL;
  875. struct timeval start, end;
  876. unsigned long time;
  877. size_t size, min_size, max_size;
  878. double mbs_in, mbs_out, mbs;
  879. size_t irqs;
  880. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  881. if (mode == ACCESS_CONFIG)
  882. Error("No benchmarking of configuration space acess is allowed");
  883. if (mode == ACCESS_DMA) {
  884. if (n) {
  885. min_size = n * access;
  886. max_size = n * access;
  887. } else {
  888. min_size = 1024;
  889. max_size = BENCH_MAX_DMA_SIZE;
  890. }
  891. for (size = min_size; size <= max_size; size *= 4) {
  892. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  893. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  894. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  895. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  896. if (err) irqs = 0;
  897. printf("%8zu KiB - ", size / 1024);
  898. printf("RW: ");
  899. if (mbs < 0) printf("failed ... ");
  900. else printf("%8.2lf MiB/s", mbs);
  901. printf(", R: ");
  902. if (mbs_in < 0) printf("failed ... ");
  903. else printf("%8.2lf MiB/s", mbs_in);
  904. printf(", W: ");
  905. if (mbs_out < 0) printf("failed ... ");
  906. else printf("%8.2lf MiB/s", mbs_out);
  907. if (irqs) {
  908. printf(", IRQs: %lu", irqs);
  909. }
  910. printf("\n");
  911. }
  912. return 0;
  913. }
  914. if (bar == PCILIB_BAR_INVALID) {
  915. unsigned long maxlength = 0;
  916. for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
  917. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  918. bar = i;
  919. break;
  920. }
  921. if (board_info->bar_length[i] > maxlength) {
  922. maxlength = board_info->bar_length[i];
  923. bar = i;
  924. }
  925. }
  926. if (bar < 0) Error("Data banks are not available");
  927. }
  928. if (n) {
  929. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  930. min_size = n * access;
  931. max_size = n * access;
  932. } else {
  933. min_size = access;
  934. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  935. else max_size = BENCH_MAX_FIFO_SIZE;
  936. }
  937. err = posix_memalign( (void**)&buf, 256, max_size );
  938. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  939. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  940. if (mode == ACCESS_FIFO) {
  941. fifo = pcilib_resolve_bar_address(handle, bar, addr);
  942. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  943. } else {
  944. data = pcilib_resolve_bar_address(handle, bar, 0);
  945. if (!data) Error("Can't resolve start of bar (%u)", bar);
  946. }
  947. if (mode == ACCESS_FIFO)
  948. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  949. else
  950. printf("Transfer time (Bank: %i):\n", bar);
  951. for (size = min_size ; size < max_size; size *= 8) {
  952. gettimeofday(&start,NULL);
  953. if (mode == ACCESS_BAR) {
  954. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  955. pcilib_memcpy(buf, data, access, size / access);
  956. }
  957. } else {
  958. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  959. for (j = 0; j < (size/access); j++) {
  960. pcilib_memcpy(buf + j * access, fifo, access, 1);
  961. }
  962. }
  963. }
  964. gettimeofday(&end,NULL);
  965. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  966. printf("%8zu bytes - read: %8.2lf MiB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  967. fflush(0);
  968. gettimeofday(&start,NULL);
  969. if (mode == ACCESS_BAR) {
  970. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  971. pcilib_memcpy(data, buf, access, size / access);
  972. }
  973. } else {
  974. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  975. for (j = 0; j < (size/access); j++) {
  976. pcilib_memcpy(fifo, buf + j * access, access, 1);
  977. }
  978. }
  979. }
  980. gettimeofday(&end,NULL);
  981. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  982. printf(", write: %8.2lf MiB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  983. }
  984. printf("\n\nOpen-Transfer-Close time: \n");
  985. for (size = 4 ; size < max_size; size *= 8) {
  986. gettimeofday(&start,NULL);
  987. if (mode == ACCESS_BAR) {
  988. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  989. pcilib_read(handle, bar, 0, access, size / access, buf);
  990. }
  991. } else {
  992. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  993. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  994. }
  995. }
  996. gettimeofday(&end,NULL);
  997. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  998. printf("%8zu bytes - read: %8.2lf MiB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  999. fflush(0);
  1000. gettimeofday(&start,NULL);
  1001. if (mode == ACCESS_BAR) {
  1002. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  1003. pcilib_write(handle, bar, 0, access, size / access, buf);
  1004. }
  1005. } else {
  1006. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  1007. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  1008. }
  1009. }
  1010. gettimeofday(&end,NULL);
  1011. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  1012. printf(", write: %8.2lf MiB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  1013. if (mode == ACCESS_BAR) {
  1014. gettimeofday(&start,NULL);
  1015. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  1016. pcilib_write(handle, bar, 0, access, size / access, buf);
  1017. pcilib_read(handle, bar, 0, access, size / access, check);
  1018. if (memcmp(buf, check, size)) ++errors;
  1019. }
  1020. gettimeofday(&end,NULL);
  1021. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  1022. printf(", write-verify: %8.2lf MiB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  1023. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  1024. }
  1025. printf("\n");
  1026. }
  1027. printf("\n\n");
  1028. free(check);
  1029. free(buf);
  1030. return 0;
  1031. }
  1032. #define pci2host16(endianess, value) endianess?
  1033. /*
  1034. typedef struct {
  1035. size_t size;
  1036. void *data;
  1037. size_t pos;
  1038. int multi_mode;
  1039. } DMACallbackContext;
  1040. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  1041. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  1042. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  1043. ctx->size *= 2;
  1044. ctx->data = realloc(ctx->data, ctx->size);
  1045. if (!ctx->data) {
  1046. Error("Allocation of %i bytes of memory have failed", ctx->size);
  1047. return 0;
  1048. }
  1049. }
  1050. memcpy(ctx->data + ctx->pos, buf, bufsize);
  1051. ctx->pos += bufsize;
  1052. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  1053. return 1;
  1054. }
  1055. */
  1056. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  1057. void *buf;
  1058. int i, err;
  1059. size_t ret, bytes;
  1060. size_t size = n * abs(access);
  1061. int block_width, blocks_per_line;
  1062. int numbers_per_block, numbers_per_line;
  1063. pcilib_dma_engine_t dmaid;
  1064. pcilib_dma_flags_t dma_flags = 0;
  1065. int fd;
  1066. char stmp[256];
  1067. struct stat st;
  1068. const pcilib_board_info_t *board_info;
  1069. numbers_per_block = BLOCK_SIZE / access;
  1070. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1071. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1072. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1073. numbers_per_line = blocks_per_line * numbers_per_block;
  1074. if (size) {
  1075. buf = malloc(size);
  1076. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  1077. } else {
  1078. buf = NULL;
  1079. }
  1080. switch (mode) {
  1081. case ACCESS_DMA:
  1082. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  1083. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1084. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1085. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  1086. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  1087. if (size) {
  1088. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  1089. if (err) Error("Error (%i) is reported by DMA engine", err);
  1090. } else {
  1091. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  1092. size = 2048; bytes = 0;
  1093. do {
  1094. size *= 2;
  1095. buf = realloc(buf, size);
  1096. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  1097. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  1098. bytes += ret;
  1099. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  1100. err = PCILIB_ERROR_TOOBIG;
  1101. if ((flags&FLAG_WAIT)==0) timeout = 0;
  1102. }
  1103. } while (err == PCILIB_ERROR_TOOBIG);
  1104. }
  1105. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  1106. Error("Error (%i) during DMA read", err);
  1107. }
  1108. if (bytes <= 0) {
  1109. pcilib_warning("No data is returned by DMA engine");
  1110. return -1;
  1111. }
  1112. size = bytes;
  1113. n = bytes / abs(access);
  1114. addr = 0;
  1115. break;
  1116. case ACCESS_FIFO:
  1117. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  1118. addr = 0;
  1119. break;
  1120. case ACCESS_CONFIG:
  1121. board_info = pcilib_get_board_info(handle);
  1122. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  1123. fd = open(stmp, O_RDONLY);
  1124. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  1125. if (st.st_size < addr)
  1126. Error("Access beyond the end of PCI configuration space");
  1127. if (st.st_size < (addr + size)) {
  1128. n = (st.st_size - addr) / abs(access);
  1129. size = n * abs(access);
  1130. if (!n) Error("Access beyond the end of PCI configuration space");
  1131. }
  1132. lseek(fd, addr, SEEK_SET);
  1133. ret = read(fd, buf, size);
  1134. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  1135. if (ret < size) {
  1136. size = ret;
  1137. n = ret / abs(access);
  1138. }
  1139. close(fd);
  1140. break;
  1141. default:
  1142. pcilib_read(handle, bar, addr, access, size / access, buf);
  1143. }
  1144. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1145. if (o) {
  1146. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1147. fwrite(buf, abs(access), n, o);
  1148. } else {
  1149. for (i = 0; i < n; i++) {
  1150. if (i) {
  1151. if (i%numbers_per_line == 0) printf("\n");
  1152. else {
  1153. printf("%*s", SEPARATOR_WIDTH, "");
  1154. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1155. }
  1156. }
  1157. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  1158. switch (access) {
  1159. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  1160. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  1161. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  1162. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  1163. }
  1164. }
  1165. printf("\n\n");
  1166. }
  1167. free(buf);
  1168. return 0;
  1169. }
  1170. int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, const char *attr) {
  1171. int i;
  1172. int err;
  1173. const char *format;
  1174. pcilib_register_bank_t bank_id;
  1175. pcilib_register_bank_addr_t bank_addr = 0;
  1176. pcilib_register_value_t value;
  1177. // Adding DMA registers
  1178. pcilib_get_dma_description(handle);
  1179. if (reg||view||attr) {
  1180. pcilib_value_t val = {0};
  1181. if (attr) {
  1182. if (reg) err = pcilib_get_register_attr(handle, bank, reg, attr, &val);
  1183. else if (view) err = pcilib_get_property_attr(handle, view, attr, &val);
  1184. else if (bank) err = pcilib_get_register_bank_attr(handle, bank, attr, &val);
  1185. else err = PCILIB_ERROR_INVALID_ARGUMENT;
  1186. if (err) {
  1187. if (err == PCILIB_ERROR_NOTFOUND)
  1188. Error("Attribute %s is not found", attr);
  1189. else
  1190. Error("Error (%i) reading attribute %s", err, attr);
  1191. }
  1192. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1193. if (err) Error("Error converting attribute %s to string", attr);
  1194. printf("%s = %s", attr, val.sval);
  1195. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1196. printf(" %s", val.unit);
  1197. printf(" (for %s)\n", (reg?reg:(view?view:bank)));
  1198. } else if (view) {
  1199. if (reg) {
  1200. err = pcilib_read_register_view(handle, bank, reg, view, &val);
  1201. if (err) Error("Error reading view %s of register %s", view, reg);
  1202. } else {
  1203. err = pcilib_get_property(handle, view, &val);
  1204. if (err) Error("Error reading property %s", view);
  1205. }
  1206. if (unit) {
  1207. err = pcilib_convert_value_unit(handle, &val, unit);
  1208. if (err) {
  1209. if (reg) Error("Error converting view %s of register %s to unit %s", view, reg, unit);
  1210. else Error("Error converting property %s to unit %s", view, unit);
  1211. }
  1212. }
  1213. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1214. if (err) {
  1215. if (reg) Error("Error converting view %s of register %s to string", view);
  1216. else Error("Error converting property %s to string", view);
  1217. }
  1218. printf("%s = %s", (reg?reg:view), val.sval);
  1219. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1220. printf(" %s", val.unit);
  1221. printf("\n");
  1222. } else {
  1223. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1224. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
  1225. format = model_info->banks[bank_id].format;
  1226. if (!format) format = "%lu";
  1227. err = pcilib_read_register_by_id(handle, regid, &value);
  1228. if (err) Error("Error reading register %s", reg);
  1229. printf("%s = ", reg);
  1230. printf(format, value);
  1231. printf("\n");
  1232. }
  1233. } else {
  1234. if (model_info->registers) {
  1235. if (bank) {
  1236. bank_id = pcilib_find_register_bank(handle, bank);
  1237. bank_addr = model_info->banks[bank_id].addr;
  1238. }
  1239. printf("Registers:\n");
  1240. for (i = 0; model_info->registers[i].bits; i++) {
  1241. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  1242. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
  1243. format = model_info->banks[bank_id].format;
  1244. if (!format) format = "%lu";
  1245. err = pcilib_read_register_by_id(handle, i, &value);
  1246. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  1247. else {
  1248. printf(" %s = ", model_info->registers[i].name);
  1249. printf(format, value);
  1250. }
  1251. printf(" [");
  1252. printf(format, model_info->registers[i].defvalue);
  1253. printf("]");
  1254. printf("\n");
  1255. }
  1256. }
  1257. } else {
  1258. printf("No registers");
  1259. }
  1260. printf("\n");
  1261. }
  1262. return 0;
  1263. }
  1264. #define WRITE_REGVAL(buf, n, access, o) {\
  1265. uint##access##_t tbuf[n]; \
  1266. for (i = 0; i < n; i++) { \
  1267. tbuf[i] = (uint##access##_t)buf[i]; \
  1268. } \
  1269. fwrite(tbuf, access/8, n, o); \
  1270. }
  1271. int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  1272. int err;
  1273. int i;
  1274. const pcilib_register_bank_description_t *banks = model_info->banks;
  1275. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  1276. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  1277. if (bank) Error("Invalid register bank is specified (%s)", bank);
  1278. else Error("Register bank should be specified");
  1279. }
  1280. int access = banks[bank_id].access / 8;
  1281. // int size = n * abs(access);
  1282. int block_width, blocks_per_line;
  1283. int numbers_per_block, numbers_per_line;
  1284. numbers_per_block = BLOCK_SIZE / access;
  1285. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1286. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1287. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1288. numbers_per_line = blocks_per_line * numbers_per_block;
  1289. pcilib_register_value_t buf[n];
  1290. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  1291. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1292. if (o) {
  1293. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1294. switch (access) {
  1295. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  1296. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  1297. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  1298. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  1299. }
  1300. } else {
  1301. for (i = 0; i < n; i++) {
  1302. if (i) {
  1303. if (i%numbers_per_line == 0) printf("\n");
  1304. else {
  1305. printf("%*s", SEPARATOR_WIDTH, "");
  1306. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1307. }
  1308. }
  1309. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  1310. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  1311. }
  1312. printf("\n\n");
  1313. }
  1314. return 0;
  1315. }
  1316. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  1317. int read_back = 0;
  1318. void *buf, *check;
  1319. int res = 0, i, err;
  1320. int size = n * abs(access);
  1321. size_t ret;
  1322. pcilib_dma_engine_t dmaid;
  1323. if (mode == ACCESS_CONFIG)
  1324. Error("Writting to PCI configuration space is not supported");
  1325. err = posix_memalign( (void**)&buf, 256, size );
  1326. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1327. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1328. for (i = 0; i < n; i++) {
  1329. switch (access) {
  1330. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  1331. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  1332. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  1333. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  1334. default: Error("Unexpected data size (%lu)", access);
  1335. }
  1336. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1337. }
  1338. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1339. switch (mode) {
  1340. case ACCESS_DMA:
  1341. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1342. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1343. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  1344. if ((err)||(ret != size)) {
  1345. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  1346. else if (err) Error("DMA engine returned a error while writing the data");
  1347. else if (!ret) Error("No data is written by DMA engine");
  1348. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  1349. }
  1350. break;
  1351. case ACCESS_FIFO:
  1352. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  1353. break;
  1354. default:
  1355. pcilib_write(handle, bar, addr, access, size / access, buf);
  1356. if (verify) {
  1357. pcilib_read(handle, bar, addr, access, size / access, check);
  1358. read_back = 1;
  1359. }
  1360. }
  1361. if ((read_back)&&(memcmp(buf, check, size))) {
  1362. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1363. if (endianess) pcilib_swap(check, check, abs(access), n);
  1364. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  1365. exit(-1);
  1366. }
  1367. free(check);
  1368. free(buf);
  1369. return 0;
  1370. }
  1371. int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  1372. pcilib_register_value_t *buf, *check;
  1373. int res, i, err;
  1374. unsigned long value;
  1375. int size = n * sizeof(pcilib_register_value_t);
  1376. err = posix_memalign( (void**)&buf, 256, size );
  1377. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1378. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1379. for (i = 0; i < n; i++) {
  1380. res = sscanf(data[i], "%lx", &value);
  1381. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1382. buf[i] = value;
  1383. }
  1384. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  1385. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1386. err = pcilib_read_register_space(handle, bank, addr, n, check);
  1387. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1388. if (memcmp(buf, check, size)) {
  1389. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1390. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  1391. exit(-1);
  1392. }
  1393. free(check);
  1394. free(buf);
  1395. return 0;
  1396. }
  1397. int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, char **data) {
  1398. int err = 0;
  1399. pcilib_value_t val = {0};
  1400. pcilib_register_value_t value, verify;
  1401. /*
  1402. pcilib_register_bank_t bank_id;
  1403. pcilib_register_bank_addr_t bank_addr;
  1404. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  1405. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  1406. format = model_info->banks[bank_id].format;
  1407. if (!format) format = "%lu";
  1408. */
  1409. err = pcilib_set_value_from_static_string(handle, &val, *data);
  1410. if (err) Error("Error (%i) setting value", err);
  1411. if (view) {
  1412. if (unit)
  1413. val.unit = unit;
  1414. if (reg) {
  1415. err = pcilib_write_register_view(handle, bank, reg, view, &val);
  1416. if (err) Error("Error writting view %s of register %s", view, reg);
  1417. printf("%s is written\n ", reg);
  1418. } else {
  1419. err = pcilib_set_property(handle, view, &val);
  1420. if (err) Error("Error setting property %s", view);
  1421. printf("%s is written\n ", view);
  1422. }
  1423. } else {
  1424. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1425. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  1426. value = pcilib_get_value_as_register_value(handle, &val, &err);
  1427. if (err) Error("Error (%i) parsing data value (%s)", *data);
  1428. err = pcilib_write_register(handle, bank, reg, value);
  1429. if (err) Error("Error writting register %s\n", reg);
  1430. if ((model_info->registers[regid].mode&(PCILIB_REGISTER_RW|PCILIB_REGISTER_INCONSISTENT)) == PCILIB_REGISTER_RW) {
  1431. const char *format = (val.format?val.format:"%u");
  1432. err = pcilib_read_register(handle, bank, reg, &verify);
  1433. if (err) Error("Error reading back register %s for verification\n", reg);
  1434. if (verify != value) {
  1435. Error("Failed to write register %s: %lu is written and %lu is read back", reg, value, verify);
  1436. } else {
  1437. printf("%s = ", reg);
  1438. printf(format, verify);
  1439. printf("\n");
  1440. }
  1441. } else {
  1442. printf("%s is written\n ", reg);
  1443. }
  1444. }
  1445. return 0;
  1446. }
  1447. typedef struct {
  1448. pcilib_t *handle;
  1449. pcilib_event_t event;
  1450. pcilib_event_data_type_t data;
  1451. fastwriter_t *writer;
  1452. int verbose;
  1453. pcilib_timeout_t timeout;
  1454. size_t run_time;
  1455. size_t trigger_time;
  1456. size_t max_triggers;
  1457. pcilib_event_flags_t flags;
  1458. FORMAT format;
  1459. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1460. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1461. volatile int started; /**< Indicates that recording is started */
  1462. volatile int run_flag;
  1463. volatile int writing_flag;
  1464. struct timeval first_frame;
  1465. struct timeval last_frame;
  1466. size_t last_num, last_id;
  1467. size_t trigger_failed;
  1468. size_t trigger_count;
  1469. size_t event_count; /**< Total number of events (including bad ones, but excluding events expected, but not reported by hardware) */
  1470. size_t incomplete_count; /**< Broken events, we even can't extract appropriate block of raw data */
  1471. size_t broken_count; /**< Broken events, error while decoding in the requested format */
  1472. size_t empty_count; /**< Broken events, no associated data or unknown */
  1473. size_t missing_count; /**< Missing events, not received from the hardware */
  1474. size_t dropped_count; /**< Missing events, dropped due slow decoding/copying performance */
  1475. size_t storage_count; /**< Missing events, dropped due to slowness of the storage subsystem */
  1476. struct timeval start_time;
  1477. struct timeval stop_time;
  1478. } GRABContext;
  1479. int GrabCallback(pcilib_event_id_t event_id, const pcilib_event_info_t *info, void *user) {
  1480. int err = 0;
  1481. void *data;
  1482. size_t size;
  1483. GRABContext *ctx = (GRABContext*)user;
  1484. pcilib_t *handle = ctx->handle;
  1485. gettimeofday(&ctx->last_frame, NULL);
  1486. if (!ctx->event_count) {
  1487. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1488. }
  1489. ctx->event_pending = 0;
  1490. ctx->event_count++;
  1491. if (ctx->last_num) {
  1492. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1493. ctx->missing_count += missing_count;
  1494. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1495. if (missing_count)
  1496. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu (hwid: %zu) and %zu (hwid: %zu)", missing_count, ctx->last_id, ctx->last_num, event_id, info->seqnum);
  1497. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1498. }
  1499. ctx->last_num = info->seqnum;
  1500. ctx->last_id = event_id;
  1501. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1502. ctx->incomplete_count++;
  1503. return PCILIB_STREAMING_CONTINUE;
  1504. }
  1505. switch (ctx->format) {
  1506. case FORMAT_DEFAULT:
  1507. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_DATA, &size);
  1508. break;
  1509. default:
  1510. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_RAW_DATA, &size);
  1511. }
  1512. if (!data) {
  1513. int err = (int)size;
  1514. switch (err) {
  1515. case PCILIB_ERROR_OVERWRITTEN:
  1516. ctx->dropped_count++;
  1517. break;
  1518. case PCILIB_ERROR_INVALID_DATA:
  1519. ctx->broken_count++;
  1520. break;
  1521. default:
  1522. ctx->empty_count++;
  1523. }
  1524. return PCILIB_STREAMING_CONTINUE;
  1525. }
  1526. if (ctx->format == FORMAT_HEADER) {
  1527. uint64_t header[8];
  1528. header[0] = info->type;
  1529. header[1] = ctx->data;
  1530. header[2] = 0;
  1531. header[3] = size;
  1532. header[4] = info->seqnum;
  1533. header[5] = info->offset;
  1534. memcpy(header + 6, &info->timestamp, 16);
  1535. err = fastwriter_push(ctx->writer, 64, header);
  1536. }
  1537. if (!err)
  1538. err = fastwriter_push(ctx->writer, size, data);
  1539. if (err) {
  1540. fastwriter_cancel(ctx->writer);
  1541. if (err != EWOULDBLOCK)
  1542. Error("Storage error %i", err);
  1543. ctx->storage_count++;
  1544. pcilib_return_data(handle, event_id, ctx->data, data);
  1545. return PCILIB_STREAMING_CONTINUE;
  1546. }
  1547. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1548. if (err) {
  1549. ctx->dropped_count++;
  1550. fastwriter_cancel(ctx->writer);
  1551. return PCILIB_STREAMING_CONTINUE;
  1552. }
  1553. err = fastwriter_commit(ctx->writer);
  1554. if (err) Error("Error commiting data to storage, Error: %i", err);
  1555. return PCILIB_STREAMING_CONTINUE;
  1556. }
  1557. int raw_data(pcilib_event_id_t event_id, const pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1558. int err;
  1559. GRABContext *ctx = (GRABContext*)user;
  1560. // pcilib_t *handle = ctx->handle;
  1561. if ((info)&&(info->seqnum != ctx->last_num)) {
  1562. gettimeofday(&ctx->last_frame, NULL);
  1563. if (!ctx->event_count) {
  1564. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1565. }
  1566. ctx->event_count++;
  1567. if (ctx->last_num) {
  1568. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1569. ctx->missing_count += missing_count;
  1570. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1571. if (missing_count)
  1572. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu and %zu", missing_count, ctx->last_num, info->seqnum);
  1573. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1574. }
  1575. ctx->last_num = info->seqnum;
  1576. }
  1577. err = fastwriter_push_data(ctx->writer, size, data);
  1578. if (err) {
  1579. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1580. Error("Storage error %i", err);
  1581. }
  1582. return PCILIB_STREAMING_CONTINUE;
  1583. }
  1584. void *Trigger(void *user) {
  1585. int err;
  1586. struct timeval start;
  1587. GRABContext *ctx = (GRABContext*)user;
  1588. size_t trigger_time = ctx->trigger_time;
  1589. size_t max_triggers = ctx->max_triggers;
  1590. ctx->trigger_thread_started = 1;
  1591. ctx->event_pending = 1;
  1592. while (!ctx->started) ;
  1593. gettimeofday(&start, NULL);
  1594. do {
  1595. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1596. if (err) ctx->trigger_failed++;
  1597. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1598. if (trigger_time) {
  1599. pcilib_add_timeout(&start, trigger_time);
  1600. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1601. pcilib_sleep_until_deadline(&start);
  1602. } else {
  1603. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1604. ctx->event_pending = 1;
  1605. }
  1606. } while (ctx->run_flag);
  1607. ctx->trigger_thread_started = 0;
  1608. return NULL;
  1609. }
  1610. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1611. int verbose;
  1612. pcilib_timeout_t duration, fps_duration;
  1613. struct timeval cur;
  1614. double fps = 0, good_fps = 0;
  1615. size_t total, good, pending = 0;
  1616. verbose = ctx->verbose;
  1617. if (end_time) {
  1618. if (verbose++) {
  1619. printf("-------------------------------------------------------------------------------\n");
  1620. }
  1621. } else {
  1622. gettimeofday(&cur, NULL);
  1623. end_time = &cur;
  1624. }
  1625. // if ((ctx->event_count + ctx->missing_count) == 0)
  1626. // return;
  1627. duration = pcilib_timediff(&ctx->start_time, end_time);
  1628. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1629. if (ctx->trigger_count) {
  1630. total = ctx->trigger_count;
  1631. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1632. } else {
  1633. total = ctx->event_count + ctx->missing_count;
  1634. }
  1635. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count - ctx->empty_count - ctx->dropped_count;
  1636. if (ctx->event_count > 1) {
  1637. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1638. }
  1639. if (good > 1) {
  1640. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1641. }
  1642. printf("Run: ");
  1643. PrintTime(duration);
  1644. if (ctx->trigger_count) {
  1645. printf(", Triggers: ");
  1646. PrintNumber(ctx->trigger_count);
  1647. }
  1648. printf(", Captured: ");
  1649. PrintNumber(ctx->event_count);
  1650. printf(" FPS %5.0lf", fps);
  1651. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1652. printf(", Stored: ");
  1653. PrintNumber(good);
  1654. printf(" FPS %5.0lf", good_fps);
  1655. }
  1656. printf("\n");
  1657. if (verbose > 2) {
  1658. if (ctx->trigger_count) {
  1659. printf("Trig: ");
  1660. PrintNumber(ctx->trigger_count);
  1661. printf(" Issued: ");
  1662. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1663. printf(" (");
  1664. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1665. printf("%%) Failed: ");
  1666. PrintNumber(ctx->trigger_failed);
  1667. printf( " (");
  1668. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1669. printf( "%%); Pending: ");
  1670. PrintNumber(pending);
  1671. printf( " (");
  1672. PrintPercent(pending, ctx->trigger_count);
  1673. printf( "%%)\n");
  1674. }
  1675. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1676. printf("Captured: ");
  1677. PrintNumber(good);
  1678. } else {
  1679. printf("Good: ");
  1680. PrintNumber(good);
  1681. printf(", Dropped: ");
  1682. PrintNumber(ctx->dropped_count + ctx->storage_count);
  1683. printf(", Bad: ");
  1684. PrintNumber(ctx->incomplete_count + ctx->broken_count);
  1685. printf(", Empty: ");
  1686. PrintNumber(ctx->empty_count);
  1687. }
  1688. printf(", Lost: ");
  1689. PrintNumber(ctx->missing_count);
  1690. printf("\n");
  1691. }
  1692. if (verbose > 1) {
  1693. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1694. printf("Captured: ");
  1695. PrintPercent(good, total);
  1696. } else {
  1697. printf("Good: ");
  1698. PrintPercent(good, total);
  1699. printf("%% Dropped: ");
  1700. PrintPercent(ctx->dropped_count + ctx->storage_count, total);
  1701. printf("%% Bad: ");
  1702. PrintPercent(ctx->incomplete_count + ctx->broken_count, total);
  1703. printf("%% Empty: ");
  1704. PrintPercent(ctx->empty_count, total);
  1705. }
  1706. printf("%% Lost: ");
  1707. PrintPercent(ctx->missing_count, total);
  1708. printf("%%");
  1709. printf("\n");
  1710. }
  1711. }
  1712. void StorageStats(GRABContext *ctx) {
  1713. int err;
  1714. fastwriter_stats_t st;
  1715. pcilib_timeout_t duration;
  1716. struct timeval cur;
  1717. gettimeofday(&cur, NULL);
  1718. duration = pcilib_timediff(&ctx->start_time, &cur);
  1719. err = fastwriter_get_stats(ctx->writer, &st);
  1720. if (err) return;
  1721. printf("Wrote ");
  1722. PrintSize(st.written);
  1723. printf(" of ");
  1724. PrintSize(st.commited);
  1725. printf(" at ");
  1726. PrintSize(1000000.*st.written / duration);
  1727. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1728. printf(" of ");
  1729. PrintSize(st.buffer_size);
  1730. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1731. }
  1732. void *Monitor(void *user) {
  1733. struct timeval deadline;
  1734. struct timeval nextinfo;
  1735. GRABContext *ctx = (GRABContext*)user;
  1736. int verbose = ctx->verbose;
  1737. pcilib_timeout_t timeout = ctx->timeout;
  1738. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1739. // while (!ctx->started);
  1740. if (timeout) {
  1741. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1742. pcilib_add_timeout(&deadline, timeout);
  1743. }
  1744. if (verbose > 0) {
  1745. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1746. }
  1747. while (ctx->run_flag) {
  1748. if (StopFlag) {
  1749. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1750. break;
  1751. }
  1752. if (timeout) {
  1753. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1754. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1755. pcilib_add_timeout(&deadline, timeout);
  1756. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1757. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1758. break;
  1759. }
  1760. }
  1761. }
  1762. if (verbose > 0) {
  1763. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1764. GrabStats(ctx, NULL);
  1765. StorageStats(ctx);
  1766. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1767. }
  1768. }
  1769. usleep(100000);
  1770. }
  1771. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1772. while (ctx->writing_flag) {
  1773. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1774. if (verbose >= 0) StorageStats(ctx);
  1775. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1776. }
  1777. usleep(100000);
  1778. }
  1779. return NULL;
  1780. }
  1781. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1782. int err;
  1783. GRABContext ctx;
  1784. // void *data = NULL;
  1785. // size_t size, written;
  1786. pcilib_event_t event;
  1787. pcilib_event_t listen_events;
  1788. pcilib_event_data_type_t data;
  1789. pthread_t monitor_thread;
  1790. pthread_t trigger_thread;
  1791. pthread_attr_t attr;
  1792. struct sched_param sched;
  1793. struct timeval end_time;
  1794. pcilib_event_flags_t flags;
  1795. if (evname) {
  1796. event = pcilib_find_event(handle, evname);
  1797. if (event == PCILIB_EVENT_INVALID)
  1798. Error("Can't find event (%s)", evname);
  1799. listen_events = event;
  1800. } else {
  1801. listen_events = PCILIB_EVENTS_ALL;
  1802. event = PCILIB_EVENT0;
  1803. }
  1804. if (data_type) {
  1805. data = pcilib_find_event_data_type(handle, event, data_type);
  1806. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1807. Error("Can't find data type (%s)", data_type);
  1808. } else {
  1809. data = PCILIB_EVENT_DATA;
  1810. }
  1811. memset(&ctx, 0, sizeof(GRABContext));
  1812. ctx.handle = handle;
  1813. ctx.event = event;
  1814. ctx.data = data;
  1815. ctx.run_time = run_time;
  1816. ctx.timeout = timeout;
  1817. ctx.format = format;
  1818. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1819. else ctx.verbose = 0;
  1820. if (grab_mode&GRAB_MODE_GRAB) {
  1821. ctx.writer = fastwriter_init(output, 0);
  1822. if (!ctx.writer)
  1823. Error("Can't initialize fastwritter library");
  1824. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1825. err = fastwriter_open(ctx.writer, output, 0);
  1826. if (err)
  1827. Error("Error opening file (%s), Error: %i\n", output, err);
  1828. ctx.writing_flag = 1;
  1829. }
  1830. ctx.run_flag = 1;
  1831. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1832. if (data == PCILIB_EVENT_RAW_DATA) {
  1833. if (format == FORMAT_RAW) {
  1834. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1835. }
  1836. } else {
  1837. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1838. }
  1839. ctx.flags = flags;
  1840. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1841. pcilib_configure_autostop(handle, num, run_time);
  1842. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1843. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1844. }
  1845. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1846. pcilib_write_register(handle, "conf", "max_threads", threads);
  1847. }
  1848. if (grab_mode&GRAB_MODE_TRIGGER) {
  1849. if (trigger_time) {
  1850. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1851. timeout = 2 * trigger_time;
  1852. ctx.timeout = timeout;
  1853. }
  1854. } else {
  1855. // Otherwise, we will trigger next event after previous one is read
  1856. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1857. }
  1858. ctx.max_triggers = num;
  1859. ctx.trigger_count = 0;
  1860. ctx.trigger_time = trigger_time;
  1861. // We don't really care if RT priority is imposible
  1862. pthread_attr_init(&attr);
  1863. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1864. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1865. pthread_attr_setschedparam(&attr, &sched);
  1866. }
  1867. // Start triggering thread and wait until it is schedulled
  1868. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1869. Error("Error spawning trigger thread");
  1870. while (!ctx.trigger_thread_started) usleep(10);
  1871. }
  1872. gettimeofday(&ctx.start_time, NULL);
  1873. if (grab_mode&GRAB_MODE_GRAB) {
  1874. err = pcilib_start(handle, listen_events, flags);
  1875. if (err) Error("Failed to start event engine, error %i", err);
  1876. }
  1877. ctx.started = 1;
  1878. if (run_time) {
  1879. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1880. if (ctx.stop_time.tv_usec > 999999) {
  1881. ctx.stop_time.tv_usec -= 1000000;
  1882. __sync_synchronize();
  1883. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1884. } else {
  1885. __sync_synchronize();
  1886. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1887. }
  1888. }
  1889. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1890. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1891. Error("Error spawning monitoring thread");
  1892. if (grab_mode&GRAB_MODE_GRAB) {
  1893. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1894. if (err) Error("Error streaming events, error %i", err);
  1895. }
  1896. ctx.run_flag = 0;
  1897. if (grab_mode&GRAB_MODE_TRIGGER) {
  1898. while (ctx.trigger_thread_started) usleep(10);
  1899. }
  1900. if (grab_mode&GRAB_MODE_GRAB) {
  1901. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1902. }
  1903. gettimeofday(&end_time, NULL);
  1904. if (grab_mode&GRAB_MODE_TRIGGER) {
  1905. pthread_join(trigger_thread, NULL);
  1906. }
  1907. if (grab_mode&GRAB_MODE_GRAB) {
  1908. if (verbose >= 0)
  1909. printf("Grabbing is finished, flushing results....\n");
  1910. err = fastwriter_close(ctx.writer);
  1911. if (err) Error("Storage problems, error %i", err);
  1912. }
  1913. ctx.writing_flag = 0;
  1914. pthread_join(monitor_thread, NULL);
  1915. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1916. GrabStats(&ctx, &end_time);
  1917. StorageStats(&ctx);
  1918. }
  1919. fastwriter_destroy(ctx.writer);
  1920. return 0;
  1921. }
  1922. int StartStopDMA(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1923. int err;
  1924. pcilib_dma_engine_t dmaid;
  1925. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1926. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  1927. if (start) Error("DMA engine should be specified");
  1928. for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
  1929. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1930. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1931. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1932. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1933. }
  1934. return 0;
  1935. }
  1936. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1937. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1938. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1939. if (start) {
  1940. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1941. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1942. } else {
  1943. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1944. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1945. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1946. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1947. }
  1948. }
  1949. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1950. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1951. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1952. if (start) {
  1953. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1954. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1955. } else {
  1956. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1957. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1958. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1959. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1960. }
  1961. }
  1962. return 0;
  1963. }
  1964. typedef struct {
  1965. pcilib_kmem_use_t use;
  1966. int referenced;
  1967. int hw_lock;
  1968. int reusable;
  1969. int persistent;
  1970. int open;
  1971. size_t count;
  1972. size_t size;
  1973. } kmem_use_info_t;
  1974. #define MAX_USES 64
  1975. pcilib_kmem_use_t ParseUse(const char *use) {
  1976. unsigned long utmp;
  1977. if (use) {
  1978. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1979. if (strlen(use) < 5)
  1980. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1981. else
  1982. return utmp;
  1983. }
  1984. Error("Kernel memory use is not specified");
  1985. return 0;
  1986. }
  1987. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1988. size_t i, n = *n_uses;
  1989. if (uses[n - 1].use == use) return n - 1;
  1990. for (i = 1; i < (n - 1); i++) {
  1991. if (uses[i].use == use) return i;
  1992. }
  1993. if (n == MAX_USES) return 0;
  1994. memset(&uses[n], 0, sizeof(kmem_use_info_t));
  1995. uses[n].use = use;
  1996. return (*n_uses)++;
  1997. }
  1998. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1999. size_t i;
  2000. for (i = 0; i < n_uses; i++) {
  2001. if (uses[i].use == use) {
  2002. if (uses[i].count) return uses + i;
  2003. else return NULL;
  2004. }
  2005. }
  2006. return NULL;
  2007. }
  2008. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  2009. DIR *dir;
  2010. struct dirent *entry;
  2011. const char *pos;
  2012. char sysdir[256];
  2013. char fname[256];
  2014. char info[256];
  2015. size_t useid, n_uses = 1; // Use 0 is for others
  2016. memset(uses, 0, sizeof(kmem_use_info_t));
  2017. pos = strrchr(device, '/');
  2018. if (pos) ++pos;
  2019. else pos = device;
  2020. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  2021. dir = opendir(sysdir);
  2022. if (!dir) Error("Can't open directory (%s)", sysdir);
  2023. while ((entry = readdir(dir)) != NULL) {
  2024. FILE *f;
  2025. unsigned long use = 0;
  2026. unsigned long size = 0;
  2027. unsigned long refs = 0;
  2028. unsigned long mode = 0;
  2029. unsigned long hwref = 0;
  2030. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  2031. if (!isnumber(entry->d_name+4)) continue;
  2032. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  2033. f = fopen(fname, "r");
  2034. if (!f) Error("Can't access file (%s)", fname);
  2035. while(!feof(f)) {
  2036. if (!fgets(info, 256, f))
  2037. break;
  2038. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  2039. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  2040. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  2041. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2042. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2043. }
  2044. fclose(f);
  2045. useid = FindUse(&n_uses, uses, use);
  2046. uses[useid].count++;
  2047. uses[useid].size += size;
  2048. if (refs) uses[useid].referenced = 1;
  2049. if (hwref) uses[useid].hw_lock = 1;
  2050. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  2051. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  2052. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  2053. }
  2054. closedir(dir);
  2055. *uses_number = n_uses;
  2056. return 0;
  2057. }
  2058. int ListKMEM(pcilib_t *handle, const char *device) {
  2059. int err;
  2060. char stmp[256];
  2061. size_t i, useid, n_uses;
  2062. kmem_use_info_t uses[MAX_USES];
  2063. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  2064. err = ParseKMEM(handle, device, &n_uses, uses);
  2065. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  2066. if ((n_uses == 1)&&(uses[0].count == 0)) {
  2067. printf("No kernel memory is allocated\n");
  2068. return 0;
  2069. }
  2070. printf("Use Type Count Total Size REF Mode \n");
  2071. printf("--------------------------------------------------------------------------------\n");
  2072. for (useid = 0; useid < n_uses; useid++) {
  2073. if (useid + 1 == n_uses) {
  2074. if (!uses[0].count) continue;
  2075. i = 0;
  2076. } else i = useid + 1;
  2077. printf("%08x ", uses[i].use);
  2078. if (i) {
  2079. switch(PCILIB_KMEM_USE_TYPE(uses[i].use)) {
  2080. case PCILIB_KMEM_USE_DMA_RING:
  2081. printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  2082. break;
  2083. case PCILIB_KMEM_USE_DMA_PAGES:
  2084. printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  2085. break;
  2086. case PCILIB_KMEM_USE_SOFTWARE_REGISTERS: {
  2087. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  2088. if (bank == PCILIB_REGISTER_BANK_INVALID)
  2089. printf("SoftRegs (%8u)", PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  2090. else
  2091. printf("SoftRegs (%8s)", model_info->banks[bank].name);
  2092. break;
  2093. }
  2094. case PCILIB_KMEM_USE_LOCKS:
  2095. printf("Locks ");
  2096. break;
  2097. case PCILIB_KMEM_USE_USER:
  2098. printf("User %04x ", uses[i].use&0xFFFF);
  2099. break;
  2100. default:
  2101. printf (" ");
  2102. }
  2103. } else printf("All Others ");
  2104. printf(" ");
  2105. printf("%6zu", uses[i].count);
  2106. printf(" ");
  2107. printf("%10s", GetPrintSize(stmp, uses[i].size));
  2108. printf(" ");
  2109. if ((uses[i].referenced)&&(uses[i].hw_lock)) printf("HW+SW");
  2110. else if (uses[i].referenced) printf(" SW");
  2111. else if (uses[i].hw_lock) printf("HW ");
  2112. else printf(" - ");
  2113. printf(" ");
  2114. if (uses[i].persistent) printf("Persistent");
  2115. else if (uses[i].open) printf("Open ");
  2116. else if (uses[i].reusable) printf("Reusable ");
  2117. else printf("Closed ");
  2118. printf("\n");
  2119. }
  2120. printf("--------------------------------------------------------------------------------\n");
  2121. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  2122. return 0;
  2123. }
  2124. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  2125. int err;
  2126. size_t i, n;
  2127. pcilib_kmem_handle_t *kbuf;
  2128. pcilib_kmem_use_t useid = ParseUse(use);
  2129. size_t n_uses;
  2130. kmem_use_info_t uses[MAX_USES];
  2131. kmem_use_info_t *use_info;
  2132. if (block == (size_t)-1) {
  2133. err = ParseKMEM(handle, device, &n_uses, uses);
  2134. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  2135. use_info = GetUse(n_uses, uses, useid);
  2136. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  2137. i = 0;
  2138. n = use_info->count;
  2139. } else {
  2140. i = block;
  2141. n = block + 1;
  2142. }
  2143. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  2144. if (!kbuf) {
  2145. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  2146. return 0;
  2147. }
  2148. printf("Buffer Address Hardware Address Bus Address\n");
  2149. printf("--------------------------------------------------------------------------------\n");
  2150. for (; i < n; i++) {
  2151. void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  2152. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  2153. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  2154. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  2155. }
  2156. printf("\n");
  2157. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2158. return 0;
  2159. }
  2160. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  2161. int err;
  2162. void *data;
  2163. size_t size;
  2164. pcilib_kmem_handle_t *kbuf;
  2165. if (block == (size_t)-1) block = 0;
  2166. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  2167. if (!kbuf) {
  2168. Error("The specified kernel buffer is not allocated\n");
  2169. return 0;
  2170. }
  2171. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  2172. if (err) {
  2173. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2174. Error("The synchronization of kernel buffer has failed\n");
  2175. return 0;
  2176. }
  2177. data = pcilib_kmem_get_block_ua(handle, kbuf, block);
  2178. if (data) {
  2179. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  2180. if ((max_size)&&(size > max_size)) size = max_size;
  2181. fwrite(data, 1, size, o?o:stdout);
  2182. } else {
  2183. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2184. Error("The specified block is not existing\n");
  2185. return 0;
  2186. }
  2187. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2188. return 0;
  2189. }
  2190. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  2191. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  2192. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  2193. pcilib_kmem_handle_t *kbuf;
  2194. pcilib_kmem_use_t useid = ParseUse(use);
  2195. long page_size = sysconf(_SC_PAGESIZE);
  2196. if (type) {
  2197. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  2198. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  2199. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  2200. else Error("Invalid memory type (%s) is specified", type);
  2201. }
  2202. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  2203. Error("Selected memory type does not allow custom size");
  2204. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  2205. if (!kbuf) Error("Allocation of kernel memory has failed");
  2206. pcilib_free_kernel_memory(handle, kbuf, flags);
  2207. return 0;
  2208. }
  2209. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  2210. int err;
  2211. int i;
  2212. pcilib_kmem_use_t useid;
  2213. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  2214. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  2215. if (!strcasecmp(use, "dma")) {
  2216. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  2217. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  2218. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  2219. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  2220. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  2221. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  2222. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  2223. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  2224. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  2225. }
  2226. return 0;
  2227. }
  2228. useid = ParseUse(use);
  2229. err = pcilib_clean_kernel_memory(handle, useid, flags);
  2230. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  2231. return 0;
  2232. }
  2233. int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
  2234. int err;
  2235. DIR *dir;
  2236. struct dirent *entry;
  2237. const char *pos;
  2238. char sysdir[256];
  2239. char fname[256];
  2240. char info[256];
  2241. char stmp[256];
  2242. pcilib_dma_engine_t dmaid;
  2243. pcilib_dma_engine_status_t status;
  2244. pos = strrchr(device, '/');
  2245. if (pos) ++pos;
  2246. else pos = device;
  2247. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  2248. dir = opendir(sysdir);
  2249. if (!dir) Error("Can't open directory (%s)", sysdir);
  2250. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  2251. printf("--------------------------------------------------------------------------------\n");
  2252. while ((entry = readdir(dir)) != NULL) {
  2253. FILE *f;
  2254. unsigned long use = 0;
  2255. // unsigned long size = 0;
  2256. // unsigned long refs = 0;
  2257. unsigned long mode = 0;
  2258. // unsigned long hwref = 0;
  2259. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  2260. if (!isnumber(entry->d_name+4)) continue;
  2261. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  2262. f = fopen(fname, "r");
  2263. if (!f) Error("Can't access file (%s)", fname);
  2264. while(!feof(f)) {
  2265. if (!fgets(info, 256, f))
  2266. break;
  2267. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  2268. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  2269. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  2270. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2271. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2272. }
  2273. fclose(f);
  2274. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  2275. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  2276. if (use&0x80) {
  2277. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  2278. } else {
  2279. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  2280. }
  2281. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  2282. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  2283. err = pcilib_start_dma(handle, dmaid, 0);
  2284. if (err) {
  2285. printf("-- Wrong state, start is failed\n");
  2286. continue;
  2287. }
  2288. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2289. if (err) {
  2290. printf("-- Wrong state, failed to obtain status\n");
  2291. pcilib_stop_dma(handle, dmaid, 0);
  2292. continue;
  2293. }
  2294. pcilib_stop_dma(handle, dmaid, 0);
  2295. if (status.started) printf("S");
  2296. else printf(" ");
  2297. if (status.ring_head == status.ring_tail) printf(" ");
  2298. else printf("D");
  2299. printf(" ");
  2300. printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  2301. printf(" ");
  2302. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  2303. printf("\n");
  2304. }
  2305. closedir(dir);
  2306. printf("--------------------------------------------------------------------------------\n");
  2307. printf("S - Started, D - Data in buffers\n");
  2308. return 0;
  2309. }
  2310. int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  2311. int err;
  2312. size_t i;
  2313. pcilib_dma_engine_t dmaid;
  2314. pcilib_dma_engine_status_t status;
  2315. pcilib_dma_buffer_status_t *buffer;
  2316. char stmp[256];
  2317. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2318. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2319. err = pcilib_start_dma(handle, dmaid, 0);
  2320. if (err) Error("Error starting the specified DMA engine");
  2321. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2322. if (err) Error("Failed to obtain status of the specified DMA engine");
  2323. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2324. if (!buffer) Error("Failed to allocate memory for status buffer");
  2325. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2326. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2327. printf("Buffer Status Total Size \n");
  2328. printf("--------------------------------------------------------------------------------\n");
  2329. for (i = 0; i < status.ring_size; i++) {
  2330. printf("%8zu ", i);
  2331. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  2332. printf("%10s", GetPrintSize(stmp, buffer[i].size));
  2333. printf("\n");
  2334. }
  2335. printf("--------------------------------------------------------------------------------\n");
  2336. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  2337. free(buffer);
  2338. pcilib_stop_dma(handle, dmaid, 0);
  2339. return 0;
  2340. }
  2341. int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  2342. int err;
  2343. pcilib_dma_engine_t dmaid;
  2344. pcilib_dma_engine_status_t status;
  2345. pcilib_dma_buffer_status_t *buffer;
  2346. size_t size;
  2347. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2348. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2349. err = pcilib_start_dma(handle, dmaid, 0);
  2350. if (err) Error("Error starting the specified DMA engine");
  2351. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2352. if (err) Error("Failed to obtain status of the specified DMA engine");
  2353. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2354. if (!buffer) Error("Failed to allocate memory for status buffer");
  2355. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2356. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2357. if (block == (size_t)-1) {
  2358. // get current
  2359. }
  2360. size = buffer[block].size;
  2361. free(buffer);
  2362. pcilib_stop_dma(handle, dmaid, 0);
  2363. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  2364. }
  2365. int ListLocks(pcilib_t *ctx, int verbose) {
  2366. int err;
  2367. pcilib_lock_id_t i;
  2368. if (verbose)
  2369. printf("ID Refs Flags Locked Name\n");
  2370. else
  2371. printf("ID Refs Flags Name\n");
  2372. printf("--------------------------------------------------------------------------------\n");
  2373. for (i = 0; i < PCILIB_MAX_LOCKS; i++) {
  2374. pcilib_lock_t *lock = pcilib_get_lock_by_id(ctx, i);
  2375. const char *name = pcilib_lock_get_name(lock);
  2376. if (!name) break;
  2377. pcilib_lock_flags_t flags = pcilib_lock_get_flags(lock);
  2378. size_t refs = pcilib_lock_get_refs(lock);
  2379. printf("%4u %4zu ", i, refs);
  2380. if (flags&PCILIB_LOCK_FLAG_PERSISTENT) printf("P");
  2381. else printf(" ");
  2382. printf(" ");
  2383. if (verbose) {
  2384. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, PCILIB_TIMEOUT_IMMEDIATE);
  2385. switch (err) {
  2386. case 0:
  2387. pcilib_unlock(lock);
  2388. printf("No ");
  2389. break;
  2390. case PCILIB_ERROR_TIMEOUT:
  2391. printf("Yes ");
  2392. break;
  2393. default:
  2394. printf("Err: %3i ", err);
  2395. }
  2396. }
  2397. printf("%s\n", name);
  2398. }
  2399. printf("--------------------------------------------------------------------------------\n");
  2400. printf("P - Persistent\n");
  2401. return 0;
  2402. }
  2403. int FreeLocks(pcilib_t *handle, int force) {
  2404. return pcilib_destroy_all_locks(handle, force);
  2405. }
  2406. int LockUnlock(pcilib_t *handle, const char *name, int do_lock, pcilib_timeout_t timeout) {
  2407. int err = 0;
  2408. pcilib_lock_t *lock = pcilib_get_lock(handle, PCILIB_LOCK_FLAG_PERSISTENT, name);
  2409. if (!lock) Error("Error getting persistent lock %s", name);
  2410. if (do_lock)
  2411. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, timeout);
  2412. else
  2413. pcilib_unlock(lock);
  2414. if (err) {
  2415. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2416. switch (err) {
  2417. case PCILIB_ERROR_TIMEOUT:
  2418. printf("Timeout locking %s\n", name);
  2419. break;
  2420. default:
  2421. Error("Error (%i) locking %s", err, name);
  2422. }
  2423. } else if (do_lock) {
  2424. pcilib_lock_ref(lock);
  2425. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2426. printf("%s is locked\n", name);
  2427. } else {
  2428. pcilib_lock_unref(lock);
  2429. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2430. }
  2431. return err;
  2432. }
  2433. int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2434. int err;
  2435. err = pcilib_enable_irq(handle, irq_type, 0);
  2436. if (err) {
  2437. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2438. Error("Error enabling IRQs");
  2439. }
  2440. return err;
  2441. }
  2442. int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2443. int err;
  2444. err = pcilib_disable_irq(handle, 0);
  2445. if (err) {
  2446. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2447. Error("Error disabling IRQs");
  2448. }
  2449. return err;
  2450. }
  2451. int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  2452. pcilib_clear_irq(handle, irq_source);
  2453. return 0;
  2454. }
  2455. int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  2456. int err;
  2457. size_t count;
  2458. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  2459. if (err) {
  2460. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  2461. else Error("Error waiting for IRQ");
  2462. }
  2463. return 0;
  2464. }
  2465. int main(int argc, char **argv) {
  2466. int err = 0;
  2467. int i;
  2468. long itmp;
  2469. size_t ztmp;
  2470. unsigned char c;
  2471. const char *stmp;
  2472. const char *num_offset;
  2473. int details = 0;
  2474. int verbose = 0;
  2475. int quiete = 0;
  2476. int force = 0;
  2477. int verify = 0;
  2478. pcilib_log_priority_t log_priority;
  2479. const char *model = NULL;
  2480. const pcilib_model_description_t *model_info;
  2481. const pcilib_dma_description_t *dma_info;
  2482. MODE mode = MODE_INVALID;
  2483. GRAB_MODE grab_mode = 0;
  2484. size_t trigger_time = 0;
  2485. size_t run_time = 0;
  2486. size_t buffer = 0;
  2487. size_t threads = 1;
  2488. FORMAT format = FORMAT_DEFAULT;
  2489. PARTITION partition = PARTITION_UNKNOWN;
  2490. FLAGS flags = 0;
  2491. const char *atype = NULL;
  2492. const char *type = NULL;
  2493. ACCESS_MODE amode = ACCESS_BAR;
  2494. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  2495. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  2496. const char *addr = NULL;
  2497. const char *reg = NULL;
  2498. const char *view = NULL;
  2499. const char *unit = NULL;
  2500. const char *attr = NULL;
  2501. const char *bank = NULL;
  2502. char **data = NULL;
  2503. const char *event = NULL;
  2504. const char *data_type = NULL;
  2505. const char *dma_channel = NULL;
  2506. const char *use = NULL;
  2507. const char *lock = NULL;
  2508. const char *info_target = NULL;
  2509. const char *list_target = NULL;
  2510. size_t block = (size_t)-1;
  2511. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  2512. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  2513. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  2514. pcilib_kmem_use_t useid = 0;
  2515. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  2516. long addr_shift = 0;
  2517. uintptr_t start = -1;
  2518. size_t block_size = 0;
  2519. size_t size = 1;
  2520. access_t access = 4;
  2521. // int skip = 0;
  2522. int endianess = 0;
  2523. size_t timeout = 0;
  2524. size_t alignment = 0;
  2525. const char *output = NULL;
  2526. FILE *ofile = NULL;
  2527. size_t iterations = BENCHMARK_ITERATIONS;
  2528. unsigned long dma_mask = 0;
  2529. unsigned long pcie_mps = 0;
  2530. pcilib_t *handle;
  2531. int size_set = 0;
  2532. int timeout_set = 0;
  2533. // int run_time_set = 0;
  2534. struct sched_param sched_param = {0};
  2535. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  2536. extern int optind;
  2537. switch (c) {
  2538. case OPT_HELP:
  2539. Usage(argc, argv, NULL);
  2540. break;
  2541. case OPT_VERSION:
  2542. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2543. mode = MODE_VERSION;
  2544. break;
  2545. case OPT_INFO:
  2546. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2547. if (optarg) info_target = optarg;
  2548. else if ((optind < argc)&&(argv[optind][0] != '-')) info_target = argv[optind++];
  2549. mode = MODE_INFO;
  2550. break;
  2551. case OPT_LIST:
  2552. if (mode == MODE_LIST) details++;
  2553. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2554. if (optarg) list_target = optarg;
  2555. else if ((optind < argc)&&(argv[optind][0] != '-')) list_target = argv[optind++];
  2556. mode = MODE_LIST;
  2557. break;
  2558. case OPT_RESET:
  2559. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2560. mode = MODE_RESET;
  2561. break;
  2562. case OPT_BENCHMARK:
  2563. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2564. mode = MODE_BENCHMARK;
  2565. if (optarg) addr = optarg;
  2566. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2567. break;
  2568. case OPT_READ:
  2569. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2570. mode = MODE_READ;
  2571. if (optarg) addr = optarg;
  2572. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2573. break;
  2574. case OPT_WRITE:
  2575. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2576. mode = MODE_WRITE;
  2577. if (optarg) addr = optarg;
  2578. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2579. break;
  2580. case OPT_GRAB:
  2581. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  2582. mode = MODE_GRAB;
  2583. grab_mode |= GRAB_MODE_GRAB;
  2584. stmp = NULL;
  2585. if (optarg) stmp = optarg;
  2586. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2587. if (stmp) {
  2588. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2589. event = stmp;
  2590. }
  2591. break;
  2592. case OPT_TRIGGER:
  2593. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  2594. mode = MODE_GRAB;
  2595. grab_mode |= GRAB_MODE_TRIGGER;
  2596. stmp = NULL;
  2597. if (optarg) stmp = optarg;
  2598. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2599. if (stmp) {
  2600. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2601. event = stmp;
  2602. }
  2603. break;
  2604. case OPT_LIST_DMA:
  2605. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2606. mode = MODE_LIST_DMA;
  2607. break;
  2608. case OPT_LIST_DMA_BUFFERS:
  2609. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2610. mode = MODE_LIST_DMA_BUFFERS;
  2611. dma_channel = optarg;
  2612. break;
  2613. case OPT_READ_DMA_BUFFER:
  2614. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2615. mode = MODE_READ_DMA_BUFFER;
  2616. num_offset = strchr(optarg, ':');
  2617. if (num_offset) {
  2618. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2619. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2620. *(char*)num_offset = 0;
  2621. } else block = (size_t)-1;
  2622. dma_channel = optarg;
  2623. break;
  2624. case OPT_START_DMA:
  2625. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2626. mode = MODE_START_DMA;
  2627. if (optarg) dma_channel = optarg;
  2628. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2629. break;
  2630. case OPT_STOP_DMA:
  2631. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2632. mode = MODE_STOP_DMA;
  2633. if (optarg) dma_channel = optarg;
  2634. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2635. break;
  2636. case OPT_ENABLE_IRQ:
  2637. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2638. mode = MODE_ENABLE_IRQ;
  2639. if (optarg) num_offset = optarg;
  2640. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2641. else num_offset = NULL;
  2642. if (num_offset) {
  2643. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2644. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2645. irq_type = itmp;
  2646. }
  2647. break;
  2648. case OPT_DISABLE_IRQ:
  2649. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2650. mode = MODE_DISABLE_IRQ;
  2651. if (optarg) num_offset = optarg;
  2652. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2653. else num_offset = NULL;
  2654. if (num_offset) {
  2655. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2656. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2657. irq_type = itmp;
  2658. }
  2659. break;
  2660. case OPT_ACK_IRQ:
  2661. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2662. mode = MODE_ACK_IRQ;
  2663. if (optarg) num_offset = optarg;
  2664. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2665. else num_offset = NULL;
  2666. if (num_offset) {
  2667. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2668. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2669. irq_source = itmp;
  2670. }
  2671. break;
  2672. case OPT_WAIT_IRQ:
  2673. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2674. mode = MODE_WAIT_IRQ;
  2675. if (optarg) num_offset = optarg;
  2676. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2677. else num_offset = NULL;
  2678. if (num_offset) {
  2679. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2680. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2681. irq_source = itmp;
  2682. }
  2683. break;
  2684. case OPT_SET_DMASK:
  2685. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2686. mode = MODE_SET_DMASK;
  2687. if ((!isnumber(optarg))||(sscanf(optarg, "%lu", &dma_mask) != 1)||(dma_mask<24)||(dma_mask>64))
  2688. Usage(argc, argv, "Invalid DMA mask is specified (%s)", optarg);
  2689. break;
  2690. case OPT_SET_MPS:
  2691. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2692. mode = MODE_SET_MPS;
  2693. if ((!isnumber(optarg))||(sscanf(optarg, "%lu", &pcie_mps) != 1)||(pcie_mps<128)||(pcie_mps>2048))
  2694. Usage(argc, argv, "Invalid payload size is specified (%s)", optarg);
  2695. break;
  2696. case OPT_LIST_KMEM:
  2697. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2698. mode = MODE_LIST_KMEM;
  2699. if (optarg) use = optarg;
  2700. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2701. else use = NULL;
  2702. if (use) {
  2703. num_offset = strchr(use, ':');
  2704. if (num_offset) {
  2705. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2706. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2707. *(char*)num_offset = 0;
  2708. }
  2709. }
  2710. break;
  2711. case OPT_READ_KMEM:
  2712. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2713. mode = MODE_READ_KMEM;
  2714. if (!model) model = "pci";
  2715. num_offset = strchr(optarg, ':');
  2716. if (num_offset) {
  2717. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2718. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2719. *(char*)num_offset = 0;
  2720. }
  2721. use = optarg;
  2722. useid = ParseUse(use);
  2723. break;
  2724. case OPT_ALLOC_KMEM:
  2725. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2726. mode = MODE_ALLOC_KMEM;
  2727. model = "pci";
  2728. if (optarg) use = optarg;
  2729. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2730. break;
  2731. case OPT_FREE_KMEM:
  2732. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2733. mode = MODE_FREE_KMEM;
  2734. if (!model) model = "pci";
  2735. if (optarg) use = optarg;
  2736. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2737. break;
  2738. case OPT_LIST_LOCKS:
  2739. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2740. mode = MODE_LIST_LOCKS;
  2741. break;
  2742. case OPT_FREE_LOCKS:
  2743. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2744. mode = MODE_FREE_LOCKS;
  2745. model = "maintenance";
  2746. break;
  2747. case OPT_LOCK:
  2748. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2749. mode = MODE_LOCK;
  2750. lock = optarg;
  2751. break;
  2752. case OPT_UNLOCK:
  2753. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2754. mode = MODE_UNLOCK;
  2755. lock = optarg;
  2756. break;
  2757. case OPT_DEVICE:
  2758. fpga_device = optarg;
  2759. break;
  2760. case OPT_MODEL:
  2761. model = optarg;
  2762. /* if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2763. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2764. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2765. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
  2766. break;
  2767. case OPT_BAR:
  2768. bank = optarg;
  2769. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2770. // else bar = itmp;
  2771. break;
  2772. case OPT_ALIGNMENT:
  2773. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2774. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2775. }
  2776. break;
  2777. case OPT_ACCESS:
  2778. if (!strncasecmp(optarg, "fifo", 4)) {
  2779. atype = "fifo";
  2780. num_offset = optarg + 4;
  2781. amode = ACCESS_FIFO;
  2782. } else if (!strncasecmp(optarg, "dma", 3)) {
  2783. atype = "dma";
  2784. num_offset = optarg + 3;
  2785. amode = ACCESS_DMA;
  2786. } else if (!strncasecmp(optarg, "bar", 3)) {
  2787. atype = "plain";
  2788. num_offset = optarg + 3;
  2789. amode = ACCESS_BAR;
  2790. } else if (!strncasecmp(optarg, "config", 6)) {
  2791. atype = "config";
  2792. num_offset = optarg + 6;
  2793. amode = ACCESS_CONFIG;
  2794. } else if (!strncasecmp(optarg, "plain", 5)) {
  2795. atype = "plain";
  2796. num_offset = optarg + 5;
  2797. amode = ACCESS_BAR;
  2798. } else {
  2799. num_offset = optarg;
  2800. }
  2801. if (*num_offset) {
  2802. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2803. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2804. switch (itmp) {
  2805. case 8: access = 1; break;
  2806. case 16: access = 2; break;
  2807. case 32: access = 4; break;
  2808. case 64: access = 8; break;
  2809. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2810. }
  2811. }
  2812. break;
  2813. case OPT_SIZE:
  2814. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2815. if (strcasecmp(optarg, "unlimited"))
  2816. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2817. else
  2818. size = 0;//(size_t)-1;
  2819. }
  2820. size_set = 1;
  2821. break;
  2822. case OPT_BLOCK_SIZE:
  2823. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2824. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2825. }
  2826. break;
  2827. case OPT_ENDIANESS:
  2828. if ((*optarg == 'b')||(*optarg == 'B')) {
  2829. if (ntohs(1) == 1) endianess = 0;
  2830. else endianess = 1;
  2831. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2832. if (ntohs(1) == 1) endianess = 1;
  2833. else endianess = 0;
  2834. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2835. break;
  2836. case OPT_TIMEOUT:
  2837. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2838. if (strcasecmp(optarg, "unlimited"))
  2839. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2840. else
  2841. timeout = PCILIB_TIMEOUT_INFINITE;
  2842. }
  2843. timeout_set = 1;
  2844. break;
  2845. case OPT_OUTPUT:
  2846. output = optarg;
  2847. break;
  2848. case OPT_ITERATIONS:
  2849. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2850. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2851. break;
  2852. case OPT_EVENT:
  2853. event = optarg;
  2854. break;
  2855. case OPT_TYPE:
  2856. type = optarg;
  2857. break;
  2858. case OPT_DATA_TYPE:
  2859. data_type = optarg;
  2860. break;
  2861. case OPT_RUN_TIME:
  2862. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2863. if (strcasecmp(optarg, "unlimited"))
  2864. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2865. else
  2866. run_time = 0;
  2867. }
  2868. // run_time_set = 1;
  2869. break;
  2870. case OPT_TRIGGER_TIME:
  2871. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2872. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2873. break;
  2874. case OPT_TRIGGER_RATE:
  2875. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2876. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2877. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2878. break;
  2879. case OPT_BUFFER:
  2880. if (optarg) num_offset = optarg;
  2881. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2882. else num_offset = NULL;
  2883. if (num_offset) {
  2884. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2885. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2886. buffer *= 1024 * 1024;
  2887. } else {
  2888. buffer = get_free_memory();
  2889. if (buffer < 256) Error("Not enough free memory (%lz MiB) for buffering", buffer / 1024 / 1024);
  2890. buffer -= 128 + buffer/16;
  2891. }
  2892. break;
  2893. case OPT_THREADS:
  2894. if (optarg) num_offset = optarg;
  2895. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2896. else num_offset = NULL;
  2897. if (num_offset) {
  2898. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2899. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2900. } else {
  2901. threads = 0;
  2902. }
  2903. break;
  2904. case OPT_FORMAT:
  2905. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2906. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2907. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2908. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2909. break;
  2910. case OPT_QUIETE:
  2911. quiete = 1;
  2912. verbose = -1;
  2913. break;
  2914. case OPT_VERBOSE:
  2915. if (optarg) num_offset = optarg;
  2916. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2917. else num_offset = NULL;
  2918. if (num_offset) {
  2919. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2920. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2921. } else {
  2922. verbose = 1;
  2923. }
  2924. break;
  2925. case OPT_FORCE:
  2926. force = 1;
  2927. break;
  2928. case OPT_VERIFY:
  2929. verify = 1;
  2930. break;
  2931. case OPT_MULTIPACKET:
  2932. flags |= FLAG_MULTIPACKET;
  2933. break;
  2934. case OPT_WAIT:
  2935. flags |= FLAG_WAIT;
  2936. break;
  2937. default:
  2938. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2939. }
  2940. }
  2941. if (mode == MODE_INVALID) {
  2942. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2943. else Usage(argc, argv, NULL);
  2944. }
  2945. if (verbose) log_priority = PCILIB_LOG_INFO;
  2946. else if (quiete) log_priority = PCILIB_LOG_ERROR;
  2947. else log_priority = PCILIB_LOG_WARNING;
  2948. pcilib_set_logger(log_priority, &LogError, NULL);
  2949. handle = pcilib_open(fpga_device, model);
  2950. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2951. model_info = pcilib_get_model_description(handle);
  2952. dma_info = pcilib_get_dma_description(handle);
  2953. switch (mode) {
  2954. case MODE_WRITE:
  2955. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2956. int vallen = strlen(argv[optind]);
  2957. if (vallen > 1) {
  2958. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2959. if (!data) Error("Error allocating memory for data array");
  2960. for (i = 0; i < size; i++) {
  2961. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2962. strcpy(data[i], argv[optind] + 1);
  2963. }
  2964. } else {
  2965. data = (char**)malloc(size * (9 + sizeof(char*)));
  2966. if (!data) Error("Error allocating memory for data array");
  2967. for (i = 0; i < size; i++) {
  2968. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2969. sprintf(data[i], "%x", i);
  2970. }
  2971. }
  2972. } else if ((argc - optind) == size) data = argv + optind;
  2973. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2974. case MODE_READ:
  2975. if (!addr) {
  2976. if (((!dma_info)||(!dma_info->api))&&(!model_info->api)&&(!handle->num_reg)) {
  2977. // if (model == PCILIB_MODEL_PCI) {
  2978. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2979. Usage(argc, argv, "The address is not specified");
  2980. } else ++mode;
  2981. }
  2982. break;
  2983. case MODE_START_DMA:
  2984. case MODE_STOP_DMA:
  2985. case MODE_LIST_DMA_BUFFERS:
  2986. case MODE_READ_DMA_BUFFER:
  2987. if ((dma_channel)&&(*dma_channel)) {
  2988. itmp = strlen(dma_channel) - 1;
  2989. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2990. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2991. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2992. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2993. else {
  2994. num_offset = dma_channel + 3;
  2995. itmp -= 3;
  2996. }
  2997. if (bank) {
  2998. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  2999. }
  3000. if (!isnumber_n(num_offset, itmp))
  3001. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  3002. dma = atoi(num_offset);
  3003. }
  3004. break;
  3005. case MODE_LIST:
  3006. if (bank&&list_target) {
  3007. if (strcmp(list_target, bank))
  3008. Usage(argc, argv, "Conflicting banks are specified in list parameter (%s) and bank parameter (%s)", list_target, bank);
  3009. } else if (bank) {
  3010. list_target = bank;
  3011. }
  3012. break;
  3013. default:
  3014. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  3015. }
  3016. if (addr) {
  3017. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  3018. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  3019. if (bank) {
  3020. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  3021. } else {
  3022. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  3023. }
  3024. dma = atoi(addr + 3);
  3025. amode = ACCESS_DMA;
  3026. addr = NULL;
  3027. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  3028. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  3029. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  3030. bar = atoi(addr + 3);
  3031. amode = ACCESS_BAR;
  3032. addr = NULL;
  3033. } else if (!strcmp(addr, "config")) {
  3034. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  3035. amode = ACCESS_CONFIG;
  3036. addr = NULL;
  3037. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  3038. // check if the address in the register range
  3039. const pcilib_register_range_t *ranges = model_info->ranges;
  3040. if (ranges) {
  3041. for (i = 0; ranges[i].start != ranges[i].end; i++)
  3042. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  3043. // register access in plain mode
  3044. if (ranges[i].start != ranges[i].end) {
  3045. pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
  3046. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  3047. bank = model_info->banks[regbank].name;
  3048. start += ranges[i].addr_shift;
  3049. addr_shift = ranges[i].addr_shift;
  3050. ++mode;
  3051. }
  3052. }
  3053. } else {
  3054. const char *spec;
  3055. attr = strchr(addr, '@');
  3056. if (attr) {
  3057. size_t spec_size = strlen(addr) - strlen(attr);
  3058. spec = strndupa(addr, spec_size);
  3059. attr++;
  3060. } else {
  3061. spec = addr;
  3062. }
  3063. view = strchr(spec, '/');
  3064. unit = strchr((view?view:spec), ':');
  3065. if (view||unit) {
  3066. size_t reg_size = strlen(spec) - strlen(view?view:unit);
  3067. if (reg_size) reg = strndupa(spec, reg_size);
  3068. else reg = NULL;
  3069. if ((reg)&&(view)) view++;
  3070. if (unit) unit++;
  3071. if (view&&unit) {
  3072. view = strndupa(view, strlen(view) - strlen(unit) - 1);
  3073. } else if ((reg)&&(unit)) {
  3074. view = unit;
  3075. unit = NULL;
  3076. }
  3077. } else {
  3078. if (*spec) reg = spec;
  3079. else reg = NULL;
  3080. }
  3081. if (reg) {
  3082. if (pcilib_find_register(handle, bank, reg) == PCILIB_REGISTER_INVALID) {
  3083. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  3084. }
  3085. }
  3086. if (attr) {
  3087. if (mode == MODE_WRITE)
  3088. Error("Writting of attributes is not supported");
  3089. mode += 3;
  3090. } else if (reg) {
  3091. mode += 1;
  3092. } else {
  3093. mode += 2;
  3094. }
  3095. }
  3096. }
  3097. if (mode == MODE_GRAB) {
  3098. if (output) {
  3099. char fsname[128];
  3100. if (!get_file_fs(output, 127, fsname)) {
  3101. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  3102. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  3103. }
  3104. } else {
  3105. output = "/dev/null";
  3106. partition = PARTITION_NULL;
  3107. }
  3108. if (!timeout_set) {
  3109. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  3110. else timeout = PCILIB_EVENT_TIMEOUT;
  3111. }
  3112. if (!size_set) {
  3113. if (run_time) size = 0;
  3114. }
  3115. }
  3116. if (mode != MODE_GRAB) {
  3117. if (size == (size_t)-1)
  3118. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  3119. }
  3120. if ((bank)&&(amode == ACCESS_DMA)) {
  3121. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  3122. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  3123. else dma = itmp;
  3124. } else if (bank) {
  3125. switch (mode) {
  3126. case MODE_BENCHMARK:
  3127. case MODE_READ:
  3128. case MODE_WRITE:
  3129. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS))
  3130. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  3131. else bar = itmp;
  3132. break;
  3133. default:
  3134. if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  3135. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  3136. }
  3137. }
  3138. signal(SIGINT, signal_exit_handler);
  3139. if ((mode != MODE_GRAB)&&(output)) {
  3140. ofile = fopen(output, "a+");
  3141. if (!ofile) {
  3142. Error("Failed to open file \"%s\"", output);
  3143. }
  3144. }
  3145. // Requesting real-time priority when needed
  3146. switch (mode) {
  3147. case MODE_READ:
  3148. case MODE_WRITE:
  3149. if (amode != ACCESS_DMA)
  3150. break;
  3151. case MODE_BENCHMARK:
  3152. sched_param.sched_priority = sched_get_priority_max(SCHED_FIFO);
  3153. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  3154. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  3155. break;
  3156. case MODE_GRAB:
  3157. sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO);
  3158. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  3159. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  3160. break;
  3161. default:
  3162. ;
  3163. }
  3164. switch (mode) {
  3165. case MODE_VERSION:
  3166. Version(handle, model_info);
  3167. break;
  3168. case MODE_INFO:
  3169. Info(handle, model_info, info_target);
  3170. break;
  3171. case MODE_LIST:
  3172. if ((list_target)&&(*list_target == '/'))
  3173. ListProperties(handle, list_target, details);
  3174. else
  3175. List(handle, model_info, list_target, details);
  3176. break;
  3177. case MODE_BENCHMARK:
  3178. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  3179. break;
  3180. case MODE_READ:
  3181. if (amode == ACCESS_DMA) {
  3182. err = ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  3183. } else if (amode == ACCESS_CONFIG) {
  3184. err = ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  3185. } else if (addr) {
  3186. err = ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  3187. } else {
  3188. Error("Address to read is not specified");
  3189. }
  3190. break;
  3191. case MODE_READ_REGISTER:
  3192. case MODE_READ_PROPERTY:
  3193. case MODE_READ_ATTR:
  3194. if ((reg)||(view)||(attr)||(!addr)) ReadRegister(handle, model_info, bank, reg, view, unit, attr);
  3195. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  3196. break;
  3197. case MODE_WRITE:
  3198. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  3199. break;
  3200. case MODE_WRITE_REGISTER:
  3201. case MODE_WRITE_PROPERTY:
  3202. if (reg||view) WriteRegister(handle, model_info, bank, reg, view, unit, data);
  3203. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  3204. break;
  3205. case MODE_RESET:
  3206. pcilib_reset(handle);
  3207. break;
  3208. case MODE_GRAB:
  3209. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  3210. break;
  3211. case MODE_LIST_DMA:
  3212. ListDMA(handle, fpga_device, model_info);
  3213. break;
  3214. case MODE_LIST_DMA_BUFFERS:
  3215. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  3216. break;
  3217. case MODE_READ_DMA_BUFFER:
  3218. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  3219. break;
  3220. case MODE_START_DMA:
  3221. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  3222. break;
  3223. case MODE_STOP_DMA:
  3224. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  3225. break;
  3226. case MODE_ENABLE_IRQ:
  3227. EnableIRQ(handle, model_info, irq_type);
  3228. break;
  3229. case MODE_DISABLE_IRQ:
  3230. DisableIRQ(handle, model_info, irq_type);
  3231. break;
  3232. case MODE_ACK_IRQ:
  3233. AckIRQ(handle, model_info, irq_source);
  3234. break;
  3235. case MODE_WAIT_IRQ:
  3236. WaitIRQ(handle, model_info, irq_source, timeout);
  3237. break;
  3238. case MODE_SET_DMASK:
  3239. pcilib_set_dma_mask(handle, dma_mask);
  3240. break;
  3241. case MODE_SET_MPS:
  3242. pcilib_set_mps(handle, pcie_mps);
  3243. break;
  3244. case MODE_LIST_KMEM:
  3245. if (use) DetailKMEM(handle, fpga_device, use, block);
  3246. else ListKMEM(handle, fpga_device);
  3247. break;
  3248. case MODE_READ_KMEM:
  3249. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  3250. break;
  3251. case MODE_ALLOC_KMEM:
  3252. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  3253. break;
  3254. case MODE_FREE_KMEM:
  3255. FreeKMEM(handle, fpga_device, use, force);
  3256. break;
  3257. case MODE_LIST_LOCKS:
  3258. ListLocks(handle, verbose);
  3259. break;
  3260. case MODE_FREE_LOCKS:
  3261. FreeLocks(handle, force);
  3262. break;
  3263. case MODE_LOCK:
  3264. LockUnlock(handle, lock, 1, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3265. break;
  3266. case MODE_UNLOCK:
  3267. LockUnlock(handle, lock, 0, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3268. break;
  3269. case MODE_INVALID:
  3270. break;
  3271. }
  3272. if (ofile) fclose(ofile);
  3273. pcilib_close(handle);
  3274. if (data != argv + optind) free(data);
  3275. return err;
  3276. }