cli.c 120 KB

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  1. #define _XOPEN_SOURCE 700
  2. #define _POSIX_C_SOURCE 200112L
  3. #define _BSD_SOURCE
  4. #define _GNU_SOURCE
  5. #define _DEFAULT_SOURCE
  6. #include <stdio.h>
  7. #include <stdlib.h>
  8. #include <string.h>
  9. #include <strings.h>
  10. #include <stdint.h>
  11. #include <stdarg.h>
  12. #include <fcntl.h>
  13. #include <unistd.h>
  14. #include <sys/time.h>
  15. #include <sys/ioctl.h>
  16. #include <sys/mman.h>
  17. #include <errno.h>
  18. #include <alloca.h>
  19. #include <arpa/inet.h>
  20. #include <sys/types.h>
  21. #include <sys/stat.h>
  22. #include <dirent.h>
  23. #include <pthread.h>
  24. #include <signal.h>
  25. #include <dlfcn.h>
  26. #include <getopt.h>
  27. #include <fastwriter.h>
  28. #include "pcitool/sysinfo.h"
  29. #include "pcitool/formaters.h"
  30. #include "views/transform.h"
  31. #include "views/enum.h"
  32. #include "pci.h"
  33. #include "plugin.h"
  34. #include "config.h"
  35. #include "tools.h"
  36. #include "kmem.h"
  37. #include "error.h"
  38. #include "debug.h"
  39. #include "model.h"
  40. #include "locking.h"
  41. /* defines */
  42. #define MAX_KBUF 14
  43. //#define BIGBUFSIZE (512*1024*1024)
  44. #define BIGBUFSIZE (1024*1024)
  45. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  46. #define LINE_WIDTH 80
  47. #define SEPARATOR_WIDTH 2
  48. #define BLOCK_SEPARATOR_WIDTH 2
  49. #define BLOCK_SIZE 8
  50. #define BENCHMARK_ITERATIONS 128
  51. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  52. #define isnumber pcilib_isnumber
  53. #define isxnumber pcilib_isxnumber
  54. #define isnumber_n pcilib_isnumber_n
  55. #define isxnumber_n pcilib_isxnumber_n
  56. typedef uint8_t access_t;
  57. typedef enum {
  58. GRAB_MODE_GRAB = 1,
  59. GRAB_MODE_TRIGGER = 2
  60. } GRAB_MODE;
  61. typedef enum {
  62. MODE_INVALID,
  63. MODE_VERSION,
  64. MODE_INFO,
  65. MODE_LIST,
  66. MODE_BENCHMARK,
  67. MODE_READ,
  68. MODE_READ_REGISTER,
  69. MODE_READ_PROPERTY,
  70. MODE_READ_ATTR,
  71. MODE_WRITE,
  72. MODE_WRITE_REGISTER,
  73. MODE_WRITE_PROPERTY,
  74. MODE_RESET,
  75. MODE_GRAB,
  76. MODE_START_DMA,
  77. MODE_STOP_DMA,
  78. MODE_LIST_DMA,
  79. MODE_LIST_DMA_BUFFERS,
  80. MODE_READ_DMA_BUFFER,
  81. MODE_ENABLE_IRQ,
  82. MODE_DISABLE_IRQ,
  83. MODE_ACK_IRQ,
  84. MODE_WAIT_IRQ,
  85. MODE_SET_DMASK,
  86. MODE_SET_MPS,
  87. MODE_ALLOC_KMEM,
  88. MODE_LIST_KMEM,
  89. MODE_READ_KMEM,
  90. MODE_FREE_KMEM,
  91. MODE_LIST_LOCKS,
  92. MODE_FREE_LOCKS,
  93. MODE_LOCK,
  94. MODE_UNLOCK
  95. } MODE;
  96. typedef enum {
  97. ACCESS_BAR,
  98. ACCESS_DMA,
  99. ACCESS_FIFO,
  100. ACCESS_CONFIG
  101. } ACCESS_MODE;
  102. typedef enum {
  103. FLAG_MULTIPACKET = 1,
  104. FLAG_WAIT = 2
  105. } FLAGS;
  106. typedef enum {
  107. FORMAT_DEFAULT = 0,
  108. FORMAT_RAW,
  109. FORMAT_HEADER,
  110. FORMAT_RINGFS
  111. } FORMAT;
  112. typedef enum {
  113. PARTITION_UNKNOWN,
  114. PARTITION_RAW,
  115. PARTITION_EXT4,
  116. PARTITION_NULL
  117. } PARTITION;
  118. typedef enum {
  119. OPT_DEVICE = 'd',
  120. OPT_MODEL = 'm',
  121. OPT_BAR = 'b',
  122. OPT_ACCESS = 'a',
  123. OPT_ENDIANESS = 'e',
  124. OPT_SIZE = 's',
  125. OPT_OUTPUT = 'o',
  126. OPT_TIMEOUT = 't',
  127. OPT_INFO = 'i',
  128. OPT_LIST = 'l',
  129. OPT_READ = 'r',
  130. OPT_WRITE = 'w',
  131. OPT_GRAB = 'g',
  132. OPT_QUIETE = 'q',
  133. OPT_HELP = 'h',
  134. OPT_VERSION = 128,
  135. OPT_RESET,
  136. OPT_BENCHMARK,
  137. OPT_TRIGGER,
  138. OPT_DATA_TYPE,
  139. OPT_EVENT,
  140. OPT_TRIGGER_RATE,
  141. OPT_TRIGGER_TIME,
  142. OPT_RUN_TIME,
  143. OPT_FORMAT,
  144. OPT_BUFFER,
  145. OPT_THREADS,
  146. OPT_LIST_DMA,
  147. OPT_LIST_DMA_BUFFERS,
  148. OPT_READ_DMA_BUFFER,
  149. OPT_START_DMA,
  150. OPT_STOP_DMA,
  151. OPT_ENABLE_IRQ,
  152. OPT_DISABLE_IRQ,
  153. OPT_ACK_IRQ,
  154. OPT_WAIT_IRQ,
  155. OPT_ITERATIONS,
  156. OPT_SET_DMASK,
  157. OPT_SET_MPS,
  158. OPT_ALLOC_KMEM,
  159. OPT_LIST_KMEM,
  160. OPT_FREE_KMEM,
  161. OPT_READ_KMEM,
  162. OPT_LIST_LOCKS,
  163. OPT_FREE_LOCKS,
  164. OPT_LOCK,
  165. OPT_UNLOCK,
  166. OPT_BLOCK_SIZE,
  167. OPT_ALIGNMENT,
  168. OPT_TYPE,
  169. OPT_FORCE,
  170. OPT_VERIFY,
  171. OPT_WAIT,
  172. OPT_MULTIPACKET,
  173. OPT_VERBOSE
  174. } OPTIONS;
  175. static struct option long_options[] = {
  176. {"device", required_argument, 0, OPT_DEVICE },
  177. {"model", required_argument, 0, OPT_MODEL },
  178. {"bar", required_argument, 0, OPT_BAR },
  179. {"access", required_argument, 0, OPT_ACCESS },
  180. {"endianess", required_argument, 0, OPT_ENDIANESS },
  181. {"size", required_argument, 0, OPT_SIZE },
  182. {"output", required_argument, 0, OPT_OUTPUT },
  183. {"timeout", required_argument, 0, OPT_TIMEOUT },
  184. {"iterations", required_argument, 0, OPT_ITERATIONS },
  185. {"info", optional_argument, 0, OPT_INFO },
  186. {"list", optional_argument, 0, OPT_LIST },
  187. {"reset", no_argument, 0, OPT_RESET },
  188. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  189. {"read", optional_argument, 0, OPT_READ },
  190. {"write", optional_argument, 0, OPT_WRITE },
  191. {"grab", optional_argument, 0, OPT_GRAB },
  192. {"trigger", optional_argument, 0, OPT_TRIGGER },
  193. {"data", required_argument, 0, OPT_DATA_TYPE },
  194. {"event", required_argument, 0, OPT_EVENT },
  195. {"run-time", required_argument, 0, OPT_RUN_TIME },
  196. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  197. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  198. {"format", required_argument, 0, OPT_FORMAT },
  199. {"buffer", optional_argument, 0, OPT_BUFFER },
  200. {"threads", optional_argument, 0, OPT_THREADS },
  201. {"start-dma", required_argument, 0, OPT_START_DMA },
  202. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  203. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  204. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  205. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  206. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  207. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  208. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  209. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  210. {"set-dma-mask", required_argument, 0, OPT_SET_DMASK },
  211. {"set-mps", required_argument, 0, OPT_SET_MPS },
  212. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  213. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  214. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  215. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  216. {"list-locks", no_argument, 0, OPT_LIST_LOCKS },
  217. {"free-locks", no_argument, 0, OPT_FREE_LOCKS },
  218. {"lock", required_argument, 0, OPT_LOCK },
  219. {"unlock", required_argument, 0, OPT_UNLOCK },
  220. {"type", required_argument, 0, OPT_TYPE },
  221. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  222. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  223. {"quiete", no_argument, 0, OPT_QUIETE },
  224. {"verbose", optional_argument, 0, OPT_VERBOSE },
  225. {"force", no_argument, 0, OPT_FORCE },
  226. {"verify", no_argument, 0, OPT_VERIFY },
  227. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  228. {"wait", no_argument, 0, OPT_WAIT },
  229. {"version", no_argument, 0, OPT_VERSION },
  230. {"help", no_argument, 0, OPT_HELP },
  231. { 0, 0, 0, 0 }
  232. };
  233. void Usage(int argc, char *argv[], const char *format, ...) {
  234. if (format) {
  235. va_list ap;
  236. va_start(ap, format);
  237. printf("Error %i: ", errno);
  238. vprintf(format, ap);
  239. printf("\n");
  240. va_end(ap);
  241. printf("\n");
  242. }
  243. printf(
  244. "Usage:\n"
  245. " %s <mode> [options] [hex data]\n"
  246. " Modes:\n"
  247. " -i [target] - Device or Register (target) Info\n"
  248. " -l[l] [bank|/branch] - List (detailed) Data Banks & Registers\n"
  249. " -r <addr|dmaX|reg|prop> - Read Data/Register/Property\n"
  250. " -w <addr|dmaX|reg|prop> - Write Data/Register/Property\n"
  251. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  252. " --reset - Reset board\n"
  253. " --version - Version information\n"
  254. " --help - Help message\n"
  255. "\n"
  256. " Property/Register Modes:\n"
  257. " -r <reg>/view[:unit] - Read register view\n"
  258. " -w <reg>/view[:unit] - Write register view\n"
  259. " -r <reg>/unit - Read register, detect view based on unit\n"
  260. " -w <reg>/unit - Write register, detect view based on unt\n"
  261. " -r <prop>[:unit] - Read property\n"
  262. " -w <prop>[:unit] - Write property\n"
  263. " -r <prop|reg>@attr - Read register/property attribute\n"
  264. "\n"
  265. " Event Modes:\n"
  266. " --trigger [event] - Trigger Events\n"
  267. " -g [event] - Grab Events\n"
  268. "\n"
  269. " IRQ Modes:\n"
  270. " --enable-irq [type] - Enable IRQs\n"
  271. " --disable-irq [type] - Disable IRQs\n"
  272. " --acknowledge-irq <source> - Clean IRQ queue\n"
  273. " --wait-irq <source> - Wait for IRQ\n"
  274. "\n"
  275. " DMA Modes:\n"
  276. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  277. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  278. " --list-dma-engines - List active DMA engines\n"
  279. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  280. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  281. "\n"
  282. " PCI Configuration:\n"
  283. " --set-dma-mask [bits] - Set DMA address width (DANGEROUS)\n"
  284. " --set-mps [bits] - Set PCIe Payload Size (DANGEROUS)\n"
  285. "\n"
  286. " Kernel Memory Modes:\n"
  287. " --list-kernel-memory [use] - List kernel buffers\n"
  288. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  289. " block is specified as: use:block_number\n"
  290. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  291. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  292. " dma - Remove all buffers allocated by DMA subsystem\n"
  293. " #number - Remove all buffers with the specified use id\n"
  294. "\n"
  295. " --list-locks - List all registered locks\n"
  296. " --free-locks - Destroy all locks (DANGEROUS)\n"
  297. " --lock <lock name> - Obtain persistent lock\n"
  298. " --unlock <lock name> - Release persistent lock\n"
  299. "\n"
  300. " Addressing:\n"
  301. " -d <device> - FPGA device (/dev/fpga0)\n"
  302. " -m <model> - Memory model (autodetected)\n"
  303. " pci - Plain\n"
  304. " ipecamera - IPE Camera\n"
  305. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  306. "\n"
  307. " Options:\n"
  308. " -s <size> - Number of words (default: 1)\n"
  309. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  310. " -e <l|b> - Endianess Little/Big (default: host)\n"
  311. " -o <file> - Append output to file (default: stdout)\n"
  312. " -t <timeout|unlimited> - Timeout in microseconds\n"
  313. " --check - Verify write operations\n"
  314. "\n"
  315. " Event Options:\n"
  316. " --event <evt> - Specifies event for trigger and grab modes\n"
  317. " --data <type> - Data type to request for the events\n"
  318. " --run-time <us> - Limit time to grab/trigger events\n"
  319. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  320. " --trigger-rate <tps> - Generate tps triggers per second\n"
  321. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  322. " -s <num|unlimited> - Number of events to grab and trigger\n"
  323. " --format [type] - Specifies how event data should be stored\n"
  324. " raw - Just write all events sequentially\n"
  325. " add_header - Prefix events with 512 bit header:\n"
  326. " event(64), data(64), nope(64), size(64)\n"
  327. " seqnum(64), offset(64), timestamp(128)\n"
  328. //" ringfs - Write to RingFS\n"
  329. " --buffer [size] - Request data buffering, size in MB\n"
  330. " --threads [num] - Allow multithreaded processing\n"
  331. "\n"
  332. " DMA Options:\n"
  333. " --multipacket - Read multiple packets\n"
  334. " --wait - Wait until data arrives\n"
  335. "\n"
  336. " Kernel Options:\n"
  337. " --type <type> - Type of kernel memory to allocate\n"
  338. " consistent - Consistent memory\n"
  339. " s2c - DMA S2C (write) memory\n"
  340. " c2s - DMA C2S (read) memory\n"
  341. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  342. " -s <size> - Number of buffers to allocate (default: 1)\n"
  343. " --allignment <alignment> - Buffer alignment (default: page)\n"
  344. "\n"
  345. " Information:\n"
  346. " --verbose [level] - Announce details of ongoing operations\n"
  347. " -q - Quiete mode (suppress warnings)\n"
  348. "\n"
  349. " Data:\n"
  350. " Data can be specified as sequence of hexdecimal number or\n"
  351. " a single value prefixed with '*'. In this case it will be\n"
  352. " replicated the specified amount of times\n"
  353. "\n\n",
  354. argv[0]);
  355. exit(0);
  356. }
  357. static int StopFlag = 0;
  358. static void signal_exit_handler(int signo) {
  359. if (++StopFlag > 2)
  360. exit(-1);
  361. }
  362. void LogError(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, va_list ap) {
  363. vprintf(format, ap);
  364. if (prio == PCILIB_LOG_ERROR) {
  365. if (errno) printf("\nerrno: %i (%s)", errno, strerror(errno));
  366. }
  367. printf("\n");
  368. if (prio == PCILIB_LOG_ERROR) {
  369. printf("Exiting at [%s:%u]\n\n", file, line);
  370. exit(-1);
  371. }
  372. }
  373. void ErrorInternal(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, ...) {
  374. va_list ap;
  375. va_start(ap, format);
  376. LogError(arg, file, line, prio, format, ap);
  377. va_end(ap);
  378. }
  379. #define Error(...) ErrorInternal(NULL, __FILE__, __LINE__, PCILIB_LOG_ERROR, __VA_ARGS__)
  380. int RegisterCompare(const void *aptr, const void *bptr, void *registers) {
  381. pcilib_register_description_t *a = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)aptr];
  382. pcilib_register_description_t *b = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)bptr];
  383. if (a->bank < b->bank) return -1;
  384. if (a->bank > b->bank) return 1;
  385. if (a->addr < b->addr) return -1;
  386. if (a->addr > b->addr) return 1;
  387. if ((a->type != PCILIB_REGISTER_BITS)&&(b->type == PCILIB_REGISTER_BITS)) return -1;
  388. if ((a->type == PCILIB_REGISTER_BITS)&&(b->type != PCILIB_REGISTER_BITS)) return 1;
  389. if (a->offset < b->offset) return -1;
  390. if (a->offset > b->offset) return 0;
  391. return 0;
  392. }
  393. void ListProperties(pcilib_t *handle, const char *branch, int details) {
  394. int i;
  395. pcilib_property_info_t *props;
  396. props = pcilib_get_property_list(handle, branch, 0);
  397. if (!props) Error("Error getting properties");
  398. if (props[0].path) {
  399. printf("Properties: \n");
  400. for (i = 0; props[i].path; i++) {
  401. const char *mode;
  402. const char *type;
  403. switch (props[i].type) {
  404. case PCILIB_TYPE_LONG:
  405. type = "int ";
  406. break;
  407. case PCILIB_TYPE_DOUBLE:
  408. type = "float ";
  409. break;
  410. case PCILIB_TYPE_STRING:
  411. type = "string ";
  412. break;
  413. case PCILIB_TYPE_INVALID:
  414. type = NULL;
  415. break;
  416. default:
  417. type = "unknown";
  418. }
  419. switch (props[i].mode) {
  420. case PCILIB_ACCESS_RW:
  421. mode = "RW";
  422. break;
  423. case PCILIB_ACCESS_R:
  424. mode = "R ";
  425. break;
  426. case PCILIB_ACCESS_W:
  427. mode = "W ";
  428. break;
  429. default:
  430. mode = " ";
  431. }
  432. if (type)
  433. printf(" (%s %s) ", type, mode);
  434. else
  435. printf(" %12s", "");
  436. if (props[i].flags&PCILIB_LIST_FLAG_CHILDS)
  437. printf(" + ");
  438. else
  439. printf(" ");
  440. if (details > 0) {
  441. printf("%s", props[i].name);
  442. if ((props[i].description)&&(props[i].description[0])) {
  443. printf(": %s", props[i].description);
  444. }
  445. } else {
  446. printf("%s", props[i].path);
  447. }
  448. printf("\n");
  449. }
  450. printf("\n");
  451. pcilib_free_property_info(handle, props);
  452. }
  453. }
  454. void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
  455. int i, j, k;
  456. const pcilib_register_bank_description_t *banks;
  457. const pcilib_register_description_t *registers;
  458. const pcilib_event_description_t *events;
  459. const pcilib_event_data_type_description_t *types;
  460. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  461. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  462. for (i = 0; i < PCILIB_MAX_BARS; i++) {
  463. if (board_info->bar_length[i] > 0) {
  464. printf(" BAR %d - ", i);
  465. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  466. case IORESOURCE_IO: printf(" IO"); break;
  467. case IORESOURCE_MEM: printf("MEM"); break;
  468. case IORESOURCE_IRQ: printf("IRQ"); break;
  469. case IORESOURCE_DMA: printf("DMA"); break;
  470. }
  471. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  472. else printf("32");
  473. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  474. }
  475. }
  476. printf("\n");
  477. if ((dma_info)&&(dma_info->engines)) {
  478. printf("DMA Engines: \n");
  479. for (i = 0; dma_info->engines[i].addr_bits; i++) {
  480. const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
  481. printf(" DMA %2d ", engine->addr);
  482. switch (engine->direction) {
  483. case PCILIB_DMA_FROM_DEVICE:
  484. printf("C2S");
  485. break;
  486. case PCILIB_DMA_TO_DEVICE:
  487. printf("S2C");
  488. break;
  489. case PCILIB_DMA_BIDIRECTIONAL:
  490. printf("BI ");
  491. break;
  492. }
  493. printf(" - Type: ");
  494. switch (engine->type) {
  495. case PCILIB_DMA_TYPE_BLOCK:
  496. printf("Block");
  497. break;
  498. case PCILIB_DMA_TYPE_PACKET:
  499. printf("Packet");
  500. break;
  501. default:
  502. printf("Unknown");
  503. }
  504. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  505. }
  506. printf("\n");
  507. }
  508. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  509. else banks = model_info->banks;
  510. if (banks) {
  511. printf("Banks: \n");
  512. for (i = 0; banks[i].access; i++) {
  513. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  514. if ((banks[i].description)&&(banks[i].description[0])) {
  515. printf(": %s", banks[i].description);
  516. }
  517. printf("\n");
  518. }
  519. printf("\n");
  520. }
  521. if (bank == (char*)-1) registers = NULL;
  522. else registers = model_info->registers;
  523. if (registers) {
  524. pcilib_register_t regsort[handle->num_reg];
  525. pcilib_register_bank_addr_t bank_addr = 0;
  526. if (bank) {
  527. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  528. const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  529. bank_addr = b->addr;
  530. if (b->description) printf("%s:\n", b->description);
  531. else if (b->name) printf("Registers of bank %s:\n", b->name);
  532. else printf("Registers of bank 0x%x:\n", b->addr);
  533. } else {
  534. printf("Registers: \n");
  535. }
  536. // sorting
  537. for (i = 0, k = 0; registers[i].bits; i++) {
  538. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  539. if ((registers[i].type == PCILIB_REGISTER_BITS)&&(!details)) continue;
  540. regsort[k++] = i;
  541. }
  542. qsort_r(regsort, k, sizeof(pcilib_register_t), &RegisterCompare, (void*)registers);
  543. for (j = 0; j < k; j++) {
  544. const char *mode;
  545. i = regsort[j];
  546. if (registers[i].type == PCILIB_REGISTER_BITS) {
  547. if (!details) continue;
  548. if (registers[i].bits > 1) {
  549. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  550. } else {
  551. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  552. }
  553. continue;
  554. }
  555. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  556. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  557. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  558. else mode = " ";
  559. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  560. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  561. printf(": %s", registers[i].description);
  562. }
  563. printf("\n");
  564. }
  565. printf("\n");
  566. }
  567. ListProperties(handle, "/", details);
  568. if (bank == (char*)-1) events = NULL;
  569. else {
  570. events = model_info->events;
  571. types = model_info->data_types;
  572. }
  573. if (events) {
  574. printf("Events: \n");
  575. for (i = 0; events[i].name; i++) {
  576. printf(" %s", events[i].name);
  577. if ((events[i].description)&&(events[i].description[0])) {
  578. printf(": %s", events[i].description);
  579. }
  580. if (types) {
  581. for (j = 0; types[j].name; j++) {
  582. if (types[j].evid & events[i].evid) {
  583. printf("\n %s", types[j].name);
  584. if ((types[j].description)&&(types[j].description[0])) {
  585. printf(": %s", types[j].description);
  586. }
  587. }
  588. }
  589. }
  590. }
  591. printf("\n");
  592. }
  593. }
  594. void ViewInfo(pcilib_t *handle, pcilib_register_t reg, size_t id) {
  595. int err;
  596. int i;
  597. pcilib_value_t val = {0};
  598. pcilib_register_value_name_t *vnames;
  599. pcilib_view_t view;
  600. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  601. const pcilib_register_description_t *r;
  602. const pcilib_view_description_t *v;
  603. if (reg == PCILIB_REGISTER_INVALID) {
  604. r = NULL;
  605. view = id;
  606. } else {
  607. r = &model_info->registers[reg];
  608. view = pcilib_find_view_by_name(handle, r->views[id].view);
  609. }
  610. if (view == PCILIB_VIEW_INVALID) return;
  611. v = model_info->views[view];
  612. if (r) {
  613. printf(" View %s (", r->views[id].name);
  614. } else {
  615. printf("%s\n", v->name);
  616. printf(" Data type : ");
  617. }
  618. switch (v->type) {
  619. case PCILIB_TYPE_STRING:
  620. printf("char*");
  621. break;
  622. case PCILIB_TYPE_DOUBLE:
  623. printf("double");
  624. break;
  625. case PCILIB_TYPE_LONG:
  626. printf("long");
  627. break;
  628. default:
  629. printf("unknown");
  630. }
  631. if (r) printf(")");
  632. printf("\n");
  633. if (v->mode&PCILIB_ACCESS_R) {
  634. if (r) {
  635. err = pcilib_read_register_view_by_id(handle, reg, r->views[id].name, &val);
  636. } else {
  637. err = pcilib_get_property(handle, v->name, &val);
  638. }
  639. if (!err) err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  640. } else {
  641. err = PCILIB_ERROR_NOTPERMITED;
  642. }
  643. if (err) {
  644. if (err == PCILIB_ERROR_NOTPERMITED)
  645. printf(" Current value : no read access\n");
  646. else
  647. printf(" Current value : error %i\n", err);
  648. } else {
  649. printf(" Current value : %s", val.sval);
  650. if (v->unit) printf(" (units: %s)", v->unit);
  651. printf("\n");
  652. }
  653. if (v->unit) {
  654. pcilib_unit_t unit = pcilib_find_unit_by_name(handle, v->unit);
  655. printf(" Supported units: %s", v->unit);
  656. if (unit != PCILIB_UNIT_INVALID) {
  657. const pcilib_unit_description_t *u = &model_info->units[unit];
  658. for (i = 0; u->transforms[i].unit; i++)
  659. printf(", %s", u->transforms[i].unit);
  660. }
  661. printf("\n");
  662. }
  663. printf(" Access : ");
  664. if ((v->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  665. if (v->mode&PCILIB_REGISTER_R) printf("R");
  666. if (v->mode&PCILIB_REGISTER_W) printf("W");
  667. printf("\n");
  668. if ((v->api == &pcilib_enum_view_static_api)||(v->api == &pcilib_enum_view_xml_api)) {
  669. vnames = ((pcilib_enum_view_description_t*)v)->names;
  670. printf(" Value aliases :");
  671. for (i = 0; vnames[i].name; i++) {
  672. if (i) printf(",");
  673. printf(" %s = %lu", vnames[i].name, vnames[i].value);
  674. if (vnames[i].min != vnames[i].max)
  675. printf(" (%lu - %lu)", vnames[i].min, vnames[i].max);
  676. }
  677. printf("\n");
  678. } else if (v->api == &pcilib_transform_view_api) {
  679. const pcilib_transform_view_description_t *tv = (const pcilib_transform_view_description_t*)v;
  680. if (tv->read_from_reg)
  681. printf(" Read function : %s\n", tv->read_from_reg);
  682. if (tv->write_to_reg)
  683. printf(" Write function : %s\n", tv->write_to_reg);
  684. }
  685. if (v->description)
  686. printf(" Description : %s\n", v->description);
  687. }
  688. void RegisterInfo(pcilib_t *handle, pcilib_register_t reg) {
  689. int err;
  690. int i;
  691. pcilib_register_value_t regval;
  692. pcilib_register_info_t *info;
  693. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  694. const pcilib_register_description_t *r = &model_info->registers[reg];
  695. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, r->bank);
  696. const pcilib_register_bank_description_t *b = &model_info->banks[bank];
  697. if (r->mode&PCILIB_ACCESS_R) {
  698. err = pcilib_read_register_by_id(handle, reg, &regval);
  699. } else {
  700. err = PCILIB_ERROR_NOTPERMITED;
  701. }
  702. info = pcilib_get_register_info(handle, b->name, r->name, 0);
  703. if (!info) Error("Can't obtain register info for %s", r->name);
  704. printf("%s/%s\n", b->name, r->name);
  705. printf(" Current value: ");
  706. if (err) {
  707. if (err == PCILIB_ERROR_NOTPERMITED) printf("no read access");
  708. else printf("error %i", err);
  709. } else printf(b->format, regval);
  710. if (r->mode&PCILIB_REGISTER_W) {
  711. printf(" (default: ");
  712. printf(b->format, r->defvalue);
  713. if (info->range) {
  714. printf(", range: ");
  715. printf(b->format, info->range->min);
  716. printf (" - ");
  717. printf(b->format, info->range->max);
  718. }
  719. printf(")");
  720. }
  721. printf("\n");
  722. printf(" Address : 0x%x [%u:%u]\n", r->addr, r->offset, r->offset + r->bits);
  723. if ((info->values)&&(info->values[0].name)) {
  724. printf(" Value aliases:");
  725. for (i = 0; info->values[i].name; i++)
  726. printf(" %s", info->values[i].name);
  727. printf("\n");
  728. }
  729. printf(" Access : ");
  730. if ((r->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  731. if (r->mode&PCILIB_REGISTER_R) printf("R");
  732. if (r->mode&PCILIB_REGISTER_W) printf("W");
  733. if (r->mode&PCILIB_REGISTER_W1C) printf("/reset");
  734. if (r->mode&PCILIB_REGISTER_W1I) printf("/invert");
  735. printf("\n");
  736. if (r->description)
  737. printf(" Description : %s\n", r->description);
  738. if (r->views) {
  739. printf("\nSupported Views:\n");
  740. for (i = 0; r->views[i].name; i++) {
  741. ViewInfo(handle, reg, i);
  742. }
  743. }
  744. pcilib_free_register_info(handle, info);
  745. }
  746. void Version(pcilib_t *handle, const pcilib_model_description_t *model_info) {
  747. const pcilib_driver_version_t *driver_version;
  748. driver_version = pcilib_get_driver_version(handle);
  749. printf("pcilib version: %u.%u.%u\n",
  750. PCILIB_VERSION_GET_MAJOR(PCILIB_VERSION),
  751. PCILIB_VERSION_GET_MINOR(PCILIB_VERSION),
  752. PCILIB_VERSION_GET_MICRO(PCILIB_VERSION)
  753. );
  754. printf("driver version: %lu.%lu.%lu, interface: 0x%lx, registered ioctls: %lu\n",
  755. PCILIB_VERSION_GET_MAJOR(driver_version->version),
  756. PCILIB_VERSION_GET_MINOR(driver_version->version),
  757. PCILIB_VERSION_GET_MICRO(driver_version->version),
  758. driver_version->interface,
  759. driver_version->ioctls
  760. );
  761. if (model_info) {
  762. pcilib_version_t version = model_info->interface_version;
  763. printf("Model: %s", handle->model);
  764. if (version) {
  765. printf(", version: %u.%u.%u\n",
  766. PCILIB_VERSION_GET_MAJOR(version),
  767. PCILIB_VERSION_GET_MINOR(version),
  768. PCILIB_VERSION_GET_MICRO(version)
  769. );
  770. } else {
  771. printf(" (embedded)\n");
  772. }
  773. }
  774. if (model_info->dma) {
  775. pcilib_version_t version = model_info->dma->api->version;
  776. printf("DMA Engine: %s, version: %u.%u.%u\n", model_info->dma->name,
  777. PCILIB_VERSION_GET_MAJOR(version),
  778. PCILIB_VERSION_GET_MINOR(version),
  779. PCILIB_VERSION_GET_MICRO(version)
  780. );
  781. }
  782. }
  783. void Info(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *target) {
  784. int i, j;
  785. DIR *dir;
  786. void *plugin;
  787. const char *path;
  788. struct dirent *entry;
  789. const pcilib_model_description_t *info = NULL;
  790. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  791. const pcilib_pcie_link_info_t *link_info = pcilib_get_pcie_link_info(handle);
  792. int have_state;
  793. pcilib_device_state_t state;
  794. path = getenv("PCILIB_PLUGIN_DIR");
  795. if (!path) path = PCILIB_PLUGIN_DIR;
  796. have_state = !pcilib_get_device_state(handle, &state);
  797. if (board_info)
  798. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x, Model: %s\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func, handle->model);
  799. if (link_info) {
  800. printf(" PCIe x%u (gen%u), DMA Payload: %u (of %u)", link_info->link_width, link_info->link_speed, 1<<link_info->payload, 1<<link_info->max_payload);
  801. if (have_state) {
  802. int bits = 0;
  803. unsigned long mask;
  804. for (mask = state.dma_mask; mask&1; mask>>=1) bits++;
  805. printf(", DMA Mask: ");
  806. if (mask) printf("0x%lx", state.dma_mask);
  807. else printf("%u bits", bits);
  808. printf(", IOMMU: %s", state.iommu?"on":"off");
  809. }
  810. printf("\n");
  811. }
  812. if (board_info)
  813. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  814. printf("\n");
  815. if (target) {
  816. if (*target == '/') {
  817. pcilib_view_t view;
  818. view = pcilib_find_view_by_name(handle, target);
  819. if (view != PCILIB_VIEW_INVALID)
  820. return ViewInfo(handle, PCILIB_REGISTER_INVALID, view);
  821. Error(" No property %s is found", target);
  822. } else {
  823. pcilib_register_t reg;
  824. reg = pcilib_find_register(handle, NULL, target);
  825. if (reg != PCILIB_REGISTER_INVALID)
  826. return RegisterInfo(handle, reg);
  827. Error(" No register %s is found", target);
  828. }
  829. }
  830. List(handle, model_info, (char*)-1, 0);
  831. printf("Available models:\n");
  832. dir = opendir(path);
  833. if (dir) {
  834. while ((entry = readdir(dir))) {
  835. const char *suffix = strstr(entry->d_name, ".so");
  836. if ((!suffix)||(strlen(suffix) != 3)) continue;
  837. plugin = pcilib_plugin_load(entry->d_name);
  838. if (plugin) {
  839. info = pcilib_get_plugin_model(handle, plugin, 0, 0, NULL);
  840. if (info) {
  841. printf(" %s\n", entry->d_name);
  842. for (j = 0; info[j].name; j++) {
  843. pcilib_version_t version = info[j].api->version;
  844. printf(" %-12s %u.%u.%u - %s\n", info[j].name,
  845. PCILIB_VERSION_GET_MAJOR(version),
  846. PCILIB_VERSION_GET_MINOR(version),
  847. PCILIB_VERSION_GET_MICRO(version),
  848. info[j].description?info[j].description:"");
  849. }
  850. }
  851. pcilib_plugin_close(plugin);
  852. } else {
  853. const char *msg = dlerror();
  854. if (msg)
  855. printf(" %s: %s\n", entry->d_name, msg);
  856. }
  857. }
  858. closedir(dir);
  859. }
  860. // printf(" XML\n");
  861. printf(" Internal Models\n");
  862. for (i = 0; pcilib_dma[i].api; i++)
  863. printf(" %-12s - %s\n", pcilib_dma[i].name, pcilib_dma[i].description?pcilib_dma[i].description:"");
  864. printf(" %-12s - Plain PCI-access model\n\n", "pci");
  865. }
  866. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  867. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  868. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  869. int err;
  870. int i, j, errors;
  871. void *data, *buf, *check;
  872. void *fifo = NULL;
  873. struct timeval start, end;
  874. unsigned long time;
  875. size_t size, min_size, max_size;
  876. double mbs_in, mbs_out, mbs;
  877. size_t irqs;
  878. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  879. if (mode == ACCESS_CONFIG)
  880. Error("No benchmarking of configuration space acess is allowed");
  881. if (mode == ACCESS_DMA) {
  882. if (n) {
  883. min_size = n * access;
  884. max_size = n * access;
  885. } else {
  886. min_size = 1024;
  887. max_size = BENCH_MAX_DMA_SIZE;
  888. }
  889. for (size = min_size; size <= max_size; size *= 4) {
  890. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  891. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  892. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  893. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  894. if (err) irqs = 0;
  895. printf("%8zu KiB - ", size / 1024);
  896. printf("RW: ");
  897. if (mbs < 0) printf("failed ... ");
  898. else printf("%8.2lf MiB/s", mbs);
  899. printf(", R: ");
  900. if (mbs_in < 0) printf("failed ... ");
  901. else printf("%8.2lf MiB/s", mbs_in);
  902. printf(", W: ");
  903. if (mbs_out < 0) printf("failed ... ");
  904. else printf("%8.2lf MiB/s", mbs_out);
  905. if (irqs) {
  906. printf(", IRQs: %lu", irqs);
  907. }
  908. printf("\n");
  909. }
  910. return 0;
  911. }
  912. if (bar == PCILIB_BAR_INVALID) {
  913. unsigned long maxlength = 0;
  914. for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
  915. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  916. bar = i;
  917. break;
  918. }
  919. if (board_info->bar_length[i] > maxlength) {
  920. maxlength = board_info->bar_length[i];
  921. bar = i;
  922. }
  923. }
  924. if (bar < 0) Error("Data banks are not available");
  925. }
  926. if (n) {
  927. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  928. min_size = n * access;
  929. max_size = n * access;
  930. } else {
  931. min_size = access;
  932. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  933. else max_size = BENCH_MAX_FIFO_SIZE;
  934. }
  935. err = posix_memalign( (void**)&buf, 256, max_size );
  936. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  937. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  938. if (mode == ACCESS_FIFO) {
  939. fifo = pcilib_resolve_bar_address(handle, bar, addr);
  940. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  941. } else {
  942. data = pcilib_resolve_bar_address(handle, bar, 0);
  943. if (!data) Error("Can't resolve start of bar (%u)", bar);
  944. }
  945. if (mode == ACCESS_FIFO)
  946. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  947. else
  948. printf("Transfer time (Bank: %i):\n", bar);
  949. for (size = min_size ; size < max_size; size *= 8) {
  950. gettimeofday(&start,NULL);
  951. if (mode == ACCESS_BAR) {
  952. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  953. pcilib_memcpy(buf, data, access, size / access);
  954. }
  955. } else {
  956. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  957. for (j = 0; j < (size/access); j++) {
  958. pcilib_memcpy(buf + j * access, fifo, access, 1);
  959. }
  960. }
  961. }
  962. gettimeofday(&end,NULL);
  963. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  964. printf("%8zu bytes - read: %8.2lf MiB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  965. fflush(0);
  966. gettimeofday(&start,NULL);
  967. if (mode == ACCESS_BAR) {
  968. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  969. pcilib_memcpy(data, buf, access, size / access);
  970. }
  971. } else {
  972. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  973. for (j = 0; j < (size/access); j++) {
  974. pcilib_memcpy(fifo, buf + j * access, access, 1);
  975. }
  976. }
  977. }
  978. gettimeofday(&end,NULL);
  979. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  980. printf(", write: %8.2lf MiB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  981. }
  982. printf("\n\nOpen-Transfer-Close time: \n");
  983. for (size = 4 ; size < max_size; size *= 8) {
  984. gettimeofday(&start,NULL);
  985. if (mode == ACCESS_BAR) {
  986. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  987. pcilib_read(handle, bar, 0, access, size / access, buf);
  988. }
  989. } else {
  990. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  991. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  992. }
  993. }
  994. gettimeofday(&end,NULL);
  995. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  996. printf("%8zu bytes - read: %8.2lf MiB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  997. fflush(0);
  998. gettimeofday(&start,NULL);
  999. if (mode == ACCESS_BAR) {
  1000. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  1001. pcilib_write(handle, bar, 0, access, size / access, buf);
  1002. }
  1003. } else {
  1004. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  1005. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  1006. }
  1007. }
  1008. gettimeofday(&end,NULL);
  1009. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  1010. printf(", write: %8.2lf MiB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  1011. if (mode == ACCESS_BAR) {
  1012. gettimeofday(&start,NULL);
  1013. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  1014. pcilib_write(handle, bar, 0, access, size / access, buf);
  1015. pcilib_read(handle, bar, 0, access, size / access, check);
  1016. if (memcmp(buf, check, size)) ++errors;
  1017. }
  1018. gettimeofday(&end,NULL);
  1019. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  1020. printf(", write-verify: %8.2lf MiB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  1021. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  1022. }
  1023. printf("\n");
  1024. }
  1025. printf("\n\n");
  1026. free(check);
  1027. free(buf);
  1028. return 0;
  1029. }
  1030. #define pci2host16(endianess, value) endianess?
  1031. /*
  1032. typedef struct {
  1033. size_t size;
  1034. void *data;
  1035. size_t pos;
  1036. int multi_mode;
  1037. } DMACallbackContext;
  1038. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  1039. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  1040. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  1041. ctx->size *= 2;
  1042. ctx->data = realloc(ctx->data, ctx->size);
  1043. if (!ctx->data) {
  1044. Error("Allocation of %i bytes of memory have failed", ctx->size);
  1045. return 0;
  1046. }
  1047. }
  1048. memcpy(ctx->data + ctx->pos, buf, bufsize);
  1049. ctx->pos += bufsize;
  1050. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  1051. return 1;
  1052. }
  1053. */
  1054. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  1055. void *buf;
  1056. int i, err;
  1057. size_t ret, bytes;
  1058. size_t size = n * abs(access);
  1059. int block_width, blocks_per_line;
  1060. int numbers_per_block, numbers_per_line;
  1061. pcilib_dma_engine_t dmaid;
  1062. pcilib_dma_flags_t dma_flags = 0;
  1063. int fd;
  1064. char stmp[256];
  1065. struct stat st;
  1066. const pcilib_board_info_t *board_info;
  1067. numbers_per_block = BLOCK_SIZE / access;
  1068. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1069. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1070. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1071. numbers_per_line = blocks_per_line * numbers_per_block;
  1072. if (size) {
  1073. buf = malloc(size);
  1074. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  1075. } else {
  1076. buf = NULL;
  1077. }
  1078. switch (mode) {
  1079. case ACCESS_DMA:
  1080. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  1081. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1082. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1083. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  1084. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  1085. if (size) {
  1086. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  1087. if (err) Error("Error (%i) is reported by DMA engine", err);
  1088. } else {
  1089. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  1090. size = 2048; bytes = 0;
  1091. do {
  1092. size *= 2;
  1093. buf = realloc(buf, size);
  1094. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  1095. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  1096. bytes += ret;
  1097. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  1098. err = PCILIB_ERROR_TOOBIG;
  1099. if ((flags&FLAG_WAIT)==0) timeout = 0;
  1100. }
  1101. } while (err == PCILIB_ERROR_TOOBIG);
  1102. }
  1103. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  1104. Error("Error (%i) during DMA read", err);
  1105. }
  1106. if (bytes <= 0) {
  1107. pcilib_warning("No data is returned by DMA engine");
  1108. return -1;
  1109. }
  1110. size = bytes;
  1111. n = bytes / abs(access);
  1112. addr = 0;
  1113. break;
  1114. case ACCESS_FIFO:
  1115. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  1116. addr = 0;
  1117. break;
  1118. case ACCESS_CONFIG:
  1119. board_info = pcilib_get_board_info(handle);
  1120. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  1121. fd = open(stmp, O_RDONLY);
  1122. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  1123. if (st.st_size < addr)
  1124. Error("Access beyond the end of PCI configuration space");
  1125. if (st.st_size < (addr + size)) {
  1126. n = (st.st_size - addr) / abs(access);
  1127. size = n * abs(access);
  1128. if (!n) Error("Access beyond the end of PCI configuration space");
  1129. }
  1130. lseek(fd, addr, SEEK_SET);
  1131. ret = read(fd, buf, size);
  1132. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  1133. if (ret < size) {
  1134. size = ret;
  1135. n = ret / abs(access);
  1136. }
  1137. close(fd);
  1138. break;
  1139. default:
  1140. pcilib_read(handle, bar, addr, access, size / access, buf);
  1141. }
  1142. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1143. if (o) {
  1144. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1145. fwrite(buf, abs(access), n, o);
  1146. } else {
  1147. for (i = 0; i < n; i++) {
  1148. if (i) {
  1149. if (i%numbers_per_line == 0) printf("\n");
  1150. else {
  1151. printf("%*s", SEPARATOR_WIDTH, "");
  1152. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1153. }
  1154. }
  1155. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  1156. switch (access) {
  1157. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  1158. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  1159. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  1160. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  1161. }
  1162. }
  1163. printf("\n\n");
  1164. }
  1165. free(buf);
  1166. return 0;
  1167. }
  1168. int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, const char *attr) {
  1169. int i;
  1170. int err;
  1171. const char *format;
  1172. pcilib_register_bank_t bank_id;
  1173. pcilib_register_bank_addr_t bank_addr = 0;
  1174. pcilib_register_value_t value;
  1175. // Adding DMA registers
  1176. pcilib_get_dma_description(handle);
  1177. if (reg||view||attr) {
  1178. pcilib_value_t val = {0};
  1179. if (attr) {
  1180. if (reg) err = pcilib_get_register_attr(handle, bank, reg, attr, &val);
  1181. else if (view) err = pcilib_get_property_attr(handle, view, attr, &val);
  1182. else if (bank) err = pcilib_get_register_bank_attr(handle, bank, attr, &val);
  1183. else err = PCILIB_ERROR_INVALID_ARGUMENT;
  1184. if (err) {
  1185. if (err == PCILIB_ERROR_NOTFOUND)
  1186. Error("Attribute %s is not found", attr);
  1187. else
  1188. Error("Error (%i) reading attribute %s", err, attr);
  1189. }
  1190. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1191. if (err) Error("Error converting attribute %s to string", attr);
  1192. printf("%s = %s", attr, val.sval);
  1193. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1194. printf(" %s", val.unit);
  1195. printf(" (for %s)\n", (reg?reg:(view?view:bank)));
  1196. } else if (view) {
  1197. if (reg) {
  1198. err = pcilib_read_register_view(handle, bank, reg, view, &val);
  1199. if (err) Error("Error reading view %s of register %s", view, reg);
  1200. } else {
  1201. err = pcilib_get_property(handle, view, &val);
  1202. if (err) Error("Error reading property %s", view);
  1203. }
  1204. if (unit) {
  1205. err = pcilib_convert_value_unit(handle, &val, unit);
  1206. if (err) {
  1207. if (reg) Error("Error converting view %s of register %s to unit %s", view, reg, unit);
  1208. else Error("Error converting property %s to unit %s", view, unit);
  1209. }
  1210. }
  1211. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1212. if (err) {
  1213. if (reg) Error("Error converting view %s of register %s to string", view);
  1214. else Error("Error converting property %s to string", view);
  1215. }
  1216. printf("%s = %s", (reg?reg:view), val.sval);
  1217. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1218. printf(" %s", val.unit);
  1219. printf("\n");
  1220. } else {
  1221. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1222. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
  1223. format = model_info->banks[bank_id].format;
  1224. if (!format) format = "%lu";
  1225. err = pcilib_read_register_by_id(handle, regid, &value);
  1226. if (err) Error("Error reading register %s", reg);
  1227. printf("%s = ", reg);
  1228. printf(format, value);
  1229. printf("\n");
  1230. }
  1231. } else {
  1232. if (model_info->registers) {
  1233. if (bank) {
  1234. bank_id = pcilib_find_register_bank(handle, bank);
  1235. bank_addr = model_info->banks[bank_id].addr;
  1236. }
  1237. printf("Registers:\n");
  1238. for (i = 0; model_info->registers[i].bits; i++) {
  1239. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  1240. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
  1241. format = model_info->banks[bank_id].format;
  1242. if (!format) format = "%lu";
  1243. err = pcilib_read_register_by_id(handle, i, &value);
  1244. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  1245. else {
  1246. printf(" %s = ", model_info->registers[i].name);
  1247. printf(format, value);
  1248. }
  1249. printf(" [");
  1250. printf(format, model_info->registers[i].defvalue);
  1251. printf("]");
  1252. printf("\n");
  1253. }
  1254. }
  1255. } else {
  1256. printf("No registers");
  1257. }
  1258. printf("\n");
  1259. }
  1260. return 0;
  1261. }
  1262. #define WRITE_REGVAL(buf, n, access, o) {\
  1263. uint##access##_t tbuf[n]; \
  1264. for (i = 0; i < n; i++) { \
  1265. tbuf[i] = (uint##access##_t)buf[i]; \
  1266. } \
  1267. fwrite(tbuf, access/8, n, o); \
  1268. }
  1269. int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  1270. int err;
  1271. int i;
  1272. const pcilib_register_bank_description_t *banks = model_info->banks;
  1273. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  1274. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  1275. if (bank) Error("Invalid register bank is specified (%s)", bank);
  1276. else Error("Register bank should be specified");
  1277. }
  1278. int access = banks[bank_id].access / 8;
  1279. // int size = n * abs(access);
  1280. int block_width, blocks_per_line;
  1281. int numbers_per_block, numbers_per_line;
  1282. numbers_per_block = BLOCK_SIZE / access;
  1283. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1284. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1285. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1286. numbers_per_line = blocks_per_line * numbers_per_block;
  1287. pcilib_register_value_t buf[n];
  1288. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  1289. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1290. if (o) {
  1291. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1292. switch (access) {
  1293. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  1294. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  1295. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  1296. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  1297. }
  1298. } else {
  1299. for (i = 0; i < n; i++) {
  1300. if (i) {
  1301. if (i%numbers_per_line == 0) printf("\n");
  1302. else {
  1303. printf("%*s", SEPARATOR_WIDTH, "");
  1304. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1305. }
  1306. }
  1307. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  1308. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  1309. }
  1310. printf("\n\n");
  1311. }
  1312. return 0;
  1313. }
  1314. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  1315. int read_back = 0;
  1316. void *buf, *check;
  1317. int res = 0, i, err;
  1318. int size = n * abs(access);
  1319. size_t ret;
  1320. pcilib_dma_engine_t dmaid;
  1321. if (mode == ACCESS_CONFIG)
  1322. Error("Writting to PCI configuration space is not supported");
  1323. err = posix_memalign( (void**)&buf, 256, size );
  1324. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1325. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1326. for (i = 0; i < n; i++) {
  1327. switch (access) {
  1328. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  1329. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  1330. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  1331. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  1332. default: Error("Unexpected data size (%lu)", access);
  1333. }
  1334. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1335. }
  1336. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1337. switch (mode) {
  1338. case ACCESS_DMA:
  1339. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1340. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1341. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  1342. if ((err)||(ret != size)) {
  1343. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  1344. else if (err) Error("DMA engine returned a error while writing the data");
  1345. else if (!ret) Error("No data is written by DMA engine");
  1346. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  1347. }
  1348. break;
  1349. case ACCESS_FIFO:
  1350. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  1351. break;
  1352. default:
  1353. pcilib_write(handle, bar, addr, access, size / access, buf);
  1354. if (verify) {
  1355. pcilib_read(handle, bar, addr, access, size / access, check);
  1356. read_back = 1;
  1357. }
  1358. }
  1359. if ((read_back)&&(memcmp(buf, check, size))) {
  1360. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1361. if (endianess) pcilib_swap(check, check, abs(access), n);
  1362. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  1363. exit(-1);
  1364. }
  1365. free(check);
  1366. free(buf);
  1367. return 0;
  1368. }
  1369. int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  1370. pcilib_register_value_t *buf, *check;
  1371. int res, i, err;
  1372. unsigned long value;
  1373. int size = n * sizeof(pcilib_register_value_t);
  1374. err = posix_memalign( (void**)&buf, 256, size );
  1375. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1376. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1377. for (i = 0; i < n; i++) {
  1378. res = sscanf(data[i], "%lx", &value);
  1379. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1380. buf[i] = value;
  1381. }
  1382. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  1383. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1384. err = pcilib_read_register_space(handle, bank, addr, n, check);
  1385. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1386. if (memcmp(buf, check, size)) {
  1387. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1388. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  1389. exit(-1);
  1390. }
  1391. free(check);
  1392. free(buf);
  1393. return 0;
  1394. }
  1395. int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, char **data) {
  1396. int err = 0;
  1397. pcilib_value_t val = {0};
  1398. pcilib_register_value_t value, verify;
  1399. /*
  1400. pcilib_register_bank_t bank_id;
  1401. pcilib_register_bank_addr_t bank_addr;
  1402. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  1403. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  1404. format = model_info->banks[bank_id].format;
  1405. if (!format) format = "%lu";
  1406. */
  1407. err = pcilib_set_value_from_static_string(handle, &val, *data);
  1408. if (err) Error("Error (%i) setting value", err);
  1409. if (view) {
  1410. if (unit)
  1411. val.unit = unit;
  1412. if (reg) {
  1413. err = pcilib_write_register_view(handle, bank, reg, view, &val);
  1414. if (err) Error("Error writting view %s of register %s", view, reg);
  1415. printf("%s is written\n ", reg);
  1416. } else {
  1417. err = pcilib_set_property(handle, view, &val);
  1418. if (err) Error("Error setting property %s", view);
  1419. printf("%s is written\n ", view);
  1420. }
  1421. } else {
  1422. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1423. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  1424. value = pcilib_get_value_as_register_value(handle, &val, &err);
  1425. if (err) Error("Error (%i) parsing data value (%s)", *data);
  1426. err = pcilib_write_register(handle, bank, reg, value);
  1427. if (err) Error("Error writting register %s\n", reg);
  1428. if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) {
  1429. const char *format = (val.format?val.format:"%u");
  1430. err = pcilib_read_register(handle, bank, reg, &verify);
  1431. if (err) Error("Error reading back register %s for verification\n", reg);
  1432. if (verify != value) {
  1433. Error("Failed to write register %s: %lu is written and %lu is read back", reg, value, verify);
  1434. } else {
  1435. printf("%s = ", reg);
  1436. printf(format, verify);
  1437. printf("\n");
  1438. }
  1439. } else {
  1440. printf("%s is written\n ", reg);
  1441. }
  1442. }
  1443. return 0;
  1444. }
  1445. typedef struct {
  1446. pcilib_t *handle;
  1447. pcilib_event_t event;
  1448. pcilib_event_data_type_t data;
  1449. fastwriter_t *writer;
  1450. int verbose;
  1451. pcilib_timeout_t timeout;
  1452. size_t run_time;
  1453. size_t trigger_time;
  1454. size_t max_triggers;
  1455. pcilib_event_flags_t flags;
  1456. FORMAT format;
  1457. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1458. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1459. volatile int started; /**< Indicates that recording is started */
  1460. volatile int run_flag;
  1461. volatile int writing_flag;
  1462. struct timeval first_frame;
  1463. struct timeval last_frame;
  1464. size_t last_num, last_id;
  1465. size_t trigger_failed;
  1466. size_t trigger_count;
  1467. size_t event_count; /**< Total number of events (including bad ones, but excluding events expected, but not reported by hardware) */
  1468. size_t incomplete_count; /**< Broken events, we even can't extract appropriate block of raw data */
  1469. size_t broken_count; /**< Broken events, error while decoding in the requested format */
  1470. size_t empty_count; /**< Broken events, no associated data or unknown */
  1471. size_t missing_count; /**< Missing events, not received from the hardware */
  1472. size_t dropped_count; /**< Missing events, dropped due slow decoding/copying performance */
  1473. size_t storage_count; /**< Missing events, dropped due to slowness of the storage subsystem */
  1474. struct timeval start_time;
  1475. struct timeval stop_time;
  1476. } GRABContext;
  1477. int GrabCallback(pcilib_event_id_t event_id, const pcilib_event_info_t *info, void *user) {
  1478. int err = 0;
  1479. void *data;
  1480. size_t size;
  1481. GRABContext *ctx = (GRABContext*)user;
  1482. pcilib_t *handle = ctx->handle;
  1483. gettimeofday(&ctx->last_frame, NULL);
  1484. if (!ctx->event_count) {
  1485. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1486. }
  1487. ctx->event_pending = 0;
  1488. ctx->event_count++;
  1489. if (ctx->last_num) {
  1490. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1491. ctx->missing_count += missing_count;
  1492. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1493. if (missing_count)
  1494. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu (hwid: %zu) and %zu (hwid: %zu)", missing_count, ctx->last_id, ctx->last_num, event_id, info->seqnum);
  1495. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1496. }
  1497. ctx->last_num = info->seqnum;
  1498. ctx->last_id = event_id;
  1499. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1500. ctx->incomplete_count++;
  1501. return PCILIB_STREAMING_CONTINUE;
  1502. }
  1503. switch (ctx->format) {
  1504. case FORMAT_DEFAULT:
  1505. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_DATA, &size);
  1506. break;
  1507. default:
  1508. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_RAW_DATA, &size);
  1509. }
  1510. if (!data) {
  1511. int err = (int)size;
  1512. switch (err) {
  1513. case PCILIB_ERROR_OVERWRITTEN:
  1514. ctx->dropped_count++;
  1515. break;
  1516. case PCILIB_ERROR_INVALID_DATA:
  1517. ctx->broken_count++;
  1518. break;
  1519. default:
  1520. ctx->empty_count++;
  1521. }
  1522. return PCILIB_STREAMING_CONTINUE;
  1523. }
  1524. if (ctx->format == FORMAT_HEADER) {
  1525. uint64_t header[8];
  1526. header[0] = info->type;
  1527. header[1] = ctx->data;
  1528. header[2] = 0;
  1529. header[3] = size;
  1530. header[4] = info->seqnum;
  1531. header[5] = info->offset;
  1532. memcpy(header + 6, &info->timestamp, 16);
  1533. err = fastwriter_push(ctx->writer, 64, header);
  1534. }
  1535. if (!err)
  1536. err = fastwriter_push(ctx->writer, size, data);
  1537. if (err) {
  1538. fastwriter_cancel(ctx->writer);
  1539. if (err != EWOULDBLOCK)
  1540. Error("Storage error %i", err);
  1541. ctx->storage_count++;
  1542. pcilib_return_data(handle, event_id, ctx->data, data);
  1543. return PCILIB_STREAMING_CONTINUE;
  1544. }
  1545. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1546. if (err) {
  1547. ctx->dropped_count++;
  1548. fastwriter_cancel(ctx->writer);
  1549. return PCILIB_STREAMING_CONTINUE;
  1550. }
  1551. err = fastwriter_commit(ctx->writer);
  1552. if (err) Error("Error commiting data to storage, Error: %i", err);
  1553. return PCILIB_STREAMING_CONTINUE;
  1554. }
  1555. int raw_data(pcilib_event_id_t event_id, const pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1556. int err;
  1557. GRABContext *ctx = (GRABContext*)user;
  1558. // pcilib_t *handle = ctx->handle;
  1559. if ((info)&&(info->seqnum != ctx->last_num)) {
  1560. gettimeofday(&ctx->last_frame, NULL);
  1561. if (!ctx->event_count) {
  1562. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1563. }
  1564. ctx->event_count++;
  1565. if (ctx->last_num) {
  1566. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1567. ctx->missing_count += missing_count;
  1568. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1569. if (missing_count)
  1570. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu and %zu", missing_count, ctx->last_num, info->seqnum);
  1571. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1572. }
  1573. ctx->last_num = info->seqnum;
  1574. }
  1575. err = fastwriter_push_data(ctx->writer, size, data);
  1576. if (err) {
  1577. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1578. Error("Storage error %i", err);
  1579. }
  1580. return PCILIB_STREAMING_CONTINUE;
  1581. }
  1582. void *Trigger(void *user) {
  1583. int err;
  1584. struct timeval start;
  1585. GRABContext *ctx = (GRABContext*)user;
  1586. size_t trigger_time = ctx->trigger_time;
  1587. size_t max_triggers = ctx->max_triggers;
  1588. ctx->trigger_thread_started = 1;
  1589. ctx->event_pending = 1;
  1590. while (!ctx->started) ;
  1591. gettimeofday(&start, NULL);
  1592. do {
  1593. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1594. if (err) ctx->trigger_failed++;
  1595. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1596. if (trigger_time) {
  1597. pcilib_add_timeout(&start, trigger_time);
  1598. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1599. pcilib_sleep_until_deadline(&start);
  1600. } else {
  1601. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1602. ctx->event_pending = 1;
  1603. }
  1604. } while (ctx->run_flag);
  1605. ctx->trigger_thread_started = 0;
  1606. return NULL;
  1607. }
  1608. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1609. int verbose;
  1610. pcilib_timeout_t duration, fps_duration;
  1611. struct timeval cur;
  1612. double fps = 0, good_fps = 0;
  1613. size_t total, good, pending = 0;
  1614. verbose = ctx->verbose;
  1615. if (end_time) {
  1616. if (verbose++) {
  1617. printf("-------------------------------------------------------------------------------\n");
  1618. }
  1619. } else {
  1620. gettimeofday(&cur, NULL);
  1621. end_time = &cur;
  1622. }
  1623. // if ((ctx->event_count + ctx->missing_count) == 0)
  1624. // return;
  1625. duration = pcilib_timediff(&ctx->start_time, end_time);
  1626. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1627. if (ctx->trigger_count) {
  1628. total = ctx->trigger_count;
  1629. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1630. } else {
  1631. total = ctx->event_count + ctx->missing_count;
  1632. }
  1633. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count - ctx->empty_count - ctx->dropped_count;
  1634. if (ctx->event_count > 1) {
  1635. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1636. }
  1637. if (good > 1) {
  1638. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1639. }
  1640. printf("Run: ");
  1641. PrintTime(duration);
  1642. if (ctx->trigger_count) {
  1643. printf(", Triggers: ");
  1644. PrintNumber(ctx->trigger_count);
  1645. }
  1646. printf(", Captured: ");
  1647. PrintNumber(ctx->event_count);
  1648. printf(" FPS %5.0lf", fps);
  1649. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1650. printf(", Stored: ");
  1651. PrintNumber(good);
  1652. printf(" FPS %5.0lf", good_fps);
  1653. }
  1654. printf("\n");
  1655. if (verbose > 2) {
  1656. if (ctx->trigger_count) {
  1657. printf("Trig: ");
  1658. PrintNumber(ctx->trigger_count);
  1659. printf(" Issued: ");
  1660. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1661. printf(" (");
  1662. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1663. printf("%%) Failed: ");
  1664. PrintNumber(ctx->trigger_failed);
  1665. printf( " (");
  1666. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1667. printf( "%%); Pending: ");
  1668. PrintNumber(pending);
  1669. printf( " (");
  1670. PrintPercent(pending, ctx->trigger_count);
  1671. printf( "%%)\n");
  1672. }
  1673. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1674. printf("Captured: ");
  1675. PrintNumber(good);
  1676. } else {
  1677. printf("Good: ");
  1678. PrintNumber(good);
  1679. printf(", Dropped: ");
  1680. PrintNumber(ctx->dropped_count + ctx->storage_count);
  1681. printf(", Bad: ");
  1682. PrintNumber(ctx->incomplete_count + ctx->broken_count);
  1683. printf(", Empty: ");
  1684. PrintNumber(ctx->empty_count);
  1685. }
  1686. printf(", Lost: ");
  1687. PrintNumber(ctx->missing_count);
  1688. printf("\n");
  1689. }
  1690. if (verbose > 1) {
  1691. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1692. printf("Captured: ");
  1693. PrintPercent(good, total);
  1694. } else {
  1695. printf("Good: ");
  1696. PrintPercent(good, total);
  1697. printf("%% Dropped: ");
  1698. PrintPercent(ctx->dropped_count + ctx->storage_count, total);
  1699. printf("%% Bad: ");
  1700. PrintPercent(ctx->incomplete_count + ctx->broken_count, total);
  1701. printf("%% Empty: ");
  1702. PrintPercent(ctx->empty_count, total);
  1703. }
  1704. printf("%% Lost: ");
  1705. PrintPercent(ctx->missing_count, total);
  1706. printf("%%");
  1707. printf("\n");
  1708. }
  1709. }
  1710. void StorageStats(GRABContext *ctx) {
  1711. int err;
  1712. fastwriter_stats_t st;
  1713. pcilib_timeout_t duration;
  1714. struct timeval cur;
  1715. gettimeofday(&cur, NULL);
  1716. duration = pcilib_timediff(&ctx->start_time, &cur);
  1717. err = fastwriter_get_stats(ctx->writer, &st);
  1718. if (err) return;
  1719. printf("Wrote ");
  1720. PrintSize(st.written);
  1721. printf(" of ");
  1722. PrintSize(st.commited);
  1723. printf(" at ");
  1724. PrintSize(1000000.*st.written / duration);
  1725. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1726. printf(" of ");
  1727. PrintSize(st.buffer_size);
  1728. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1729. }
  1730. void *Monitor(void *user) {
  1731. struct timeval deadline;
  1732. struct timeval nextinfo;
  1733. GRABContext *ctx = (GRABContext*)user;
  1734. int verbose = ctx->verbose;
  1735. pcilib_timeout_t timeout = ctx->timeout;
  1736. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1737. // while (!ctx->started);
  1738. if (timeout) {
  1739. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1740. pcilib_add_timeout(&deadline, timeout);
  1741. }
  1742. if (verbose > 0) {
  1743. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1744. }
  1745. while (ctx->run_flag) {
  1746. if (StopFlag) {
  1747. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1748. break;
  1749. }
  1750. if (timeout) {
  1751. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1752. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1753. pcilib_add_timeout(&deadline, timeout);
  1754. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1755. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1756. break;
  1757. }
  1758. }
  1759. }
  1760. if (verbose > 0) {
  1761. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1762. GrabStats(ctx, NULL);
  1763. StorageStats(ctx);
  1764. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1765. }
  1766. }
  1767. usleep(100000);
  1768. }
  1769. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1770. while (ctx->writing_flag) {
  1771. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1772. if (verbose >= 0) StorageStats(ctx);
  1773. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1774. }
  1775. usleep(100000);
  1776. }
  1777. return NULL;
  1778. }
  1779. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1780. int err;
  1781. GRABContext ctx;
  1782. // void *data = NULL;
  1783. // size_t size, written;
  1784. pcilib_event_t event;
  1785. pcilib_event_t listen_events;
  1786. pcilib_event_data_type_t data;
  1787. pthread_t monitor_thread;
  1788. pthread_t trigger_thread;
  1789. pthread_attr_t attr;
  1790. struct sched_param sched;
  1791. struct timeval end_time;
  1792. pcilib_event_flags_t flags;
  1793. if (evname) {
  1794. event = pcilib_find_event(handle, evname);
  1795. if (event == PCILIB_EVENT_INVALID)
  1796. Error("Can't find event (%s)", evname);
  1797. listen_events = event;
  1798. } else {
  1799. listen_events = PCILIB_EVENTS_ALL;
  1800. event = PCILIB_EVENT0;
  1801. }
  1802. if (data_type) {
  1803. data = pcilib_find_event_data_type(handle, event, data_type);
  1804. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1805. Error("Can't find data type (%s)", data_type);
  1806. } else {
  1807. data = PCILIB_EVENT_DATA;
  1808. }
  1809. memset(&ctx, 0, sizeof(GRABContext));
  1810. ctx.handle = handle;
  1811. ctx.event = event;
  1812. ctx.data = data;
  1813. ctx.run_time = run_time;
  1814. ctx.timeout = timeout;
  1815. ctx.format = format;
  1816. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1817. else ctx.verbose = 0;
  1818. if (grab_mode&GRAB_MODE_GRAB) {
  1819. ctx.writer = fastwriter_init(output, 0);
  1820. if (!ctx.writer)
  1821. Error("Can't initialize fastwritter library");
  1822. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1823. err = fastwriter_open(ctx.writer, output, 0);
  1824. if (err)
  1825. Error("Error opening file (%s), Error: %i\n", output, err);
  1826. ctx.writing_flag = 1;
  1827. }
  1828. ctx.run_flag = 1;
  1829. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1830. if (data == PCILIB_EVENT_RAW_DATA) {
  1831. if (format == FORMAT_RAW) {
  1832. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1833. }
  1834. } else {
  1835. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1836. }
  1837. ctx.flags = flags;
  1838. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1839. pcilib_configure_autostop(handle, num, run_time);
  1840. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1841. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1842. }
  1843. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1844. pcilib_write_register(handle, "conf", "max_threads", threads);
  1845. }
  1846. if (grab_mode&GRAB_MODE_TRIGGER) {
  1847. if (trigger_time) {
  1848. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1849. timeout = 2 * trigger_time;
  1850. ctx.timeout = timeout;
  1851. }
  1852. } else {
  1853. // Otherwise, we will trigger next event after previous one is read
  1854. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1855. }
  1856. ctx.max_triggers = num;
  1857. ctx.trigger_count = 0;
  1858. ctx.trigger_time = trigger_time;
  1859. // We don't really care if RT priority is imposible
  1860. pthread_attr_init(&attr);
  1861. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1862. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1863. pthread_attr_setschedparam(&attr, &sched);
  1864. }
  1865. // Start triggering thread and wait until it is schedulled
  1866. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1867. Error("Error spawning trigger thread");
  1868. while (!ctx.trigger_thread_started) usleep(10);
  1869. }
  1870. gettimeofday(&ctx.start_time, NULL);
  1871. if (grab_mode&GRAB_MODE_GRAB) {
  1872. err = pcilib_start(handle, listen_events, flags);
  1873. if (err) Error("Failed to start event engine, error %i", err);
  1874. }
  1875. ctx.started = 1;
  1876. if (run_time) {
  1877. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1878. if (ctx.stop_time.tv_usec > 999999) {
  1879. ctx.stop_time.tv_usec -= 1000000;
  1880. __sync_synchronize();
  1881. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1882. } else {
  1883. __sync_synchronize();
  1884. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1885. }
  1886. }
  1887. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1888. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1889. Error("Error spawning monitoring thread");
  1890. if (grab_mode&GRAB_MODE_GRAB) {
  1891. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1892. if (err) Error("Error streaming events, error %i", err);
  1893. }
  1894. ctx.run_flag = 0;
  1895. if (grab_mode&GRAB_MODE_TRIGGER) {
  1896. while (ctx.trigger_thread_started) usleep(10);
  1897. }
  1898. if (grab_mode&GRAB_MODE_GRAB) {
  1899. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1900. }
  1901. gettimeofday(&end_time, NULL);
  1902. if (grab_mode&GRAB_MODE_TRIGGER) {
  1903. pthread_join(trigger_thread, NULL);
  1904. }
  1905. if (grab_mode&GRAB_MODE_GRAB) {
  1906. if (verbose >= 0)
  1907. printf("Grabbing is finished, flushing results....\n");
  1908. err = fastwriter_close(ctx.writer);
  1909. if (err) Error("Storage problems, error %i", err);
  1910. }
  1911. ctx.writing_flag = 0;
  1912. pthread_join(monitor_thread, NULL);
  1913. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1914. GrabStats(&ctx, &end_time);
  1915. StorageStats(&ctx);
  1916. }
  1917. fastwriter_destroy(ctx.writer);
  1918. return 0;
  1919. }
  1920. int StartStopDMA(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1921. int err;
  1922. pcilib_dma_engine_t dmaid;
  1923. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1924. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  1925. if (start) Error("DMA engine should be specified");
  1926. for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
  1927. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1928. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1929. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1930. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1931. }
  1932. return 0;
  1933. }
  1934. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1935. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1936. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1937. if (start) {
  1938. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1939. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1940. } else {
  1941. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1942. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1943. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1944. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1945. }
  1946. }
  1947. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1948. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1949. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1950. if (start) {
  1951. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1952. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1953. } else {
  1954. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_STOP);
  1955. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1956. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1957. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1958. }
  1959. }
  1960. return 0;
  1961. }
  1962. typedef struct {
  1963. pcilib_kmem_use_t use;
  1964. int referenced;
  1965. int hw_lock;
  1966. int reusable;
  1967. int persistent;
  1968. int open;
  1969. size_t count;
  1970. size_t size;
  1971. } kmem_use_info_t;
  1972. #define MAX_USES 64
  1973. pcilib_kmem_use_t ParseUse(const char *use) {
  1974. unsigned long utmp;
  1975. if (use) {
  1976. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1977. if (strlen(use) < 5)
  1978. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1979. else
  1980. return utmp;
  1981. }
  1982. Error("Kernel memory use is not specified");
  1983. return 0;
  1984. }
  1985. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1986. size_t i, n = *n_uses;
  1987. if (uses[n - 1].use == use) return n - 1;
  1988. for (i = 1; i < (n - 1); i++) {
  1989. if (uses[i].use == use) return i;
  1990. }
  1991. if (n == MAX_USES) return 0;
  1992. memset(&uses[n], 0, sizeof(kmem_use_info_t));
  1993. uses[n].use = use;
  1994. return (*n_uses)++;
  1995. }
  1996. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1997. size_t i;
  1998. for (i = 0; i < n_uses; i++) {
  1999. if (uses[i].use == use) {
  2000. if (uses[i].count) return uses + i;
  2001. else return NULL;
  2002. }
  2003. }
  2004. return NULL;
  2005. }
  2006. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  2007. DIR *dir;
  2008. struct dirent *entry;
  2009. const char *pos;
  2010. char sysdir[256];
  2011. char fname[256];
  2012. char info[256];
  2013. size_t useid, n_uses = 1; // Use 0 is for others
  2014. memset(uses, 0, sizeof(kmem_use_info_t));
  2015. pos = strrchr(device, '/');
  2016. if (pos) ++pos;
  2017. else pos = device;
  2018. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  2019. dir = opendir(sysdir);
  2020. if (!dir) Error("Can't open directory (%s)", sysdir);
  2021. while ((entry = readdir(dir)) != NULL) {
  2022. FILE *f;
  2023. unsigned long use = 0;
  2024. unsigned long size = 0;
  2025. unsigned long refs = 0;
  2026. unsigned long mode = 0;
  2027. unsigned long hwref = 0;
  2028. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  2029. if (!isnumber(entry->d_name+4)) continue;
  2030. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  2031. f = fopen(fname, "r");
  2032. if (!f) Error("Can't access file (%s)", fname);
  2033. while(!feof(f)) {
  2034. if (!fgets(info, 256, f))
  2035. break;
  2036. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  2037. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  2038. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  2039. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2040. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2041. }
  2042. fclose(f);
  2043. useid = FindUse(&n_uses, uses, use);
  2044. uses[useid].count++;
  2045. uses[useid].size += size;
  2046. if (refs) uses[useid].referenced = 1;
  2047. if (hwref) uses[useid].hw_lock = 1;
  2048. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  2049. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  2050. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  2051. }
  2052. closedir(dir);
  2053. *uses_number = n_uses;
  2054. return 0;
  2055. }
  2056. int ListKMEM(pcilib_t *handle, const char *device) {
  2057. int err;
  2058. char stmp[256];
  2059. size_t i, useid, n_uses;
  2060. kmem_use_info_t uses[MAX_USES];
  2061. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  2062. err = ParseKMEM(handle, device, &n_uses, uses);
  2063. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  2064. if ((n_uses == 1)&&(uses[0].count == 0)) {
  2065. printf("No kernel memory is allocated\n");
  2066. return 0;
  2067. }
  2068. printf("Use Type Count Total Size REF Mode \n");
  2069. printf("--------------------------------------------------------------------------------\n");
  2070. for (useid = 0; useid < n_uses; useid++) {
  2071. if (useid + 1 == n_uses) {
  2072. if (!uses[0].count) continue;
  2073. i = 0;
  2074. } else i = useid + 1;
  2075. printf("%08x ", uses[i].use);
  2076. if (i) {
  2077. switch(PCILIB_KMEM_USE_TYPE(uses[i].use)) {
  2078. case PCILIB_KMEM_USE_DMA_RING:
  2079. printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  2080. break;
  2081. case PCILIB_KMEM_USE_DMA_PAGES:
  2082. printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  2083. break;
  2084. case PCILIB_KMEM_USE_SOFTWARE_REGISTERS: {
  2085. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  2086. if (bank == PCILIB_REGISTER_BANK_INVALID)
  2087. printf("SoftRegs (%8u)", PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  2088. else
  2089. printf("SoftRegs (%8s)", model_info->banks[bank].name);
  2090. break;
  2091. }
  2092. case PCILIB_KMEM_USE_LOCKS:
  2093. printf("Locks ");
  2094. break;
  2095. case PCILIB_KMEM_USE_USER:
  2096. printf("User %04x ", uses[i].use&0xFFFF);
  2097. break;
  2098. default:
  2099. printf (" ");
  2100. }
  2101. } else printf("All Others ");
  2102. printf(" ");
  2103. printf("%6zu", uses[i].count);
  2104. printf(" ");
  2105. printf("%10s", GetPrintSize(stmp, uses[i].size));
  2106. printf(" ");
  2107. if ((uses[i].referenced)&&(uses[i].hw_lock)) printf("HW+SW");
  2108. else if (uses[i].referenced) printf(" SW");
  2109. else if (uses[i].hw_lock) printf("HW ");
  2110. else printf(" - ");
  2111. printf(" ");
  2112. if (uses[i].persistent) printf("Persistent");
  2113. else if (uses[i].open) printf("Open ");
  2114. else if (uses[i].reusable) printf("Reusable ");
  2115. else printf("Closed ");
  2116. printf("\n");
  2117. }
  2118. printf("--------------------------------------------------------------------------------\n");
  2119. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  2120. return 0;
  2121. }
  2122. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  2123. int err;
  2124. size_t i, n;
  2125. pcilib_kmem_handle_t *kbuf;
  2126. pcilib_kmem_use_t useid = ParseUse(use);
  2127. size_t n_uses;
  2128. kmem_use_info_t uses[MAX_USES];
  2129. kmem_use_info_t *use_info;
  2130. if (block == (size_t)-1) {
  2131. err = ParseKMEM(handle, device, &n_uses, uses);
  2132. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  2133. use_info = GetUse(n_uses, uses, useid);
  2134. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  2135. i = 0;
  2136. n = use_info->count;
  2137. } else {
  2138. i = block;
  2139. n = block + 1;
  2140. }
  2141. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  2142. if (!kbuf) {
  2143. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  2144. return 0;
  2145. }
  2146. printf("Buffer Address Hardware Address Bus Address\n");
  2147. printf("--------------------------------------------------------------------------------\n");
  2148. for (; i < n; i++) {
  2149. void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  2150. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  2151. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  2152. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  2153. }
  2154. printf("\n");
  2155. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2156. return 0;
  2157. }
  2158. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  2159. int err;
  2160. void *data;
  2161. size_t size;
  2162. pcilib_kmem_handle_t *kbuf;
  2163. if (block == (size_t)-1) block = 0;
  2164. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  2165. if (!kbuf) {
  2166. Error("The specified kernel buffer is not allocated\n");
  2167. return 0;
  2168. }
  2169. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  2170. if (err) {
  2171. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2172. Error("The synchronization of kernel buffer has failed\n");
  2173. return 0;
  2174. }
  2175. data = pcilib_kmem_get_block_ua(handle, kbuf, block);
  2176. if (data) {
  2177. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  2178. if ((max_size)&&(size > max_size)) size = max_size;
  2179. fwrite(data, 1, size, o?o:stdout);
  2180. } else {
  2181. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2182. Error("The specified block is not existing\n");
  2183. return 0;
  2184. }
  2185. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2186. return 0;
  2187. }
  2188. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  2189. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  2190. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  2191. pcilib_kmem_handle_t *kbuf;
  2192. pcilib_kmem_use_t useid = ParseUse(use);
  2193. long page_size = sysconf(_SC_PAGESIZE);
  2194. if (type) {
  2195. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  2196. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  2197. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  2198. else Error("Invalid memory type (%s) is specified", type);
  2199. }
  2200. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  2201. Error("Selected memory type does not allow custom size");
  2202. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  2203. if (!kbuf) Error("Allocation of kernel memory has failed");
  2204. pcilib_free_kernel_memory(handle, kbuf, flags);
  2205. return 0;
  2206. }
  2207. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  2208. int err;
  2209. int i;
  2210. pcilib_kmem_use_t useid;
  2211. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  2212. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  2213. if (!strcasecmp(use, "dma")) {
  2214. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  2215. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  2216. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  2217. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  2218. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  2219. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  2220. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  2221. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  2222. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  2223. }
  2224. return 0;
  2225. }
  2226. useid = ParseUse(use);
  2227. err = pcilib_clean_kernel_memory(handle, useid, flags);
  2228. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  2229. return 0;
  2230. }
  2231. int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
  2232. int err;
  2233. DIR *dir;
  2234. struct dirent *entry;
  2235. const char *pos;
  2236. char sysdir[256];
  2237. char fname[256];
  2238. char info[256];
  2239. char stmp[256];
  2240. pcilib_dma_engine_t dmaid;
  2241. pcilib_dma_engine_status_t status;
  2242. pos = strrchr(device, '/');
  2243. if (pos) ++pos;
  2244. else pos = device;
  2245. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  2246. dir = opendir(sysdir);
  2247. if (!dir) Error("Can't open directory (%s)", sysdir);
  2248. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  2249. printf("--------------------------------------------------------------------------------\n");
  2250. while ((entry = readdir(dir)) != NULL) {
  2251. FILE *f;
  2252. unsigned long use = 0;
  2253. // unsigned long size = 0;
  2254. // unsigned long refs = 0;
  2255. unsigned long mode = 0;
  2256. // unsigned long hwref = 0;
  2257. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  2258. if (!isnumber(entry->d_name+4)) continue;
  2259. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  2260. f = fopen(fname, "r");
  2261. if (!f) Error("Can't access file (%s)", fname);
  2262. while(!feof(f)) {
  2263. if (!fgets(info, 256, f))
  2264. break;
  2265. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  2266. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  2267. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  2268. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2269. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2270. }
  2271. fclose(f);
  2272. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  2273. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  2274. if (use&0x80) {
  2275. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  2276. } else {
  2277. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  2278. }
  2279. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  2280. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  2281. err = pcilib_start_dma(handle, dmaid, 0);
  2282. if (err) {
  2283. printf("-- Wrong state, start is failed\n");
  2284. continue;
  2285. }
  2286. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2287. if (err) {
  2288. printf("-- Wrong state, failed to obtain status\n");
  2289. pcilib_stop_dma(handle, dmaid, 0);
  2290. continue;
  2291. }
  2292. pcilib_stop_dma(handle, dmaid, 0);
  2293. if (status.started) printf("S");
  2294. else printf(" ");
  2295. if (status.ring_head == status.ring_tail) printf(" ");
  2296. else printf("D");
  2297. printf(" ");
  2298. printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  2299. printf(" ");
  2300. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  2301. printf("\n");
  2302. }
  2303. closedir(dir);
  2304. printf("--------------------------------------------------------------------------------\n");
  2305. printf("S - Started, D - Data in buffers\n");
  2306. return 0;
  2307. }
  2308. int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  2309. int err;
  2310. size_t i;
  2311. pcilib_dma_engine_t dmaid;
  2312. pcilib_dma_engine_status_t status;
  2313. pcilib_dma_buffer_status_t *buffer;
  2314. char stmp[256];
  2315. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2316. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2317. err = pcilib_start_dma(handle, dmaid, 0);
  2318. if (err) Error("Error starting the specified DMA engine");
  2319. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2320. if (err) Error("Failed to obtain status of the specified DMA engine");
  2321. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2322. if (!buffer) Error("Failed to allocate memory for status buffer");
  2323. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2324. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2325. printf("Buffer Status Total Size \n");
  2326. printf("--------------------------------------------------------------------------------\n");
  2327. for (i = 0; i < status.ring_size; i++) {
  2328. printf("%8zu ", i);
  2329. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  2330. printf("%10s", GetPrintSize(stmp, buffer[i].size));
  2331. printf("\n");
  2332. }
  2333. printf("--------------------------------------------------------------------------------\n");
  2334. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  2335. free(buffer);
  2336. pcilib_stop_dma(handle, dmaid, 0);
  2337. return 0;
  2338. }
  2339. int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  2340. int err;
  2341. pcilib_dma_engine_t dmaid;
  2342. pcilib_dma_engine_status_t status;
  2343. pcilib_dma_buffer_status_t *buffer;
  2344. size_t size;
  2345. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2346. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2347. err = pcilib_start_dma(handle, dmaid, 0);
  2348. if (err) Error("Error starting the specified DMA engine");
  2349. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2350. if (err) Error("Failed to obtain status of the specified DMA engine");
  2351. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2352. if (!buffer) Error("Failed to allocate memory for status buffer");
  2353. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2354. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2355. if (block == (size_t)-1) {
  2356. // get current
  2357. }
  2358. size = buffer[block].size;
  2359. free(buffer);
  2360. pcilib_stop_dma(handle, dmaid, 0);
  2361. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  2362. }
  2363. int ListLocks(pcilib_t *ctx, int verbose) {
  2364. int err;
  2365. pcilib_lock_id_t i;
  2366. if (verbose)
  2367. printf("ID Refs Flags Locked Name\n");
  2368. else
  2369. printf("ID Refs Flags Name\n");
  2370. printf("--------------------------------------------------------------------------------\n");
  2371. for (i = 0; i < PCILIB_MAX_LOCKS; i++) {
  2372. pcilib_lock_t *lock = pcilib_get_lock_by_id(ctx, i);
  2373. const char *name = pcilib_lock_get_name(lock);
  2374. if (!name) break;
  2375. pcilib_lock_flags_t flags = pcilib_lock_get_flags(lock);
  2376. size_t refs = pcilib_lock_get_refs(lock);
  2377. printf("%4u %4zu ", i, refs);
  2378. if (flags&PCILIB_LOCK_FLAG_PERSISTENT) printf("P");
  2379. else printf(" ");
  2380. printf(" ");
  2381. if (verbose) {
  2382. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, PCILIB_TIMEOUT_IMMEDIATE);
  2383. switch (err) {
  2384. case 0:
  2385. pcilib_unlock(lock);
  2386. printf("No ");
  2387. break;
  2388. case PCILIB_ERROR_TIMEOUT:
  2389. printf("Yes ");
  2390. break;
  2391. default:
  2392. printf("Err: %3i ", err);
  2393. }
  2394. }
  2395. printf("%s\n", name);
  2396. }
  2397. printf("--------------------------------------------------------------------------------\n");
  2398. printf("P - Persistent\n");
  2399. return 0;
  2400. }
  2401. int FreeLocks(pcilib_t *handle, int force) {
  2402. return pcilib_destroy_all_locks(handle, force);
  2403. }
  2404. int LockUnlock(pcilib_t *handle, const char *name, int do_lock, pcilib_timeout_t timeout) {
  2405. int err = 0;
  2406. pcilib_lock_t *lock = pcilib_get_lock(handle, PCILIB_LOCK_FLAG_PERSISTENT, name);
  2407. if (!lock) Error("Error getting persistent lock %s", name);
  2408. if (do_lock)
  2409. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, timeout);
  2410. else
  2411. pcilib_unlock(lock);
  2412. if (err) {
  2413. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2414. switch (err) {
  2415. case PCILIB_ERROR_TIMEOUT:
  2416. printf("Timeout locking %s\n", name);
  2417. break;
  2418. default:
  2419. Error("Error (%i) locking %s", err, name);
  2420. }
  2421. } else if (do_lock) {
  2422. pcilib_lock_ref(lock);
  2423. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2424. printf("%s is locked\n", name);
  2425. } else {
  2426. pcilib_lock_unref(lock);
  2427. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2428. }
  2429. return err;
  2430. }
  2431. int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2432. int err;
  2433. err = pcilib_enable_irq(handle, irq_type, 0);
  2434. if (err) {
  2435. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2436. Error("Error enabling IRQs");
  2437. }
  2438. return err;
  2439. }
  2440. int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2441. int err;
  2442. err = pcilib_disable_irq(handle, 0);
  2443. if (err) {
  2444. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2445. Error("Error disabling IRQs");
  2446. }
  2447. return err;
  2448. }
  2449. int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  2450. pcilib_clear_irq(handle, irq_source);
  2451. return 0;
  2452. }
  2453. int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  2454. int err;
  2455. size_t count;
  2456. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  2457. if (err) {
  2458. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  2459. else Error("Error waiting for IRQ");
  2460. }
  2461. return 0;
  2462. }
  2463. int main(int argc, char **argv) {
  2464. int err = 0;
  2465. int i;
  2466. long itmp;
  2467. size_t ztmp;
  2468. unsigned char c;
  2469. const char *stmp;
  2470. const char *num_offset;
  2471. int details = 0;
  2472. int verbose = 0;
  2473. int quiete = 0;
  2474. int force = 0;
  2475. int verify = 0;
  2476. pcilib_log_priority_t log_priority;
  2477. const char *model = NULL;
  2478. const pcilib_model_description_t *model_info;
  2479. const pcilib_dma_description_t *dma_info;
  2480. MODE mode = MODE_INVALID;
  2481. GRAB_MODE grab_mode = 0;
  2482. size_t trigger_time = 0;
  2483. size_t run_time = 0;
  2484. size_t buffer = 0;
  2485. size_t threads = 1;
  2486. FORMAT format = FORMAT_DEFAULT;
  2487. PARTITION partition = PARTITION_UNKNOWN;
  2488. FLAGS flags = 0;
  2489. const char *atype = NULL;
  2490. const char *type = NULL;
  2491. ACCESS_MODE amode = ACCESS_BAR;
  2492. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  2493. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  2494. const char *addr = NULL;
  2495. const char *reg = NULL;
  2496. const char *view = NULL;
  2497. const char *unit = NULL;
  2498. const char *attr = NULL;
  2499. const char *bank = NULL;
  2500. char **data = NULL;
  2501. const char *event = NULL;
  2502. const char *data_type = NULL;
  2503. const char *dma_channel = NULL;
  2504. const char *use = NULL;
  2505. const char *lock = NULL;
  2506. const char *info_target = NULL;
  2507. const char *list_target = NULL;
  2508. size_t block = (size_t)-1;
  2509. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  2510. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  2511. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  2512. pcilib_kmem_use_t useid = 0;
  2513. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  2514. long addr_shift = 0;
  2515. uintptr_t start = -1;
  2516. size_t block_size = 0;
  2517. size_t size = 1;
  2518. access_t access = 4;
  2519. // int skip = 0;
  2520. int endianess = 0;
  2521. size_t timeout = 0;
  2522. size_t alignment = 0;
  2523. const char *output = NULL;
  2524. FILE *ofile = NULL;
  2525. size_t iterations = BENCHMARK_ITERATIONS;
  2526. unsigned long dma_mask = 0;
  2527. unsigned long pcie_mps = 0;
  2528. pcilib_t *handle;
  2529. int size_set = 0;
  2530. int timeout_set = 0;
  2531. // int run_time_set = 0;
  2532. struct sched_param sched_param = {0};
  2533. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  2534. extern int optind;
  2535. switch (c) {
  2536. case OPT_HELP:
  2537. Usage(argc, argv, NULL);
  2538. break;
  2539. case OPT_VERSION:
  2540. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2541. mode = MODE_VERSION;
  2542. break;
  2543. case OPT_INFO:
  2544. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2545. if (optarg) info_target = optarg;
  2546. else if ((optind < argc)&&(argv[optind][0] != '-')) info_target = argv[optind++];
  2547. mode = MODE_INFO;
  2548. break;
  2549. case OPT_LIST:
  2550. if (mode == MODE_LIST) details++;
  2551. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2552. if (optarg) list_target = optarg;
  2553. else if ((optind < argc)&&(argv[optind][0] != '-')) list_target = argv[optind++];
  2554. mode = MODE_LIST;
  2555. break;
  2556. case OPT_RESET:
  2557. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2558. mode = MODE_RESET;
  2559. break;
  2560. case OPT_BENCHMARK:
  2561. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2562. mode = MODE_BENCHMARK;
  2563. if (optarg) addr = optarg;
  2564. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2565. break;
  2566. case OPT_READ:
  2567. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2568. mode = MODE_READ;
  2569. if (optarg) addr = optarg;
  2570. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2571. break;
  2572. case OPT_WRITE:
  2573. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2574. mode = MODE_WRITE;
  2575. if (optarg) addr = optarg;
  2576. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2577. break;
  2578. case OPT_GRAB:
  2579. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  2580. mode = MODE_GRAB;
  2581. grab_mode |= GRAB_MODE_GRAB;
  2582. stmp = NULL;
  2583. if (optarg) stmp = optarg;
  2584. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2585. if (stmp) {
  2586. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2587. event = stmp;
  2588. }
  2589. break;
  2590. case OPT_TRIGGER:
  2591. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  2592. mode = MODE_GRAB;
  2593. grab_mode |= GRAB_MODE_TRIGGER;
  2594. stmp = NULL;
  2595. if (optarg) stmp = optarg;
  2596. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2597. if (stmp) {
  2598. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2599. event = stmp;
  2600. }
  2601. break;
  2602. case OPT_LIST_DMA:
  2603. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2604. mode = MODE_LIST_DMA;
  2605. break;
  2606. case OPT_LIST_DMA_BUFFERS:
  2607. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2608. mode = MODE_LIST_DMA_BUFFERS;
  2609. dma_channel = optarg;
  2610. break;
  2611. case OPT_READ_DMA_BUFFER:
  2612. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2613. mode = MODE_READ_DMA_BUFFER;
  2614. num_offset = strchr(optarg, ':');
  2615. if (num_offset) {
  2616. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2617. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2618. *(char*)num_offset = 0;
  2619. } else block = (size_t)-1;
  2620. dma_channel = optarg;
  2621. break;
  2622. case OPT_START_DMA:
  2623. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2624. mode = MODE_START_DMA;
  2625. if (optarg) dma_channel = optarg;
  2626. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2627. break;
  2628. case OPT_STOP_DMA:
  2629. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2630. mode = MODE_STOP_DMA;
  2631. if (optarg) dma_channel = optarg;
  2632. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2633. break;
  2634. case OPT_ENABLE_IRQ:
  2635. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2636. mode = MODE_ENABLE_IRQ;
  2637. if (optarg) num_offset = optarg;
  2638. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2639. else num_offset = NULL;
  2640. if (num_offset) {
  2641. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2642. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2643. irq_type = itmp;
  2644. }
  2645. break;
  2646. case OPT_DISABLE_IRQ:
  2647. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2648. mode = MODE_DISABLE_IRQ;
  2649. if (optarg) num_offset = optarg;
  2650. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2651. else num_offset = NULL;
  2652. if (num_offset) {
  2653. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2654. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2655. irq_type = itmp;
  2656. }
  2657. break;
  2658. case OPT_ACK_IRQ:
  2659. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2660. mode = MODE_ACK_IRQ;
  2661. if (optarg) num_offset = optarg;
  2662. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2663. else num_offset = NULL;
  2664. if (num_offset) {
  2665. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2666. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2667. irq_source = itmp;
  2668. }
  2669. break;
  2670. case OPT_WAIT_IRQ:
  2671. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2672. mode = MODE_WAIT_IRQ;
  2673. if (optarg) num_offset = optarg;
  2674. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2675. else num_offset = NULL;
  2676. if (num_offset) {
  2677. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2678. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2679. irq_source = itmp;
  2680. }
  2681. break;
  2682. case OPT_SET_DMASK:
  2683. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2684. mode = MODE_SET_DMASK;
  2685. if ((!isnumber(optarg))||(sscanf(optarg, "%lu", &dma_mask) != 1)||(dma_mask<24)||(dma_mask>64))
  2686. Usage(argc, argv, "Invalid DMA mask is specified (%s)", optarg);
  2687. break;
  2688. case OPT_SET_MPS:
  2689. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2690. mode = MODE_SET_MPS;
  2691. if ((!isnumber(optarg))||(sscanf(optarg, "%lu", &pcie_mps) != 1)||(pcie_mps<128)||(pcie_mps>2048))
  2692. Usage(argc, argv, "Invalid payload size is specified (%s)", optarg);
  2693. break;
  2694. case OPT_LIST_KMEM:
  2695. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2696. mode = MODE_LIST_KMEM;
  2697. if (optarg) use = optarg;
  2698. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2699. else use = NULL;
  2700. if (use) {
  2701. num_offset = strchr(use, ':');
  2702. if (num_offset) {
  2703. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2704. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2705. *(char*)num_offset = 0;
  2706. }
  2707. }
  2708. break;
  2709. case OPT_READ_KMEM:
  2710. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2711. mode = MODE_READ_KMEM;
  2712. if (!model) model = "pci";
  2713. num_offset = strchr(optarg, ':');
  2714. if (num_offset) {
  2715. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2716. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2717. *(char*)num_offset = 0;
  2718. }
  2719. use = optarg;
  2720. useid = ParseUse(use);
  2721. break;
  2722. case OPT_ALLOC_KMEM:
  2723. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2724. mode = MODE_ALLOC_KMEM;
  2725. model = "pci";
  2726. if (optarg) use = optarg;
  2727. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2728. break;
  2729. case OPT_FREE_KMEM:
  2730. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2731. mode = MODE_FREE_KMEM;
  2732. if (!model) model = "pci";
  2733. if (optarg) use = optarg;
  2734. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2735. break;
  2736. case OPT_LIST_LOCKS:
  2737. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2738. mode = MODE_LIST_LOCKS;
  2739. break;
  2740. case OPT_FREE_LOCKS:
  2741. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2742. mode = MODE_FREE_LOCKS;
  2743. model = "maintenance";
  2744. break;
  2745. case OPT_LOCK:
  2746. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2747. mode = MODE_LOCK;
  2748. lock = optarg;
  2749. break;
  2750. case OPT_UNLOCK:
  2751. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2752. mode = MODE_UNLOCK;
  2753. lock = optarg;
  2754. break;
  2755. case OPT_DEVICE:
  2756. fpga_device = optarg;
  2757. break;
  2758. case OPT_MODEL:
  2759. model = optarg;
  2760. /* if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2761. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2762. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2763. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
  2764. break;
  2765. case OPT_BAR:
  2766. bank = optarg;
  2767. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2768. // else bar = itmp;
  2769. break;
  2770. case OPT_ALIGNMENT:
  2771. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2772. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2773. }
  2774. break;
  2775. case OPT_ACCESS:
  2776. if (!strncasecmp(optarg, "fifo", 4)) {
  2777. atype = "fifo";
  2778. num_offset = optarg + 4;
  2779. amode = ACCESS_FIFO;
  2780. } else if (!strncasecmp(optarg, "dma", 3)) {
  2781. atype = "dma";
  2782. num_offset = optarg + 3;
  2783. amode = ACCESS_DMA;
  2784. } else if (!strncasecmp(optarg, "bar", 3)) {
  2785. atype = "plain";
  2786. num_offset = optarg + 3;
  2787. amode = ACCESS_BAR;
  2788. } else if (!strncasecmp(optarg, "config", 6)) {
  2789. atype = "config";
  2790. num_offset = optarg + 6;
  2791. amode = ACCESS_CONFIG;
  2792. } else if (!strncasecmp(optarg, "plain", 5)) {
  2793. atype = "plain";
  2794. num_offset = optarg + 5;
  2795. amode = ACCESS_BAR;
  2796. } else {
  2797. num_offset = optarg;
  2798. }
  2799. if (*num_offset) {
  2800. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2801. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2802. switch (itmp) {
  2803. case 8: access = 1; break;
  2804. case 16: access = 2; break;
  2805. case 32: access = 4; break;
  2806. case 64: access = 8; break;
  2807. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2808. }
  2809. }
  2810. break;
  2811. case OPT_SIZE:
  2812. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2813. if (strcasecmp(optarg, "unlimited"))
  2814. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2815. else
  2816. size = 0;//(size_t)-1;
  2817. }
  2818. size_set = 1;
  2819. break;
  2820. case OPT_BLOCK_SIZE:
  2821. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2822. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2823. }
  2824. break;
  2825. case OPT_ENDIANESS:
  2826. if ((*optarg == 'b')||(*optarg == 'B')) {
  2827. if (ntohs(1) == 1) endianess = 0;
  2828. else endianess = 1;
  2829. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2830. if (ntohs(1) == 1) endianess = 1;
  2831. else endianess = 0;
  2832. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2833. break;
  2834. case OPT_TIMEOUT:
  2835. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2836. if (strcasecmp(optarg, "unlimited"))
  2837. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2838. else
  2839. timeout = PCILIB_TIMEOUT_INFINITE;
  2840. }
  2841. timeout_set = 1;
  2842. break;
  2843. case OPT_OUTPUT:
  2844. output = optarg;
  2845. break;
  2846. case OPT_ITERATIONS:
  2847. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2848. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2849. break;
  2850. case OPT_EVENT:
  2851. event = optarg;
  2852. break;
  2853. case OPT_TYPE:
  2854. type = optarg;
  2855. break;
  2856. case OPT_DATA_TYPE:
  2857. data_type = optarg;
  2858. break;
  2859. case OPT_RUN_TIME:
  2860. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2861. if (strcasecmp(optarg, "unlimited"))
  2862. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2863. else
  2864. run_time = 0;
  2865. }
  2866. // run_time_set = 1;
  2867. break;
  2868. case OPT_TRIGGER_TIME:
  2869. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2870. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2871. break;
  2872. case OPT_TRIGGER_RATE:
  2873. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2874. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2875. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2876. break;
  2877. case OPT_BUFFER:
  2878. if (optarg) num_offset = optarg;
  2879. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2880. else num_offset = NULL;
  2881. if (num_offset) {
  2882. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2883. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2884. buffer *= 1024 * 1024;
  2885. } else {
  2886. buffer = get_free_memory();
  2887. if (buffer < 256) Error("Not enough free memory (%lz MiB) for buffering", buffer / 1024 / 1024);
  2888. buffer -= 128 + buffer/16;
  2889. }
  2890. break;
  2891. case OPT_THREADS:
  2892. if (optarg) num_offset = optarg;
  2893. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2894. else num_offset = NULL;
  2895. if (num_offset) {
  2896. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2897. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2898. } else {
  2899. threads = 0;
  2900. }
  2901. break;
  2902. case OPT_FORMAT:
  2903. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2904. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2905. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2906. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2907. break;
  2908. case OPT_QUIETE:
  2909. quiete = 1;
  2910. verbose = -1;
  2911. break;
  2912. case OPT_VERBOSE:
  2913. if (optarg) num_offset = optarg;
  2914. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2915. else num_offset = NULL;
  2916. if (num_offset) {
  2917. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2918. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2919. } else {
  2920. verbose = 1;
  2921. }
  2922. break;
  2923. case OPT_FORCE:
  2924. force = 1;
  2925. break;
  2926. case OPT_VERIFY:
  2927. verify = 1;
  2928. break;
  2929. case OPT_MULTIPACKET:
  2930. flags |= FLAG_MULTIPACKET;
  2931. break;
  2932. case OPT_WAIT:
  2933. flags |= FLAG_WAIT;
  2934. break;
  2935. default:
  2936. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2937. }
  2938. }
  2939. if (mode == MODE_INVALID) {
  2940. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2941. else Usage(argc, argv, NULL);
  2942. }
  2943. if (verbose) log_priority = PCILIB_LOG_INFO;
  2944. else if (quiete) log_priority = PCILIB_LOG_ERROR;
  2945. else log_priority = PCILIB_LOG_WARNING;
  2946. pcilib_set_logger(log_priority, &LogError, NULL);
  2947. handle = pcilib_open(fpga_device, model);
  2948. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2949. model_info = pcilib_get_model_description(handle);
  2950. dma_info = pcilib_get_dma_description(handle);
  2951. switch (mode) {
  2952. case MODE_WRITE:
  2953. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2954. int vallen = strlen(argv[optind]);
  2955. if (vallen > 1) {
  2956. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2957. if (!data) Error("Error allocating memory for data array");
  2958. for (i = 0; i < size; i++) {
  2959. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2960. strcpy(data[i], argv[optind] + 1);
  2961. }
  2962. } else {
  2963. data = (char**)malloc(size * (9 + sizeof(char*)));
  2964. if (!data) Error("Error allocating memory for data array");
  2965. for (i = 0; i < size; i++) {
  2966. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2967. sprintf(data[i], "%x", i);
  2968. }
  2969. }
  2970. } else if ((argc - optind) == size) data = argv + optind;
  2971. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2972. case MODE_READ:
  2973. if (!addr) {
  2974. if (((!dma_info)||(!dma_info->api))&&(!model_info->api)&&(!handle->num_reg)) {
  2975. // if (model == PCILIB_MODEL_PCI) {
  2976. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2977. Usage(argc, argv, "The address is not specified");
  2978. } else ++mode;
  2979. }
  2980. break;
  2981. case MODE_START_DMA:
  2982. case MODE_STOP_DMA:
  2983. case MODE_LIST_DMA_BUFFERS:
  2984. case MODE_READ_DMA_BUFFER:
  2985. if ((dma_channel)&&(*dma_channel)) {
  2986. itmp = strlen(dma_channel) - 1;
  2987. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2988. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2989. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2990. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2991. else {
  2992. num_offset = dma_channel + 3;
  2993. itmp -= 3;
  2994. }
  2995. if (bank) {
  2996. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  2997. }
  2998. if (!isnumber_n(num_offset, itmp))
  2999. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  3000. dma = atoi(num_offset);
  3001. }
  3002. break;
  3003. case MODE_LIST:
  3004. if (bank&&list_target) {
  3005. if (strcmp(list_target, bank))
  3006. Usage(argc, argv, "Conflicting banks are specified in list parameter (%s) and bank parameter (%s)", list_target, bank);
  3007. } else if (bank) {
  3008. list_target = bank;
  3009. }
  3010. break;
  3011. default:
  3012. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  3013. }
  3014. if (addr) {
  3015. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  3016. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  3017. if (bank) {
  3018. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  3019. } else {
  3020. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  3021. }
  3022. dma = atoi(addr + 3);
  3023. amode = ACCESS_DMA;
  3024. addr = NULL;
  3025. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  3026. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  3027. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  3028. bar = atoi(addr + 3);
  3029. amode = ACCESS_BAR;
  3030. addr = NULL;
  3031. } else if (!strcmp(addr, "config")) {
  3032. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  3033. amode = ACCESS_CONFIG;
  3034. addr = NULL;
  3035. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  3036. // check if the address in the register range
  3037. const pcilib_register_range_t *ranges = model_info->ranges;
  3038. if (ranges) {
  3039. for (i = 0; ranges[i].start != ranges[i].end; i++)
  3040. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  3041. // register access in plain mode
  3042. if (ranges[i].start != ranges[i].end) {
  3043. pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
  3044. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  3045. bank = model_info->banks[regbank].name;
  3046. start += ranges[i].addr_shift;
  3047. addr_shift = ranges[i].addr_shift;
  3048. ++mode;
  3049. }
  3050. }
  3051. } else {
  3052. const char *spec;
  3053. attr = strchr(addr, '@');
  3054. if (attr) {
  3055. size_t spec_size = strlen(addr) - strlen(attr);
  3056. spec = strndupa(addr, spec_size);
  3057. attr++;
  3058. } else {
  3059. spec = addr;
  3060. }
  3061. view = strchr(spec, '/');
  3062. unit = strchr((view?view:spec), ':');
  3063. if (view||unit) {
  3064. size_t reg_size = strlen(spec) - strlen(view?view:unit);
  3065. if (reg_size) reg = strndupa(spec, reg_size);
  3066. else reg = NULL;
  3067. if ((reg)&&(view)) view++;
  3068. if (unit) unit++;
  3069. if (view&&unit) {
  3070. view = strndupa(view, strlen(view) - strlen(unit) - 1);
  3071. } else if ((reg)&&(unit)) {
  3072. view = unit;
  3073. unit = NULL;
  3074. }
  3075. } else {
  3076. if (*spec) reg = spec;
  3077. else reg = NULL;
  3078. }
  3079. if (reg) {
  3080. if (pcilib_find_register(handle, bank, reg) == PCILIB_REGISTER_INVALID) {
  3081. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  3082. }
  3083. }
  3084. if (attr) {
  3085. if (mode == MODE_WRITE)
  3086. Error("Writting of attributes is not supported");
  3087. mode += 3;
  3088. } else if (reg) {
  3089. mode += 1;
  3090. } else {
  3091. mode += 2;
  3092. }
  3093. }
  3094. }
  3095. if (mode == MODE_GRAB) {
  3096. if (output) {
  3097. char fsname[128];
  3098. if (!get_file_fs(output, 127, fsname)) {
  3099. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  3100. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  3101. }
  3102. } else {
  3103. output = "/dev/null";
  3104. partition = PARTITION_NULL;
  3105. }
  3106. if (!timeout_set) {
  3107. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  3108. else timeout = PCILIB_EVENT_TIMEOUT;
  3109. }
  3110. if (!size_set) {
  3111. if (run_time) size = 0;
  3112. }
  3113. }
  3114. if (mode != MODE_GRAB) {
  3115. if (size == (size_t)-1)
  3116. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  3117. }
  3118. if ((bank)&&(amode == ACCESS_DMA)) {
  3119. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  3120. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  3121. else dma = itmp;
  3122. } else if (bank) {
  3123. switch (mode) {
  3124. case MODE_BENCHMARK:
  3125. case MODE_READ:
  3126. case MODE_WRITE:
  3127. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS))
  3128. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  3129. else bar = itmp;
  3130. break;
  3131. default:
  3132. if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  3133. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  3134. }
  3135. }
  3136. signal(SIGINT, signal_exit_handler);
  3137. if ((mode != MODE_GRAB)&&(output)) {
  3138. ofile = fopen(output, "a+");
  3139. if (!ofile) {
  3140. Error("Failed to open file \"%s\"", output);
  3141. }
  3142. }
  3143. // Requesting real-time priority when needed
  3144. switch (mode) {
  3145. case MODE_READ:
  3146. case MODE_WRITE:
  3147. if (amode != ACCESS_DMA)
  3148. break;
  3149. case MODE_BENCHMARK:
  3150. sched_param.sched_priority = sched_get_priority_max(SCHED_FIFO);
  3151. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  3152. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  3153. break;
  3154. case MODE_GRAB:
  3155. sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO);
  3156. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  3157. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  3158. break;
  3159. default:
  3160. ;
  3161. }
  3162. switch (mode) {
  3163. case MODE_VERSION:
  3164. Version(handle, model_info);
  3165. break;
  3166. case MODE_INFO:
  3167. Info(handle, model_info, info_target);
  3168. break;
  3169. case MODE_LIST:
  3170. if ((list_target)&&(*list_target == '/'))
  3171. ListProperties(handle, list_target, details);
  3172. else
  3173. List(handle, model_info, list_target, details);
  3174. break;
  3175. case MODE_BENCHMARK:
  3176. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  3177. break;
  3178. case MODE_READ:
  3179. if (amode == ACCESS_DMA) {
  3180. err = ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  3181. } else if (amode == ACCESS_CONFIG) {
  3182. err = ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  3183. } else if (addr) {
  3184. err = ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  3185. } else {
  3186. Error("Address to read is not specified");
  3187. }
  3188. break;
  3189. case MODE_READ_REGISTER:
  3190. case MODE_READ_PROPERTY:
  3191. case MODE_READ_ATTR:
  3192. if ((reg)||(view)||(attr)||(!addr)) ReadRegister(handle, model_info, bank, reg, view, unit, attr);
  3193. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  3194. break;
  3195. case MODE_WRITE:
  3196. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  3197. break;
  3198. case MODE_WRITE_REGISTER:
  3199. case MODE_WRITE_PROPERTY:
  3200. if (reg||view) WriteRegister(handle, model_info, bank, reg, view, unit, data);
  3201. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  3202. break;
  3203. case MODE_RESET:
  3204. pcilib_reset(handle);
  3205. break;
  3206. case MODE_GRAB:
  3207. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  3208. break;
  3209. case MODE_LIST_DMA:
  3210. ListDMA(handle, fpga_device, model_info);
  3211. break;
  3212. case MODE_LIST_DMA_BUFFERS:
  3213. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  3214. break;
  3215. case MODE_READ_DMA_BUFFER:
  3216. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  3217. break;
  3218. case MODE_START_DMA:
  3219. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  3220. break;
  3221. case MODE_STOP_DMA:
  3222. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  3223. break;
  3224. case MODE_ENABLE_IRQ:
  3225. EnableIRQ(handle, model_info, irq_type);
  3226. break;
  3227. case MODE_DISABLE_IRQ:
  3228. DisableIRQ(handle, model_info, irq_type);
  3229. break;
  3230. case MODE_ACK_IRQ:
  3231. AckIRQ(handle, model_info, irq_source);
  3232. break;
  3233. case MODE_WAIT_IRQ:
  3234. WaitIRQ(handle, model_info, irq_source, timeout);
  3235. break;
  3236. case MODE_SET_DMASK:
  3237. pcilib_set_dma_mask(handle, dma_mask);
  3238. break;
  3239. case MODE_SET_MPS:
  3240. pcilib_set_mps(handle, pcie_mps);
  3241. break;
  3242. case MODE_LIST_KMEM:
  3243. if (use) DetailKMEM(handle, fpga_device, use, block);
  3244. else ListKMEM(handle, fpga_device);
  3245. break;
  3246. case MODE_READ_KMEM:
  3247. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  3248. break;
  3249. case MODE_ALLOC_KMEM:
  3250. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  3251. break;
  3252. case MODE_FREE_KMEM:
  3253. FreeKMEM(handle, fpga_device, use, force);
  3254. break;
  3255. case MODE_LIST_LOCKS:
  3256. ListLocks(handle, verbose);
  3257. break;
  3258. case MODE_FREE_LOCKS:
  3259. FreeLocks(handle, force);
  3260. break;
  3261. case MODE_LOCK:
  3262. LockUnlock(handle, lock, 1, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3263. break;
  3264. case MODE_UNLOCK:
  3265. LockUnlock(handle, lock, 0, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3266. break;
  3267. case MODE_INVALID:
  3268. break;
  3269. }
  3270. if (ofile) fclose(ofile);
  3271. pcilib_close(handle);
  3272. if (data != argv + optind) free(data);
  3273. return err;
  3274. }