cli.c 112 KB

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  1. #define _XOPEN_SOURCE 700
  2. #define _POSIX_C_SOURCE 200112L
  3. #define _BSD_SOURCE
  4. #define _GNU_SOURCE
  5. #define _DEFAULT_SOURCE
  6. #include <stdio.h>
  7. #include <stdlib.h>
  8. #include <string.h>
  9. #include <strings.h>
  10. #include <stdint.h>
  11. #include <stdarg.h>
  12. #include <fcntl.h>
  13. #include <unistd.h>
  14. #include <sys/time.h>
  15. #include <sys/ioctl.h>
  16. #include <sys/mman.h>
  17. #include <errno.h>
  18. #include <alloca.h>
  19. #include <arpa/inet.h>
  20. #include <sys/types.h>
  21. #include <sys/stat.h>
  22. #include <dirent.h>
  23. #include <pthread.h>
  24. #include <signal.h>
  25. #include <dlfcn.h>
  26. #include <getopt.h>
  27. #include <fastwriter.h>
  28. #include "pcitool/sysinfo.h"
  29. #include "pcitool/formaters.h"
  30. #include "pci.h"
  31. #include "plugin.h"
  32. #include "config.h"
  33. #include "tools.h"
  34. #include "kmem.h"
  35. #include "error.h"
  36. #include "debug.h"
  37. #include "model.h"
  38. #include "locking.h"
  39. /* defines */
  40. #define MAX_KBUF 14
  41. //#define BIGBUFSIZE (512*1024*1024)
  42. #define BIGBUFSIZE (1024*1024)
  43. #define DEFAULT_FPGA_DEVICE "/dev/fpga0"
  44. #define LINE_WIDTH 80
  45. #define SEPARATOR_WIDTH 2
  46. #define BLOCK_SEPARATOR_WIDTH 2
  47. #define BLOCK_SIZE 8
  48. #define BENCHMARK_ITERATIONS 128
  49. #define STATUS_MESSAGE_INTERVAL 5 /* seconds */
  50. #define isnumber pcilib_isnumber
  51. #define isxnumber pcilib_isxnumber
  52. #define isnumber_n pcilib_isnumber_n
  53. #define isxnumber_n pcilib_isxnumber_n
  54. typedef uint8_t access_t;
  55. typedef enum {
  56. GRAB_MODE_GRAB = 1,
  57. GRAB_MODE_TRIGGER = 2
  58. } GRAB_MODE;
  59. typedef enum {
  60. MODE_INVALID,
  61. MODE_INFO,
  62. MODE_LIST,
  63. MODE_BENCHMARK,
  64. MODE_READ,
  65. MODE_READ_REGISTER,
  66. MODE_READ_PROPERTY,
  67. MODE_WRITE,
  68. MODE_WRITE_REGISTER,
  69. MODE_WRITE_PROPERTY,
  70. MODE_RESET,
  71. MODE_GRAB,
  72. MODE_START_DMA,
  73. MODE_STOP_DMA,
  74. MODE_LIST_DMA,
  75. MODE_LIST_DMA_BUFFERS,
  76. MODE_READ_DMA_BUFFER,
  77. MODE_ENABLE_IRQ,
  78. MODE_DISABLE_IRQ,
  79. MODE_ACK_IRQ,
  80. MODE_WAIT_IRQ,
  81. MODE_ALLOC_KMEM,
  82. MODE_LIST_KMEM,
  83. MODE_READ_KMEM,
  84. MODE_FREE_KMEM,
  85. MODE_LIST_LOCKS,
  86. MODE_FREE_LOCKS,
  87. MODE_LOCK,
  88. MODE_UNLOCK
  89. } MODE;
  90. typedef enum {
  91. ACCESS_BAR,
  92. ACCESS_DMA,
  93. ACCESS_FIFO,
  94. ACCESS_CONFIG
  95. } ACCESS_MODE;
  96. typedef enum {
  97. FLAG_MULTIPACKET = 1,
  98. FLAG_WAIT = 2
  99. } FLAGS;
  100. typedef enum {
  101. FORMAT_DEFAULT = 0,
  102. FORMAT_RAW,
  103. FORMAT_HEADER,
  104. FORMAT_RINGFS
  105. } FORMAT;
  106. typedef enum {
  107. PARTITION_UNKNOWN,
  108. PARTITION_RAW,
  109. PARTITION_EXT4,
  110. PARTITION_NULL
  111. } PARTITION;
  112. typedef enum {
  113. OPT_DEVICE = 'd',
  114. OPT_MODEL = 'm',
  115. OPT_BAR = 'b',
  116. OPT_ACCESS = 'a',
  117. OPT_ENDIANESS = 'e',
  118. OPT_SIZE = 's',
  119. OPT_OUTPUT = 'o',
  120. OPT_TIMEOUT = 't',
  121. OPT_INFO = 'i',
  122. OPT_LIST = 'l',
  123. OPT_READ = 'r',
  124. OPT_WRITE = 'w',
  125. OPT_GRAB = 'g',
  126. OPT_QUIETE = 'q',
  127. OPT_HELP = 'h',
  128. OPT_RESET = 128,
  129. OPT_BENCHMARK,
  130. OPT_TRIGGER,
  131. OPT_DATA_TYPE,
  132. OPT_EVENT,
  133. OPT_TRIGGER_RATE,
  134. OPT_TRIGGER_TIME,
  135. OPT_RUN_TIME,
  136. OPT_FORMAT,
  137. OPT_BUFFER,
  138. OPT_THREADS,
  139. OPT_LIST_DMA,
  140. OPT_LIST_DMA_BUFFERS,
  141. OPT_READ_DMA_BUFFER,
  142. OPT_START_DMA,
  143. OPT_STOP_DMA,
  144. OPT_ENABLE_IRQ,
  145. OPT_DISABLE_IRQ,
  146. OPT_ACK_IRQ,
  147. OPT_WAIT_IRQ,
  148. OPT_ITERATIONS,
  149. OPT_ALLOC_KMEM,
  150. OPT_LIST_KMEM,
  151. OPT_FREE_KMEM,
  152. OPT_READ_KMEM,
  153. OPT_LIST_LOCKS,
  154. OPT_FREE_LOCKS,
  155. OPT_LOCK,
  156. OPT_UNLOCK,
  157. OPT_BLOCK_SIZE,
  158. OPT_ALIGNMENT,
  159. OPT_TYPE,
  160. OPT_FORCE,
  161. OPT_VERIFY,
  162. OPT_WAIT,
  163. OPT_MULTIPACKET,
  164. OPT_VERBOSE
  165. } OPTIONS;
  166. static struct option long_options[] = {
  167. {"device", required_argument, 0, OPT_DEVICE },
  168. {"model", required_argument, 0, OPT_MODEL },
  169. {"bar", required_argument, 0, OPT_BAR },
  170. {"access", required_argument, 0, OPT_ACCESS },
  171. {"endianess", required_argument, 0, OPT_ENDIANESS },
  172. {"size", required_argument, 0, OPT_SIZE },
  173. {"output", required_argument, 0, OPT_OUTPUT },
  174. {"timeout", required_argument, 0, OPT_TIMEOUT },
  175. {"iterations", required_argument, 0, OPT_ITERATIONS },
  176. {"info", optional_argument, 0, OPT_INFO },
  177. {"list", optional_argument, 0, OPT_LIST },
  178. {"reset", no_argument, 0, OPT_RESET },
  179. {"benchmark", optional_argument, 0, OPT_BENCHMARK },
  180. {"read", optional_argument, 0, OPT_READ },
  181. {"write", optional_argument, 0, OPT_WRITE },
  182. {"grab", optional_argument, 0, OPT_GRAB },
  183. {"trigger", optional_argument, 0, OPT_TRIGGER },
  184. {"data", required_argument, 0, OPT_DATA_TYPE },
  185. {"event", required_argument, 0, OPT_EVENT },
  186. {"run-time", required_argument, 0, OPT_RUN_TIME },
  187. {"trigger-rate", required_argument, 0, OPT_TRIGGER_RATE },
  188. {"trigger-time", required_argument, 0, OPT_TRIGGER_TIME },
  189. {"format", required_argument, 0, OPT_FORMAT },
  190. {"buffer", optional_argument, 0, OPT_BUFFER },
  191. {"threads", optional_argument, 0, OPT_THREADS },
  192. {"start-dma", required_argument, 0, OPT_START_DMA },
  193. {"stop-dma", optional_argument, 0, OPT_STOP_DMA },
  194. {"list-dma-engines", no_argument, 0, OPT_LIST_DMA },
  195. {"list-dma-buffers", required_argument, 0, OPT_LIST_DMA_BUFFERS },
  196. {"read-dma-buffer", required_argument, 0, OPT_READ_DMA_BUFFER },
  197. {"enable-irq", optional_argument, 0, OPT_ENABLE_IRQ },
  198. {"disable-irq", optional_argument, 0, OPT_DISABLE_IRQ },
  199. {"acknowledge-irq", optional_argument, 0, OPT_ACK_IRQ },
  200. {"wait-irq", optional_argument, 0, OPT_WAIT_IRQ },
  201. {"list-kernel-memory", optional_argument, 0, OPT_LIST_KMEM },
  202. {"read-kernel-memory", required_argument, 0, OPT_READ_KMEM },
  203. {"alloc-kernel-memory", required_argument, 0, OPT_ALLOC_KMEM },
  204. {"free-kernel-memory", required_argument, 0, OPT_FREE_KMEM },
  205. {"list-locks", no_argument, 0, OPT_LIST_LOCKS },
  206. {"free-locks", no_argument, 0, OPT_FREE_LOCKS },
  207. {"lock", required_argument, 0, OPT_LOCK },
  208. {"unlock", required_argument, 0, OPT_UNLOCK },
  209. {"type", required_argument, 0, OPT_TYPE },
  210. {"block-size", required_argument, 0, OPT_BLOCK_SIZE },
  211. {"alignment", required_argument, 0, OPT_ALIGNMENT },
  212. {"quiete", no_argument, 0, OPT_QUIETE },
  213. {"verbose", optional_argument, 0, OPT_VERBOSE },
  214. {"force", no_argument, 0, OPT_FORCE },
  215. {"verify", no_argument, 0, OPT_VERIFY },
  216. {"multipacket", no_argument, 0, OPT_MULTIPACKET },
  217. {"wait", no_argument, 0, OPT_WAIT },
  218. {"help", no_argument, 0, OPT_HELP },
  219. { 0, 0, 0, 0 }
  220. };
  221. void Usage(int argc, char *argv[], const char *format, ...) {
  222. if (format) {
  223. va_list ap;
  224. va_start(ap, format);
  225. printf("Error %i: ", errno);
  226. vprintf(format, ap);
  227. printf("\n");
  228. va_end(ap);
  229. printf("\n");
  230. }
  231. printf(
  232. "Usage:\n"
  233. " %s <mode> [options] [hex data]\n"
  234. " Modes:\n"
  235. " -i [target] - Device or Register (target) Info\n"
  236. " -l[l] [bank|/branch] - List (detailed) Data Banks & Registers\n"
  237. " -r <addr|dmaX|reg[/unit]> - Read Data/Register\n"
  238. " -w <addr|dmaX|reg[/unit]> - Write Data/Register\n"
  239. " --benchmark <barX|dmaX> - Performance Evaluation\n"
  240. " --reset - Reset board\n"
  241. " --help - Help message\n"
  242. "\n"
  243. " Event Modes:\n"
  244. " --trigger [event] - Trigger Events\n"
  245. " -g [event] - Grab Events\n"
  246. "\n"
  247. " IRQ Modes:\n"
  248. " --enable-irq [type] - Enable IRQs\n"
  249. " --disable-irq [type] - Disable IRQs\n"
  250. " --acknowledge-irq <source> - Clean IRQ queue\n"
  251. " --wait-irq <source> - Wait for IRQ\n"
  252. " DMA Modes:\n"
  253. " --start-dma <num>[r|w] - Start specified DMA engine\n"
  254. " --stop-dma [num[r|w]] - Stop specified engine or DMA subsystem\n"
  255. " --list-dma-engines - List active DMA engines\n"
  256. " --list-dma-buffers <dma> - List buffers for specified DMA engine\n"
  257. " --read-dma-buffer <dma:buf> - Read the specified buffer\n"
  258. "\n"
  259. " Kernel Modes:\n"
  260. " --list-kernel-memory [use] - List kernel buffers\n"
  261. " --read-kernel-memory <blk> - Read the specified block of the kernel memory\n"
  262. " block is specified as: use:block_number\n"
  263. " --alloc-kernel-memory <use> - Allocate kernel buffers (DANGEROUS)\n"
  264. " --free-kernel-memory <use> - Cleans lost kernel space buffers (DANGEROUS)\n"
  265. " dma - Remove all buffers allocated by DMA subsystem\n"
  266. " #number - Remove all buffers with the specified use id\n"
  267. "\n"
  268. " --list-locks - List all registered locks\n"
  269. " --free-locks - Destroy all locks (DANGEROUS)\n"
  270. " --lock <lock name> - Obtain persistent lock\n"
  271. " --unlock <lock name> - Release persistent lock\n"
  272. "\n"
  273. " Addressing:\n"
  274. " -d <device> - FPGA device (/dev/fpga0)\n"
  275. " -m <model> - Memory model (autodetected)\n"
  276. " pci - Plain\n"
  277. " ipecamera - IPE Camera\n"
  278. " -b <bank> - PCI bar, Register bank, or DMA channel\n"
  279. "\n"
  280. " Options:\n"
  281. " -s <size> - Number of words (default: 1)\n"
  282. " -a [fifo|dma|config]<bits> - Access type and bits per word (default: 32)\n"
  283. " -e <l|b> - Endianess Little/Big (default: host)\n"
  284. " -o <file> - Append output to file (default: stdout)\n"
  285. " -t <timeout|unlimited> - Timeout in microseconds\n"
  286. " --check - Verify write operations\n"
  287. "\n"
  288. " Event Options:\n"
  289. " --event <evt> - Specifies event for trigger and grab modes\n"
  290. " --data <type> - Data type to request for the events\n"
  291. " --run-time <us> - Limit time to grab/trigger events\n"
  292. " -t <timeout|unlimited> - Timeout to stop if no events triggered\n"
  293. " --trigger-rate <tps> - Generate tps triggers per second\n"
  294. " --trigger-time <us> - Specifies delay between triggers (us)\n"
  295. " -s <num|unlimited> - Number of events to grab and trigger\n"
  296. " --format [type] - Specifies how event data should be stored\n"
  297. " raw - Just write all events sequentially\n"
  298. " add_header - Prefix events with 512 bit header:\n"
  299. " event(64), data(64), nope(64), size(64)\n"
  300. " seqnum(64), offset(64), timestamp(128)\n"
  301. //" ringfs - Write to RingFS\n"
  302. " --buffer [size] - Request data buffering, size in MB\n"
  303. " --threads [num] - Allow multithreaded processing\n"
  304. "\n"
  305. " DMA Options:\n"
  306. " --multipacket - Read multiple packets\n"
  307. " --wait - Wait until data arrives\n"
  308. "\n"
  309. " Kernel Options:\n"
  310. " --type <type> - Type of kernel memory to allocate\n"
  311. " consistent - Consistent memory\n"
  312. " s2c - DMA S2C (write) memory\n"
  313. " c2s - DMA C2S (read) memory\n"
  314. " --page-size <size> - Size of kernel buffer in bytes (default: page)\n"
  315. " -s <size> - Number of buffers to allocate (default: 1)\n"
  316. " --allignment <alignment> - Buffer alignment (default: page)\n"
  317. "\n"
  318. " Information:\n"
  319. " --verbose [level] - Announce details of ongoing operations\n"
  320. " -q - Quiete mode (suppress warnings)\n"
  321. "\n"
  322. " Data:\n"
  323. " Data can be specified as sequence of hexdecimal number or\n"
  324. " a single value prefixed with '*'. In this case it will be\n"
  325. " replicated the specified amount of times\n"
  326. "\n\n",
  327. argv[0]);
  328. exit(0);
  329. }
  330. static int StopFlag = 0;
  331. static void signal_exit_handler(int signo) {
  332. if (++StopFlag > 2)
  333. exit(-1);
  334. }
  335. void LogError(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, va_list ap) {
  336. vprintf(format, ap);
  337. if (prio == PCILIB_LOG_ERROR) {
  338. if (errno) printf("\nerrno: %i (%s)", errno, strerror(errno));
  339. }
  340. printf("\n");
  341. if (prio == PCILIB_LOG_ERROR) {
  342. printf("Exiting at [%s:%u]\n\n", file, line);
  343. exit(-1);
  344. }
  345. }
  346. void ErrorInternal(void *arg, const char *file, int line, pcilib_log_priority_t prio, const char *format, ...) {
  347. va_list ap;
  348. va_start(ap, format);
  349. LogError(arg, file, line, prio, format, ap);
  350. va_end(ap);
  351. }
  352. #define Error(...) ErrorInternal(NULL, __FILE__, __LINE__, PCILIB_LOG_ERROR, __VA_ARGS__)
  353. int RegisterCompare(const void *aptr, const void *bptr, void *registers) {
  354. pcilib_register_description_t *a = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)aptr];
  355. pcilib_register_description_t *b = &((pcilib_register_description_t*)registers)[*(const pcilib_register_t*)bptr];
  356. if (a->bank < b->bank) return -1;
  357. if (a->bank > b->bank) return 1;
  358. if (a->addr < b->addr) return -1;
  359. if (a->addr > b->addr) return 1;
  360. if ((a->type != PCILIB_REGISTER_BITS)&&(b->type == PCILIB_REGISTER_BITS)) return -1;
  361. if ((a->type == PCILIB_REGISTER_BITS)&&(b->type != PCILIB_REGISTER_BITS)) return 1;
  362. if (a->offset < b->offset) return -1;
  363. if (a->offset > b->offset) return 0;
  364. return 0;
  365. }
  366. void ListProperties(pcilib_t *handle, const char *branch, int details) {
  367. int i;
  368. pcilib_property_info_t *props;
  369. props = pcilib_get_property_list(handle, branch, 0);
  370. if (!props) Error("Error getting properties");
  371. if (props[0].path) {
  372. printf("Properties: \n");
  373. for (i = 0; props[i].path; i++) {
  374. const char *mode;
  375. const char *type;
  376. switch (props[i].type) {
  377. case PCILIB_TYPE_LONG:
  378. type = "int ";
  379. break;
  380. case PCILIB_TYPE_DOUBLE:
  381. type = "float ";
  382. break;
  383. case PCILIB_TYPE_STRING:
  384. type = "string ";
  385. break;
  386. case PCILIB_TYPE_INVALID:
  387. type = NULL;
  388. break;
  389. default:
  390. type = "unknown";
  391. }
  392. switch (props[i].mode) {
  393. case PCILIB_ACCESS_RW:
  394. mode = "RW";
  395. break;
  396. case PCILIB_ACCESS_R:
  397. mode = "R ";
  398. break;
  399. case PCILIB_ACCESS_W:
  400. mode = "W ";
  401. break;
  402. default:
  403. mode = " ";
  404. }
  405. if (type)
  406. printf(" (%s %s) ", type, mode);
  407. else
  408. printf(" %12s", "");
  409. if (props[i].flags&PCILIB_LIST_FLAG_CHILDS)
  410. printf(" + ");
  411. else
  412. printf(" ");
  413. if (details > 0) {
  414. printf("%s", props[i].name);
  415. if ((props[i].description)&&(props[i].description[0])) {
  416. printf(": %s", props[i].description);
  417. }
  418. } else {
  419. printf("%s", props[i].path);
  420. }
  421. printf("\n");
  422. }
  423. printf("\n");
  424. pcilib_free_property_info(handle, props);
  425. }
  426. }
  427. void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
  428. int i, j, k;
  429. const pcilib_register_bank_description_t *banks;
  430. const pcilib_register_description_t *registers;
  431. const pcilib_event_description_t *events;
  432. const pcilib_event_data_type_description_t *types;
  433. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  434. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  435. for (i = 0; i < PCILIB_MAX_BARS; i++) {
  436. if (board_info->bar_length[i] > 0) {
  437. printf(" BAR %d - ", i);
  438. switch ( board_info->bar_flags[i]&IORESOURCE_TYPE_BITS) {
  439. case IORESOURCE_IO: printf(" IO"); break;
  440. case IORESOURCE_MEM: printf("MEM"); break;
  441. case IORESOURCE_IRQ: printf("IRQ"); break;
  442. case IORESOURCE_DMA: printf("DMA"); break;
  443. }
  444. if (board_info->bar_flags[i]&IORESOURCE_MEM_64) printf("64");
  445. else printf("32");
  446. printf(", Start: 0x%08lx, Length: 0x%8lx, Flags: 0x%08lx\n", board_info->bar_start[i], board_info->bar_length[i], board_info->bar_flags[i] );
  447. }
  448. }
  449. printf("\n");
  450. if ((dma_info)&&(dma_info->engines)) {
  451. printf("DMA Engines: \n");
  452. for (i = 0; dma_info->engines[i].addr_bits; i++) {
  453. const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
  454. printf(" DMA %2d ", engine->addr);
  455. switch (engine->direction) {
  456. case PCILIB_DMA_FROM_DEVICE:
  457. printf("C2S");
  458. break;
  459. case PCILIB_DMA_TO_DEVICE:
  460. printf("S2C");
  461. break;
  462. case PCILIB_DMA_BIDIRECTIONAL:
  463. printf("BI ");
  464. break;
  465. }
  466. printf(" - Type: ");
  467. switch (engine->type) {
  468. case PCILIB_DMA_TYPE_BLOCK:
  469. printf("Block");
  470. break;
  471. case PCILIB_DMA_TYPE_PACKET:
  472. printf("Packet");
  473. break;
  474. default:
  475. printf("Unknown");
  476. }
  477. printf(", Address Width: %02lu bits\n", engine->addr_bits);
  478. }
  479. printf("\n");
  480. }
  481. if ((bank)&&(bank != (char*)-1)) banks = NULL;
  482. else banks = model_info->banks;
  483. if (banks) {
  484. printf("Banks: \n");
  485. for (i = 0; banks[i].access; i++) {
  486. printf(" 0x%02x %s", banks[i].addr, banks[i].name);
  487. if ((banks[i].description)&&(banks[i].description[0])) {
  488. printf(": %s", banks[i].description);
  489. }
  490. printf("\n");
  491. }
  492. printf("\n");
  493. }
  494. if (bank == (char*)-1) registers = NULL;
  495. else registers = model_info->registers;
  496. if (registers) {
  497. pcilib_register_t regsort[handle->num_reg];
  498. pcilib_register_bank_addr_t bank_addr = 0;
  499. if (bank) {
  500. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  501. const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
  502. bank_addr = b->addr;
  503. if (b->description) printf("%s:\n", b->description);
  504. else if (b->name) printf("Registers of bank %s:\n", b->name);
  505. else printf("Registers of bank 0x%x:\n", b->addr);
  506. } else {
  507. printf("Registers: \n");
  508. }
  509. // sorting
  510. for (i = 0, k = 0; registers[i].bits; i++) {
  511. if ((bank)&&(registers[i].bank != bank_addr)) continue;
  512. if ((registers[i].type == PCILIB_REGISTER_BITS)&&(!details)) continue;
  513. regsort[k++] = i;
  514. }
  515. qsort_r(regsort, k, sizeof(pcilib_register_t), &RegisterCompare, (void*)registers);
  516. for (j = 0; j < k; j++) {
  517. const char *mode;
  518. i = regsort[j];
  519. if (registers[i].type == PCILIB_REGISTER_BITS) {
  520. if (!details) continue;
  521. if (registers[i].bits > 1) {
  522. printf(" [%2u:%2u] - %s\n", registers[i].offset, registers[i].offset + registers[i].bits, registers[i].name);
  523. } else {
  524. printf(" [ %2u] - %s\n", registers[i].offset, registers[i].name);
  525. }
  526. continue;
  527. }
  528. if (registers[i].mode == PCILIB_REGISTER_RW) mode = "RW";
  529. else if (registers[i].mode == PCILIB_REGISTER_R) mode = "R ";
  530. else if (registers[i].mode == PCILIB_REGISTER_W) mode = " W";
  531. else mode = " ";
  532. printf(" 0x%02x (%2i %s) %s", registers[i].addr, registers[i].bits, mode, registers[i].name);
  533. if ((details > 0)&&(registers[i].description)&&(registers[i].description[0])) {
  534. printf(": %s", registers[i].description);
  535. }
  536. printf("\n");
  537. }
  538. printf("\n");
  539. }
  540. ListProperties(handle, "/", details);
  541. if (bank == (char*)-1) events = NULL;
  542. else {
  543. events = model_info->events;
  544. types = model_info->data_types;
  545. }
  546. if (events) {
  547. printf("Events: \n");
  548. for (i = 0; events[i].name; i++) {
  549. printf(" %s", events[i].name);
  550. if ((events[i].description)&&(events[i].description[0])) {
  551. printf(": %s", events[i].description);
  552. }
  553. if (types) {
  554. for (j = 0; types[j].name; j++) {
  555. if (types[j].evid & events[i].evid) {
  556. printf("\n %s", types[j].name);
  557. if ((types[j].description)&&(types[j].description[0])) {
  558. printf(": %s", types[j].description);
  559. }
  560. }
  561. }
  562. }
  563. }
  564. printf("\n");
  565. }
  566. }
  567. void RegisterInfo(pcilib_t *handle, pcilib_register_t reg) {
  568. int err;
  569. pcilib_value_t val = {0};
  570. pcilib_register_value_t regval;
  571. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  572. const pcilib_register_description_t *r = &model_info->registers[reg];
  573. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, r->bank);
  574. const pcilib_register_bank_description_t *b = &model_info->banks[bank];
  575. err = pcilib_read_register_by_id(handle, reg, &regval);
  576. printf("%s/%s\n", b->name, r->name);
  577. printf(" Current value: ");
  578. if (err) printf("error %i", err);
  579. else printf(b->format, regval);
  580. if (r->mode&PCILIB_REGISTER_W) {
  581. printf(" (default: ");
  582. printf(b->format, r->defvalue);
  583. printf(")");
  584. }
  585. printf("\n");
  586. printf(" Address : 0x%x [%u:%u]\n", r->addr, r->offset, r->offset + r->bits);
  587. printf(" Access : ");
  588. if ((r->mode&PCILIB_REGISTER_RW) == 0) printf("-");
  589. if (r->mode&PCILIB_REGISTER_R) printf("R");
  590. if (r->mode&PCILIB_REGISTER_W) printf("W");
  591. if (r->mode&PCILIB_REGISTER_W1C) printf("/reset");
  592. if (r->mode&PCILIB_REGISTER_W1I) printf("/invert");
  593. printf("\n");
  594. if (r->description)
  595. printf(" Description : %s\n", r->description);
  596. if (r->views) {
  597. int i;
  598. printf("\nSupported Views:\n");
  599. for (i = 0; r->views[i].name; i++) {
  600. pcilib_view_t view = pcilib_find_view_by_name(handle, r->views[i].view);
  601. if (view == PCILIB_VIEW_INVALID) continue;
  602. const pcilib_view_description_t *v = model_info->views[view];
  603. printf(" View %s (", r->views[i].name);
  604. switch (v->type) {
  605. case PCILIB_TYPE_STRING:
  606. printf("char*");
  607. break;
  608. case PCILIB_TYPE_DOUBLE:
  609. printf("double");
  610. break;
  611. default:
  612. printf("unknown");
  613. }
  614. printf(")\n");
  615. err = pcilib_read_register_view(handle, b->name, r->name, r->views[i].name, &val);
  616. if (!err) err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  617. if (err)
  618. printf(" Current value : error %i\n", err);
  619. else {
  620. printf(" Current value : %s", val.sval);
  621. if (v->unit) printf(" (units: %s)", v->unit);
  622. printf("\n");
  623. }
  624. if (v->unit) {
  625. pcilib_unit_t unit = pcilib_find_unit_by_name(handle, v->unit);
  626. printf(" Supported units: %s", v->unit);
  627. if (unit != PCILIB_UNIT_INVALID) {
  628. int j;
  629. const pcilib_unit_description_t *u = &model_info->units[unit];
  630. for (j = 0; u->transforms[j].unit; j++)
  631. printf(", %s", u->transforms[j].unit);
  632. }
  633. printf("\n");
  634. }
  635. if (v->description)
  636. printf(" Description : %s\n", v->description);
  637. }
  638. }
  639. // printf("Type: %s". r->rw
  640. }
  641. void Info(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *target) {
  642. int i, j;
  643. DIR *dir;
  644. void *plugin;
  645. const char *path;
  646. struct dirent *entry;
  647. const pcilib_model_description_t *info = NULL;
  648. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  649. const pcilib_pcie_link_info_t *link_info = pcilib_get_pcie_link_info(handle);
  650. path = getenv("PCILIB_PLUGIN_DIR");
  651. if (!path) path = PCILIB_PLUGIN_DIR;
  652. if (board_info)
  653. printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x, Model: %s\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func, handle->model);
  654. if (link_info) {
  655. printf(" PCIe x%u (gen%u), DMA Payload: %u (of %u)\n", link_info->link_width, link_info->link_speed, 1<<link_info->payload, 1<<link_info->max_payload);
  656. }
  657. if (board_info)
  658. printf(" Interrupt - Pin: %i, Line: %i\n", board_info->interrupt_pin, board_info->interrupt_line);
  659. printf("\n");
  660. if (target) {
  661. pcilib_register_t reg;
  662. reg = pcilib_find_register(handle, NULL, target);
  663. if (reg != PCILIB_REGISTER_INVALID)
  664. return RegisterInfo(handle, reg);
  665. Error(" No register %s is found", target);
  666. }
  667. List(handle, model_info, (char*)-1, 0);
  668. printf("Available models:\n");
  669. dir = opendir(path);
  670. if (dir) {
  671. while ((entry = readdir(dir))) {
  672. const char *suffix = strstr(entry->d_name, ".so");
  673. if ((!suffix)||(strlen(suffix) != 3)) continue;
  674. plugin = pcilib_plugin_load(entry->d_name);
  675. if (plugin) {
  676. info = pcilib_get_plugin_model(handle, plugin, 0, 0, NULL);
  677. if (info) {
  678. printf(" %s\n", entry->d_name);
  679. for (j = 0; info[j].name; j++) {
  680. pcilib_version_t version = info[j].api->version;
  681. printf(" %-12s %u.%u.%u - %s\n", info[j].name,
  682. PCILIB_VERSION_GET_MAJOR(version),
  683. PCILIB_VERSION_GET_MINOR(version),
  684. PCILIB_VERSION_GET_MICRO(version),
  685. info[j].description?info[j].description:"");
  686. }
  687. }
  688. pcilib_plugin_close(plugin);
  689. } else {
  690. const char *msg = dlerror();
  691. if (msg)
  692. printf(" %s: %s\n", entry->d_name, msg);
  693. }
  694. }
  695. closedir(dir);
  696. }
  697. // printf(" XML\n");
  698. printf(" Internal Models\n");
  699. for (i = 0; pcilib_dma[i].api; i++)
  700. printf(" %-12s - %s\n", pcilib_dma[i].name, pcilib_dma[i].description?pcilib_dma[i].description:"");
  701. printf(" %-12s - Plain PCI-access model\n\n", "pci");
  702. }
  703. #define BENCH_MAX_DMA_SIZE 4 * 1024 * 1024
  704. #define BENCH_MAX_FIFO_SIZE 1024 * 1024
  705. int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, size_t iterations) {
  706. int err;
  707. int i, j, errors;
  708. void *data, *buf, *check;
  709. void *fifo = NULL;
  710. struct timeval start, end;
  711. unsigned long time;
  712. size_t size, min_size, max_size;
  713. double mbs_in, mbs_out, mbs;
  714. size_t irqs;
  715. const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
  716. if (mode == ACCESS_CONFIG)
  717. Error("No benchmarking of configuration space acess is allowed");
  718. if (mode == ACCESS_DMA) {
  719. if (n) {
  720. min_size = n * access;
  721. max_size = n * access;
  722. } else {
  723. min_size = 1024;
  724. max_size = BENCH_MAX_DMA_SIZE;
  725. }
  726. for (size = min_size; size <= max_size; size *= 4) {
  727. mbs_in = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_FROM_DEVICE);
  728. mbs_out = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_TO_DEVICE);
  729. mbs = pcilib_benchmark_dma(handle, dma, addr, size, iterations, PCILIB_DMA_BIDIRECTIONAL);
  730. err = pcilib_wait_irq(handle, 0, 0, &irqs);
  731. if (err) irqs = 0;
  732. printf("%8zu KB - ", size / 1024);
  733. printf("RW: ");
  734. if (mbs < 0) printf("failed ... ");
  735. else printf("%8.2lf MB/s", mbs);
  736. printf(", R: ");
  737. if (mbs_in < 0) printf("failed ... ");
  738. else printf("%8.2lf MB/s", mbs_in);
  739. printf(", W: ");
  740. if (mbs_out < 0) printf("failed ... ");
  741. else printf("%8.2lf MB/s", mbs_out);
  742. if (irqs) {
  743. printf(", IRQs: %lu", irqs);
  744. }
  745. printf("\n");
  746. }
  747. return 0;
  748. }
  749. if (bar == PCILIB_BAR_INVALID) {
  750. unsigned long maxlength = 0;
  751. for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
  752. if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
  753. bar = i;
  754. break;
  755. }
  756. if (board_info->bar_length[i] > maxlength) {
  757. maxlength = board_info->bar_length[i];
  758. bar = i;
  759. }
  760. }
  761. if (bar < 0) Error("Data banks are not available");
  762. }
  763. if (n) {
  764. if ((mode == ACCESS_BAR)&&(n * access > board_info->bar_length[bar])) Error("The specified size (%i) exceeds the size of bar (%i)", n * access, board_info->bar_length[bar]);
  765. min_size = n * access;
  766. max_size = n * access;
  767. } else {
  768. min_size = access;
  769. if (mode == ACCESS_BAR) max_size = board_info->bar_length[bar];
  770. else max_size = BENCH_MAX_FIFO_SIZE;
  771. }
  772. err = posix_memalign( (void**)&buf, 256, max_size );
  773. if (!err) err = posix_memalign( (void**)&check, 256, max_size );
  774. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", max_size);
  775. data = pcilib_map_bar(handle, bar);
  776. if (!data) Error("Can't map bar %i", bar);
  777. if (mode == ACCESS_FIFO) {
  778. fifo = data + (addr - board_info->bar_start[bar]) + (board_info->bar_start[bar] & pcilib_get_page_mask());
  779. // pcilib_resolve_register_address(handle, bar, addr);
  780. if (!fifo) Error("Can't resolve address (%lx) in bar (%u)", addr, bar);
  781. }
  782. if (mode == ACCESS_FIFO)
  783. printf("Transfer time (Bank: %i, Fifo: %lx):\n", bar, addr);
  784. else
  785. printf("Transfer time (Bank: %i):\n", bar);
  786. for (size = min_size ; size < max_size; size *= 8) {
  787. gettimeofday(&start,NULL);
  788. if (mode == ACCESS_BAR) {
  789. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  790. pcilib_memcpy(buf, data, size);
  791. }
  792. } else {
  793. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  794. for (j = 0; j < (size/access); j++) {
  795. pcilib_memcpy(buf + j * access, fifo, access);
  796. }
  797. }
  798. }
  799. gettimeofday(&end,NULL);
  800. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  801. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  802. fflush(0);
  803. gettimeofday(&start,NULL);
  804. if (mode == ACCESS_BAR) {
  805. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  806. pcilib_memcpy(data, buf, size);
  807. }
  808. } else {
  809. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  810. for (j = 0; j < (size/access); j++) {
  811. pcilib_memcpy(fifo, buf + j * access, access);
  812. }
  813. }
  814. }
  815. gettimeofday(&end,NULL);
  816. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  817. printf(", write: %8.2lf MB/s\n", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  818. }
  819. pcilib_unmap_bar(handle, bar, data);
  820. printf("\n\nOpen-Transfer-Close time: \n");
  821. for (size = 4 ; size < max_size; size *= 8) {
  822. gettimeofday(&start,NULL);
  823. if (mode == ACCESS_BAR) {
  824. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  825. pcilib_read(handle, bar, 0, size, buf);
  826. }
  827. } else {
  828. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  829. pcilib_read_fifo(handle, bar, addr, access, size / access, buf);
  830. }
  831. }
  832. gettimeofday(&end,NULL);
  833. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  834. printf("%8zu bytes - read: %8.2lf MB/s", size, 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  835. fflush(0);
  836. gettimeofday(&start,NULL);
  837. if (mode == ACCESS_BAR) {
  838. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  839. pcilib_write(handle, bar, 0, size, buf);
  840. }
  841. } else {
  842. for (i = 0; i < BENCHMARK_ITERATIONS; i++) {
  843. pcilib_write_fifo(handle, bar, addr, access, size / access, buf);
  844. }
  845. }
  846. gettimeofday(&end,NULL);
  847. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  848. printf(", write: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  849. if (mode == ACCESS_BAR) {
  850. gettimeofday(&start,NULL);
  851. for (i = 0, errors = 0; i < BENCHMARK_ITERATIONS; i++) {
  852. pcilib_write(handle, bar, 0, size, buf);
  853. pcilib_read(handle, bar, 0, size, check);
  854. if (memcmp(buf, check, size)) ++errors;
  855. }
  856. gettimeofday(&end,NULL);
  857. time = (end.tv_sec - start.tv_sec)*1000000 + (end.tv_usec - start.tv_usec);
  858. printf(", write-verify: %8.2lf MB/s", 1000000. * size * BENCHMARK_ITERATIONS / (time * 1024. * 1024.));
  859. if (errors) printf(", errors: %u of %u", errors, BENCHMARK_ITERATIONS);
  860. }
  861. printf("\n");
  862. }
  863. printf("\n\n");
  864. free(check);
  865. free(buf);
  866. return 0;
  867. }
  868. #define pci2host16(endianess, value) endianess?
  869. /*
  870. typedef struct {
  871. size_t size;
  872. void *data;
  873. size_t pos;
  874. int multi_mode;
  875. } DMACallbackContext;
  876. static int DMACallback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  877. DMACallbackContext *ctx = (DMACallbackContext*)arg;
  878. if ((ctx->pos + bufsize > ctx->size)||(!ctx->data)) {
  879. ctx->size *= 2;
  880. ctx->data = realloc(ctx->data, ctx->size);
  881. if (!ctx->data) {
  882. Error("Allocation of %i bytes of memory have failed", ctx->size);
  883. return 0;
  884. }
  885. }
  886. memcpy(ctx->data + ctx->pos, buf, bufsize);
  887. ctx->pos += bufsize;
  888. if (flags & PCILIB_DMA_FLAG_EOP) return 0;
  889. return 1;
  890. }
  891. */
  892. int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, size_t timeout, FILE *o) {
  893. void *buf;
  894. int i, err;
  895. size_t ret, bytes;
  896. size_t size = n * abs(access);
  897. int block_width, blocks_per_line;
  898. int numbers_per_block, numbers_per_line;
  899. pcilib_dma_engine_t dmaid;
  900. pcilib_dma_flags_t dma_flags = 0;
  901. int fd;
  902. char stmp[256];
  903. struct stat st;
  904. const pcilib_board_info_t *board_info;
  905. numbers_per_block = BLOCK_SIZE / access;
  906. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  907. blocks_per_line = (LINE_WIDTH - 10) / (block_width + BLOCK_SEPARATOR_WIDTH);
  908. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  909. numbers_per_line = blocks_per_line * numbers_per_block;
  910. if (size) {
  911. buf = malloc(size);
  912. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  913. } else {
  914. buf = NULL;
  915. }
  916. switch (mode) {
  917. case ACCESS_DMA:
  918. if (timeout == (size_t)-1) timeout = PCILIB_DMA_TIMEOUT;
  919. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  920. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  921. if (flags&FLAG_MULTIPACKET) dma_flags |= PCILIB_DMA_FLAG_MULTIPACKET;
  922. if (flags&FLAG_WAIT) dma_flags |= PCILIB_DMA_FLAG_WAIT;
  923. if (size) {
  924. err = pcilib_read_dma_custom(handle, dmaid, addr, size, dma_flags, timeout, buf, &bytes);
  925. if (err) Error("Error (%i) is reported by DMA engine", err);
  926. } else {
  927. dma_flags |= PCILIB_DMA_FLAG_IGNORE_ERRORS;
  928. size = 2048; bytes = 0;
  929. do {
  930. size *= 2;
  931. buf = realloc(buf, size);
  932. if (!buf) Error("Allocation of %zu bytes of memory has failed", size);
  933. err = pcilib_read_dma_custom(handle, dmaid, addr, size - bytes, dma_flags, timeout, buf + bytes, &ret);
  934. bytes += ret;
  935. if ((!err)&&(flags&FLAG_MULTIPACKET)) {
  936. err = PCILIB_ERROR_TOOBIG;
  937. if ((flags&FLAG_WAIT)==0) timeout = 0;
  938. }
  939. } while (err == PCILIB_ERROR_TOOBIG);
  940. }
  941. if ((err)&&(err != PCILIB_ERROR_TIMEOUT)) {
  942. Error("Error (%i) during DMA read", err);
  943. }
  944. if (bytes <= 0) {
  945. pcilib_warning("No data is returned by DMA engine");
  946. return -1;
  947. }
  948. size = bytes;
  949. n = bytes / abs(access);
  950. addr = 0;
  951. break;
  952. case ACCESS_FIFO:
  953. pcilib_read_fifo(handle, bar, addr, access, n, buf);
  954. addr = 0;
  955. break;
  956. case ACCESS_CONFIG:
  957. board_info = pcilib_get_board_info(handle);
  958. sprintf(stmp, "/sys/bus/pci/devices/0000:%02x:%02x.%1x/config", board_info->bus, board_info->slot, board_info->func);
  959. fd = open(stmp, O_RDONLY);
  960. if ((!fd)||(fstat(fd, &st))) Error("Can't open %s", stmp);
  961. if (st.st_size < addr)
  962. Error("Access beyond the end of PCI configuration space");
  963. if (st.st_size < (addr + size)) {
  964. n = (st.st_size - addr) / abs(access);
  965. size = n * abs(access);
  966. if (!n) Error("Access beyond the end of PCI configuration space");
  967. }
  968. lseek(fd, addr, SEEK_SET);
  969. ret = read(fd, buf, size);
  970. if (ret == (size_t)-1) Error("Error reading %s", stmp);
  971. if (ret < size) {
  972. size = ret;
  973. n = ret / abs(access);
  974. }
  975. close(fd);
  976. break;
  977. default:
  978. pcilib_read(handle, bar, addr, size, buf);
  979. }
  980. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  981. if (o) {
  982. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  983. fwrite(buf, abs(access), n, o);
  984. } else {
  985. for (i = 0; i < n; i++) {
  986. if (i) {
  987. if (i%numbers_per_line == 0) printf("\n");
  988. else {
  989. printf("%*s", SEPARATOR_WIDTH, "");
  990. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  991. }
  992. }
  993. if (i%numbers_per_line == 0) printf("%8lx: ", addr + i * abs(access));
  994. switch (access) {
  995. case 1: printf("%0*hhx", access * 2, ((uint8_t*)buf)[i]); break;
  996. case 2: printf("%0*hx", access * 2, ((uint16_t*)buf)[i]); break;
  997. case 4: printf("%0*x", access * 2, ((uint32_t*)buf)[i]); break;
  998. case 8: printf("%0*lx", access * 2, ((uint64_t*)buf)[i]); break;
  999. }
  1000. }
  1001. printf("\n\n");
  1002. }
  1003. free(buf);
  1004. return 0;
  1005. }
  1006. int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit) {
  1007. int i;
  1008. int err;
  1009. const char *format;
  1010. pcilib_register_bank_t bank_id;
  1011. pcilib_register_bank_addr_t bank_addr = 0;
  1012. pcilib_register_value_t value;
  1013. // Adding DMA registers
  1014. pcilib_get_dma_description(handle);
  1015. if (reg||view) {
  1016. if (view) {
  1017. pcilib_value_t val = {0};
  1018. if (reg) {
  1019. err = pcilib_read_register_view(handle, bank, reg, view, &val);
  1020. if (err) Error("Error reading view %s of register %s", view, reg);
  1021. } else {
  1022. err = pcilib_get_property(handle, view, &val);
  1023. if (err) Error("Error reading property %s", view);
  1024. }
  1025. if (unit) {
  1026. err = pcilib_convert_value_unit(handle, &val, unit);
  1027. if (err) {
  1028. if (reg) Error("Error converting view %s of register %s to unit %s", view, reg, unit);
  1029. else Error("Error converting property %s to unit %s", view, unit);
  1030. }
  1031. }
  1032. err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);
  1033. if (err) {
  1034. if (reg) Error("Error converting view %s of register %s to string", view);
  1035. else Error("Error converting property %s to string", view);
  1036. }
  1037. printf("%s = %s", (reg?reg:view), val.sval);
  1038. if ((val.unit)&&(strcasecmp(val.unit, "name")))
  1039. printf(" %s", val.unit);
  1040. printf("\n");
  1041. } else {
  1042. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1043. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
  1044. format = model_info->banks[bank_id].format;
  1045. if (!format) format = "%lu";
  1046. err = pcilib_read_register_by_id(handle, regid, &value);
  1047. if (err) Error("Error reading register %s", reg);
  1048. printf("%s = ", reg);
  1049. printf(format, value);
  1050. printf("\n");
  1051. }
  1052. } else {
  1053. if (model_info->registers) {
  1054. if (bank) {
  1055. bank_id = pcilib_find_register_bank(handle, bank);
  1056. bank_addr = model_info->banks[bank_id].addr;
  1057. }
  1058. printf("Registers:\n");
  1059. for (i = 0; model_info->registers[i].bits; i++) {
  1060. if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) {
  1061. bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
  1062. format = model_info->banks[bank_id].format;
  1063. if (!format) format = "%lu";
  1064. err = pcilib_read_register_by_id(handle, i, &value);
  1065. if (err) printf(" %s = error reading value", model_info->registers[i].name);
  1066. else {
  1067. printf(" %s = ", model_info->registers[i].name);
  1068. printf(format, value);
  1069. }
  1070. printf(" [");
  1071. printf(format, model_info->registers[i].defvalue);
  1072. printf("]");
  1073. printf("\n");
  1074. }
  1075. }
  1076. } else {
  1077. printf("No registers");
  1078. }
  1079. printf("\n");
  1080. }
  1081. return 0;
  1082. }
  1083. #define WRITE_REGVAL(buf, n, access, o) {\
  1084. uint##access##_t tbuf[n]; \
  1085. for (i = 0; i < n; i++) { \
  1086. tbuf[i] = (uint##access##_t)buf[i]; \
  1087. } \
  1088. fwrite(tbuf, access/8, n, o); \
  1089. }
  1090. int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
  1091. int err;
  1092. int i;
  1093. const pcilib_register_bank_description_t *banks = model_info->banks;
  1094. pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
  1095. if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
  1096. if (bank) Error("Invalid register bank is specified (%s)", bank);
  1097. else Error("Register bank should be specified");
  1098. }
  1099. int access = banks[bank_id].access / 8;
  1100. // int size = n * abs(access);
  1101. int block_width, blocks_per_line;
  1102. int numbers_per_block, numbers_per_line;
  1103. numbers_per_block = BLOCK_SIZE / access;
  1104. block_width = numbers_per_block * ((access * 2) + SEPARATOR_WIDTH);
  1105. blocks_per_line = (LINE_WIDTH - 6) / (block_width + BLOCK_SEPARATOR_WIDTH);
  1106. if ((blocks_per_line > 1)&&(blocks_per_line % 2)) --blocks_per_line;
  1107. numbers_per_line = blocks_per_line * numbers_per_block;
  1108. pcilib_register_value_t buf[n];
  1109. err = pcilib_read_register_space(handle, bank, addr, n, buf);
  1110. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1111. if (o) {
  1112. printf("Writting output (%zu bytes) to file (append to the end)...\n", n * abs(access));
  1113. switch (access) {
  1114. case 1: WRITE_REGVAL(buf, n, 8, o) break;
  1115. case 2: WRITE_REGVAL(buf, n, 16, o) break;
  1116. case 4: WRITE_REGVAL(buf, n, 32, o) break;
  1117. case 8: WRITE_REGVAL(buf, n, 64, o) break;
  1118. }
  1119. } else {
  1120. for (i = 0; i < n; i++) {
  1121. if (i) {
  1122. if (i%numbers_per_line == 0) printf("\n");
  1123. else {
  1124. printf("%*s", SEPARATOR_WIDTH, "");
  1125. if (i%numbers_per_block == 0) printf("%*s", BLOCK_SEPARATOR_WIDTH, "");
  1126. }
  1127. }
  1128. if (i%numbers_per_line == 0) printf("%4lx: ", addr + 4 * i - addr_shift);
  1129. printf("%0*lx", access * 2, (unsigned long)buf[i]);
  1130. }
  1131. printf("\n\n");
  1132. }
  1133. return 0;
  1134. }
  1135. int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma, pcilib_bar_t bar, uintptr_t addr, size_t n, access_t access, int endianess, char ** data, int verify) {
  1136. int read_back = 0;
  1137. void *buf, *check;
  1138. int res = 0, i, err;
  1139. int size = n * abs(access);
  1140. size_t ret;
  1141. pcilib_dma_engine_t dmaid;
  1142. if (mode == ACCESS_CONFIG)
  1143. Error("Writting to PCI configuration space is not supported");
  1144. err = posix_memalign( (void**)&buf, 256, size );
  1145. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1146. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1147. for (i = 0; i < n; i++) {
  1148. switch (access) {
  1149. case 1: res = sscanf(data[i], "%hhx", ((uint8_t*)buf)+i); break;
  1150. case 2: res = sscanf(data[i], "%hx", ((uint16_t*)buf)+i); break;
  1151. case 4: res = sscanf(data[i], "%x", ((uint32_t*)buf)+i); break;
  1152. case 8: res = sscanf(data[i], "%lx", ((uint64_t*)buf)+i); break;
  1153. default: Error("Unexpected data size (%lu)", access);
  1154. }
  1155. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1156. }
  1157. if (endianess) pcilib_swap(buf, buf, abs(access), n);
  1158. switch (mode) {
  1159. case ACCESS_DMA:
  1160. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1161. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (%lu) is specified", dma);
  1162. err = pcilib_write_dma(handle, dmaid, addr, size, buf, &ret);
  1163. if ((err)||(ret != size)) {
  1164. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout writting the data to DMA");
  1165. else if (err) Error("DMA engine returned a error while writing the data");
  1166. else if (!ret) Error("No data is written by DMA engine");
  1167. else Error("Only %lu bytes of %lu is written by DMA engine", ret, size);
  1168. }
  1169. break;
  1170. case ACCESS_FIFO:
  1171. pcilib_write_fifo(handle, bar, addr, access, n, buf);
  1172. break;
  1173. default:
  1174. pcilib_write(handle, bar, addr, size, buf);
  1175. if (verify) {
  1176. pcilib_read(handle, bar, addr, size, check);
  1177. read_back = 1;
  1178. }
  1179. }
  1180. if ((read_back)&&(memcmp(buf, check, size))) {
  1181. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1182. if (endianess) pcilib_swap(check, check, abs(access), n);
  1183. ReadData(handle, mode, 0, dma, bar, addr, n, access, endianess, (size_t)-1, NULL);
  1184. exit(-1);
  1185. }
  1186. free(check);
  1187. free(buf);
  1188. return 0;
  1189. }
  1190. int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
  1191. pcilib_register_value_t *buf, *check;
  1192. int res, i, err;
  1193. unsigned long value;
  1194. int size = n * sizeof(pcilib_register_value_t);
  1195. err = posix_memalign( (void**)&buf, 256, size );
  1196. if (!err) err = posix_memalign( (void**)&check, 256, size );
  1197. if ((err)||(!buf)||(!check)) Error("Allocation of %i bytes of memory have failed", size);
  1198. for (i = 0; i < n; i++) {
  1199. res = sscanf(data[i], "%lx", &value);
  1200. if ((res != 1)||(!isxnumber(data[i]))) Error("Can't parse data value at poition %i, (%s) is not valid hex number", i, data[i]);
  1201. buf[i] = value;
  1202. }
  1203. err = pcilib_write_register_space(handle, bank, addr, n, buf);
  1204. if (err) Error("Error writting register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1205. err = pcilib_read_register_space(handle, bank, addr, n, check);
  1206. if (err) Error("Error reading register space for bank \"%s\" at address %lx, size %lu", bank?bank:"default", addr, n);
  1207. if (memcmp(buf, check, size)) {
  1208. printf("Write failed: the data written and read differ, the foolowing is read back:\n");
  1209. ReadRegisterRange(handle, model_info, bank, addr, addr_shift, n, NULL);
  1210. exit(-1);
  1211. }
  1212. free(check);
  1213. free(buf);
  1214. return 0;
  1215. }
  1216. int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, char **data) {
  1217. int err = 0;
  1218. pcilib_value_t val = {0};
  1219. pcilib_register_value_t value, verify;
  1220. /*
  1221. pcilib_register_bank_t bank_id;
  1222. pcilib_register_bank_addr_t bank_addr;
  1223. bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
  1224. if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
  1225. format = model_info->banks[bank_id].format;
  1226. if (!format) format = "%lu";
  1227. */
  1228. err = pcilib_set_value_from_static_string(handle, &val, *data);
  1229. if (err) Error("Error (%i) setting value", err);
  1230. if (view) {
  1231. if (unit)
  1232. val.unit = unit;
  1233. if (reg) {
  1234. err = pcilib_write_register_view(handle, bank, reg, view, &val);
  1235. if (err) Error("Error writting view %s of register %s", view, reg);
  1236. printf("%s is written\n ", reg);
  1237. } else {
  1238. err = pcilib_set_property(handle, view, &val);
  1239. if (err) Error("Error setting property %s", view);
  1240. printf("%s is written\n ", view);
  1241. }
  1242. } else {
  1243. pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
  1244. if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
  1245. value = pcilib_get_value_as_register_value(handle, &val, &err);
  1246. if (err) Error("Error (%i) parsing data value (%s)", *data);
  1247. err = pcilib_write_register(handle, bank, reg, value);
  1248. if (err) Error("Error writting register %s\n", reg);
  1249. if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) {
  1250. const char *format = (val.format?val.format:"%u");
  1251. err = pcilib_read_register(handle, bank, reg, &verify);
  1252. if (err) Error("Error reading back register %s for verification\n", reg);
  1253. if (verify != value) {
  1254. Error("Failed to write register %s: %lu is written and %lu is read back", reg, value, verify);
  1255. } else {
  1256. printf("%s = ", reg);
  1257. printf(format, verify);
  1258. printf("\n");
  1259. }
  1260. } else {
  1261. printf("%s is written\n ", reg);
  1262. }
  1263. }
  1264. return 0;
  1265. }
  1266. typedef struct {
  1267. pcilib_t *handle;
  1268. pcilib_event_t event;
  1269. pcilib_event_data_type_t data;
  1270. fastwriter_t *writer;
  1271. int verbose;
  1272. pcilib_timeout_t timeout;
  1273. size_t run_time;
  1274. size_t trigger_time;
  1275. size_t max_triggers;
  1276. pcilib_event_flags_t flags;
  1277. FORMAT format;
  1278. volatile int event_pending; /**< Used to detect that we have read previously triggered event */
  1279. volatile int trigger_thread_started; /**< Indicates that trigger thread is ready and we can't procced to start event recording */
  1280. volatile int started; /**< Indicates that recording is started */
  1281. volatile int run_flag;
  1282. volatile int writing_flag;
  1283. struct timeval first_frame;
  1284. struct timeval last_frame;
  1285. size_t last_num, last_id;
  1286. size_t trigger_failed;
  1287. size_t trigger_count;
  1288. size_t event_count; /**< Total number of events (including bad ones, but excluding events expected, but not reported by hardware) */
  1289. size_t incomplete_count; /**< Broken events, we even can't extract appropriate block of raw data */
  1290. size_t broken_count; /**< Broken events, error while decoding in the requested format */
  1291. size_t empty_count; /**< Broken events, no associated data or unknown */
  1292. size_t missing_count; /**< Missing events, not received from the hardware */
  1293. size_t dropped_count; /**< Missing events, dropped due slow decoding/copying performance */
  1294. size_t storage_count; /**< Missing events, dropped due to slowness of the storage subsystem */
  1295. struct timeval start_time;
  1296. struct timeval stop_time;
  1297. } GRABContext;
  1298. int GrabCallback(pcilib_event_id_t event_id, pcilib_event_info_t *info, void *user) {
  1299. int err = 0;
  1300. void *data;
  1301. size_t size;
  1302. GRABContext *ctx = (GRABContext*)user;
  1303. pcilib_t *handle = ctx->handle;
  1304. gettimeofday(&ctx->last_frame, NULL);
  1305. if (!ctx->event_count) {
  1306. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1307. }
  1308. ctx->event_pending = 0;
  1309. ctx->event_count++;
  1310. if (ctx->last_num) {
  1311. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1312. ctx->missing_count += missing_count;
  1313. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1314. if (missing_count)
  1315. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu (hwid: %zu) and %zu (hwid: %zu)", missing_count, ctx->last_id, ctx->last_num, event_id, info->seqnum);
  1316. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1317. }
  1318. ctx->last_num = info->seqnum;
  1319. ctx->last_id = event_id;
  1320. if (info->flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
  1321. ctx->incomplete_count++;
  1322. return PCILIB_STREAMING_CONTINUE;
  1323. }
  1324. switch (ctx->format) {
  1325. case FORMAT_DEFAULT:
  1326. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_DATA, &size);
  1327. break;
  1328. default:
  1329. data = pcilib_get_data(handle, event_id, PCILIB_EVENT_RAW_DATA, &size);
  1330. }
  1331. if (!data) {
  1332. int err = (int)size;
  1333. switch (err) {
  1334. case PCILIB_ERROR_OVERWRITTEN:
  1335. ctx->dropped_count++;
  1336. break;
  1337. case PCILIB_ERROR_INVALID_DATA:
  1338. ctx->broken_count++;
  1339. break;
  1340. default:
  1341. ctx->empty_count++;
  1342. }
  1343. return PCILIB_STREAMING_CONTINUE;
  1344. }
  1345. if (ctx->format == FORMAT_HEADER) {
  1346. uint64_t header[8];
  1347. header[0] = info->type;
  1348. header[1] = ctx->data;
  1349. header[2] = 0;
  1350. header[3] = size;
  1351. header[4] = info->seqnum;
  1352. header[5] = info->offset;
  1353. memcpy(header + 6, &info->timestamp, 16);
  1354. err = fastwriter_push(ctx->writer, 64, header);
  1355. }
  1356. if (!err)
  1357. err = fastwriter_push(ctx->writer, size, data);
  1358. if (err) {
  1359. fastwriter_cancel(ctx->writer);
  1360. if (err != EWOULDBLOCK)
  1361. Error("Storage error %i", err);
  1362. ctx->storage_count++;
  1363. pcilib_return_data(handle, event_id, ctx->data, data);
  1364. return PCILIB_STREAMING_CONTINUE;
  1365. }
  1366. err = pcilib_return_data(handle, event_id, ctx->data, data);
  1367. if (err) {
  1368. ctx->dropped_count++;
  1369. fastwriter_cancel(ctx->writer);
  1370. return PCILIB_STREAMING_CONTINUE;
  1371. }
  1372. err = fastwriter_commit(ctx->writer);
  1373. if (err) Error("Error commiting data to storage, Error: %i", err);
  1374. return PCILIB_STREAMING_CONTINUE;
  1375. }
  1376. int raw_data(pcilib_event_id_t event_id, pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user) {
  1377. int err;
  1378. GRABContext *ctx = (GRABContext*)user;
  1379. // pcilib_t *handle = ctx->handle;
  1380. if ((info)&&(info->seqnum != ctx->last_num)) {
  1381. gettimeofday(&ctx->last_frame, NULL);
  1382. if (!ctx->event_count) {
  1383. memcpy(&ctx->first_frame, &ctx->last_frame, sizeof(struct timeval));
  1384. }
  1385. ctx->event_count++;
  1386. if (ctx->last_num) {
  1387. size_t missing_count = (info->seqnum - ctx->last_num) - 1;
  1388. ctx->missing_count += missing_count;
  1389. #ifdef PCILIB_DEBUG_MISSING_EVENTS
  1390. if (missing_count)
  1391. pcilib_debug(MISSING_EVENTS, "%zu missing events between %zu and %zu", missing_count, ctx->last_num, info->seqnum);
  1392. #endif /* PCILIB_DEBUG_MISSING_EVENTS */
  1393. }
  1394. ctx->last_num = info->seqnum;
  1395. }
  1396. err = fastwriter_push_data(ctx->writer, size, data);
  1397. if (err) {
  1398. if (err == EWOULDBLOCK) Error("Storage is not able to handle the data stream, buffer overrun");
  1399. Error("Storage error %i", err);
  1400. }
  1401. return PCILIB_STREAMING_CONTINUE;
  1402. }
  1403. void *Trigger(void *user) {
  1404. int err;
  1405. struct timeval start;
  1406. GRABContext *ctx = (GRABContext*)user;
  1407. size_t trigger_time = ctx->trigger_time;
  1408. size_t max_triggers = ctx->max_triggers;
  1409. ctx->trigger_thread_started = 1;
  1410. ctx->event_pending = 1;
  1411. while (!ctx->started) ;
  1412. gettimeofday(&start, NULL);
  1413. do {
  1414. err = pcilib_trigger(ctx->handle, ctx->event, 0, NULL);
  1415. if (err) ctx->trigger_failed++;
  1416. if ((++ctx->trigger_count == max_triggers)&&(max_triggers)) break;
  1417. if (trigger_time) {
  1418. pcilib_add_timeout(&start, trigger_time);
  1419. if ((ctx->stop_time.tv_sec)&&(pcilib_timecmp(&start, &ctx->stop_time)>0)) break;
  1420. pcilib_sleep_until_deadline(&start);
  1421. } else {
  1422. while ((ctx->event_pending)&&(ctx->run_flag)) usleep(10);
  1423. ctx->event_pending = 1;
  1424. }
  1425. } while (ctx->run_flag);
  1426. ctx->trigger_thread_started = 0;
  1427. return NULL;
  1428. }
  1429. void GrabStats(GRABContext *ctx, struct timeval *end_time) {
  1430. int verbose;
  1431. pcilib_timeout_t duration, fps_duration;
  1432. struct timeval cur;
  1433. double fps = 0, good_fps = 0;
  1434. size_t total, good, pending = 0;
  1435. verbose = ctx->verbose;
  1436. if (end_time) {
  1437. if (verbose++) {
  1438. printf("-------------------------------------------------------------------------------\n");
  1439. }
  1440. } else {
  1441. gettimeofday(&cur, NULL);
  1442. end_time = &cur;
  1443. }
  1444. // if ((ctx->event_count + ctx->missing_count) == 0)
  1445. // return;
  1446. duration = pcilib_timediff(&ctx->start_time, end_time);
  1447. fps_duration = pcilib_timediff(&ctx->first_frame, &ctx->last_frame);
  1448. if (ctx->trigger_count) {
  1449. total = ctx->trigger_count;
  1450. pending = ctx->trigger_count - ctx->event_count - ctx->missing_count - ctx->trigger_failed;
  1451. } else {
  1452. total = ctx->event_count + ctx->missing_count;
  1453. }
  1454. good = ctx->event_count - ctx->broken_count - ctx->incomplete_count - ctx->storage_count - ctx->empty_count - ctx->dropped_count;
  1455. if (ctx->event_count > 1) {
  1456. fps = (ctx->event_count - 1) / (1.*fps_duration/1000000);
  1457. }
  1458. if (good > 1) {
  1459. good_fps = (good - 1) / (1.*fps_duration/1000000);
  1460. }
  1461. printf("Run: ");
  1462. PrintTime(duration);
  1463. if (ctx->trigger_count) {
  1464. printf(", Triggers: ");
  1465. PrintNumber(ctx->trigger_count);
  1466. }
  1467. printf(", Captured: ");
  1468. PrintNumber(ctx->event_count);
  1469. printf(" FPS %5.0lf", fps);
  1470. if ((ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) == 0) {
  1471. printf(", Stored: ");
  1472. PrintNumber(good);
  1473. printf(" FPS %5.0lf", good_fps);
  1474. }
  1475. printf("\n");
  1476. if (verbose > 2) {
  1477. if (ctx->trigger_count) {
  1478. printf("Trig: ");
  1479. PrintNumber(ctx->trigger_count);
  1480. printf(" Issued: ");
  1481. PrintNumber(ctx->trigger_count - ctx->trigger_failed);
  1482. printf(" (");
  1483. PrintPercent(ctx->trigger_count - ctx->trigger_failed, ctx->trigger_count);
  1484. printf("%%) Failed: ");
  1485. PrintNumber(ctx->trigger_failed);
  1486. printf( " (");
  1487. PrintPercent(ctx->trigger_failed, ctx->trigger_count);
  1488. printf( "%%); Pending: ");
  1489. PrintNumber(pending);
  1490. printf( " (");
  1491. PrintPercent(pending, ctx->trigger_count);
  1492. printf( "%%)\n");
  1493. }
  1494. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1495. printf("Captured: ");
  1496. PrintNumber(good);
  1497. } else {
  1498. printf("Good: ");
  1499. PrintNumber(good);
  1500. printf(", Dropped: ");
  1501. PrintNumber(ctx->dropped_count + ctx->storage_count);
  1502. printf(", Bad: ");
  1503. PrintNumber(ctx->incomplete_count + ctx->broken_count);
  1504. printf(", Empty: ");
  1505. PrintNumber(ctx->empty_count);
  1506. }
  1507. printf(", Lost: ");
  1508. PrintNumber(ctx->missing_count);
  1509. printf("\n");
  1510. }
  1511. if (verbose > 1) {
  1512. if (ctx->flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1513. printf("Captured: ");
  1514. PrintPercent(good, total);
  1515. } else {
  1516. printf("Good: ");
  1517. PrintPercent(good, total);
  1518. printf("%% Dropped: ");
  1519. PrintPercent(ctx->dropped_count + ctx->storage_count, total);
  1520. printf("%% Bad: ");
  1521. PrintPercent(ctx->incomplete_count + ctx->broken_count, total);
  1522. printf("%% Empty: ");
  1523. PrintPercent(ctx->empty_count, total);
  1524. }
  1525. printf("%% Lost: ");
  1526. PrintPercent(ctx->missing_count, total);
  1527. printf("%%");
  1528. printf("\n");
  1529. }
  1530. }
  1531. void StorageStats(GRABContext *ctx) {
  1532. int err;
  1533. fastwriter_stats_t st;
  1534. pcilib_timeout_t duration;
  1535. struct timeval cur;
  1536. gettimeofday(&cur, NULL);
  1537. duration = pcilib_timediff(&ctx->start_time, &cur);
  1538. err = fastwriter_get_stats(ctx->writer, &st);
  1539. if (err) return;
  1540. printf("Wrote ");
  1541. PrintSize(st.written);
  1542. printf(" of ");
  1543. PrintSize(st.commited);
  1544. printf(" at ");
  1545. PrintSize(1000000.*st.written / duration);
  1546. printf("/s, %6.2lf%% ", 100.*st.buffer_used / st.buffer_size);
  1547. printf(" of ");
  1548. PrintSize(st.buffer_size);
  1549. printf(" buffer (%6.2lf%% max)\n", 100.*st.buffer_max / st.buffer_size);
  1550. }
  1551. void *Monitor(void *user) {
  1552. struct timeval deadline;
  1553. struct timeval nextinfo;
  1554. GRABContext *ctx = (GRABContext*)user;
  1555. int verbose = ctx->verbose;
  1556. pcilib_timeout_t timeout = ctx->timeout;
  1557. if (timeout == PCILIB_TIMEOUT_INFINITE) timeout = 0;
  1558. // while (!ctx->started);
  1559. if (timeout) {
  1560. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1561. pcilib_add_timeout(&deadline, timeout);
  1562. }
  1563. if (verbose > 0) {
  1564. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1565. }
  1566. while (ctx->run_flag) {
  1567. if (StopFlag) {
  1568. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1569. break;
  1570. }
  1571. if (timeout) {
  1572. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1573. memcpy(&deadline, (struct timeval*)&ctx->last_frame, sizeof(struct timeval));
  1574. pcilib_add_timeout(&deadline, timeout);
  1575. if (pcilib_calc_time_to_deadline(&deadline) == 0) {
  1576. pcilib_stop(ctx->handle, PCILIB_EVENT_FLAG_STOP_ONLY);
  1577. break;
  1578. }
  1579. }
  1580. }
  1581. if (verbose > 0) {
  1582. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1583. GrabStats(ctx, NULL);
  1584. StorageStats(ctx);
  1585. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1586. }
  1587. }
  1588. usleep(100000);
  1589. }
  1590. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1591. while (ctx->writing_flag) {
  1592. if (pcilib_calc_time_to_deadline(&nextinfo) == 0) {
  1593. if (verbose >= 0) StorageStats(ctx);
  1594. pcilib_calc_deadline(&nextinfo, STATUS_MESSAGE_INTERVAL*1000000);
  1595. }
  1596. usleep(100000);
  1597. }
  1598. return NULL;
  1599. }
  1600. int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, const char *data_type, size_t num, size_t run_time, size_t trigger_time, pcilib_timeout_t timeout, PARTITION partition, FORMAT format, size_t buffer_size, size_t threads, int verbose, const char *output) {
  1601. int err;
  1602. GRABContext ctx;
  1603. // void *data = NULL;
  1604. // size_t size, written;
  1605. pcilib_event_t event;
  1606. pcilib_event_t listen_events;
  1607. pcilib_event_data_type_t data;
  1608. pthread_t monitor_thread;
  1609. pthread_t trigger_thread;
  1610. pthread_attr_t attr;
  1611. struct sched_param sched;
  1612. struct timeval end_time;
  1613. pcilib_event_flags_t flags;
  1614. if (evname) {
  1615. event = pcilib_find_event(handle, evname);
  1616. if (event == PCILIB_EVENT_INVALID)
  1617. Error("Can't find event (%s)", evname);
  1618. listen_events = event;
  1619. } else {
  1620. listen_events = PCILIB_EVENTS_ALL;
  1621. event = PCILIB_EVENT0;
  1622. }
  1623. if (data_type) {
  1624. data = pcilib_find_event_data_type(handle, event, data_type);
  1625. if (data == PCILIB_EVENT_DATA_TYPE_INVALID)
  1626. Error("Can't find data type (%s)", data_type);
  1627. } else {
  1628. data = PCILIB_EVENT_DATA;
  1629. }
  1630. memset(&ctx, 0, sizeof(GRABContext));
  1631. ctx.handle = handle;
  1632. ctx.event = event;
  1633. ctx.data = data;
  1634. ctx.run_time = run_time;
  1635. ctx.timeout = timeout;
  1636. ctx.format = format;
  1637. if (grab_mode&GRAB_MODE_GRAB) ctx.verbose = verbose;
  1638. else ctx.verbose = 0;
  1639. if (grab_mode&GRAB_MODE_GRAB) {
  1640. ctx.writer = fastwriter_init(output, 0);
  1641. if (!ctx.writer)
  1642. Error("Can't initialize fastwritter library");
  1643. fastwriter_set_buffer_size(ctx.writer, buffer_size);
  1644. err = fastwriter_open(ctx.writer, output, 0);
  1645. if (err)
  1646. Error("Error opening file (%s), Error: %i\n", output, err);
  1647. ctx.writing_flag = 1;
  1648. }
  1649. ctx.run_flag = 1;
  1650. flags = PCILIB_EVENT_FLAGS_DEFAULT;
  1651. if (data == PCILIB_EVENT_RAW_DATA) {
  1652. if (format == FORMAT_RAW) {
  1653. flags |= PCILIB_EVENT_FLAG_RAW_DATA_ONLY;
  1654. }
  1655. } else {
  1656. flags |= PCILIB_EVENT_FLAG_PREPROCESS;
  1657. }
  1658. ctx.flags = flags;
  1659. // printf("Limits: %lu %lu %lu\n", num, run_time, timeout);
  1660. pcilib_configure_autostop(handle, num, run_time);
  1661. if (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY) {
  1662. pcilib_configure_rawdata_callback(handle, &raw_data, &ctx);
  1663. }
  1664. if (flags&PCILIB_EVENT_FLAG_PREPROCESS) {
  1665. pcilib_configure_preprocessing_threads(handle, threads);
  1666. }
  1667. if (grab_mode&GRAB_MODE_TRIGGER) {
  1668. if (trigger_time) {
  1669. if ((timeout)&&(trigger_time * 2 > timeout)) {
  1670. timeout = 2 * trigger_time;
  1671. ctx.timeout = timeout;
  1672. }
  1673. } else {
  1674. // Otherwise, we will trigger next event after previous one is read
  1675. if (((grab_mode&GRAB_MODE_GRAB) == 0)||(flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)) trigger_time = PCILIB_TRIGGER_TIMEOUT;
  1676. }
  1677. ctx.max_triggers = num;
  1678. ctx.trigger_count = 0;
  1679. ctx.trigger_time = trigger_time;
  1680. // We don't really care if RT priority is imposible
  1681. pthread_attr_init(&attr);
  1682. if (!pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
  1683. sched.sched_priority = sched_get_priority_min(SCHED_FIFO);
  1684. pthread_attr_setschedparam(&attr, &sched);
  1685. }
  1686. // Start triggering thread and wait until it is schedulled
  1687. if (pthread_create(&trigger_thread, &attr, Trigger, (void*)&ctx))
  1688. Error("Error spawning trigger thread");
  1689. while (!ctx.trigger_thread_started) usleep(10);
  1690. }
  1691. gettimeofday(&ctx.start_time, NULL);
  1692. if (grab_mode&GRAB_MODE_GRAB) {
  1693. err = pcilib_start(handle, listen_events, flags);
  1694. if (err) Error("Failed to start event engine, error %i", err);
  1695. }
  1696. ctx.started = 1;
  1697. if (run_time) {
  1698. ctx.stop_time.tv_usec = ctx.start_time.tv_usec + run_time%1000000;
  1699. if (ctx.stop_time.tv_usec > 999999) {
  1700. ctx.stop_time.tv_usec -= 1000000;
  1701. __sync_synchronize();
  1702. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + 1 + run_time / 1000000;
  1703. } else {
  1704. __sync_synchronize();
  1705. ctx.stop_time.tv_sec = ctx.start_time.tv_sec + run_time / 1000000;
  1706. }
  1707. }
  1708. memcpy(&ctx.last_frame, &ctx.start_time, sizeof(struct timeval));
  1709. if (pthread_create(&monitor_thread, NULL, Monitor, (void*)&ctx))
  1710. Error("Error spawning monitoring thread");
  1711. if (grab_mode&GRAB_MODE_GRAB) {
  1712. err = pcilib_stream(handle, &GrabCallback, &ctx);
  1713. if (err) Error("Error streaming events, error %i", err);
  1714. }
  1715. ctx.run_flag = 0;
  1716. if (grab_mode&GRAB_MODE_TRIGGER) {
  1717. while (ctx.trigger_thread_started) usleep(10);
  1718. }
  1719. if (grab_mode&GRAB_MODE_GRAB) {
  1720. pcilib_stop(handle, PCILIB_EVENT_FLAGS_DEFAULT);
  1721. }
  1722. gettimeofday(&end_time, NULL);
  1723. if (grab_mode&GRAB_MODE_TRIGGER) {
  1724. pthread_join(trigger_thread, NULL);
  1725. }
  1726. if (grab_mode&GRAB_MODE_GRAB) {
  1727. if (verbose >= 0)
  1728. printf("Grabbing is finished, flushing results....\n");
  1729. err = fastwriter_close(ctx.writer);
  1730. if (err) Error("Storage problems, error %i", err);
  1731. }
  1732. ctx.writing_flag = 0;
  1733. pthread_join(monitor_thread, NULL);
  1734. if ((grab_mode&GRAB_MODE_GRAB)&&(verbose>=0)) {
  1735. GrabStats(&ctx, &end_time);
  1736. StorageStats(&ctx);
  1737. }
  1738. fastwriter_destroy(ctx.writer);
  1739. return 0;
  1740. }
  1741. int StartStopDMA(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
  1742. int err;
  1743. pcilib_dma_engine_t dmaid;
  1744. if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
  1745. const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);
  1746. if (start) Error("DMA engine should be specified");
  1747. for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
  1748. err = pcilib_start_dma(handle, dmaid, 0);
  1749. if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1750. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1751. if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
  1752. }
  1753. return 0;
  1754. }
  1755. if (dma_direction&PCILIB_DMA_FROM_DEVICE) {
  1756. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, dma);
  1757. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (C2S %lu) is specified", dma);
  1758. if (start) {
  1759. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1760. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1761. } else {
  1762. err = pcilib_start_dma(handle, dmaid, 0);
  1763. if (err) Error("Error starting DMA engine (C2S %lu)", dma);
  1764. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1765. if (err) Error("Error stopping DMA engine (C2S %lu)", dma);
  1766. }
  1767. }
  1768. if (dma_direction&PCILIB_DMA_TO_DEVICE) {
  1769. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, dma);
  1770. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("Invalid DMA engine (S2C %lu) is specified", dma);
  1771. if (start) {
  1772. err = pcilib_start_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1773. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1774. } else {
  1775. err = pcilib_start_dma(handle, dmaid, 0);
  1776. if (err) Error("Error starting DMA engine (S2C %lu)", dma);
  1777. err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
  1778. if (err) Error("Error stopping DMA engine (S2C %lu)", dma);
  1779. }
  1780. }
  1781. return 0;
  1782. }
  1783. typedef struct {
  1784. pcilib_kmem_use_t use;
  1785. int referenced;
  1786. int hw_lock;
  1787. int reusable;
  1788. int persistent;
  1789. int open;
  1790. size_t count;
  1791. size_t size;
  1792. } kmem_use_info_t;
  1793. #define MAX_USES 64
  1794. pcilib_kmem_use_t ParseUse(const char *use) {
  1795. unsigned long utmp;
  1796. if (use) {
  1797. if ((!isxnumber(use))||(sscanf(use, "%lx", &utmp) != 1)) Error("Invalid use (%s) is specified", use);
  1798. if (strlen(use) < 5)
  1799. return PCILIB_KMEM_USE(PCILIB_KMEM_USE_USER,utmp);
  1800. else
  1801. return utmp;
  1802. }
  1803. Error("Kernel memory use is not specified");
  1804. return 0;
  1805. }
  1806. size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1807. size_t i, n = *n_uses;
  1808. if (uses[n - 1].use == use) return n - 1;
  1809. for (i = 1; i < (n - 1); i++) {
  1810. if (uses[i].use == use) return i;
  1811. }
  1812. if (n == MAX_USES) return 0;
  1813. memset(&uses[n], 0, sizeof(kmem_use_info_t));
  1814. uses[n].use = use;
  1815. return (*n_uses)++;
  1816. }
  1817. kmem_use_info_t *GetUse(size_t n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
  1818. size_t i;
  1819. for (i = 0; i < n_uses; i++) {
  1820. if (uses[i].use == use) {
  1821. if (uses[i].count) return uses + i;
  1822. else return NULL;
  1823. }
  1824. }
  1825. return NULL;
  1826. }
  1827. int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_use_info_t *uses) {
  1828. DIR *dir;
  1829. struct dirent *entry;
  1830. const char *pos;
  1831. char sysdir[256];
  1832. char fname[256];
  1833. char info[256];
  1834. size_t useid, n_uses = 1; // Use 0 is for others
  1835. memset(uses, 0, sizeof(kmem_use_info_t));
  1836. pos = strrchr(device, '/');
  1837. if (pos) ++pos;
  1838. else pos = device;
  1839. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  1840. dir = opendir(sysdir);
  1841. if (!dir) Error("Can't open directory (%s)", sysdir);
  1842. while ((entry = readdir(dir)) != NULL) {
  1843. FILE *f;
  1844. unsigned long use = 0;
  1845. unsigned long size = 0;
  1846. unsigned long refs = 0;
  1847. unsigned long mode = 0;
  1848. unsigned long hwref = 0;
  1849. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  1850. if (!isnumber(entry->d_name+4)) continue;
  1851. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  1852. f = fopen(fname, "r");
  1853. if (!f) Error("Can't access file (%s)", fname);
  1854. while(!feof(f)) {
  1855. if (!fgets(info, 256, f))
  1856. break;
  1857. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  1858. if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  1859. if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  1860. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  1861. if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  1862. }
  1863. fclose(f);
  1864. useid = FindUse(&n_uses, uses, use);
  1865. uses[useid].count++;
  1866. uses[useid].size += size;
  1867. if (refs) uses[useid].referenced = 1;
  1868. if (hwref) uses[useid].hw_lock = 1;
  1869. if (mode&KMEM_MODE_REUSABLE) uses[useid].reusable = 1;
  1870. if (mode&KMEM_MODE_PERSISTENT) uses[useid].persistent = 1;
  1871. if (mode&KMEM_MODE_COUNT) uses[useid].open = 1;
  1872. }
  1873. closedir(dir);
  1874. *uses_number = n_uses;
  1875. return 0;
  1876. }
  1877. int ListKMEM(pcilib_t *handle, const char *device) {
  1878. int err;
  1879. char stmp[256];
  1880. size_t i, useid, n_uses;
  1881. kmem_use_info_t uses[MAX_USES];
  1882. const pcilib_model_description_t *model_info = pcilib_get_model_description(handle);
  1883. err = ParseKMEM(handle, device, &n_uses, uses);
  1884. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1885. if ((n_uses == 1)&&(uses[0].count == 0)) {
  1886. printf("No kernel memory is allocated\n");
  1887. return 0;
  1888. }
  1889. printf("Use Type Count Total Size REF Mode \n");
  1890. printf("--------------------------------------------------------------------------------\n");
  1891. for (useid = 0; useid < n_uses; useid++) {
  1892. if (useid + 1 == n_uses) {
  1893. if (!uses[0].count) continue;
  1894. i = 0;
  1895. } else i = useid + 1;
  1896. printf("%08x ", uses[i].use);
  1897. if (i) {
  1898. switch(PCILIB_KMEM_USE_TYPE(uses[i].use)) {
  1899. case PCILIB_KMEM_USE_DMA_RING:
  1900. printf("DMA%u %s Ring ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1901. break;
  1902. case PCILIB_KMEM_USE_DMA_PAGES:
  1903. printf("DMA%u %s Pages ", uses[i].use&0x7F, ((uses[i].use&0x80)?"S2C":"C2S"));
  1904. break;
  1905. case PCILIB_KMEM_USE_SOFTWARE_REGISTERS: {
  1906. pcilib_register_bank_t bank = pcilib_find_register_bank_by_addr(handle, PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  1907. if (bank == PCILIB_REGISTER_BANK_INVALID)
  1908. printf("SoftRegs (%8u)", PCILIB_KMEM_USE_SUBTYPE(uses[i].use));
  1909. else
  1910. printf("SoftRegs (%8s)", model_info->banks[bank].name);
  1911. break;
  1912. }
  1913. case PCILIB_KMEM_USE_LOCKS:
  1914. printf("Locks ");
  1915. break;
  1916. case PCILIB_KMEM_USE_USER:
  1917. printf("User %04x ", uses[i].use&0xFFFF);
  1918. break;
  1919. default:
  1920. printf (" ");
  1921. }
  1922. } else printf("All Others ");
  1923. printf(" ");
  1924. printf("%6zu", uses[i].count);
  1925. printf(" ");
  1926. printf("%10s", GetPrintSize(stmp, uses[i].size));
  1927. printf(" ");
  1928. if ((uses[i].referenced)&&(uses[i].hw_lock)) printf("HW+SW");
  1929. else if (uses[i].referenced) printf(" SW");
  1930. else if (uses[i].hw_lock) printf("HW ");
  1931. else printf(" - ");
  1932. printf(" ");
  1933. if (uses[i].persistent) printf("Persistent");
  1934. else if (uses[i].open) printf("Open ");
  1935. else if (uses[i].reusable) printf("Reusable ");
  1936. else printf("Closed ");
  1937. printf("\n");
  1938. }
  1939. printf("--------------------------------------------------------------------------------\n");
  1940. printf("REF - Software/Hardware Reference, MODE - Reusable/Persistent/Open\n");
  1941. return 0;
  1942. }
  1943. int DetailKMEM(pcilib_t *handle, const char *device, const char *use, size_t block) {
  1944. int err;
  1945. size_t i, n;
  1946. pcilib_kmem_handle_t *kbuf;
  1947. pcilib_kmem_use_t useid = ParseUse(use);
  1948. size_t n_uses;
  1949. kmem_use_info_t uses[MAX_USES];
  1950. kmem_use_info_t *use_info;
  1951. if (block == (size_t)-1) {
  1952. err = ParseKMEM(handle, device, &n_uses, uses);
  1953. if (err) Error("Failed to parse kernel memory information provided through sysfs");
  1954. use_info = GetUse(n_uses, uses, useid);
  1955. if (!use_info) Error("No kernel buffers is allocated for the specified use (%lx)", useid);
  1956. i = 0;
  1957. n = use_info->count;
  1958. } else {
  1959. i = block;
  1960. n = block + 1;
  1961. }
  1962. kbuf = pcilib_alloc_kernel_memory(handle, 0, n, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1963. if (!kbuf) {
  1964. Error("Allocation of kernel buffer (use %lx, count %lu) is failed\n", useid, n);
  1965. return 0;
  1966. }
  1967. printf("Buffer Address Hardware Address Bus Address\n");
  1968. printf("--------------------------------------------------------------------------------\n");
  1969. for (; i < n; i++) {
  1970. void *data = pcilib_kmem_get_block_ua(handle, kbuf, i);
  1971. uintptr_t pa = pcilib_kmem_get_block_pa(handle, kbuf, i);
  1972. uintptr_t ba = pcilib_kmem_get_block_ba(handle, kbuf, i);
  1973. printf("%6lu %16p %16lx %16lx\n", i, data, pa, ba);
  1974. }
  1975. printf("\n");
  1976. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1977. return 0;
  1978. }
  1979. int ReadKMEM(pcilib_t *handle, const char *device, pcilib_kmem_use_t useid, size_t block, size_t max_size, FILE *o) {
  1980. int err;
  1981. void *data;
  1982. size_t size;
  1983. pcilib_kmem_handle_t *kbuf;
  1984. if (block == (size_t)-1) block = 0;
  1985. kbuf = pcilib_alloc_kernel_memory(handle, 0, block + 1, 0, 0, useid, PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_TRY);
  1986. if (!kbuf) {
  1987. Error("The specified kernel buffer is not allocated\n");
  1988. return 0;
  1989. }
  1990. err = pcilib_kmem_sync_block(handle, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, block);
  1991. if (err) {
  1992. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  1993. Error("The synchronization of kernel buffer has failed\n");
  1994. return 0;
  1995. }
  1996. data = pcilib_kmem_get_block_ua(handle, kbuf, block);
  1997. if (data) {
  1998. size = pcilib_kmem_get_block_size(handle, kbuf, block);
  1999. if ((max_size)&&(size > max_size)) size = max_size;
  2000. fwrite(data, 1, size, o?o:stdout);
  2001. } else {
  2002. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2003. Error("The specified block is not existing\n");
  2004. return 0;
  2005. }
  2006. pcilib_free_kernel_memory(handle, kbuf, KMEM_FLAG_REUSE);
  2007. return 0;
  2008. }
  2009. int AllocKMEM(pcilib_t *handle, const char *device, const char *use, const char *type, size_t size, size_t block_size, size_t alignment) {
  2010. pcilib_kmem_type_t ktype = PCILIB_KMEM_TYPE_PAGE;
  2011. pcilib_kmem_flags_t flags = KMEM_FLAG_REUSE;
  2012. pcilib_kmem_handle_t *kbuf;
  2013. pcilib_kmem_use_t useid = ParseUse(use);
  2014. long page_size = sysconf(_SC_PAGESIZE);
  2015. if (type) {
  2016. if (!strcmp(type, "consistent")) ktype = PCILIB_KMEM_TYPE_CONSISTENT;
  2017. else if (!strcmp(type, "c2s")) ktype = PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
  2018. else if (!strcmp(type, "s2c")) ktype = PCILIB_KMEM_TYPE_DMA_S2C_PAGE;
  2019. else Error("Invalid memory type (%s) is specified", type);
  2020. }
  2021. if ((block_size)&&(ktype != PCILIB_KMEM_TYPE_CONSISTENT))
  2022. Error("Selected memory type does not allow custom size");
  2023. kbuf = pcilib_alloc_kernel_memory(handle, ktype, size, (block_size?block_size:page_size), (alignment?alignment:page_size), useid, flags|KMEM_FLAG_PERSISTENT);
  2024. if (!kbuf) Error("Allocation of kernel memory has failed");
  2025. pcilib_free_kernel_memory(handle, kbuf, flags);
  2026. return 0;
  2027. }
  2028. int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
  2029. int err;
  2030. int i;
  2031. pcilib_kmem_use_t useid;
  2032. pcilib_kmem_flags_t flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE;
  2033. if (force) flags |= PCILIB_KMEM_FLAG_FORCE; // this will ignore mmap locks as well.
  2034. if (!strcasecmp(use, "dma")) {
  2035. for (i = 0; i < PCILIB_MAX_DMA_ENGINES; i++) {
  2036. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, i), flags);
  2037. if (err) Error("Error cleaning DMA%i C2S Ring buffer", i);
  2038. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x80|i), flags);
  2039. if (err) Error("Error cleaning DMA%i S2C Ring buffer", i);
  2040. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, i), flags);
  2041. if (err) Error("Error cleaning DMA%i C2S Page buffers", i);
  2042. err = pcilib_clean_kernel_memory(handle, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x80|i), flags);
  2043. if (err) Error("Error cleaning DMA%i S2C Page buffers", i);
  2044. }
  2045. return 0;
  2046. }
  2047. useid = ParseUse(use);
  2048. err = pcilib_clean_kernel_memory(handle, useid, flags);
  2049. if (err) Error("Error cleaning kernel buffers for use (0x%lx)", useid);
  2050. return 0;
  2051. }
  2052. int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
  2053. int err;
  2054. DIR *dir;
  2055. struct dirent *entry;
  2056. const char *pos;
  2057. char sysdir[256];
  2058. char fname[256];
  2059. char info[256];
  2060. char stmp[256];
  2061. pcilib_dma_engine_t dmaid;
  2062. pcilib_dma_engine_status_t status;
  2063. pos = strrchr(device, '/');
  2064. if (pos) ++pos;
  2065. else pos = device;
  2066. snprintf(sysdir, 255, "/sys/class/fpga/%s", pos);
  2067. dir = opendir(sysdir);
  2068. if (!dir) Error("Can't open directory (%s)", sysdir);
  2069. printf("DMA Engine Status Total Size Buffer Ring (1st used - 1st free)\n");
  2070. printf("--------------------------------------------------------------------------------\n");
  2071. while ((entry = readdir(dir)) != NULL) {
  2072. FILE *f;
  2073. unsigned long use = 0;
  2074. // unsigned long size = 0;
  2075. // unsigned long refs = 0;
  2076. unsigned long mode = 0;
  2077. // unsigned long hwref = 0;
  2078. if (strncmp(entry->d_name, "kbuf", 4)) continue;
  2079. if (!isnumber(entry->d_name+4)) continue;
  2080. snprintf(fname, 255, "%s/%s", sysdir, entry->d_name);
  2081. f = fopen(fname, "r");
  2082. if (!f) Error("Can't access file (%s)", fname);
  2083. while(!feof(f)) {
  2084. if (!fgets(info, 256, f))
  2085. break;
  2086. if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
  2087. // if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
  2088. // if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
  2089. if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
  2090. // if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
  2091. }
  2092. fclose(f);
  2093. if ((mode&(KMEM_MODE_REUSABLE|KMEM_MODE_PERSISTENT|KMEM_MODE_COUNT)) == 0) continue; // closed
  2094. if ((use >> 16) != PCILIB_KMEM_USE_DMA_RING) continue;
  2095. if (use&0x80) {
  2096. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_TO_DEVICE, use&0x7F);
  2097. } else {
  2098. dmaid = pcilib_find_dma_by_addr(handle, PCILIB_DMA_FROM_DEVICE, use&0x7F);
  2099. }
  2100. if (dmaid == PCILIB_DMA_ENGINE_INVALID) continue;
  2101. printf("DMA%lu %s ", use&0x7F, (use&0x80)?"S2C":"C2S");
  2102. err = pcilib_start_dma(handle, dmaid, 0);
  2103. if (err) {
  2104. printf("-- Wrong state, start is failed\n");
  2105. continue;
  2106. }
  2107. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2108. if (err) {
  2109. printf("-- Wrong state, failed to obtain status\n");
  2110. pcilib_stop_dma(handle, dmaid, 0);
  2111. continue;
  2112. }
  2113. pcilib_stop_dma(handle, dmaid, 0);
  2114. if (status.started) printf("S");
  2115. else printf(" ");
  2116. if (status.ring_head == status.ring_tail) printf(" ");
  2117. else printf("D");
  2118. printf(" ");
  2119. printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
  2120. printf(" ");
  2121. printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
  2122. printf("\n");
  2123. }
  2124. closedir(dir);
  2125. printf("--------------------------------------------------------------------------------\n");
  2126. printf("S - Started, D - Data in buffers\n");
  2127. return 0;
  2128. }
  2129. int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
  2130. int err;
  2131. size_t i;
  2132. pcilib_dma_engine_t dmaid;
  2133. pcilib_dma_engine_status_t status;
  2134. pcilib_dma_buffer_status_t *buffer;
  2135. char stmp[256];
  2136. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2137. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2138. err = pcilib_start_dma(handle, dmaid, 0);
  2139. if (err) Error("Error starting the specified DMA engine");
  2140. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2141. if (err) Error("Failed to obtain status of the specified DMA engine");
  2142. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2143. if (!buffer) Error("Failed to allocate memory for status buffer");
  2144. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2145. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2146. printf("Buffer Status Total Size \n");
  2147. printf("--------------------------------------------------------------------------------\n");
  2148. for (i = 0; i < status.ring_size; i++) {
  2149. printf("%8zu ", i);
  2150. printf("%c%c %c%c ", buffer[i].used?'U':' ', buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
  2151. printf("%10s", GetPrintSize(stmp, buffer[i].size));
  2152. printf("\n");
  2153. }
  2154. printf("--------------------------------------------------------------------------------\n");
  2155. printf("U - Used, E - Error, F - First block, L - Last Block\n");
  2156. free(buffer);
  2157. pcilib_stop_dma(handle, dmaid, 0);
  2158. return 0;
  2159. }
  2160. int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
  2161. int err;
  2162. pcilib_dma_engine_t dmaid;
  2163. pcilib_dma_engine_status_t status;
  2164. pcilib_dma_buffer_status_t *buffer;
  2165. size_t size;
  2166. dmaid = pcilib_find_dma_by_addr(handle, dma_direction, dma);
  2167. if (dmaid == PCILIB_DMA_ENGINE_INVALID) Error("The specified DMA engine is not found");
  2168. err = pcilib_start_dma(handle, dmaid, 0);
  2169. if (err) Error("Error starting the specified DMA engine");
  2170. err = pcilib_get_dma_status(handle, dmaid, &status, 0, NULL);
  2171. if (err) Error("Failed to obtain status of the specified DMA engine");
  2172. buffer = (pcilib_dma_buffer_status_t*)malloc(status.ring_size*sizeof(pcilib_dma_buffer_status_t));
  2173. if (!buffer) Error("Failed to allocate memory for status buffer");
  2174. err = pcilib_get_dma_status(handle, dmaid, &status, status.ring_size, buffer);
  2175. if (err) Error("Failed to obtain extended status of the specified DMA engine");
  2176. if (block == (size_t)-1) {
  2177. // get current
  2178. }
  2179. size = buffer[block].size;
  2180. free(buffer);
  2181. pcilib_stop_dma(handle, dmaid, 0);
  2182. return ReadKMEM(handle, device, ((dma&0x7F)|((dma_direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00))|(PCILIB_KMEM_USE_DMA_PAGES<<16), block, size, o);
  2183. }
  2184. int ListLocks(pcilib_t *ctx, int verbose) {
  2185. int err;
  2186. pcilib_lock_id_t i;
  2187. if (verbose)
  2188. printf("ID Refs Flags Locked Name\n");
  2189. else
  2190. printf("ID Refs Flags Name\n");
  2191. printf("--------------------------------------------------------------------------------\n");
  2192. for (i = 0; i < PCILIB_MAX_LOCKS; i++) {
  2193. pcilib_lock_t *lock = pcilib_get_lock_by_id(ctx, i);
  2194. const char *name = pcilib_lock_get_name(lock);
  2195. if (!name) break;
  2196. pcilib_lock_flags_t flags = pcilib_lock_get_flags(lock);
  2197. size_t refs = pcilib_lock_get_refs(lock);
  2198. printf("%4u %4zu ", i, refs);
  2199. if (flags&PCILIB_LOCK_FLAG_PERSISTENT) printf("P");
  2200. else printf(" ");
  2201. printf(" ");
  2202. if (verbose) {
  2203. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, PCILIB_TIMEOUT_IMMEDIATE);
  2204. switch (err) {
  2205. case 0:
  2206. pcilib_unlock(lock);
  2207. printf("No ");
  2208. break;
  2209. case PCILIB_ERROR_TIMEOUT:
  2210. printf("Yes ");
  2211. break;
  2212. default:
  2213. printf("Err: %3i ", err);
  2214. }
  2215. }
  2216. printf("%s\n", name);
  2217. }
  2218. printf("--------------------------------------------------------------------------------\n");
  2219. printf("P - Persistent\n");
  2220. return 0;
  2221. }
  2222. int FreeLocks(pcilib_t *handle, int force) {
  2223. return pcilib_destroy_all_locks(handle, force);
  2224. }
  2225. int LockUnlock(pcilib_t *handle, const char *name, int do_lock, pcilib_timeout_t timeout) {
  2226. int err = 0;
  2227. pcilib_lock_t *lock = pcilib_get_lock(handle, PCILIB_LOCK_FLAG_PERSISTENT, name);
  2228. if (!lock) Error("Error getting persistent lock %s", name);
  2229. if (do_lock)
  2230. err = pcilib_lock_custom(lock, PCILIB_LOCK_FLAGS_DEFAULT, timeout);
  2231. else
  2232. pcilib_unlock(lock);
  2233. if (err) {
  2234. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2235. switch (err) {
  2236. case PCILIB_ERROR_TIMEOUT:
  2237. printf("Timeout locking %s\n", name);
  2238. break;
  2239. default:
  2240. Error("Error (%i) locking %s", err, name);
  2241. }
  2242. } else if (do_lock) {
  2243. pcilib_lock_ref(lock);
  2244. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2245. printf("%s is locked\n", name);
  2246. } else {
  2247. pcilib_lock_unref(lock);
  2248. pcilib_return_lock(handle, PCILIB_LOCK_FLAGS_DEFAULT, lock);
  2249. }
  2250. return err;
  2251. }
  2252. int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2253. int err;
  2254. err = pcilib_enable_irq(handle, irq_type, 0);
  2255. if (err) {
  2256. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2257. Error("Error enabling IRQs");
  2258. }
  2259. return err;
  2260. }
  2261. int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
  2262. int err;
  2263. err = pcilib_disable_irq(handle, 0);
  2264. if (err) {
  2265. if ((err != PCILIB_ERROR_NOTSUPPORTED)&&(err != PCILIB_ERROR_NOTAVAILABLE))
  2266. Error("Error disabling IRQs");
  2267. }
  2268. return err;
  2269. }
  2270. int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
  2271. pcilib_clear_irq(handle, irq_source);
  2272. return 0;
  2273. }
  2274. int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
  2275. int err;
  2276. size_t count;
  2277. err = pcilib_wait_irq(handle, irq_source, timeout, &count);
  2278. if (err) {
  2279. if (err == PCILIB_ERROR_TIMEOUT) Error("Timeout waiting for IRQ");
  2280. else Error("Error waiting for IRQ");
  2281. }
  2282. return 0;
  2283. }
  2284. int main(int argc, char **argv) {
  2285. int err = 0;
  2286. int i;
  2287. long itmp;
  2288. size_t ztmp;
  2289. unsigned char c;
  2290. const char *stmp;
  2291. const char *num_offset;
  2292. int details = 0;
  2293. int verbose = 0;
  2294. int quiete = 0;
  2295. int force = 0;
  2296. int verify = 0;
  2297. pcilib_log_priority_t log_priority;
  2298. const char *model = NULL;
  2299. const pcilib_model_description_t *model_info;
  2300. const pcilib_dma_description_t *dma_info;
  2301. MODE mode = MODE_INVALID;
  2302. GRAB_MODE grab_mode = 0;
  2303. size_t trigger_time = 0;
  2304. size_t run_time = 0;
  2305. size_t buffer = 0;
  2306. size_t threads = 1;
  2307. FORMAT format = FORMAT_DEFAULT;
  2308. PARTITION partition = PARTITION_UNKNOWN;
  2309. FLAGS flags = 0;
  2310. const char *atype = NULL;
  2311. const char *type = NULL;
  2312. ACCESS_MODE amode = ACCESS_BAR;
  2313. const char *fpga_device = DEFAULT_FPGA_DEVICE;
  2314. pcilib_bar_t bar = PCILIB_BAR_DETECT;
  2315. const char *addr = NULL;
  2316. const char *reg = NULL;
  2317. const char *view = NULL;
  2318. const char *unit = NULL;
  2319. const char *bank = NULL;
  2320. char **data = NULL;
  2321. const char *event = NULL;
  2322. const char *data_type = NULL;
  2323. const char *dma_channel = NULL;
  2324. const char *use = NULL;
  2325. const char *lock = NULL;
  2326. const char *info_target = NULL;
  2327. const char *list_target = NULL;
  2328. size_t block = (size_t)-1;
  2329. pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;
  2330. pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;
  2331. pcilib_dma_direction_t dma_direction = PCILIB_DMA_BIDIRECTIONAL;
  2332. pcilib_kmem_use_t useid = 0;
  2333. pcilib_dma_engine_addr_t dma = PCILIB_DMA_ENGINE_ADDR_INVALID;
  2334. long addr_shift = 0;
  2335. uintptr_t start = -1;
  2336. size_t block_size = 0;
  2337. size_t size = 1;
  2338. access_t access = 4;
  2339. // int skip = 0;
  2340. int endianess = 0;
  2341. size_t timeout = 0;
  2342. size_t alignment = 0;
  2343. const char *output = NULL;
  2344. FILE *ofile = NULL;
  2345. size_t iterations = BENCHMARK_ITERATIONS;
  2346. pcilib_t *handle;
  2347. int size_set = 0;
  2348. int timeout_set = 0;
  2349. // int run_time_set = 0;
  2350. struct sched_param sched_param = {0};
  2351. while ((c = getopt_long(argc, argv, "hqilr::w::g::d:m:t:b:a:s:e:o:", long_options, NULL)) != (unsigned char)-1) {
  2352. extern int optind;
  2353. switch (c) {
  2354. case OPT_HELP:
  2355. Usage(argc, argv, NULL);
  2356. break;
  2357. case OPT_INFO:
  2358. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2359. if (optarg) info_target = optarg;
  2360. else if ((optind < argc)&&(argv[optind][0] != '-')) info_target = argv[optind++];
  2361. mode = MODE_INFO;
  2362. break;
  2363. case OPT_LIST:
  2364. if (mode == MODE_LIST) details++;
  2365. else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2366. if (optarg) list_target = optarg;
  2367. else if ((optind < argc)&&(argv[optind][0] != '-')) list_target = argv[optind++];
  2368. mode = MODE_LIST;
  2369. break;
  2370. case OPT_RESET:
  2371. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2372. mode = MODE_RESET;
  2373. break;
  2374. case OPT_BENCHMARK:
  2375. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2376. mode = MODE_BENCHMARK;
  2377. if (optarg) addr = optarg;
  2378. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2379. break;
  2380. case OPT_READ:
  2381. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2382. mode = MODE_READ;
  2383. if (optarg) addr = optarg;
  2384. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2385. break;
  2386. case OPT_WRITE:
  2387. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2388. mode = MODE_WRITE;
  2389. if (optarg) addr = optarg;
  2390. else if ((optind < argc)&&(argv[optind][0] != '-')) addr = argv[optind++];
  2391. break;
  2392. case OPT_GRAB:
  2393. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_GRAB))) Usage(argc, argv, "Multiple operations are not supported");
  2394. mode = MODE_GRAB;
  2395. grab_mode |= GRAB_MODE_GRAB;
  2396. stmp = NULL;
  2397. if (optarg) stmp = optarg;
  2398. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2399. if (stmp) {
  2400. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2401. event = stmp;
  2402. }
  2403. break;
  2404. case OPT_TRIGGER:
  2405. if ((mode != MODE_INVALID)&&((mode != MODE_GRAB)||(grab_mode&GRAB_MODE_TRIGGER))) Usage(argc, argv, "Multiple operations are not supported");
  2406. mode = MODE_GRAB;
  2407. grab_mode |= GRAB_MODE_TRIGGER;
  2408. stmp = NULL;
  2409. if (optarg) stmp = optarg;
  2410. else if ((optind < argc)&&(argv[optind][0] != '-')) stmp = argv[optind++];
  2411. if (stmp) {
  2412. if ((event)&&(strcasecmp(stmp,event))) Usage(argc, argv, "Redefinition of considered event");
  2413. event = stmp;
  2414. }
  2415. break;
  2416. case OPT_LIST_DMA:
  2417. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2418. mode = MODE_LIST_DMA;
  2419. break;
  2420. case OPT_LIST_DMA_BUFFERS:
  2421. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2422. mode = MODE_LIST_DMA_BUFFERS;
  2423. dma_channel = optarg;
  2424. break;
  2425. case OPT_READ_DMA_BUFFER:
  2426. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2427. mode = MODE_READ_DMA_BUFFER;
  2428. num_offset = strchr(optarg, ':');
  2429. if (num_offset) {
  2430. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2431. Usage(argc, argv, "Invalid buffer is specified (%s)", num_offset + 1);
  2432. *(char*)num_offset = 0;
  2433. } else block = (size_t)-1;
  2434. dma_channel = optarg;
  2435. break;
  2436. case OPT_START_DMA:
  2437. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2438. mode = MODE_START_DMA;
  2439. if (optarg) dma_channel = optarg;
  2440. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2441. break;
  2442. case OPT_STOP_DMA:
  2443. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2444. mode = MODE_STOP_DMA;
  2445. if (optarg) dma_channel = optarg;
  2446. else if ((optind < argc)&&(argv[optind][0] != '-')) dma_channel = argv[optind++];
  2447. break;
  2448. case OPT_ENABLE_IRQ:
  2449. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2450. mode = MODE_ENABLE_IRQ;
  2451. if (optarg) num_offset = optarg;
  2452. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2453. else num_offset = NULL;
  2454. if (num_offset) {
  2455. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2456. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2457. irq_type = itmp;
  2458. }
  2459. break;
  2460. case OPT_DISABLE_IRQ:
  2461. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2462. mode = MODE_DISABLE_IRQ;
  2463. if (optarg) num_offset = optarg;
  2464. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2465. else num_offset = NULL;
  2466. if (num_offset) {
  2467. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2468. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2469. irq_type = itmp;
  2470. }
  2471. break;
  2472. case OPT_ACK_IRQ:
  2473. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2474. mode = MODE_ACK_IRQ;
  2475. if (optarg) num_offset = optarg;
  2476. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2477. else num_offset = NULL;
  2478. if (num_offset) {
  2479. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2480. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2481. irq_source = itmp;
  2482. }
  2483. break;
  2484. case OPT_WAIT_IRQ:
  2485. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2486. mode = MODE_WAIT_IRQ;
  2487. if (optarg) num_offset = optarg;
  2488. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2489. else num_offset = NULL;
  2490. if (num_offset) {
  2491. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2492. Usage(argc, argv, "Invalid IRQ source is specified (%s)", num_offset);
  2493. irq_source = itmp;
  2494. }
  2495. break;
  2496. case OPT_LIST_KMEM:
  2497. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2498. mode = MODE_LIST_KMEM;
  2499. if (optarg) use = optarg;
  2500. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2501. else use = NULL;
  2502. if (use) {
  2503. num_offset = strchr(use, ':');
  2504. if (num_offset) {
  2505. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2506. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2507. *(char*)num_offset = 0;
  2508. }
  2509. }
  2510. break;
  2511. case OPT_READ_KMEM:
  2512. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2513. mode = MODE_READ_KMEM;
  2514. if (!model) model = "pci";
  2515. num_offset = strchr(optarg, ':');
  2516. if (num_offset) {
  2517. if (sscanf(num_offset + 1, "%zu", &block) != 1)
  2518. Usage(argc, argv, "Invalid block number is specified (%s)", num_offset + 1);
  2519. *(char*)num_offset = 0;
  2520. }
  2521. use = optarg;
  2522. useid = ParseUse(use);
  2523. break;
  2524. case OPT_ALLOC_KMEM:
  2525. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2526. mode = MODE_ALLOC_KMEM;
  2527. model = "pci";
  2528. if (optarg) use = optarg;
  2529. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2530. break;
  2531. case OPT_FREE_KMEM:
  2532. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2533. mode = MODE_FREE_KMEM;
  2534. if (!model) model = "pci";
  2535. if (optarg) use = optarg;
  2536. else if ((optind < argc)&&(argv[optind][0] != '-')) use = argv[optind++];
  2537. break;
  2538. case OPT_LIST_LOCKS:
  2539. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2540. mode = MODE_LIST_LOCKS;
  2541. break;
  2542. case OPT_FREE_LOCKS:
  2543. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2544. mode = MODE_FREE_LOCKS;
  2545. model = "maintenance";
  2546. break;
  2547. case OPT_LOCK:
  2548. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2549. mode = MODE_LOCK;
  2550. lock = optarg;
  2551. break;
  2552. case OPT_UNLOCK:
  2553. if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");
  2554. mode = MODE_UNLOCK;
  2555. lock = optarg;
  2556. break;
  2557. case OPT_DEVICE:
  2558. fpga_device = optarg;
  2559. break;
  2560. case OPT_MODEL:
  2561. model = optarg;
  2562. /* if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
  2563. else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
  2564. else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
  2565. else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
  2566. break;
  2567. case OPT_BAR:
  2568. bank = optarg;
  2569. // if ((sscanf(optarg,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) Usage(argc, argv, "Invalid data bank (%s) is specified", optarg);
  2570. // else bar = itmp;
  2571. break;
  2572. case OPT_ALIGNMENT:
  2573. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &alignment) != 1)) {
  2574. Usage(argc, argv, "Invalid alignment is specified (%s)", optarg);
  2575. }
  2576. break;
  2577. case OPT_ACCESS:
  2578. if (!strncasecmp(optarg, "fifo", 4)) {
  2579. atype = "fifo";
  2580. num_offset = optarg + 4;
  2581. amode = ACCESS_FIFO;
  2582. } else if (!strncasecmp(optarg, "dma", 3)) {
  2583. atype = "dma";
  2584. num_offset = optarg + 3;
  2585. amode = ACCESS_DMA;
  2586. } else if (!strncasecmp(optarg, "bar", 3)) {
  2587. atype = "plain";
  2588. num_offset = optarg + 3;
  2589. amode = ACCESS_BAR;
  2590. } else if (!strncasecmp(optarg, "config", 6)) {
  2591. atype = "config";
  2592. num_offset = optarg + 6;
  2593. amode = ACCESS_CONFIG;
  2594. } else if (!strncasecmp(optarg, "plain", 5)) {
  2595. atype = "plain";
  2596. num_offset = optarg + 5;
  2597. amode = ACCESS_BAR;
  2598. } else {
  2599. num_offset = optarg;
  2600. }
  2601. if (*num_offset) {
  2602. if ((!isnumber(num_offset))||(sscanf(num_offset, "%li", &itmp) != 1))
  2603. Usage(argc, argv, "Invalid access type (%s) is specified", optarg);
  2604. switch (itmp) {
  2605. case 8: access = 1; break;
  2606. case 16: access = 2; break;
  2607. case 32: access = 4; break;
  2608. case 64: access = 8; break;
  2609. default: Usage(argc, argv, "Invalid data width (%s) is specified", num_offset);
  2610. }
  2611. }
  2612. break;
  2613. case OPT_SIZE:
  2614. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &size) != 1)) {
  2615. if (strcasecmp(optarg, "unlimited"))
  2616. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2617. else
  2618. size = 0;//(size_t)-1;
  2619. }
  2620. size_set = 1;
  2621. break;
  2622. case OPT_BLOCK_SIZE:
  2623. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &block_size) != 1)) {
  2624. Usage(argc, argv, "Invalid size is specified (%s)", optarg);
  2625. }
  2626. break;
  2627. case OPT_ENDIANESS:
  2628. if ((*optarg == 'b')||(*optarg == 'B')) {
  2629. if (ntohs(1) == 1) endianess = 0;
  2630. else endianess = 1;
  2631. } else if ((*optarg == 'l')||(*optarg == 'L')) {
  2632. if (ntohs(1) == 1) endianess = 1;
  2633. else endianess = 0;
  2634. } else Usage(argc, argv, "Invalid endianess is specified (%s)", optarg);
  2635. break;
  2636. case OPT_TIMEOUT:
  2637. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &timeout) != 1)) {
  2638. if (strcasecmp(optarg, "unlimited"))
  2639. Usage(argc, argv, "Invalid timeout is specified (%s)", optarg);
  2640. else
  2641. timeout = PCILIB_TIMEOUT_INFINITE;
  2642. }
  2643. timeout_set = 1;
  2644. break;
  2645. case OPT_OUTPUT:
  2646. output = optarg;
  2647. break;
  2648. case OPT_ITERATIONS:
  2649. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &iterations) != 1))
  2650. Usage(argc, argv, "Invalid number of iterations is specified (%s)", optarg);
  2651. break;
  2652. case OPT_EVENT:
  2653. event = optarg;
  2654. break;
  2655. case OPT_TYPE:
  2656. type = optarg;
  2657. break;
  2658. case OPT_DATA_TYPE:
  2659. data_type = optarg;
  2660. break;
  2661. case OPT_RUN_TIME:
  2662. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &run_time) != 1)) {
  2663. if (strcasecmp(optarg, "unlimited"))
  2664. Usage(argc, argv, "Invalid run-time is specified (%s)", optarg);
  2665. else
  2666. run_time = 0;
  2667. }
  2668. // run_time_set = 1;
  2669. break;
  2670. case OPT_TRIGGER_TIME:
  2671. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &trigger_time) != 1))
  2672. Usage(argc, argv, "Invalid trigger-time is specified (%s)", optarg);
  2673. break;
  2674. case OPT_TRIGGER_RATE:
  2675. if ((!isnumber(optarg))||(sscanf(optarg, "%zu", &ztmp) != 1))
  2676. Usage(argc, argv, "Invalid trigger-rate is specified (%s)", optarg);
  2677. trigger_time = (1000000 / ztmp) + ((1000000 % ztmp)?1:0);
  2678. break;
  2679. case OPT_BUFFER:
  2680. if (optarg) num_offset = optarg;
  2681. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2682. else num_offset = NULL;
  2683. if (num_offset) {
  2684. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &buffer) != 1))
  2685. Usage(argc, argv, "Invalid buffer size is specified (%s)", num_offset);
  2686. buffer *= 1024 * 1024;
  2687. } else {
  2688. buffer = get_free_memory();
  2689. if (buffer < 256) Error("Not enough free memory (%lz MB) for buffering", buffer / 1024 / 1024);
  2690. buffer -= 128 + buffer/16;
  2691. }
  2692. break;
  2693. case OPT_THREADS:
  2694. if (optarg) num_offset = optarg;
  2695. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2696. else num_offset = NULL;
  2697. if (num_offset) {
  2698. if ((!isnumber(num_offset))||(sscanf(num_offset, "%zu", &threads) != 1))
  2699. Usage(argc, argv, "Invalid threads number is specified (%s)", num_offset);
  2700. } else {
  2701. threads = 0;
  2702. }
  2703. break;
  2704. case OPT_FORMAT:
  2705. if (!strcasecmp(optarg, "raw")) format = FORMAT_RAW;
  2706. else if (!strcasecmp(optarg, "add_header")) format = FORMAT_HEADER;
  2707. // else if (!strcasecmp(optarg, "ringfs")) format = FORMAT_RINGFS;
  2708. else if (strcasecmp(optarg, "default")) Error("Invalid format (%s) is specified", optarg);
  2709. break;
  2710. case OPT_QUIETE:
  2711. quiete = 1;
  2712. verbose = -1;
  2713. break;
  2714. case OPT_VERBOSE:
  2715. if (optarg) num_offset = optarg;
  2716. else if ((optind < argc)&&(argv[optind][0] != '-')) num_offset = argv[optind++];
  2717. else num_offset = NULL;
  2718. if (num_offset) {
  2719. if ((!isnumber(num_offset))||(sscanf(num_offset, "%i", &verbose) != 1))
  2720. Usage(argc, argv, "Invalid verbosity level is specified (%s)", num_offset);
  2721. } else {
  2722. verbose = 1;
  2723. }
  2724. break;
  2725. case OPT_FORCE:
  2726. force = 1;
  2727. break;
  2728. case OPT_VERIFY:
  2729. verify = 1;
  2730. break;
  2731. case OPT_MULTIPACKET:
  2732. flags |= FLAG_MULTIPACKET;
  2733. break;
  2734. case OPT_WAIT:
  2735. flags |= FLAG_WAIT;
  2736. break;
  2737. default:
  2738. Usage(argc, argv, "Unknown option (%s) with argument (%s)", optarg?argv[optind-2]:argv[optind-1], optarg?optarg:"(null)");
  2739. }
  2740. }
  2741. if (mode == MODE_INVALID) {
  2742. if (argc > 1) Usage(argc, argv, "Operation is not specified");
  2743. else Usage(argc, argv, NULL);
  2744. }
  2745. if (verbose) log_priority = PCILIB_LOG_INFO;
  2746. else if (quiete) log_priority = PCILIB_LOG_ERROR;
  2747. else log_priority = PCILIB_LOG_WARNING;
  2748. pcilib_set_logger(log_priority, &LogError, NULL);
  2749. handle = pcilib_open(fpga_device, model);
  2750. if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
  2751. model_info = pcilib_get_model_description(handle);
  2752. dma_info = pcilib_get_dma_description(handle);
  2753. switch (mode) {
  2754. case MODE_WRITE:
  2755. if (((argc - optind) == 1)&&(*argv[optind] == '*')) {
  2756. int vallen = strlen(argv[optind]);
  2757. if (vallen > 1) {
  2758. data = (char**)malloc(size * (vallen + sizeof(char*)));
  2759. if (!data) Error("Error allocating memory for data array");
  2760. for (i = 0; i < size; i++) {
  2761. data[i] = ((char*)data) + size * sizeof(char*) + i * vallen;
  2762. strcpy(data[i], argv[optind] + 1);
  2763. }
  2764. } else {
  2765. data = (char**)malloc(size * (9 + sizeof(char*)));
  2766. if (!data) Error("Error allocating memory for data array");
  2767. for (i = 0; i < size; i++) {
  2768. data[i] = ((char*)data) + size * sizeof(char*) + i * 9;
  2769. sprintf(data[i], "%x", i);
  2770. }
  2771. }
  2772. } else if ((argc - optind) == size) data = argv + optind;
  2773. else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
  2774. case MODE_READ:
  2775. if (!addr) {
  2776. if (((!dma_info)||(!dma_info->api))&&(!model_info->api)&&(!handle->num_reg)) {
  2777. // if (model == PCILIB_MODEL_PCI) {
  2778. if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG))
  2779. Usage(argc, argv, "The address is not specified");
  2780. } else ++mode;
  2781. }
  2782. break;
  2783. case MODE_START_DMA:
  2784. case MODE_STOP_DMA:
  2785. case MODE_LIST_DMA_BUFFERS:
  2786. case MODE_READ_DMA_BUFFER:
  2787. if ((dma_channel)&&(*dma_channel)) {
  2788. itmp = strlen(dma_channel) - 1;
  2789. if (dma_channel[itmp] == 'r') dma_direction = PCILIB_DMA_FROM_DEVICE;
  2790. else if (dma_channel[itmp] == 'w') dma_direction = PCILIB_DMA_TO_DEVICE;
  2791. if (dma_direction != PCILIB_DMA_BIDIRECTIONAL) itmp--;
  2792. if (strncmp(dma_channel, "dma", 3)) num_offset = dma_channel;
  2793. else {
  2794. num_offset = dma_channel + 3;
  2795. itmp -= 3;
  2796. }
  2797. if (bank) {
  2798. if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);
  2799. }
  2800. if (!isnumber_n(num_offset, itmp))
  2801. Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);
  2802. dma = atoi(num_offset);
  2803. }
  2804. break;
  2805. case MODE_LIST:
  2806. if (bank&&list_target) {
  2807. if (strcmp(list_target, bank))
  2808. Usage(argc, argv, "Conflicting banks are specified in list parameter (%s) and bank parameter (%s)", list_target, bank);
  2809. } else if (bank) {
  2810. list_target = bank;
  2811. }
  2812. break;
  2813. default:
  2814. if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");
  2815. }
  2816. if (addr) {
  2817. if ((!strncmp(addr, "dma", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2818. if ((atype)&&(amode != ACCESS_DMA)) Usage(argc, argv, "Conflicting access modes, the DMA read is requested, but access type is (%s)", type);
  2819. if (bank) {
  2820. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting DMA channels are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2821. } else {
  2822. if (addr[3] == 0) Usage(argc, argv, "The DMA channel is not specified");
  2823. }
  2824. dma = atoi(addr + 3);
  2825. amode = ACCESS_DMA;
  2826. addr = NULL;
  2827. } else if ((!strncmp(addr, "bar", 3))&&((addr[3]==0)||isnumber(addr+3))) {
  2828. if ((atype)&&(amode != ACCESS_BAR)) Usage(argc, argv, "Conflicting access modes, the plain PCI read is requested, but access type is (%s)", type);
  2829. if ((addr[3] != 0)&&(strcmp(addr + 3, bank))) Usage(argc, argv, "Conflicting PCI bars are specified in read parameter (%s) and bank parameter (%s)", addr + 3, bank);
  2830. bar = atoi(addr + 3);
  2831. amode = ACCESS_BAR;
  2832. addr = NULL;
  2833. } else if (!strcmp(addr, "config")) {
  2834. if ((atype)&&(amode != ACCESS_CONFIG)) Usage(argc, argv, "Conflicting access modes, the read of PCI configurataion space is requested, but access type is (%s)", type);
  2835. amode = ACCESS_CONFIG;
  2836. addr = NULL;
  2837. } else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
  2838. // check if the address in the register range
  2839. const pcilib_register_range_t *ranges = model_info->ranges;
  2840. if (ranges) {
  2841. for (i = 0; ranges[i].start != ranges[i].end; i++)
  2842. if ((start >= ranges[i].start)&&(start <= ranges[i].end)) break;
  2843. // register access in plain mode
  2844. if (ranges[i].start != ranges[i].end) {
  2845. pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
  2846. if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
  2847. bank = model_info->banks[regbank].name;
  2848. start += ranges[i].addr_shift;
  2849. addr_shift = ranges[i].addr_shift;
  2850. ++mode;
  2851. }
  2852. }
  2853. } else {
  2854. view = strchr(addr, '/');
  2855. unit = strchr((view?view:addr), ':');
  2856. if (view||unit) {
  2857. size_t reg_size = strlen(addr) - strlen(view?view:unit);
  2858. if (reg_size) reg = strndupa(addr, reg_size);
  2859. else reg = NULL;
  2860. if ((reg)&&(view)) view++;
  2861. if (unit) unit++;
  2862. if (view&&unit) {
  2863. view = strndupa(view, strlen(view) - strlen(unit) - 1);
  2864. } else if ((reg)&&(unit)) {
  2865. view = unit;
  2866. unit = NULL;
  2867. }
  2868. } else {
  2869. reg = addr;
  2870. }
  2871. if (reg) {
  2872. if (pcilib_find_register(handle, bank, reg) == PCILIB_REGISTER_INVALID) {
  2873. Usage(argc, argv, "Invalid address (%s) is specified", addr);
  2874. } else {
  2875. ++mode;
  2876. }
  2877. } else {
  2878. mode += 2;
  2879. }
  2880. }
  2881. }
  2882. if (mode == MODE_GRAB) {
  2883. if (output) {
  2884. char fsname[128];
  2885. if (!get_file_fs(output, 127, fsname)) {
  2886. if (!strcmp(fsname, "ext4")) partition = PARTITION_EXT4;
  2887. else if (!strcmp(fsname, "raw")) partition = PARTITION_RAW;
  2888. }
  2889. } else {
  2890. output = "/dev/null";
  2891. partition = PARTITION_NULL;
  2892. }
  2893. if (!timeout_set) {
  2894. if (run_time) timeout = PCILIB_TIMEOUT_INFINITE;
  2895. else timeout = PCILIB_EVENT_TIMEOUT;
  2896. }
  2897. if (!size_set) {
  2898. if (run_time) size = 0;
  2899. }
  2900. }
  2901. if (mode != MODE_GRAB) {
  2902. if (size == (size_t)-1)
  2903. Usage(argc, argv, "Unlimited size is not supported in selected operation mode");
  2904. }
  2905. if ((bank)&&(amode == ACCESS_DMA)) {
  2906. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0))
  2907. Usage(argc, argv, "Invalid DMA channel (%s) is specified", bank);
  2908. else dma = itmp;
  2909. } else if (bank) {
  2910. switch (mode) {
  2911. case MODE_BENCHMARK:
  2912. case MODE_READ:
  2913. case MODE_WRITE:
  2914. if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS))
  2915. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2916. else bar = itmp;
  2917. break;
  2918. default:
  2919. if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
  2920. Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
  2921. }
  2922. }
  2923. signal(SIGINT, signal_exit_handler);
  2924. if ((mode != MODE_GRAB)&&(output)) {
  2925. ofile = fopen(output, "a+");
  2926. if (!ofile) {
  2927. Error("Failed to open file \"%s\"", output);
  2928. }
  2929. }
  2930. // Requesting real-time priority when needed
  2931. switch (mode) {
  2932. case MODE_READ:
  2933. case MODE_WRITE:
  2934. if (amode != ACCESS_DMA)
  2935. break;
  2936. case MODE_BENCHMARK:
  2937. case MODE_GRAB:
  2938. sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO);
  2939. err = sched_setscheduler(0, SCHED_FIFO, &sched_param);
  2940. if (err) pcilib_info("Failed to acquire real-time priority (errno: %i)", errno);
  2941. break;
  2942. default:
  2943. ;
  2944. }
  2945. switch (mode) {
  2946. case MODE_INFO:
  2947. Info(handle, model_info, info_target);
  2948. break;
  2949. case MODE_LIST:
  2950. if ((list_target)&&(*list_target == '/'))
  2951. ListProperties(handle, list_target, details);
  2952. else
  2953. List(handle, model_info, list_target, details);
  2954. break;
  2955. case MODE_BENCHMARK:
  2956. Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);
  2957. break;
  2958. case MODE_READ:
  2959. if (amode == ACCESS_DMA) {
  2960. err = ReadData(handle, amode, flags, dma, bar, start, size_set?size:0, access, endianess, timeout_set?timeout:(size_t)-1, ofile);
  2961. } else if (amode == ACCESS_CONFIG) {
  2962. err = ReadData(handle, amode, flags, dma, bar, addr?start:0, (addr||size_set)?size:(256/abs(access)), access, endianess, (size_t)-1, ofile);
  2963. } else if (addr) {
  2964. err = ReadData(handle, amode, flags, dma, bar, start, size, access, endianess, (size_t)-1, ofile);
  2965. } else {
  2966. Error("Address to read is not specified");
  2967. }
  2968. break;
  2969. case MODE_READ_REGISTER:
  2970. case MODE_READ_PROPERTY:
  2971. if ((reg)||(view)||(!addr)) ReadRegister(handle, model_info, bank, reg, view, unit);
  2972. else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);
  2973. break;
  2974. case MODE_WRITE:
  2975. WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);
  2976. break;
  2977. case MODE_WRITE_REGISTER:
  2978. case MODE_WRITE_PROPERTY:
  2979. if (reg||view) WriteRegister(handle, model_info, bank, reg, view, unit, data);
  2980. else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);
  2981. break;
  2982. case MODE_RESET:
  2983. pcilib_reset(handle);
  2984. break;
  2985. case MODE_GRAB:
  2986. TriggerAndGrab(handle, grab_mode, event, data_type, size, run_time, trigger_time, timeout, partition, format, buffer, threads, verbose, output);
  2987. break;
  2988. case MODE_LIST_DMA:
  2989. ListDMA(handle, fpga_device, model_info);
  2990. break;
  2991. case MODE_LIST_DMA_BUFFERS:
  2992. ListBuffers(handle, fpga_device, model_info, dma, dma_direction);
  2993. break;
  2994. case MODE_READ_DMA_BUFFER:
  2995. ReadBuffer(handle, fpga_device, model_info, dma, dma_direction, block, ofile);
  2996. break;
  2997. case MODE_START_DMA:
  2998. StartStopDMA(handle, model_info, dma, dma_direction, 1);
  2999. break;
  3000. case MODE_STOP_DMA:
  3001. StartStopDMA(handle, model_info, dma, dma_direction, 0);
  3002. break;
  3003. case MODE_ENABLE_IRQ:
  3004. EnableIRQ(handle, model_info, irq_type);
  3005. break;
  3006. case MODE_DISABLE_IRQ:
  3007. DisableIRQ(handle, model_info, irq_type);
  3008. break;
  3009. case MODE_ACK_IRQ:
  3010. AckIRQ(handle, model_info, irq_source);
  3011. break;
  3012. case MODE_WAIT_IRQ:
  3013. WaitIRQ(handle, model_info, irq_source, timeout);
  3014. break;
  3015. case MODE_LIST_KMEM:
  3016. if (use) DetailKMEM(handle, fpga_device, use, block);
  3017. else ListKMEM(handle, fpga_device);
  3018. break;
  3019. case MODE_READ_KMEM:
  3020. ReadKMEM(handle, fpga_device, useid, block, 0, ofile);
  3021. break;
  3022. case MODE_ALLOC_KMEM:
  3023. AllocKMEM(handle, fpga_device, use, type, size, block_size, alignment);
  3024. break;
  3025. case MODE_FREE_KMEM:
  3026. FreeKMEM(handle, fpga_device, use, force);
  3027. break;
  3028. case MODE_LIST_LOCKS:
  3029. ListLocks(handle, verbose);
  3030. break;
  3031. case MODE_FREE_LOCKS:
  3032. FreeLocks(handle, force);
  3033. break;
  3034. case MODE_LOCK:
  3035. LockUnlock(handle, lock, 1, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3036. break;
  3037. case MODE_UNLOCK:
  3038. LockUnlock(handle, lock, 0, timeout_set?timeout:PCILIB_TIMEOUT_INFINITE);
  3039. break;
  3040. case MODE_INVALID:
  3041. break;
  3042. }
  3043. if (ofile) fclose(ofile);
  3044. pcilib_close(handle);
  3045. if (data != argv + optind) free(data);
  3046. return err;
  3047. }