ipe_benchmark.c 6.3 KB

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  1. #define _PCILIB_DMA_IPE_C
  2. #define _BSD_SOURCE
  3. #define _DEFAULT_SOURCE
  4. #define _POSIX_C_SOURCE 200112L
  5. #include <stdio.h>
  6. #include <stdlib.h>
  7. #include <string.h>
  8. #include <unistd.h>
  9. #include <sched.h>
  10. #include <sys/time.h>
  11. #include <arpa/inet.h>
  12. #include "pci.h"
  13. #include "pcilib.h"
  14. #include "error.h"
  15. #include "tools.h"
  16. #include "debug.h"
  17. #include "ipe.h"
  18. #include "ipe_private.h"
  19. typedef struct {
  20. size_t size;
  21. size_t pos;
  22. pcilib_dma_flags_t flags;
  23. } dma_ipe_skim_callback_context_t;
  24. static int dma_ipe_skim_callback(void *arg, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
  25. dma_ipe_skim_callback_context_t *ctx = (dma_ipe_skim_callback_context_t*)arg;
  26. ctx->pos += bufsize;
  27. if (flags & PCILIB_DMA_FLAG_EOP) {
  28. if ((ctx->pos < ctx->size)&&(ctx->flags&PCILIB_DMA_FLAG_MULTIPACKET)) {
  29. if (ctx->flags&PCILIB_DMA_FLAG_WAIT) return PCILIB_STREAMING_WAIT;
  30. else return PCILIB_STREAMING_CONTINUE;
  31. }
  32. return PCILIB_STREAMING_STOP;
  33. }
  34. return PCILIB_STREAMING_REQ_FRAGMENT;
  35. }
  36. int dma_ipe_skim_dma_custom(pcilib_t *ctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, void *buf, size_t *read_bytes) {
  37. int err;
  38. dma_ipe_skim_callback_context_t opts = {
  39. size, 0, flags
  40. };
  41. err = pcilib_stream_dma(ctx, dma, addr, size, flags, timeout, dma_ipe_skim_callback, &opts);
  42. if (read_bytes) *read_bytes = opts.pos;
  43. return err;
  44. }
  45. double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction) {
  46. int err = 0;
  47. ipe_dma_t *ctx = (ipe_dma_t*)vctx;
  48. int iter;
  49. size_t us = 0;
  50. struct timeval start, cur;
  51. void *buf;
  52. size_t bytes, rbytes;
  53. int (*read_dma)(pcilib_t *ctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, void *buf, size_t *read_bytes);
  54. if ((direction == PCILIB_DMA_TO_DEVICE)||(direction == PCILIB_DMA_BIDIRECTIONAL)) return -1.;
  55. if ((dma != PCILIB_DMA_ENGINE_INVALID)&&(dma > 1)) return -1.;
  56. err = dma_ipe_start(vctx, 0, PCILIB_DMA_FLAGS_DEFAULT);
  57. if (err) return err;
  58. if (size%ctx->page_size) size = (1 + size / ctx->page_size) * ctx->page_size;
  59. if (getenv("PCILIB_BENCHMARK_HARDWARE"))
  60. read_dma = dma_ipe_skim_dma_custom;
  61. else
  62. read_dma = pcilib_read_dma_custom;
  63. // There is no significant difference and we can remove this when testing phase is over.
  64. // DS: With large number of buffers this is quite slow due to skimming of initially written buffers
  65. if (getenv("PCILIB_BENCHMARK_STREAMING")) {
  66. size_t dma_buffer_space;
  67. pcilib_dma_engine_status_t dma_status;
  68. if (read_dma == pcilib_read_dma_custom)
  69. pcilib_info_once("Benchmarking the DMA streaming (with memcpy)");
  70. else
  71. pcilib_info_once("Benchmarking the DMA streaming (without memcpy)");
  72. // Starting DMA
  73. WR(IPEDMA_REG_CONTROL, 0x1);
  74. gettimeofday(&start, NULL);
  75. pcilib_calc_deadline(&start, ctx->dma_timeout * IPEDMA_DMA_PAGES);
  76. #ifdef IPEDMA_BUG_LAST_READ
  77. dma_buffer_space = (IPEDMA_DMA_PAGES - 2) * ctx->page_size;
  78. #else /* IPEDMA_BUG_LAST_READ */
  79. dma_buffer_space = (IPEDMA_DMA_PAGES - 1) * ctx->page_size;
  80. #endif /* IPEDMA_BUG_LAST_READ */
  81. // Allocate memory and prepare data
  82. err = posix_memalign(&buf, 4096, size + dma_buffer_space);
  83. if ((err)||(!buf)) return -1;
  84. // Wait all DMA buffers are filled
  85. memset(&dma_status, 0, sizeof(dma_status));
  86. do {
  87. usleep(10 * IPEDMA_NODATA_SLEEP);
  88. err = dma_ipe_get_status(vctx, dma, &dma_status, 0, NULL);
  89. } while ((!err)&&(dma_status.written_bytes < dma_buffer_space)&&(pcilib_calc_time_to_deadline(&start) > 0));
  90. if (err) {
  91. pcilib_error("Error (%i) getting dma status", err);
  92. return -1;
  93. } else if (dma_status.written_bytes < dma_buffer_space) {
  94. pcilib_error("Timeout while waiting DMA engine to feel the buffer space completely, only %zu bytes of %zu written", dma_status.written_bytes, dma_buffer_space);
  95. return -1;
  96. }
  97. gettimeofday(&start, NULL);
  98. for (iter = 0; iter < iterations; iter++) {
  99. for (bytes = 0; bytes < (size + dma_buffer_space); bytes += rbytes) {
  100. err = read_dma(ctx->dmactx.pcilib, 0, addr, size + dma_buffer_space - bytes, PCILIB_DMA_FLAG_MULTIPACKET, ctx->dma_timeout, buf + bytes, &rbytes);
  101. if (err) {
  102. pcilib_error("Can't read data from DMA, error %i", err);
  103. return -1;
  104. }
  105. }
  106. dma_buffer_space = 0;
  107. }
  108. gettimeofday(&cur, NULL);
  109. us += ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec));
  110. // Stopping DMA
  111. WR(IPEDMA_REG_CONTROL, 0x0);
  112. usleep(IPEDMA_RESET_DELAY);
  113. pcilib_skip_dma(ctx->dmactx.pcilib, 0);
  114. } else {
  115. if (read_dma == dma_ipe_skim_dma_custom)
  116. pcilib_info_once("Benchmarking the DMA hardware (without memcpy)");
  117. WR(IPEDMA_REG_CONTROL, 0x0);
  118. usleep(IPEDMA_RESET_DELAY);
  119. err = pcilib_skip_dma(ctx->dmactx.pcilib, 0);
  120. if (err) {
  121. pcilib_error("Can't start benchmark, devices continuously writes unexpected data using DMA engine");
  122. return -1;
  123. }
  124. // Allocate memory and prepare data
  125. err = posix_memalign(&buf, 4096, size);
  126. if ((err)||(!buf)) return -1;
  127. for (iter = 0; iter <= iterations; iter++) {
  128. gettimeofday(&start, NULL);
  129. // Starting DMA
  130. WR(IPEDMA_REG_CONTROL, 0x1);
  131. for (bytes = 0; bytes < size; bytes += rbytes) {
  132. err = read_dma(ctx->dmactx.pcilib, 0, addr, size - bytes, PCILIB_DMA_FLAG_MULTIPACKET, ctx->dma_timeout, buf + bytes, &rbytes);
  133. if (err) {
  134. pcilib_error("Can't read data from DMA (iteration: %zu, offset: %zu), error %i", iter, bytes, err);
  135. return -1;
  136. }
  137. }
  138. gettimeofday(&cur, NULL);
  139. // Stopping DMA
  140. WR(IPEDMA_REG_CONTROL, 0x0);
  141. usleep(IPEDMA_RESET_DELAY);
  142. if (err) break;
  143. // Heating up during the first iteration
  144. if (iter)
  145. us += ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec));
  146. pcilib_info("Iteration %-4i latency: %lu", iter, ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)));
  147. err = pcilib_skip_dma(ctx->dmactx.pcilib, 0);
  148. if (err) {
  149. pcilib_error("Can't start iteration, devices continuously writes unexpected data using DMA engine");
  150. break;
  151. }
  152. usleep(ctx->dma_timeout);
  153. }
  154. }
  155. free(buf);
  156. return err?-1:((1. * size * iterations * 1000000) / (1024. * 1024. * us));
  157. }