nwl_loopback.c 7.2 KB

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  1. #define _BSD_SOURCE
  2. #define _DEFAULT_SOURCE
  3. #include <stdio.h>
  4. #include <stdlib.h>
  5. #include <string.h>
  6. #include <unistd.h>
  7. #include <sys/time.h>
  8. #include "pci.h"
  9. #include "pcilib.h"
  10. #include "error.h"
  11. #include "tools.h"
  12. #include "nwl_private.h"
  13. #include "nwl_defines.h"
  14. #define NWL_BUG_EXTRA_DATA
  15. int dma_nwl_start_loopback(nwl_dma_t *ctx, pcilib_dma_direction_t direction, size_t packet_size) {
  16. uint32_t val;
  17. ctx->loopback_started = 1;
  18. dma_nwl_stop_loopback(ctx);
  19. val = packet_size;
  20. nwl_write_register(val, ctx, ctx->base_addr, PKT_SIZE_ADDRESS);
  21. if (ctx->type == NWL_MODIFICATION_DEFAULT) {
  22. switch (direction) {
  23. case PCILIB_DMA_BIDIRECTIONAL:
  24. val = LOOPBACK;
  25. nwl_write_register(val, ctx, ctx->base_addr, TX_CONFIG_ADDRESS);
  26. break;
  27. case PCILIB_DMA_TO_DEVICE:
  28. return -1;
  29. case PCILIB_DMA_FROM_DEVICE:
  30. val = PKTGENR;
  31. nwl_write_register(val, ctx, ctx->base_addr, RX_CONFIG_ADDRESS);
  32. break;
  33. }
  34. }
  35. ctx->loopback_started = 1;
  36. return 0;
  37. }
  38. int dma_nwl_stop_loopback(nwl_dma_t *ctx) {
  39. uint32_t val = 0;
  40. if (!ctx->loopback_started) return 0;
  41. /* Stop in any case, otherwise we can have problems in benchmark due to
  42. engine initialized in previous run, and benchmark is only actual usage.
  43. Otherwise, we should detect current loopback status during initialization */
  44. if (ctx->type == NWL_MODIFICATION_DEFAULT) {
  45. nwl_write_register(val, ctx, ctx->base_addr, TX_CONFIG_ADDRESS);
  46. nwl_write_register(val, ctx, ctx->base_addr, RX_CONFIG_ADDRESS);
  47. }
  48. ctx->loopback_started = 0;
  49. return 0;
  50. }
  51. double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction) {
  52. int iter, i;
  53. int err;
  54. size_t bytes, rbytes;
  55. uint32_t *buf, *cmp;
  56. const char *error = NULL;
  57. size_t packet_size, blocks;
  58. size_t us = 0;
  59. struct timeval start, cur;
  60. nwl_dma_t *ctx = (nwl_dma_t*)vctx;
  61. pcilib_dma_engine_t readid = pcilib_find_dma_by_addr(ctx->dmactx.pcilib, PCILIB_DMA_FROM_DEVICE, dma);
  62. pcilib_dma_engine_t writeid = pcilib_find_dma_by_addr(ctx->dmactx.pcilib, PCILIB_DMA_TO_DEVICE, dma);
  63. if (size%sizeof(uint32_t)) size = 1 + size / sizeof(uint32_t);
  64. else size /= sizeof(uint32_t);
  65. // Not supported
  66. if (ctx->type == NWL_MODIFICATION_DEFAULT) {
  67. if (direction == PCILIB_DMA_TO_DEVICE) return -1.;
  68. }
  69. // else if ((direction == PCILIB_DMA_FROM_DEVICE)&&(ctx->type != NWL_MODIFICATION_DEFAULT)) return -1.;
  70. // Stop Generators and drain old data
  71. if (ctx->type == NWL_MODIFICATION_DEFAULT) dma_nwl_stop_loopback(ctx);
  72. // dma_nwl_stop_engine(ctx, readid); // DS: replace with something better
  73. __sync_synchronize();
  74. err = pcilib_skip_dma(ctx->dmactx.pcilib, readid);
  75. if (err) {
  76. pcilib_error("Can't start benchmark, devices continuously writes unexpected data using DMA engine");
  77. return -1;
  78. }
  79. #ifdef NWL_GENERATE_DMA_IRQ
  80. dma_nwl_enable_engine_irq(ctx, readid);
  81. dma_nwl_enable_engine_irq(ctx, writeid);
  82. #endif /* NWL_GENERATE_DMA_IRQ */
  83. if (size * sizeof(uint32_t) > NWL_MAX_PACKET_SIZE) {
  84. packet_size = NWL_MAX_PACKET_SIZE;
  85. blocks = (size * sizeof(uint32_t)) / packet_size + (((size*sizeof(uint32_t))%packet_size)?1:0);
  86. } else {
  87. packet_size = size * sizeof(uint32_t);
  88. blocks = 1;
  89. }
  90. dma_nwl_start_loopback(ctx, direction, packet_size);
  91. // Allocate memory and prepare data
  92. buf = malloc(blocks * packet_size * sizeof(uint32_t));
  93. cmp = malloc(blocks * packet_size * sizeof(uint32_t));
  94. if ((!buf)||(!cmp)) {
  95. if (buf) free(buf);
  96. if (cmp) free(cmp);
  97. return -1;
  98. }
  99. if (ctx->type == NWL_MODIFICATION_IPECAMERA) {
  100. pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x1e5);
  101. usleep(100000);
  102. pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x1e1);
  103. // This way causes more problems with garbage
  104. //pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x3e1);
  105. }
  106. // Benchmark
  107. for (iter = 0; iter < iterations; iter++) {
  108. memset(cmp, 0x13 + iter, size * sizeof(uint32_t));
  109. if (ctx->type == NWL_MODIFICATION_IPECAMERA) {
  110. pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x1e1);
  111. }
  112. if ((direction&PCILIB_DMA_TO_DEVICE)||(ctx->type != NWL_MODIFICATION_DEFAULT)) {
  113. memcpy(buf, cmp, size * sizeof(uint32_t));
  114. if (direction&PCILIB_DMA_TO_DEVICE) {
  115. gettimeofday(&start, NULL);
  116. }
  117. err = pcilib_write_dma(ctx->dmactx.pcilib, writeid, addr, size * sizeof(uint32_t), buf, &bytes);
  118. if ((err)||(bytes != size * sizeof(uint32_t))) {
  119. error = "Write failed";
  120. break;
  121. }
  122. if (direction&PCILIB_DMA_TO_DEVICE) {
  123. // wait written
  124. if (direction == PCILIB_DMA_TO_DEVICE) {
  125. dma_nwl_wait_completion(ctx, writeid, PCILIB_DMA_TIMEOUT);
  126. }
  127. gettimeofday(&cur, NULL);
  128. us += ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec));
  129. }
  130. }
  131. if (ctx->type == NWL_MODIFICATION_IPECAMERA) {
  132. pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x3e1);
  133. }
  134. memset(buf, 0, size * sizeof(uint32_t));
  135. if (direction&PCILIB_DMA_FROM_DEVICE) {
  136. gettimeofday(&start, NULL);
  137. }
  138. for (i = 0, bytes = 0; i < blocks; i++) {
  139. #ifdef NWL_BUG_EXTRA_DATA
  140. retry:
  141. #endif
  142. err = pcilib_read_dma(ctx->dmactx.pcilib, readid, addr, packet_size * sizeof(uint32_t), buf + (bytes>>2), &rbytes);
  143. if ((err)||(rbytes%sizeof(uint32_t))) {
  144. break;
  145. }
  146. #ifdef NWL_BUG_EXTRA_DATA
  147. else if (rbytes == 8) {
  148. goto retry;
  149. }
  150. #endif
  151. bytes += rbytes;
  152. }
  153. if (direction&PCILIB_DMA_FROM_DEVICE) {
  154. gettimeofday(&cur, NULL);
  155. us += ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec));
  156. }
  157. #ifdef NWL_BUG_EXTRA_DATA
  158. if ((err)||((bytes != size * sizeof(uint32_t))&&((bytes - 8) != size * sizeof(uint32_t)))) {
  159. #else
  160. if ((err)||(bytes != size * sizeof(uint32_t))) {
  161. #endif
  162. printf("Expected: %zu bytes, but %zu read, error: %i\n", size * sizeof(uint32_t), bytes, err);
  163. error = "Read failed";
  164. break;
  165. }
  166. #ifndef NWL_BUG_EXTRA_DATA
  167. if (direction == PCILIB_DMA_BIDIRECTIONAL) {
  168. if (memcmp(buf, cmp, size * sizeof(uint32_t))) {
  169. for (i = 0; i < size; i++)
  170. if (buf[i] != cmp[i]) break;
  171. bytes = i;
  172. printf("Expected: *0x%lx, Written at dword %lu:", 0x13 + iter, bytes);
  173. for (; (i < size)&&(i < (bytes + 16)); i++) {
  174. if (((i - bytes)%8)==0) printf("\n");
  175. printf("% 10lx", buf[i]);
  176. }
  177. printf("\n");
  178. error = "Written and read values does not match";
  179. break;
  180. }
  181. }
  182. #endif
  183. }
  184. if (ctx->type == NWL_MODIFICATION_IPECAMERA) {
  185. pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x1e1);
  186. }
  187. if (error) {
  188. pcilib_warning("%s at iteration %i, error: %i, bytes: %zu", error, iter, err, bytes);
  189. }
  190. #ifdef NWL_GENERATE_DMA_IRQ
  191. dma_nwl_disable_engine_irq(ctx, writeid);
  192. dma_nwl_disable_engine_irq(ctx, readid);
  193. #endif /* NWL_GENERATE_DMA_IRQ */
  194. dma_nwl_stop_loopback(ctx);
  195. __sync_synchronize();
  196. if (direction == PCILIB_DMA_FROM_DEVICE) {
  197. pcilib_skip_dma(ctx->dmactx.pcilib, readid);
  198. }
  199. free(cmp);
  200. free(buf);
  201. return /*error?-1:*/(1. * size * sizeof(uint32_t) * iterations * 1000000) / (1024. * 1024. * us);
  202. }