kernel.cl 843 B

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  1. #define REG_DMA 0x04
  2. #define REG_COUNTER 0x9000
  3. #define REG_CONTROL 0x9040
  4. #define CMD_COUNTER_START 0x1
  5. #define CMD_LATENCY_STOP 0xf0000000
  6. /* divide by four to avoid word addressing */
  7. #define WR32(buffer, addr, value) buffer[addr / 4] = value;
  8. kernel void
  9. wait_and_write (volatile global uint *from_fpga, volatile global uint *to_fpga, global uint *output)
  10. {
  11. if (get_global_id (0) == 0) {
  12. uint count;
  13. count = 0;
  14. /* The following does not start the DMA. We will exit with the count
  15. * hitting the limit */
  16. /* WR32 (to_fpga, REG_DMA, 1); */
  17. /* wait for FPGA to write */
  18. while (from_fpga[1] == 42 && count < 10000000)
  19. count++;
  20. WR32 (to_fpga, REG_DMA, 0);
  21. output[0] = from_fpga[1];
  22. output[1] = count;
  23. }
  24. }