abstract.txt 967 B

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  1. Motivation/Problem
  2. Current generation GPUs are capable of processing several TFLOP/s which causes
  3. I/O bottlenecks in applications with large bandwidth and low computational
  4. requirements. Moreover, applications that process data from external sources
  5. such as a frontend FPGA are affected twice by this problem because data first
  6. has to be transferred into main system memory via CPU transfers before being
  7. moved to the GPU for final operation in a second transfer.
  8. Method/solution
  9. To remedy this problem, we designed and implemented a system architecture
  10. comprising a custom FPGA board with a flexible DMA transfer policy and a
  11. heterogeneous compute framework receiving data using AMD's DirectGMA
  12. OpenCL extension.
  13. Results
  14. Conclusion
  15. With our proposed system architecture we are able to sustain the bandwidth
  16. requirements of various applications such as real-time tomographic image
  17. reconstruction and signal analysis with a peak FPGA-GPU throughput of XXX GB/s.