2 Commits c14673dc20 ... f84ede7188

Author SHA1 Message Date
  kapture2 f84ede7188 Fixed ADC Gain and Offset Address Ordering 3 years ago
  kapture2 cb39315129 Fixed TimingWidget Element Grouping 3 years ago
2 changed files with 63 additions and 61 deletions
  1. 57 51
      KCG/base/backend/board/board_config.py
  2. 6 10
      KCG/widgets/TimingWidget.py

+ 57 - 51
KCG/base/backend/board/board_config.py

@@ -658,51 +658,53 @@ class BoardConfiguration(QtGui.QWidget):
         #Bits 16 and 17 of register 9044 control which FMCs to route the
         #SPI commands to. If both bits are 1, then the SPI commands get routed
         #to both FMCs at the same time.
+        #Bit 16 is FMC1 and Bit 17 is FMC2
 
         #pci.read response is returned as a list. Since we expect only one
         #value, we access index [0]
         initial_mux_config = pci.read(self.identifier, reg='9044')[0]
+        
+        #Note:
+        #Due to the way the hardware is internally structured, things are
+        #a bit confusing as to which value is supposed to go where ...
+        #If in the future, this addressing and ordering gets cleaned,
+        #you should be able to safely remove the following reodering
+        if len(x) > 4 and len(x) < 9:
+            idx = [4,5,6,7,2,3,0,1]
+            x = x[idx]
+        else:
+            a = np.array([0,0,0,0])
+            idx = [2,3,0,1]
+            x = x[idx]
+            x = np.concatenate((a,x), axis=None)
 
-
+        
         #Select SPI1 and FMC1
-        updated_mux_config = initial_mux_config | 0x10002
-        pci.write(self.identifier, hex(updated_mux_config), '0x9044')
-
+        pci.write(self.identifier, '0x10002', '0x9044')
         pci.write(self.identifier, '46{:04x}'.format(int(x[0])), '0x9064')
         pci.write(self.identifier, '56{:04x}'.format(int(x[1])), '0x9064')
 
 
         #Select SPI2 and FMC1
-        updated_mux_config = initial_mux_config | 0x10004
-        pci.write(self.identifier, hex(updated_mux_config), '0x9044')
-
+        pci.write(self.identifier, '0x10004', '0x9044')
         pci.write(self.identifier, '46{:04x}'.format(int(x[2])), '0x9064')
         pci.write(self.identifier, '56{:04x}'.format(int(x[3])), '0x9064')
 
+        #Select SPI0 and FMC2
+        pci.write(self.identifier, '0x20002', '0x9044')
+        pci.write(self.identifier, '46{:04x}'.format(int(x[4])), '0x9064')
+        pci.write(self.identifier, '56{:04x}'.format(int(x[5])), '0x9064')
 
-        if len(x) > 4 and len(x) < 9:
-
-            #Select SPI1 and FMC2
-            updated_mux_config = initial_mux_config | 0x20002
-            pci.write(self.identifier, hex(updated_mux_config), '0x9044')
-
-            pci.write(self.identifier, '46{:04x}'.format(int(x[4])), '0x9064')
-            pci.write(self.identifier, '56{:04x}'.format(int(x[5])), '0x9064')
+        #Select SPI2 and FMC2
+        pci.write(self.identifier, '0x20004', '0x9044')
+        pci.write(self.identifier, '46{:04x}'.format(int(x[6])), '0x9064')
+        pci.write(self.identifier, '56{:04x}'.format(int(x[7])), '0x9064')
 
-
-            #Select SPI2 and FMC2
-            updated_mux_config = initial_mux_config | 0x20004
-            pci.write(self.identifier, hex(updated_mux_config), '0x9044')
-
-            pci.write(self.identifier, '46{:04x}'.format(int(x[6])), '0x9064')
-            pci.write(self.identifier, '56{:04x}'.format(int(x[7])), '0x9064')
-
-        else:
+        if len(x) > 8:
             logging.vinfo("Gain update not defined for more than 8 adc")
 
-
         #Restore the initial MUX Configuration
-        pci.write(self.identifier, hex(initial_mux_config), '0x9044')
+        pci.write(self.identifier, initial_mux_config, '0x9044')
 
 
     def _set_adc_offset(self, x):
@@ -717,45 +719,49 @@ class BoardConfiguration(QtGui.QWidget):
 
         #pci.read response is returned as a list. Since we expect only one
         #value, we access index [0]
-        initial_mux_config = pci.read(self.identifier, reg='9044')[0]
+        initial_mux_config = pci.read(self.identifier, reg='9044', decimal=True)[0]
 
+        #Note:
+        #Due to the way the hardware is internally structured, things are
+        #a bit confusing as to which value is supposed to go where ...
+        #If in the future, this addressing and ordering gets cleaned,
+        #you should be able to safely remove the following reodering
+        if len(x) > 4 and len(x) < 9:
+            idx = [4,5,6,7,2,3,0,1]
+            x = x[idx]
+        else:
+            a = np.array([0,0,0,0])
+            idx = [2,3,0,1]
+            x = x[idx]
+            x = np.concatenate((a,x), axis=None)
 
-        #Select SPI1 and FMC1
-        updated_mux_config = initial_mux_config | 0x10002
-        pci.write(self.identifier, hex(updated_mux_config), '0x9044')
 
+        #Select SPI1 and FMC1
+        pci.write(self.identifier, '0x10002', '0x9044')
         pci.write(self.identifier, '44{:04x}'.format(int(x[0])), '0x9064')
         pci.write(self.identifier, '54{:04x}'.format(int(x[1])), '0x9064')
 
-
         #Select SPI2 and FMC1
-        updated_mux_config = initial_mux_config | 0x10004
-        pci.write(self.identifier, hex(updated_mux_config), '0x9044')
-
+        pci.write(self.identifier, '0x10004', '0x9044')
         pci.write(self.identifier, '44{:04x}'.format(int(x[2])), '0x9064')
         pci.write(self.identifier, '54{:04x}'.format(int(x[3])), '0x9064')
 
+        #Select SPI1 and FMC2
+        pci.write(self.identifier, '0x20002', '0x9044')
+        pci.write(self.identifier, '44{:04x}'.format(int(x[4])), '0x9064')
+        pci.write(self.identifier, '54{:04x}'.format(int(x[5])), '0x9064')
 
-        if len(x) > 4 and len(x) < 9:
-
-            #Select SPI1 and FMC2
-            updated_mux_config = initial_mux_config | 0x20002
-            pci.write(self.identifier, hex(updated_mux_config), '0x9044')
-
-            pci.write(self.identifier, '44{:04x}'.format(int(x[4])), '0x9064')
-            pci.write(self.identifier, '54{:04x}'.format(int(x[5])), '0x9064')
+        #Select SPI2 and FMC2
+        pci.write(self.identifier, '0x20004', '0x9044')
+        pci.write(self.identifier, '44{:04x}'.format(int(x[6])), '0x9064')
+        pci.write(self.identifier, '54{:04x}'.format(int(x[7])), '0x9064')
 
-
-            #Select SPI2 and FMC2
-            updated_mux_config = initial_mux_config | 0x20004
-            pci.write(self.identifier, hex(updated_mux_config), '0x9044')
-
-            pci.write(self.identifier, '44{:04x}'.format(int(x[6])), '0x9064')
-            pci.write(self.identifier, '54{:04x}'.format(int(x[7])), '0x9064')
-
-        else:
+        if len(x) > 8:
             logging.vinfo("Offset update not defined for more than 8 adc")
 
+        #Restore the initial MUX Configuration
+        pci.write(self.identifier, hex(initial_mux_config), '0x9044')
+
 
     def _set_samplingrate(self, rate):
         return

+ 6 - 10
KCG/widgets/TimingWidget.py

@@ -160,10 +160,8 @@ class TimingPart(kcgw.KCGWidgets):
             "no_board_{}".format(self.board_id),
             "acquire_{}".format(self.board_id),
             "continuous_read_{}".format(board_id)], 
-                [
-                    self.fineAdcInput
-                ]
-                )
+            self.fineAdcInput
+            )
 
         self.bunchShiftLabel = self.createLabel(tr("Label", "Bunch Shift"))
 
@@ -175,10 +173,8 @@ class TimingPart(kcgw.KCGWidgets):
             "no_board_{}".format(self.board_id),
             "acquire_{}".format(self.board_id),
             "continuous_read_{}".format(board_id)], 
-                [
-                    self.bunchShiftInput
-                ]
-                )
+            self.bunchShiftInput
+            )
 
 
         #---------[ End ]---------
@@ -490,8 +486,8 @@ class TimingPart(kcgw.KCGWidgets):
 
 
         Elements.emptyGroup('timing_{}'.format(self.board_id))
-        Elements.removeItem(None, [self.fineAdcInput])
-        Elements.removeItem(None, [self.bunchShiftInput])
+        Elements.removeItem(None, self.fineAdcInput)
+        Elements.removeItem(None, self.bunchShiftInput)
         Elements.removeItem(None, [
                                     self.coarseInputTh,
                                     #self.coarseInputAdc,