SSL_CheckerBoardTest.c 7.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194
  1. /*******************************************************************************
  2. Class B Library implementation file
  3. Summary:
  4. This file contains the implementation for the
  5. the Class B Safety Software Library RAM Checkerboard Tests
  6. for PIC18 MCUs.
  7. *******************************************************************************/
  8. /*******************************************************************************
  9. FileName: SSL_CheckerBoardTest.c
  10. Processor: PIC18
  11. Compiler: Microchip MPLAB® C18 v3.41 or higher
  12. Copyright © 2008-2009 released Microchip Technology Inc. All rights reserved.
  13. Microchip licenses to you the right to use, modify, copy and distribute
  14. the accompanying software only when embedded on a Microchip microcontroller or
  15. digital signal controller that is integrated into your product or third party product.
  16. If the accompanying software required your consent to the terms of Microchip's
  17. click-wrap license agreement, then you should also refer to such license agreement
  18. for additional information regarding your rights and obligations.
  19. Your acceptance and/or use of this software constitutes your agreement to the terms
  20. and conditions of this notice and applicable click-wrap license, if any.
  21. You agree that you are solely responsible for testing the code and determining its suitability.
  22. Microchip has no obligation to modify, test, certify, or support the code.
  23. SOFTWARE AND DOCUMENTATION ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND,
  24. EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF
  25. MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE.
  26. IN NO EVENT SHALL MICROCHIP OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER
  27. CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR
  28. OTHER LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES
  29. INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR
  30. CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST dataC, COST OF PROCUREMENT OF
  31. SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES
  32. (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.
  33. *******************************************************************************/
  34. #include "SSL_CheckerBoardTest.h"
  35. #pragma idata RAMFIX=0xE00
  36. int8_t* pRAM1_RAM = (int8_t *)RAM_StartAddress;
  37. int8_t* pRAM2_RAM = (int8_t *)RAM_StartAddress;
  38. int8_t BYTE_Low_RAM = 0x00;
  39. int8_t BYTE_High_RAM = 0x00;
  40. uint16_t CB_Counter_RAM = RAM_Length;
  41. #pragma idata STACKFIX=0x100
  42. int8_t* pRAM1_STACK = (int8_t *)STACK_StartAddress;
  43. int8_t* pRAM2_STACK = (int8_t *)STACK_StartAddress;
  44. int8_t BYTE_Low_STACK = 0x00;
  45. int8_t BYTE_High_STACK = 0x00;
  46. uint16_t CB_Counter_STACK = STACK_Length;
  47. /*
  48. /*******************************************************************************
  49. Function:
  50. int SSL_CheckerBoard( void )
  51. Summary:
  52. The RAM Checker Board test implements one of the functional tests
  53. H.2.19.6 as defined by the IEC 60730 standard.
  54. Description:
  55. This routine detects single bit Faults in the variable memory.
  56. This ensures that the bits in the tested RAM are not stuck at
  57. a value ‘0’ or ‘1’.
  58. The test writes the checkerboard pattern (0x55 followed by 0xAA)
  59. to adjacent memory locations starting at ramStartAddress.
  60. It performs the following steps:
  61. 1. The content of a 2 bytes memory chunk to be tested is saved in
  62. temporary CPU registers.
  63. 2. Writes the pattern 0x55 followed by 0xAA to adjacent memory locations
  64. filling up the 2 bytes memory chunk.
  65. 3. It reads the memory chunk adjacent locations and checks that the read-back values match
  66. the written pattern.
  67. If the values match set the success result and go to step 4.
  68. Else set the error result and go to step 6.
  69. 4. Writes the inverted pattern 0xAA followed by 0x55 to adjacent memory locations
  70. filling up the 2 bytes memory chunk.
  71. 5. It reads the memory chunk adjacent locations and checks that the read-back values match
  72. the written pattern.
  73. If the values match set the success result.
  74. Else set the error result.
  75. 6. The content of the tested 2 bytes memory chunk is restored from the
  76. temporary CPU registers.
  77. 7. If the result shows error the test is done and returns.
  78. 8. The address pointer is incremented to point to the next sequential 4 bytes memory chunk
  79. and the test is repeated from step 1 until all the number of requested memory locations
  80. is tested.
  81. Precondition:
  82. Global dataC
  83. ramStartAddress - start Address from which the checker Board test is to be performed
  84. ramStopAddresse - stop Address where the checker Board test is ending
  85. Returns:
  86. Result identifying the pass/fail status of the test:
  87. CB_TEST_PASS - The test passed. RAM area tested has not been detected to have stuck bits.
  88. CB_TEST_FAIL - The test failed. Some RAM area location has been detected to have stuck bits.
  89. Remarks:
  90. This is a non-destructive memory test. The content of the tested memory area is saved and restored.
  91. The test operates in 2 bytes long memory chunks at a time.
  92. The tested RAM area must not overlap the stack.
  93. The Start Address from which the Checker Board test is to be performed is
  94. PIC18 variant and application dependent. It is a run-time parameter.
  95. Refer to the AN1229 for details regarding
  96. *****************************************************************************/
  97. int16_t SSL_RAMtest_CheckerBoard( void )
  98. {
  99. pRAM2_RAM++;
  100. while(CB_Counter_RAM)
  101. {
  102. BYTE_Low_RAM = *pRAM1_RAM;
  103. BYTE_High_RAM = *pRAM2_RAM;
  104. *pRAM1_RAM = 0xAA;
  105. *pRAM2_RAM = 0x55;
  106. if(*pRAM1_RAM != 0xAA)
  107. return CB_TEST_FAIL;
  108. if(*pRAM2_RAM != 0x55)
  109. return CB_TEST_FAIL;
  110. *pRAM1_RAM = 0x55;
  111. *pRAM2_RAM = 0xAA;
  112. if(*pRAM1_RAM != 0x55)
  113. return CB_TEST_FAIL;
  114. if(*pRAM2_RAM != 0xAA)
  115. return CB_TEST_FAIL;
  116. *pRAM1_RAM = BYTE_Low_RAM;
  117. *pRAM2_RAM = BYTE_High_RAM;
  118. pRAM1_RAM++;
  119. pRAM2_RAM++;
  120. CB_Counter_RAM--;
  121. }
  122. return CB_TEST_PASS;
  123. }
  124. int16_t SSL_STACKtest_CheckerBoard( void )
  125. {
  126. pRAM2_STACK++;
  127. while(CB_Counter_STACK)
  128. {
  129. BYTE_Low_STACK = *pRAM1_STACK;
  130. BYTE_High_STACK = *pRAM2_STACK;
  131. *pRAM1_STACK = 0xAA;
  132. *pRAM2_STACK = 0x55;
  133. if(*pRAM1_STACK != 0xAA)
  134. return CB_TEST_FAIL;
  135. if(*pRAM2_STACK != 0x55)
  136. return CB_TEST_FAIL;
  137. *pRAM1_STACK = 0x55;
  138. *pRAM2_STACK = 0xAA;
  139. if(*pRAM1_STACK != 0x55)
  140. return CB_TEST_FAIL;
  141. if(*pRAM2_STACK != 0xAA)
  142. return CB_TEST_FAIL;
  143. *pRAM1_STACK = BYTE_Low_STACK;
  144. *pRAM2_STACK = BYTE_High_STACK;
  145. pRAM1_STACK++;
  146. pRAM2_STACK++;
  147. CB_Counter_STACK--;
  148. }
  149. return CB_TEST_PASS;
  150. }