infini_fpga.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441
  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/mm.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/module.h>
  36. #include <linux/init.h>
  37. #include <linux/slab.h>
  38. #include <linux/errno.h>
  39. #include <linux/export.h>
  40. #include <linux/hugetlb.h>
  41. #include <linux/atomic.h>
  42. #include <rdma/peer_mem.h>
  43. #include <linux/pcidriver.h>
  44. #define DRV_NAME "infini_fpga"
  45. #define DRV_VERSION "0.1"
  46. #define DRV_RELDATE __DATE__
  47. #define peer_err(FMT, ARGS...) printk(KERN_ERR DRV_NAME " %s:%d " FMT, __FUNCTION__, __LINE__, ## ARGS)
  48. MODULE_AUTHOR("Timo Dritschler");
  49. MODULE_DESCRIPTION("ALPS pcie memory plug-in for Mellanox InfiniBand");
  50. MODULE_LICENSE("GPL 2.2");
  51. MODULE_VERSION(DRV_VERSION);
  52. #define BAR_SIZE 0x1024
  53. invalidate_peer_memory mem_invalidate_callback;
  54. static void *reg_handle;
  55. /* acquire return code: 1 mine, 0 - not mine */
  56. static int alps_mem_acquire(unsigned long addr, size_t size, void *peer_mem_private_data,
  57. char *peer_mem_name, void **client_context)
  58. {
  59. unsigned long phys_addr = pcidriver_resolve_bar (addr);
  60. if (phys_addr) {
  61. pr_info ("ALPS detected 0x%lx as it's own. Mapped to physical: 0x%lx\n", addr, phys_addr);
  62. *client_context = kmalloc (sizeof(unsigned long), GFP_KERNEL);
  63. **(unsigned long **)client_context = phys_addr;
  64. __module_get (THIS_MODULE);
  65. return 1;
  66. }
  67. return 0;
  68. }
  69. static int alps_dma_map(struct sg_table *sg_head, void *context,
  70. struct device *dma_device, int dmasync,
  71. int *nmap)
  72. {
  73. int i, ret;
  74. struct scatterlist *sg;
  75. ret = sg_alloc_table(sg_head, 1, GFP_KERNEL);
  76. if (ret)
  77. return ret;
  78. for_each_sg(sg_head->sgl, sg, 1, i) {
  79. sg_set_page(sg, NULL, BAR_SIZE, 0);
  80. //sg->dma_address = *(unsigned long *)context;
  81. sg->dma_address = 0xfb009100;
  82. sg->dma_length = BAR_SIZE;
  83. pr_info ("ALPS mapped 0x%lx for access\n", *(unsigned long *)context);
  84. }
  85. *nmap = 1;
  86. return 0;
  87. }
  88. static int alps_dma_unmap(struct sg_table *sg_head, void *context,
  89. struct device *dma_device)
  90. {
  91. return 0;
  92. }
  93. static void alps_mem_put_pages(struct sg_table *sg_head, void *context)
  94. {
  95. if (sg_head)
  96. sg_free_table(sg_head);
  97. return;
  98. }
  99. static void alps_mem_release(void *context)
  100. {
  101. unsigned long *phys_addr = (unsigned long *)context;
  102. kfree(phys_addr);
  103. module_put(THIS_MODULE);
  104. return;
  105. }
  106. static int alps_mem_get_pages(unsigned long addr,
  107. size_t size, int write, int force,
  108. struct sg_table *sg_head,
  109. void *client_context,
  110. void *core_context)
  111. {
  112. /* ALPS pages are already pinned */
  113. return 0;
  114. }
  115. static unsigned long alps_mem_get_page_size(void *context)
  116. {
  117. return BAR_SIZE;
  118. }
  119. /* ---------------------- ALPS END ----------------- */
  120. #include "nv-p2p.h"
  121. #define GPU_PAGE_SHIFT 16
  122. #define GPU_PAGE_SIZE ((u64)1 << GPU_PAGE_SHIFT)
  123. #define GPU_PAGE_OFFSET (GPU_PAGE_SIZE-1)
  124. #define GPU_PAGE_MASK (~GPU_PAGE_OFFSET)
  125. struct nv_mem_context {
  126. struct nvidia_p2p_page_table *page_table;
  127. void *core_context;
  128. u64 page_virt_start;
  129. u64 page_virt_end;
  130. size_t mapped_size;
  131. unsigned long npages;
  132. unsigned long page_size;
  133. int is_callback;
  134. int sg_allocated;
  135. };
  136. static void nv_get_p2p_free_callback(void *data)
  137. {
  138. int ret = 0;
  139. struct nv_mem_context *nv_mem_context = (struct nv_mem_context *)data;
  140. struct nvidia_p2p_page_table *page_table = NULL;
  141. __module_get(THIS_MODULE);
  142. if (!nv_mem_context) {
  143. peer_err("nv_get_p2p_free_callback -- invalid nv_mem_context\n");
  144. goto out;
  145. }
  146. if (!nv_mem_context->page_table) {
  147. peer_err("nv_get_p2p_free_callback -- invalid page_table\n");
  148. goto out;
  149. }
  150. /* Save page_table locally to prevent it being freed as part of nv_mem_release
  151. in case it's called internally by that callback.
  152. */
  153. page_table = nv_mem_context->page_table;
  154. /* For now don't set nv_mem_context->page_table to NULL,
  155. * confirmed by NVIDIA that inflight put_pages with valid pointer will fail gracefully.
  156. */
  157. ACCESS_ONCE(nv_mem_context->is_callback) = 1;
  158. (*mem_invalidate_callback) (reg_handle, nv_mem_context->core_context);
  159. ret = nvidia_p2p_free_page_table(page_table);
  160. if (ret)
  161. peer_err("nv_get_p2p_free_callback -- error %d while calling nvidia_p2p_free_page_table()\n", ret);
  162. out:
  163. module_put(THIS_MODULE);
  164. return;
  165. }
  166. /* At that function we don't call IB core - no ticket exists */
  167. static void nv_mem_dummy_callback(void *data)
  168. {
  169. struct nv_mem_context *nv_mem_context = (struct nv_mem_context *)data;
  170. int ret = 0;
  171. __module_get(THIS_MODULE);
  172. ret = nvidia_p2p_free_page_table(nv_mem_context->page_table);
  173. if (ret)
  174. peer_err("nv_mem_dummy_callback -- error %d while calling nvidia_p2p_free_page_table()\n", ret);
  175. module_put(THIS_MODULE);
  176. return;
  177. }
  178. /* acquire return code: 1 mine, 0 - not mine */
  179. static int nv_mem_acquire(unsigned long addr, size_t size, void *peer_mem_private_data,
  180. char *peer_mem_name, void **client_context)
  181. {
  182. int ret = 0;
  183. struct nv_mem_context *nv_mem_context;
  184. nv_mem_context = kzalloc(sizeof *nv_mem_context, GFP_KERNEL);
  185. if (!nv_mem_context)
  186. /* Error case handled as not mine */
  187. return 0;
  188. nv_mem_context->page_virt_start = addr & GPU_PAGE_MASK;
  189. nv_mem_context->page_virt_end = (addr + size + GPU_PAGE_SIZE - 1) & GPU_PAGE_MASK;
  190. nv_mem_context->mapped_size = nv_mem_context->page_virt_end - nv_mem_context->page_virt_start;
  191. ret = nvidia_p2p_get_pages(0, 0, nv_mem_context->page_virt_start, nv_mem_context->mapped_size,
  192. &nv_mem_context->page_table, nv_mem_dummy_callback, nv_mem_context);
  193. if (ret < 0)
  194. goto err;
  195. ret = nvidia_p2p_put_pages(0, 0, nv_mem_context->page_virt_start,
  196. nv_mem_context->page_table);
  197. if (ret < 0) {
  198. /* Not expected, however in case callback was called on that buffer just before
  199. put pages we'll expect to fail gracefully (confirmed by NVIDIA) and return an error.
  200. */
  201. peer_err("nv_mem_acquire -- error %d while calling nvidia_p2p_put_pages()\n", ret);
  202. goto err;
  203. }
  204. /* 1 means mine */
  205. *client_context = nv_mem_context;
  206. __module_get(THIS_MODULE);
  207. return 1;
  208. err:
  209. kfree(nv_mem_context);
  210. /* Error case handled as not mine */
  211. return 0;
  212. }
  213. static int nv_dma_map(struct sg_table *sg_head, void *context,
  214. struct device *dma_device, int dmasync,
  215. int *nmap)
  216. {
  217. int i, ret;
  218. struct scatterlist *sg;
  219. struct nv_mem_context *nv_mem_context =
  220. (struct nv_mem_context *) context;
  221. struct nvidia_p2p_page_table *page_table = nv_mem_context->page_table;
  222. if (nv_mem_context->page_table->page_size != NVIDIA_P2P_PAGE_SIZE_64KB) {
  223. peer_err("nv_dma_map -- assumption of 64KB pages failed size_id=%u\n",
  224. nv_mem_context->page_table->page_size);
  225. return -EINVAL;
  226. }
  227. nv_mem_context->npages = PAGE_ALIGN(nv_mem_context->mapped_size) >>
  228. GPU_PAGE_SHIFT;
  229. if (nv_mem_context->page_table->entries != nv_mem_context->npages) {
  230. peer_err("nv_dma_map -- unexpected number of page table entries got=%u, expected=%lu\n",
  231. nv_mem_context->page_table->entries,
  232. nv_mem_context->npages);
  233. return -EINVAL;
  234. }
  235. ret = sg_alloc_table(sg_head, nv_mem_context->npages, GFP_KERNEL);
  236. if (ret)
  237. return ret;
  238. nv_mem_context->sg_allocated = 1;
  239. for_each_sg(sg_head->sgl, sg, nv_mem_context->npages, i) {
  240. sg_set_page(sg, NULL, nv_mem_context->page_size, 0);
  241. sg->dma_address = page_table->pages[i]->physical_address;
  242. sg->dma_length = nv_mem_context->page_size;
  243. }
  244. *nmap = nv_mem_context->npages;
  245. return 0;
  246. }
  247. static int nv_dma_unmap(struct sg_table *sg_head, void *context,
  248. struct device *dma_device)
  249. {
  250. return 0;
  251. }
  252. static int nv_mem_get_pages(unsigned long addr,
  253. size_t size, int write, int force,
  254. struct sg_table *sg_head,
  255. void *client_context,
  256. void *core_context)
  257. {
  258. int ret;
  259. struct nv_mem_context *nv_mem_context;
  260. nv_mem_context = (struct nv_mem_context *)client_context;
  261. if (!nv_mem_context)
  262. return -EINVAL;
  263. nv_mem_context->core_context = core_context;
  264. nv_mem_context->page_size = GPU_PAGE_SIZE;
  265. ret = nvidia_p2p_get_pages(0, 0, nv_mem_context->page_virt_start, nv_mem_context->mapped_size,
  266. &nv_mem_context->page_table, nv_get_p2p_free_callback, nv_mem_context);
  267. if (ret < 0) {
  268. peer_err("nv_mem_get_pages -- error %d while calling nvidia_p2p_get_pages()\n", ret);
  269. return ret;
  270. }
  271. /* No extra access to nv_mem_context->page_table here as we are
  272. called not under a lock and may race with inflight invalidate callback on that buffer.
  273. Extra handling was delayed to be done under nv_dma_map.
  274. */
  275. return 0;
  276. }
  277. static void nv_mem_put_pages(struct sg_table *sg_head, void *context)
  278. {
  279. int ret = 0;
  280. struct nv_mem_context *nv_mem_context =
  281. (struct nv_mem_context *) context;
  282. if (ACCESS_ONCE(nv_mem_context->is_callback))
  283. goto out;
  284. ret = nvidia_p2p_put_pages(0, 0, nv_mem_context->page_virt_start,
  285. nv_mem_context->page_table);
  286. #ifdef _DEBUG_ONLY_
  287. /* Here we expect an error in real life cases that should be ignored - not printed.
  288. * (e.g. concurrent callback with that call)
  289. */
  290. if (ret < 0) {
  291. printk(KERN_ERR "error %d while calling nvidia_p2p_put_pages, page_table=%p \n",
  292. ret, nv_mem_context->page_table);
  293. }
  294. #endif
  295. out:
  296. if (nv_mem_context->sg_allocated)
  297. sg_free_table(sg_head);
  298. return;
  299. }
  300. static unsigned long nv_mem_get_page_size(void *context)
  301. {
  302. struct nv_mem_context *nv_mem_context =
  303. (struct nv_mem_context *)context;
  304. return nv_mem_context->page_size;
  305. }
  306. static void nv_mem_release(void *context)
  307. {
  308. struct nv_mem_context *nv_mem_context =
  309. (struct nv_mem_context *) context;
  310. kfree(nv_mem_context);
  311. module_put(THIS_MODULE);
  312. return;
  313. }
  314. /* ---------------------- NVIDIA END ------------------- */
  315. static struct peer_memory_client alps_mem_client = {
  316. .acquire = alps_mem_acquire,
  317. .get_pages = alps_mem_get_pages,
  318. .dma_map = alps_dma_map,
  319. .dma_unmap = alps_dma_unmap,
  320. .put_pages = alps_mem_put_pages,
  321. .get_page_size = alps_mem_get_page_size,
  322. .release = alps_mem_release,
  323. };
  324. static int __init alps_mem_client_init(void)
  325. {
  326. strcpy(alps_mem_client.name, DRV_NAME);
  327. strcpy(alps_mem_client.version, DRV_VERSION);
  328. reg_handle = ib_register_peer_memory_client(&alps_mem_client,
  329. &mem_invalidate_callback);
  330. if (!reg_handle)
  331. return -EINVAL;
  332. return 0;
  333. }
  334. static void __exit alps_mem_client_cleanup(void)
  335. {
  336. ib_unregister_peer_memory_client(reg_handle);
  337. }
  338. module_init(alps_mem_client_init);
  339. module_exit(alps_mem_client_cleanup);