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@@ -300,7 +300,7 @@ into a PCIe 3.0 slot, but they were connected to different PCIe Root Complexes
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Netstor NA255A xeternal PCIe enclosure, where both the FPGA board and the GPU
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were connected to the same RC, as opposed to Setup 1. As stated in the
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NVIDIA's GPUDirect documentation, the devices must share the same RC to
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-achieve the best performance~\cite{cuda_doc}. In case of FPGA-to-CPU data
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+achieve the best performance. In case of FPGA-to-CPU data
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transfers, the software implementation is the one described
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in~\cite{rota2015dma}.
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