Big redign of model structures

CMakeLists.txt

@@ -12,23 +12,21 @@ find_package(PkgConfig REQUIRED)
 find_package(Threads REQUIRED)
 
 #Check in sibling directory
-pkg_check_modules(UFODECODE ufodecode>=0.2 REQUIRED)
-
 if (NOT DISABLE_PCITOOL)
     pkg_check_modules(FASTWRITER fastwriter REQUIRED)
 endif (NOT DISABLE_PCITOOL)
 
-set(HEADERS pcilib.h pci.h register.h kmem.h irq.h dma.h event.h default.h tools.h error.h)
-add_definitions("-fPIC --std=c99 -Wall -O2")
-#add_definitions("-fPIC --std=c99 -Wall -O2 -pthread")
+set(HEADERS pcilib.h pci.h config.h model.h bank.h register.h kmem.h irq.h dma.h event.h tools.h error.h)
+add_definitions("-fPIC --std=c99 -Wall -O2 -gdwarf-2 -g3")
+#add_definitions("-fPIC --std=c99 -Wall -O2")
 
 add_subdirectory(dma)
-add_subdirectory(ipecamera)
-add_subdirectory(kapture)
+add_subdirectory(protocols)
 add_subdirectory(pcitool)
 add_subdirectory(apps)
 
 include_directories(
+    .
     ${FASTWRITER_INCLUDE_DIRS}
 )
 
@@ -37,15 +35,13 @@ link_directories(
     ${UFODECODE_LIBRARY_DIRS}
 )
 
-add_library(pcilib SHARED pci.c register.c kmem.c irq.c dma.c event.c default.c tools.c error.c) 
-target_link_libraries(pcilib dma ipecamera kapture ${CMAKE_THREAD_LIBS_INIT} ${UFODECODE_LIBRARIES} )
-add_dependencies(pcilib dma ipecamera)
+add_library(pcilib SHARED pci.c config.c model.c bank.c register.c kmem.c irq.c dma.c event.c tools.c error.c) 
+target_link_libraries(pcilib dma protocols ${CMAKE_THREAD_LIBS_INIT} ${UFODECODE_LIBRARIES} )
+add_dependencies(pcilib dma protocols pcitool)
 
 set_target_properties(pcilib PROPERTIES
     VERSION ${PCILIB_VERSION}
     SOVERSION ${PCILIB_ABI_VERSION}
-#    LINK_FLAGS "-pthread"
-#    LINK_FLAGS "-pthread -Wl,--whole-archive,dma/libdma.a,ipecamera/libipecamera.a,--no-whole-archive"
 )
 
 if (NOT DISABLE_PCITOOL)
@@ -79,3 +75,7 @@ endif (NOT DISABLE_PCITOOL)
 install(FILES pcilib.h
     DESTINATION include
 )
+
+install(FILES bank.h register.h dma.h event.h model.h error.h tools.h
+    DESTINATION include/pcilib
+)

apps/CMakeLists.txt

@@ -9,6 +9,7 @@ target_link_libraries(xilinx pcilib rt)
 
 add_executable(lorenzo_ipedma_test lorenzo_ipedma_test.c)
 target_link_libraries(lorenzo_ipedma_test pcilib rt)
+set_target_properties(lorenzo_ipedma_test PROPERTIES COMPILE_FLAGS -Wno-array-bounds)
 
 add_executable(pio_test pio_test.c)
 target_link_libraries(pio_test pcilib rt)

apps/check_counter.c

@@ -30,7 +30,7 @@ int main(int argc, char *argv[]) {
 
 	for (; i < n; i++) {
 	    if ((buf[i]) != ++value) {
-		printf("Pos %lx (Block %i, dword %i) expected %x, but got %x\n", block * 4096 + i * 4, block, i, value, (buf[i]));
+		printf("Pos %lx (Block %i, dword %i) expected %x, but got %x\n", block * 4096l + i * 4, block, i, value, (buf[i]));
 		exit(1);
 	    }
 	}

apps/lorenzo_ipedma_test.c

@@ -1,4 +1,5 @@
-#define _POSIX_C_SOURCE 199309L
+#define _POSIX_C_SOURCE 200809L
+#define _BSD_SOURCE
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ -15,6 +16,7 @@
 #include "pcilib.h"
 #include "irq.h"
 #include "kmem.h"
+#include "pci.h"
 
 //#include <sys/ipc.h>
 //#include <sys/shm.h>
@@ -33,10 +35,10 @@
                                     // if set to 0, the update only happens when INT is received
 
 #define HUGE_PAGE       1           // number of pages per huge page
-#define TLP_SIZE        32          // TLP SIZE = 64 for 256B payload, 32 for 128B payload
+#define TLP_SIZE        64          // TLP SIZE = 64 for 256B payload, 32 for 128B payload
 #define PAGE_SIZE       4096        // other values are not supported in the kernel
 
-//#define USE_64                    // Lorenzo: use 64bit addressing
+#define USE_64                    // Lorenzo: use 64bit addressing
 
 //#define DUAL_CORE                 // Lorenzo: DUAL Core
 
@@ -138,28 +140,31 @@ int main() {
 
 
     int err;
-    long i, j, k;
+    int i, j, k;
     int mem_diff;
     pcilib_t *pci;
     pcilib_kmem_handle_t *kdesc;
     pcilib_kmem_handle_t *kbuf;
     struct timeval start, end;
-    size_t run_time, size;
-    long long int size_mb;
+    size_t run_time;
+    size_t size_mb;
     void* volatile bar;
     uintptr_t bus_addr[BUFFERS];
     uintptr_t kdesc_bus;
     volatile uint32_t *desc;
     typedef volatile uint32_t *Tbuf;
     Tbuf ptr[BUFFERS];
+
+#ifdef SWITCH_GENERATOR
     int switch_generator = 0;
-   
+#endif /* SWITCH_GENERATOR */
+ 
     float performance, perf_counter; 
     pcilib_bar_t bar_tmp = BAR; 
     uintptr_t offset = 0;
 
     unsigned int temp;
-    int iterations_completed, buffers_filled;
+    unsigned iterations_completed, buffers_filled;
 
 
 //    int shmid;
@@ -167,10 +172,9 @@ int main() {
 
     printf("\n\n**** **** **** KIT-DMA TEST **** **** ****\n\n");
 
-    size = ITERATIONS * BUFFERS * HUGE_PAGE * PAGE_SIZE;
     size_mb = ITERATIONS * BUFFERS * HUGE_PAGE * 4 / 1024;
     printf("Total size of memory buffer: \t %.3lf GBytes\n", (float)size_mb/1024 );
-    printf("Using %d Buffers with %d iterations\n\n", BUFFERS, ITERATIONS );
+    printf("Using %u Buffers with %u iterations\n\n", BUFFERS, ITERATIONS );
 
 #ifdef ADD_DELAYS
     long rpt = 0, rpt2 = 0;
@@ -235,7 +239,7 @@ int main() {
         // Pointers for Virtualized Mem
         for (j = 0; j < BUFFERS; j++) {
             ptr[j] = (volatile uint32_t*)pcilib_kmem_get_block_ua(pci, kbuf, j);
-            memset((ptr[j]), 0, HUGE_PAGE * PAGE_SIZE);
+            memset((void*)ptr[j], 0, HUGE_PAGE * PAGE_SIZE);
         }
 
         err = 0;
@@ -268,7 +272,6 @@ int main() {
     FILE * error_log;
 
 #ifdef CHECK_RESULTS
-
     uint32_t *temp_data[ITERATIONS][BUFFERS];
 
     for (j=0; j < ITERATIONS; j++) {
@@ -329,11 +332,11 @@ int main() {
 #ifdef CHECK_READY       
     printf("* PCIe: Testing...");
     RD(0x0, err);
-    if (err != 335746816) {
+    if (err == 335746816 || err == 335681280) {
+        printf("\xE2\x9C\x93 \n");
+    } else {
         printf("\xE2\x9C\x98\n PCIe not ready!\n");
         exit(0);
-    } else {
-        printf("\xE2\x9C\x93 \n");
     }
 #endif
     
@@ -400,7 +403,7 @@ int main() {
         bus_addr[j] = pcilib_kmem_get_block_ba(pci, kbuf, j);
         // LEAVE THIS DELAY???!?!?!?!
         usleep(1000);
-        printf("Writing descriptor num. %ld: \t %08lx \r", j, bus_addr[j]);
+        printf("Writing descriptor num. %d: \t %08lx \r", j, bus_addr[j]);
         WR(0x50, bus_addr[j]);
     }
 
@@ -538,9 +541,9 @@ int main() {
 
         do {
 #ifdef USE_64   
-                hwptr = htonl(desc[3]);
+                hwptr = desc[3];
 #else // 32-bit
-                hwptr = htonl(desc[4]);
+                hwptr = desc[4];
 #endif
         j++;    
         //printf("\rcurptr: %lx \t \t hwptr: %lx", curptr, hwptr);
@@ -549,10 +552,10 @@ int main() {
         do {    
             pcilib_kmem_sync_block(pci, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, curbuf);
 #ifdef CHECK_RESULTS   
-            memcpy(temp_data[i][curbuf], ptr[curbuf], 4096);
+            memcpy(temp_data[i][curbuf], (void*)ptr[curbuf], 4096);
 #endif
 #ifdef SHARED_MEMORY
-            memcpy(shared_memory, ptr[curbuf], 4096); 
+            memcpy(shared_memory, (void*)ptr[curbuf], 4096); 
 #endif            
             //printf("\ncurbuf: %08x", curbuf); 
             //printf("\nbus_addr[curbuf]\n: %08x",bus_addr[curbuf]);
@@ -615,7 +618,7 @@ int main() {
 
     iterations_completed   = i;
     buffers_filled      = curbuf;
-    if (empty) printf("* DMA: Empty FIFO! Last iteration: %li of %li\n", i+1, ITERATIONS);
+    if (empty) printf("* DMA: Empty FIFO! Last iteration: %u of %u\n", i+1, ITERATIONS);
     printf ("* DMA: Stop\n\n");
 
 #ifdef CHECK_RESULTS
@@ -631,9 +634,8 @@ int main() {
 
 
     run_time = (end.tv_sec - start.tv_sec) * 1000000 + (end.tv_usec - start.tv_usec);
-    size = (long long int) (( BUFFERS * (iterations_completed)  + buffers_filled) * HUGE_PAGE * PAGE_SIZE);
     size_mb = (long long int) (( BUFFERS * (iterations_completed)  + buffers_filled) * HUGE_PAGE * 4 / 1024);
-    printf("Performance: transfered %zu Mbytes in %zu us using %d buffers\n", (size_mb), run_time, BUFFERS);
+    printf("Performance: transfered %zu Mbytes in %zu us using %u buffers\n", (size_mb), run_time, BUFFERS);
     //printf("Buffers: \t %d \n", BUFFERS);
     //printf("Buf_Size: \t %d \n", PAGE_SIZE);
     //printf("Perf_counter: \t %f \n", perf_counter);
@@ -647,7 +649,7 @@ int main() {
     // ******************************************************************
 
 
-    #ifdef PRINT_RESULTS
+#ifdef PRINT_RESULTS
     printf("Writing Data to HDD... \n");
     for (i=0; i < iterations_completed; i++) {
         for (j=0; j < BUFFERS; j++)
@@ -666,9 +668,9 @@ int main() {
         fclose(Output);
     }   
     printf("Data saved in data.out. \n");
-    #endif
+#endif
 
-   #ifdef CHECK_RESULTS
+#ifdef CHECK_RESULTS
     err = 0;
     error_log = fopen ("error_log.txt", "a");
     printf("\nChecking data ...\n");
@@ -681,7 +683,7 @@ int main() {
                 if ((mem_diff == -1) || (k == 1023) ) 
                     {;}
                 else {
-                    fprintf(error_log, "Error in: \t IT %li \t BUF : %li \t OFFSET: %li \t | %08x --> %08x - DIFF: %d \n", i, j, k, temp_data[i][j][k], temp_data[i][j][k+1], mem_diff);
+                    fprintf(error_log, "Error in: \t IT %u \t BUF : %u \t OFFSET: %u \t | %08x --> %08x - DIFF: %d \n", i, j, k, temp_data[i][j][k], temp_data[i][j][k+1], mem_diff);
                     err++;
                 }
             }
@@ -691,7 +693,7 @@ int main() {
                 if (mem_diff == (1)) 
                     {;}
                 else {
-                    fprintf(error_log, "Error_2 in: \t IT %li \t BUF : %li \t OFFSET: %li \t | %08x --> %08x - DIFF: %d \n", i, j, k, temp_data[i][j+1][0], temp_data[i][j][1023], mem_diff);
+                    fprintf(error_log, "Error_2 in: \t IT %u \t BUF : %u \t OFFSET: %u \t | %08x --> %08x - DIFF: %d \n", i, j, k, temp_data[i][j+1][0], temp_data[i][j][1023], mem_diff);
                     err++;
                 }
             }
@@ -700,23 +702,22 @@ int main() {
         loadBar(i+1, ITERATIONS, ITERATIONS, 30);
     }
     for (j = 0; j < buffers_filled; j++) {
-        for (k = 0; k < 1024 ; k++) 
-        {
+        for (k = 0; k < 1024 ; k++) {
             mem_diff = ((uint32_t)temp_data[iterations_completed][j][k] - (uint32_t)temp_data[iterations_completed][j][k+1]);
-                if ((mem_diff == -1) || (k == 1023) ) 
-                {;}
-            else {
-                fprintf(error_log, "Error in: \t IT %li \t BUF : %li \t OFFSET: %li \t | %08x --> %08x - DIFF: %d \n", iterations_completed, j, k, temp_data[iterations_completed][j][k], temp_data[iterations_completed][j][k+1], mem_diff);
+            if ((mem_diff == -1) || (k == 1023) ) {
+        	;
+    	    } else {
+                fprintf(error_log, "Error in: \t IT %u \t BUF : %u \t OFFSET: %u \t | %08x --> %08x - DIFF: %d \n", iterations_completed, j, k, temp_data[iterations_completed][j][k], temp_data[iterations_completed][j][k+1], mem_diff);
                 err++;
             }
         }
-        if (j != buffers_filled-1) {
+        if (j < (buffers_filled-1)) {
         // Check first and Last
             mem_diff = (uint32_t)(temp_data[i][j+1][0] - temp_data[i][j][1023]);
-            if (mem_diff == (1)) 
-                {;}
-            else {
-                fprintf(error_log, "Error_2 in: \t IT %li \t BUF : %li \t OFFSET: %li \t | %08x --> %08x - DIFF: %d \n", iterations_completed, j, k, temp_data[iterations_completed][j+1][0], temp_data[iterations_completed][j][1023], mem_diff);
+            if (mem_diff == (1)) {
+                ;
+            } else {
+                fprintf(error_log, "Error_2 in: \t IT %u \t BUF : %u \t OFFSET: %u \t | %08x --> %08x - DIFF: %d \n", iterations_completed, j, k, temp_data[iterations_completed][j+1][0], temp_data[iterations_completed][j][1023], mem_diff);
                 err++;
             }
         }
@@ -724,7 +725,7 @@ int main() {
     if (err != 0) printf("\rChecking data: \xE2\x9C\x98 %d errors found  \n See \"error_log.txt\" for details \n\n", err);
     else printf("\rChecking data: \xE2\x9C\x93 no errors found  \n\n");
     fclose(error_log);
-    #endif
+#endif
 
 
     // *********** Free Memory
@@ -735,7 +736,7 @@ int main() {
             free(temp_data[i][j]);
         }
     }
-#endif CHECK_RESULTS
+#endif /* CHECK_RESULTS */
 
     pcilib_free_kernel_memory(pci, kbuf,  free_flags);
     pcilib_free_kernel_memory(pci, kdesc,  free_flags);

apps/xilinx.c

@@ -12,6 +12,7 @@
 #include "pcilib.h"
 #include "irq.h"
 #include "kmem.h"
+#include "pci.h"
 
 #define DEVICE "/dev/fpga0"
 #define BAR PCILIB_BAR0

bank.c

@@ -0,0 +1,201 @@
+#include <stdio.h>
+#include <string.h>
+#include <strings.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdarg.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <sys/ioctl.h>
+#include <sys/mman.h>
+#include <arpa/inet.h>
+#include <errno.h>
+#include <assert.h>
+
+#include "pci.h"
+
+#include "tools.h"
+#include "error.h"
+
+int pcilib_init_register_banks(pcilib_t *ctx) {
+    int err; 
+
+    err = pcilib_map_register_space(ctx);
+    if (err) return err;
+
+    for (; ctx->num_banks_init < ctx->num_banks; ctx->num_banks_init++) {
+	pcilib_register_bank_context_t *bank_ctx;
+	pcilib_register_protocol_t protocol;
+	const pcilib_register_protocol_api_description_t *bapi;
+
+	protocol = pcilib_find_register_protocol_by_addr(ctx, ctx->banks[ctx->num_banks_init].protocol);
+	if (protocol == PCILIB_REGISTER_PROTOCOL_INVALID) {
+	    const char *name = ctx->banks[ctx->num_banks_init].name;
+	    if (!name) name = "unnamed";
+	    pcilib_error("Invalid register protocol address (%u) is specified for bank %i (%s)", ctx->banks[ctx->num_banks_init].protocol, ctx->banks[ctx->num_banks_init].addr, name);
+	    return PCILIB_ERROR_INVALID_BANK;
+	}
+	
+	bapi = ctx->protocols[protocol].api;
+
+	if (bapi->init) 
+	    bank_ctx = bapi->init(ctx, ctx->num_banks_init, ctx->protocols[protocol].model, ctx->protocols[protocol].args);
+	else
+	    bank_ctx = (pcilib_register_bank_context_t*)malloc(sizeof(pcilib_register_bank_context_t));
+	
+	if (!bank_ctx)
+	    return PCILIB_ERROR_FAILED;
+	
+	bank_ctx->bank = ctx->banks + ctx->num_banks_init;
+	bank_ctx->api = bapi;
+	ctx->bank_ctx[ctx->num_banks_init] = bank_ctx;
+    }
+
+    return 0;
+}
+
+void pcilib_free_register_banks(pcilib_t *ctx) {
+    size_t i;
+
+    for (i = 0; i < ctx->num_banks_init; i++) {
+	const pcilib_register_protocol_api_description_t *bapi = ctx->bank_ctx[i]->api;
+	
+	if (ctx->bank_ctx[i]) {
+	    if (bapi->free)
+		bapi->free(ctx->bank_ctx[i]);
+	    else
+		free(ctx->bank_ctx[i]);
+		
+	    ctx->bank_ctx[i] = NULL;
+	}
+    }
+
+    ctx->num_banks_init = 0;
+}
+
+
+int pcilib_add_register_banks(pcilib_t *ctx, size_t n, const pcilib_register_bank_description_t *banks) {
+	// DS: What we are doing if bank exists? 
+	
+    if (!n) {
+	for (n = 0; banks[n].access; n++);
+    }
+
+    if ((ctx->num_banks + n + 1) > PCILIB_MAX_REGISTER_BANKS)
+	return PCILIB_ERROR_TOOBIG;
+	
+    memset(ctx->banks + ctx->num_banks + n, 0, sizeof(pcilib_register_bank_description_t));
+    memcpy(ctx->banks + ctx->num_banks, banks, n * sizeof(pcilib_register_bank_description_t));
+    ctx->num_banks += n;
+
+	// If banks are already initialized, we need to re-run the initialization code
+	// DS: Locking is currently missing
+    if (ctx->reg_bar_mapped) {
+	ctx->reg_bar_mapped = 0;
+        return pcilib_init_register_banks(ctx);
+    }
+    
+    return 0;
+}
+
+pcilib_register_bank_t pcilib_find_register_bank_by_addr(pcilib_t *ctx, pcilib_register_bank_addr_t bank) {
+    pcilib_register_bank_t i;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_register_bank_description_t *banks = model_info->banks;
+
+    for (i = 0; banks[i].access; i++)
+	if (banks[i].addr == bank) return i;
+
+    return PCILIB_REGISTER_BANK_INVALID;
+}
+
+pcilib_register_bank_t pcilib_find_register_bank_by_name(pcilib_t *ctx, const char *bankname) {
+    pcilib_register_bank_t i;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_register_bank_description_t *banks = model_info->banks;
+
+    for (i = 0; banks[i].access; i++)
+	if (!strcasecmp(banks[i].name, bankname)) return i;
+
+    return PCILIB_REGISTER_BANK_INVALID;
+}
+
+pcilib_register_bank_t pcilib_find_register_bank(pcilib_t *ctx, const char *bank) {
+    pcilib_register_bank_t res;
+    unsigned long addr;
+    
+    if (!bank) {
+        const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+	const pcilib_register_bank_description_t *banks = model_info->banks;
+	if ((banks)&&(banks[0].access)) return (pcilib_register_bank_t)0;
+	return PCILIB_REGISTER_BANK_INVALID;
+    }
+    
+    if (pcilib_isxnumber(bank)&&(sscanf(bank,"%lx", &addr) == 1)) {
+	res = pcilib_find_register_bank_by_addr(ctx, addr);
+	if (res != PCILIB_REGISTER_BANK_INVALID) return res;
+    }
+    
+    return pcilib_find_register_bank_by_name(ctx, bank);
+}
+
+    // DS: FIXME create hash during map_register space
+pcilib_register_t pcilib_find_register(pcilib_t *ctx, const char *bank, const char *reg) {
+    pcilib_register_t i;
+    pcilib_register_bank_t bank_id;
+    pcilib_register_bank_addr_t bank_addr = 0;
+
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_register_description_t *registers =  model_info->registers;
+    
+    if (bank) {
+	bank_id = pcilib_find_register_bank(ctx, bank);
+	if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
+	    pcilib_error("Invalid bank (%s) is specified", bank);
+	    return PCILIB_REGISTER_INVALID;
+	}
+	
+	bank_addr = model_info->banks[bank_id].addr;
+    }
+    
+    for (i = 0; registers[i].bits; i++) {
+	if ((!strcasecmp(registers[i].name, reg))&&((!bank)||(registers[i].bank == bank_addr))) return i;
+    }
+
+    return PCILIB_REGISTER_INVALID;
+};
+
+
+pcilib_register_protocol_t pcilib_find_register_protocol_by_addr(pcilib_t *ctx, pcilib_register_protocol_addr_t protocol) {
+    pcilib_register_protocol_t i;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_register_protocol_description_t *protocols = model_info->protocols;
+
+    for (i = 0; protocols[i].api; i++)
+	if (protocols[i].addr == protocol) return i;
+
+    return PCILIB_REGISTER_PROTOCOL_INVALID;
+}
+
+pcilib_register_protocol_t pcilib_find_register_protocol_by_name(pcilib_t *ctx, const char *name) {
+    pcilib_register_protocol_t i;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_register_protocol_description_t *protocols = model_info->protocols;
+
+    for (i = 0; protocols[i].api; i++)
+	if (!strcasecmp(protocols[i].name, name)) return i;
+
+    return PCILIB_REGISTER_PROTOCOL_INVALID;
+}
+
+pcilib_register_protocol_t pcilib_find_register_protocol(pcilib_t *ctx, const char *protocol) {
+    pcilib_register_bank_t res;
+    unsigned long addr;
+
+    if (pcilib_isxnumber(protocol)&&(sscanf(protocol,"%lx", &addr) == 1)) {
+	res = pcilib_find_register_protocol_by_addr(ctx, addr);
+	if (res != PCILIB_REGISTER_BANK_INVALID) return res;
+    }
+
+    return pcilib_find_register_protocol_by_name(ctx, protocol);
+}

bank.h

@@ -0,0 +1,97 @@
+#ifndef _PCILIB_BANK_H
+#define _PCILIB_BANK_H
+
+#include <pcilib.h>
+
+#define PCILIB_REGISTER_BANK_INVALID		((pcilib_register_bank_t)-1)
+#define PCILIB_REGISTER_BANK0 			0					/**< First BANK to be used in the event engine */
+#define PCILIB_REGISTER_BANK1 			1
+#define PCILIB_REGISTER_BANK2 			2
+#define PCILIB_REGISTER_BANK3 			3
+#define PCILIB_REGISTER_BANK_DMA		64					/**< First BANK address to be used by DMA engines */
+#define PCILIB_REGISTER_BANK_DYNAMIC		128					/**< First BANK address to map dynamic XML configuration */
+#define PCILIB_REGISTER_PROTOCOL_INVALID	((pcilib_register_protocol_t)-1)
+#define PCILIB_REGISTER_PROTOCOL0		0					/**< First PROTOCOL address to be used in the event engine */
+#define PCILIB_REGISTER_PROTOCOL_DEFAULT	64					/**< Default memmap based protocol */
+#define PCILIB_REGISTER_PROTOCOL_DMA		96					/**< First PROTOCOL address to be used by DMA engines */
+#define PCILIB_REGISTER_PROTOCOL_DYNAMIC	128					/**< First PROTOCOL address to be used by plugins */
+
+#define PCILIB_REGISTER_NO_BITS			0
+#define PCILIB_REGISTER_ALL_BITS		((pcilib_register_value_t)-1)
+
+typedef uint8_t pcilib_register_bank_t;						/**< Type holding the bank position within the field listing register banks in the model */
+typedef uint8_t pcilib_register_bank_addr_t;					/**< Type holding the bank address number */
+typedef uint8_t pcilib_register_protocol_t;					/**< Type holding the protocol position within the field listing register protocols in the model */
+typedef uint8_t pcilib_register_protocol_addr_t;				/**< Type holding the protocol address */
+
+
+typedef struct pcilib_register_bank_context_s pcilib_register_bank_context_t;
+
+typedef struct {
+    pcilib_register_bank_context_t *(*init)(pcilib_t *ctx, pcilib_register_bank_t bank, const char *model, const void *args);
+    void (*free)(pcilib_register_bank_context_t *ctx);
+    int (*read)(pcilib_t *pcilib, pcilib_register_bank_context_t *ctx, pcilib_register_addr_t addr, pcilib_register_value_t *value);
+    int (*write)(pcilib_t *pcilib, pcilib_register_bank_context_t *ctx, pcilib_register_addr_t addr, pcilib_register_value_t value);
+} pcilib_register_protocol_api_description_t;
+
+typedef struct {
+    pcilib_register_protocol_addr_t addr;
+    const pcilib_register_protocol_api_description_t *api;
+    const char *model;
+    const void *args;
+    const char *name;
+    const char *description;
+} pcilib_register_protocol_description_t;
+
+typedef struct {
+    pcilib_register_bank_addr_t addr;
+
+    pcilib_bar_t bar;				// optional
+    size_t size;
+    
+    pcilib_register_protocol_addr_t protocol;
+
+    uintptr_t read_addr;			// or offset if bar specified
+    uintptr_t write_addr;			// or offset if bar specified
+    pcilib_endianess_t raw_endianess;
+
+    uint8_t access;
+    pcilib_endianess_t endianess;
+    
+    const char *format;
+    const char *name;
+    const char *description;
+} pcilib_register_bank_description_t;
+
+/**
+  * Default mappings
+  */
+typedef struct {
+    uintptr_t start;
+    uintptr_t end;
+    pcilib_register_bank_addr_t bank;
+    long addr_shift;
+} pcilib_register_range_t;
+
+
+
+struct pcilib_register_bank_context_s {
+    const pcilib_register_bank_description_t *bank;
+    const pcilib_register_protocol_api_description_t *api;
+};
+
+
+    // we don't copy strings, they should be statically allocated
+int pcilib_init_register_banks(pcilib_t *ctx);
+void pcilib_free_register_banks(pcilib_t *ctx);
+int pcilib_add_register_banks(pcilib_t *ctx, size_t n, const pcilib_register_bank_description_t *banks);
+
+pcilib_register_bank_t pcilib_find_register_bank_by_addr(pcilib_t *ctx, pcilib_register_bank_addr_t bank);
+pcilib_register_bank_t pcilib_find_register_bank_by_name(pcilib_t *ctx, const char *bankname);
+pcilib_register_bank_t pcilib_find_register_bank(pcilib_t *ctx, const char *bank);
+
+pcilib_register_protocol_t pcilib_find_register_protocol_by_addr(pcilib_t *ctx, pcilib_register_protocol_addr_t protocol);
+pcilib_register_protocol_t pcilib_find_register_protocol_by_name(pcilib_t *ctx, const char *name);
+pcilib_register_protocol_t pcilib_find_register_protocol(pcilib_t *ctx, const char *name);
+
+#endif /* _PCILIB_BANK_H */

cli.c

@@ -28,10 +28,11 @@
 #include "pcitool/sysinfo.h"
 #include "pcitool/formaters.h"
 
-//#include "pci.h"
+#include "pci.h"
 #include "tools.h"
-#include "kernel.h"
+#include "kmem.h"
 #include "error.h"
+#include "model.h"
 
 /* defines */
 #define MAX_KBUF 14
@@ -353,17 +354,17 @@ void Error(const char *format, ...) {
 void Silence(const char *format, ...) {
 }
 
-void List(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, int details) {
+void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {
     int i,j;
-    pcilib_register_bank_description_t *banks;
-    pcilib_register_description_t *registers;
-    pcilib_event_description_t *events;
-    pcilib_event_data_type_description_t *types;
+    const pcilib_register_bank_description_t *banks;
+    const pcilib_register_description_t *registers;
+    const pcilib_event_description_t *events;
+    const pcilib_event_data_type_description_t *types;
 
     const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
-    const pcilib_dma_info_t *dma_info = pcilib_get_dma_info(handle);
+    const pcilib_dma_description_t *dma_info = pcilib_get_dma_info(handle);
     
-    for (i = 0; i < PCILIB_MAX_BANKS; i++) {
+    for (i = 0; i < PCILIB_MAX_BARS; i++) {
 	if (board_info->bar_length[i] > 0) {
 	    printf(" BAR %d - ", i);
 
@@ -384,8 +385,8 @@ void List(pcilib_t *handle, pcilib_model_description_t *model_info, const char *
     
     if ((dma_info)&&(dma_info->engines)) {
 	printf("DMA Engines: \n");
-	for (i = 0; dma_info->engines[i]; i++) {
-	    pcilib_dma_engine_description_t *engine = dma_info->engines[i];
+	for (i = 0; dma_info->engines[i].addr_bits; i++) {
+	    const pcilib_dma_engine_description_t *engine = &dma_info->engines[i];
 	    printf(" DMA %2d ", engine->addr);
 	    switch (engine->direction) {
 		case PCILIB_DMA_FROM_DEVICE:
@@ -436,8 +437,8 @@ void List(pcilib_t *handle, pcilib_model_description_t *model_info, const char *
     if (registers) {
         pcilib_register_bank_addr_t bank_addr = 0;
 	if (bank) {
-	    pcilib_register_bank_t bank_id = pcilib_find_bank(handle, bank);
-	    pcilib_register_bank_description_t *b = model_info->banks + bank_id;
+	    pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
+	    const pcilib_register_bank_description_t *b = model_info->banks + bank_id;
 
 	    bank_addr = b->addr;
 	    if (b->description) printf("%s:\n", b->description);
@@ -506,7 +507,7 @@ void List(pcilib_t *handle, pcilib_model_description_t *model_info, const char *
     }
 }
 
-void Info(pcilib_t *handle, pcilib_model_description_t *model_info) {
+void Info(pcilib_t *handle, const pcilib_model_description_t *model_info) {
     const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);
 
     printf("Vendor: %x, Device: %x, Bus: %x, Slot: %x, Function: %x\n", board_info->vendor_id, board_info->device_id, board_info->bus, board_info->slot, board_info->func);
@@ -578,7 +579,7 @@ int Benchmark(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma,
 	unsigned long maxlength = 0;
 	
 
-	for (i = 0; i < PCILIB_MAX_BANKS; i++) {
+	for (i = 0; i < PCILIB_MAX_REGISTER_BANKS; i++) {
 	    if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + access))) {
 		bar = i;
 		break;
@@ -895,7 +896,7 @@ int ReadData(pcilib_t *handle, ACCESS_MODE mode, FLAGS flags, pcilib_dma_engine_
 
 
 
-int ReadRegister(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, const char *reg) {
+int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg) {
     int i;
     int err;
     const char *format;
@@ -907,7 +908,7 @@ int ReadRegister(pcilib_t *handle, pcilib_model_description_t *model_info, const
     
     if (reg) {
 	pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
-        bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
+        bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);
         format = model_info->banks[bank_id].format;
         if (!format) format = "%lu";
 
@@ -925,14 +926,14 @@ int ReadRegister(pcilib_t *handle, pcilib_model_description_t *model_info, const
     
 	if (model_info->registers) {
 	    if (bank) {
-		bank_id = pcilib_find_bank(handle, bank);
+		bank_id = pcilib_find_register_bank(handle, bank);
 		bank_addr = model_info->banks[bank_id].addr;
 	    }
 	    
 	    printf("Registers:\n");
 	    for (i = 0; model_info->registers[i].bits; i++) {
 		if ((model_info->registers[i].mode & PCILIB_REGISTER_R)&&((!bank)||(model_info->registers[i].bank == bank_addr))&&(model_info->registers[i].type != PCILIB_REGISTER_BITS)) { 
-		    bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[i].bank);
+		    bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[i].bank);
 		    format = model_info->banks[bank_id].format;
 		    if (!format) format = "%lu";
 
@@ -966,12 +967,12 @@ int ReadRegister(pcilib_t *handle, pcilib_model_description_t *model_info, const
     fwrite(tbuf, access/8, n, o); \
 }
 
-int ReadRegisterRange(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
+int ReadRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, FILE *o) {
     int err;
     int i;
 
-    pcilib_register_bank_description_t *banks = model_info->banks;
-    pcilib_register_bank_t bank_id = pcilib_find_bank(handle, bank);
+    const pcilib_register_bank_description_t *banks = model_info->banks;
+    pcilib_register_bank_t bank_id = pcilib_find_register_bank(handle, bank);
 
     if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
 	if (bank) Error("Invalid register bank is specified (%s)", bank);
@@ -1087,7 +1088,7 @@ int WriteData(pcilib_t *handle, ACCESS_MODE mode, pcilib_dma_engine_addr_t dma,
     return 0;
 }
 
-int WriteRegisterRange(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
+int WriteRegisterRange(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, uintptr_t addr, long addr_shift, size_t n, char ** data) {
     pcilib_register_value_t *buf, *check;
     int res, i, err;
     unsigned long value;
@@ -1122,7 +1123,7 @@ int WriteRegisterRange(pcilib_t *handle, pcilib_model_description_t *model_info,
 
 }
 
-int WriteRegister(pcilib_t *handle, pcilib_model_description_t *model_info, const char *bank, const char *reg, char ** data) {
+int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, char ** data) {
     int err;
 
     unsigned long val;
@@ -1756,20 +1757,20 @@ int TriggerAndGrab(pcilib_t *handle, GRAB_MODE grab_mode, const char *evname, co
     return 0;
 }
 
-int StartStopDMA(pcilib_t *handle,  pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
+int StartStopDMA(pcilib_t *handle,  const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, int start) {
     int err;
     pcilib_dma_engine_t dmaid;
     
     if (dma == PCILIB_DMA_ENGINE_ADDR_INVALID) {
-        const pcilib_dma_info_t *dma_info = pcilib_get_dma_info(handle);
+        const pcilib_dma_description_t *dma_info = pcilib_get_dma_info(handle);
 
         if (start) Error("DMA engine should be specified");
 
-	for (dmaid = 0; dma_info->engines[dmaid]; dmaid++) {
+	for (dmaid = 0; dma_info->engines[dmaid].addr_bits; dmaid++) {
 	    err = pcilib_start_dma(handle, dmaid, 0);
-	    if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid]->direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid]->addr);
+	    if (err) Error("Error starting DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
 	    err = pcilib_stop_dma(handle, dmaid, PCILIB_DMA_FLAG_PERSISTENT);
-	    if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid]->direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid]->addr);
+	    if (err) Error("Error stopping DMA Engine (%s %i)", ((dma_info->engines[dmaid].direction == PCILIB_DMA_FROM_DEVICE)?"C2S":"S2C"), dma_info->engines[dmaid].addr);
 	}
 	
 	return 0;
@@ -1851,6 +1852,7 @@ size_t FindUse(size_t *n_uses, kmem_use_info_t *uses, pcilib_kmem_use_t use) {
     
     if (n == MAX_USES) return 0;
 
+    memset(&uses[n], 0, sizeof(pcilib_kmem_use_t));
     uses[n].use = use;
     return (*n_uses)++;
 }
@@ -1878,7 +1880,7 @@ int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_us
 
     size_t useid, n_uses = 1;	// Use 0 is for others
 
-    memset(uses, 0, sizeof(uses));
+    memset(uses, 0, sizeof(kmem_use_info_t));
     
     pos = strrchr(device, '/');
     if (pos) ++pos;
@@ -1905,12 +1907,15 @@ int ParseKMEM(pcilib_t *handle, const char *device, size_t *uses_number, kmem_us
 	if (!f) Error("Can't access file (%s)", fname);
 
 	while(!feof(f)) {
-	    fgets(info, 256, f);
+	    if (!fgets(info, 256, f))
+		break;
+
 	    if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
 	    if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
 	    if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
 	    if (!strncmp(info, "mode:", 5)) mode = strtoul(info+5, NULL, 16);
 	    if (!strncmp(info, "hw ref:", 7)) hwref = strtoul(info+7, NULL, 10);
+
 	}
 	fclose(f);
 
@@ -1960,9 +1965,9 @@ int ListKMEM(pcilib_t *handle, const char *device) {
 	else if ((uses[i].use >> 16) == PCILIB_KMEM_USE_USER)	printf("User %04x         ", uses[i].use&0xFFFF);
 	else printf ("                   ");
 	printf("  ");
-	printf("% 6lu", uses[i].count);
+	printf("%6zu", uses[i].count);
 	printf("     ");
-	printf("% 10s", GetPrintSize(stmp, uses[i].size));
+	printf("%10s", GetPrintSize(stmp, uses[i].size));
 	printf("      ");
 	if (uses[i].referenced&&uses[i].hw_lock) printf("HW+SW");
 	else if (uses[i].referenced) printf("   SW");
@@ -2122,7 +2127,7 @@ int FreeKMEM(pcilib_t *handle, const char *device, const char *use, int force) {
     return 0;
 }
 
-int ListDMA(pcilib_t *handle, const char *device, pcilib_model_description_t *model_info) {
+int ListDMA(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info) {
     int err;
     
     DIR *dir;
@@ -2163,7 +2168,9 @@ int ListDMA(pcilib_t *handle, const char *device, pcilib_model_description_t *mo
 	if (!f) Error("Can't access file (%s)", fname);
 
 	while(!feof(f)) {
-	    fgets(info, 256, f);
+	    if (!fgets(info, 256, f))
+		break;
+
 	    if (!strncmp(info, "use:", 4)) use = strtoul(info+4, NULL, 16);
 //	    if (!strncmp(info, "size:", 5)) size = strtoul(info+5, NULL, 10);
 //	    if (!strncmp(info, "refs:", 5)) refs = strtoul(info+5, NULL, 10);
@@ -2207,7 +2214,7 @@ int ListDMA(pcilib_t *handle, const char *device, pcilib_model_description_t *mo
 	else printf("D");
 
 	printf("        ");
-	printf("% 10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
+	printf("%10s", GetPrintSize(stmp, status.ring_size * status.buffer_size));
 	
 	printf("         ");
 	printf("%zu - %zu (of %zu)", status.ring_tail, status.ring_head, status.ring_size);
@@ -2223,7 +2230,7 @@ int ListDMA(pcilib_t *handle, const char *device, pcilib_model_description_t *mo
     return 0;
 }
 
-int ListBuffers(pcilib_t *handle, const char *device, pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
+int ListBuffers(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction) {
     int err;
     size_t i;
     pcilib_dma_engine_t dmaid;
@@ -2253,7 +2260,7 @@ int ListBuffers(pcilib_t *handle, const char *device, pcilib_model_description_t
     for (i = 0; i < status.ring_size; i++) {
 	printf("%8zu    ", i);
         printf("%c%c %c%c ", buffer[i].used?'U':' ',  buffer[i].error?'E':' ', buffer[i].first?'F':' ', buffer[i].last?'L':' ');
-	printf("% 10s", GetPrintSize(stmp, buffer[i].size));
+	printf("%10s", GetPrintSize(stmp, buffer[i].size));
 	printf("\n");
     }
 
@@ -2267,7 +2274,7 @@ int ListBuffers(pcilib_t *handle, const char *device, pcilib_model_description_t
     return 0;
 }
 
-int ReadBuffer(pcilib_t *handle, const char *device, pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
+int ReadBuffer(pcilib_t *handle, const char *device, const pcilib_model_description_t *model_info, pcilib_dma_engine_addr_t dma, pcilib_dma_direction_t dma_direction, size_t block, FILE *o) {
     int err;
     pcilib_dma_engine_t dmaid;
     pcilib_dma_engine_status_t status;
@@ -2303,7 +2310,7 @@ int ReadBuffer(pcilib_t *handle, const char *device, pcilib_model_description_t
 }
 
 
-int EnableIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
+int EnableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
     int err;
 
     err = pcilib_enable_irq(handle, irq_type, 0);
@@ -2315,7 +2322,7 @@ int EnableIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_i
     return err;
 }
 
-int DisableIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
+int DisableIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_type_t irq_type) {
     int err;
     
     err = pcilib_disable_irq(handle, 0);
@@ -2327,12 +2334,12 @@ int DisableIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_
     return err;
 }
 
-int AckIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
+int AckIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source) {
     pcilib_clear_irq(handle, irq_source);
     return 0;
 }
 
-int WaitIRQ(pcilib_t *handle, pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
+int WaitIRQ(pcilib_t *handle, const pcilib_model_description_t *model_info, pcilib_irq_hw_source_t irq_source, pcilib_timeout_t timeout) {
     int err;
     size_t count;
 
@@ -2361,8 +2368,8 @@ int main(int argc, char **argv) {
     int force = 0;
     int verify = 0;
     
-    pcilib_model_t model = PCILIB_MODEL_DETECT;
-    pcilib_model_description_t *model_info;
+    const char *model = NULL;
+    const pcilib_model_description_t *model_info;
     MODE mode = MODE_INVALID;
     GRAB_MODE grab_mode = 0;
     size_t trigger_time = 0;
@@ -2639,10 +2646,11 @@ int main(int argc, char **argv) {
 		fpga_device = optarg;
 	    break;
 	    case OPT_MODEL:
-		if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
+		model = optarg;
+/*		if (!strcasecmp(optarg, "pci")) model = PCILIB_MODEL_PCI;
 		else if (!strcasecmp(optarg, "ipecamera")) model = PCILIB_MODEL_IPECAMERA;
 		else if (!strcasecmp(optarg, "kapture")) model = PCILIB_MODEL_KAPTURE;
-		else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);
+		else Usage(argc, argv, "Invalid memory model (%s) is specified", optarg);*/
 	    break;
 	    case OPT_BAR:
 		bank = optarg;
@@ -2838,7 +2846,6 @@ int main(int argc, char **argv) {
     handle = pcilib_open(fpga_device, model);
     if (handle < 0) Error("Failed to open FPGA device: %s", fpga_device);
 
-    model = pcilib_get_model(handle);
     model_info = pcilib_get_model_description(handle);
 
     switch (mode) {
@@ -2866,7 +2873,8 @@ int main(int argc, char **argv) {
         else Usage(argc, argv, "The %i data values is specified, but %i required", argc - optind, size);
      case MODE_READ:
         if (!addr) {
-	    if (model == PCILIB_MODEL_PCI) {
+	    if (((!model_info->dma)||(!model_info->dma->api))&&(!model_info->api)) {
+//	    if (model == PCILIB_MODEL_PCI) {
 		if ((amode != ACCESS_DMA)&&(amode != ACCESS_CONFIG)) 
 		    Usage(argc, argv, "The address is not specified");
 	    } else ++mode;
@@ -2927,7 +2935,7 @@ int main(int argc, char **argv) {
 	    addr = NULL;
 	} else if ((isxnumber(addr))&&(sscanf(addr, "%lx", &start) == 1)) {
 		// check if the address in the register range
-	    pcilib_register_range_t *ranges =  model_info->ranges;
+	    const pcilib_register_range_t *ranges =  model_info->ranges;
 	    
 	    if (ranges) {
 		for (i = 0; ranges[i].start != ranges[i].end; i++) 
@@ -2935,7 +2943,7 @@ int main(int argc, char **argv) {
 	    		
 		    // register access in plain mode
 		if (ranges[i].start != ranges[i].end) {
-		    pcilib_register_bank_t regbank = pcilib_find_bank_by_addr(handle, ranges[i].bank);
+		    pcilib_register_bank_t regbank = pcilib_find_register_bank_by_addr(handle, ranges[i].bank);
 		    if (regbank == PCILIB_REGISTER_BANK_INVALID) Error("Configuration error: register bank specified in the address range is not found");
 		    
 		    bank = model_info->banks[regbank].name;
@@ -2991,12 +2999,12 @@ int main(int argc, char **argv) {
 	    case MODE_BENCHMARK:
 	    case MODE_READ:
 	    case MODE_WRITE:
-		if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_BANKS)) 
+		if ((!isnumber(bank))||(sscanf(bank,"%li", &itmp) != 1)||(itmp < 0)||(itmp >= PCILIB_MAX_REGISTER_BANKS)) 
 		    Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
 		else bar = itmp;
 	    break;
 	    default:
-		if (pcilib_find_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
+		if (pcilib_find_register_bank(handle, bank) == PCILIB_REGISTER_BANK_INVALID)
 		    Usage(argc, argv, "Invalid data bank (%s) is specified", bank);
 	}
     }

config.c

@@ -0,0 +1,40 @@
+#define _PCILIB_CONFIG_C
+
+#include <stdio.h>
+
+#include "model.h"
+#include "error.h"
+#include "config.h"
+
+#include "protocols/default.h"
+
+
+void (*pcilib_error)(const char *msg, ...) = pcilib_print_error;
+void (*pcilib_warning)(const char *msg, ...) = pcilib_print_error;
+
+
+const pcilib_register_protocol_description_t pcilib_protocols[] = {
+    { PCILIB_REGISTER_PROTOCOL_DEFAULT, &pcilib_default_protocol_api, NULL, NULL, "default", "" },
+    { 0 }
+};
+
+//static const pcilib_register_protocol_description_t *pcilib_protocol_default = NULL;//{0};//&pcilib_protocols[0];
+
+#include "dma/nwl.h"
+#include "dma/ipe.h"
+
+
+/*
+pcilib_register_protocol_alias_t pcilib_protocols[] = {
+    { "default", 	{ &pcilib_default_protocol_api, PCILIB_REGISTER_PROTOCOL_MODIFICATION_DEFAULT, NULL } },
+    { NULL, 		{0} }
+};
+*/
+
+
+const pcilib_dma_description_t pcilib_dma[] = {
+    { &ipe_dma_api, ipe_dma_banks, ipe_dma_registers, ipe_dma_engines, NULL, NULL, "ipedma", "DMA engine developed by M. Caselle" },
+    { &nwl_dma_api, nwl_dma_banks, nwl_dma_registers, NULL, NULL, NULL, "nwldma", "North West Logic DMA Engine" },
+    { &nwl_dma_api, nwl_dma_banks, nwl_dma_registers, NULL, "ipecamera", NULL, "nwldma-ipe", "North West Logic DMA Engine" },
+    { 0 }
+};

config.h

@@ -0,0 +1,30 @@
+#ifndef _PCILIB_CONFIG_H
+#define _PCILIB_CONFIG_H
+
+
+#include "register.h"
+#include "dma.h"
+
+/*
+typedef struct {
+    const char *alias;
+    pcilib_register_protocol_description_t *protocol;
+} pcilib_register_protocol_alias_t;
+
+
+typedef struct {
+    const char *alias;
+    pcilib_dma_description_t dma;
+} pcilib_dma_alias_t;
+
+extern pcilib_register_protocol_alias_t pcilib_protocols[];
+extern pcilib_dma_alias_t pcilib_dma[];
+*/
+
+extern const pcilib_register_protocol_description_t pcilib_protocols[];
+extern const pcilib_dma_description_t pcilib_dma[];
+
+
+//extern const pcilib_register_protocol_description_t *pcilib_protocol_default;
+
+#endif /* _PCILIB_CONFIG_H */

default.c

@@ -1,34 +0,0 @@
-#include <sys/time.h>
-#include <arpa/inet.h>
-#include <assert.h>
-
-#include "tools.h"
-#include "default.h"
-#include "error.h"
-
-#define default_datacpy(dst, src, access, bank)   pcilib_datacpy(dst, src, access, 1, bank->raw_endianess)
-
-int pcilib_default_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t *value) {
-    char *ptr;
-    pcilib_register_value_t val = 0;
-    int access = bank->access / 8;
-
-    ptr =  pcilib_resolve_register_address(ctx, bank->bar, bank->read_addr + addr);
-    default_datacpy(&val, ptr, access, bank);
-
-//    *value = val&BIT_MASK(bits);
-    *value = val;
-
-    return 0;
-}
-
-
-int pcilib_default_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t value) {
-    char *ptr;
-    int access = bank->access / 8;
-
-    ptr =  pcilib_resolve_register_address(ctx, bank->bar, bank->write_addr + addr);
-    default_datacpy(ptr, &value, access, bank);
-
-    return 0;
-}

default.h

@@ -1,9 +0,0 @@
-#ifndef _PCILIB_DEFAULT_H
-#define _PCILIB_DEFAULT_H
-
-#include "pcilib.h"
-
-int pcilib_default_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t *value);
-int pcilib_default_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t value);
-
-#endif /* _PCILIB_DEFAULT_H */

dma.c

@@ -18,115 +18,152 @@
 #include "pci.h"
 #include "dma.h"
 
-const pcilib_dma_info_t *pcilib_get_dma_info(pcilib_t *ctx) {
-    if (!ctx->dma_ctx) {
-        pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-
-	if ((ctx->event_ctx)&&(model_info->event_api->init_dma)) {
-	    pcilib_map_register_space(ctx);
-	    ctx->dma_ctx = model_info->event_api->init_dma(ctx->event_ctx);
-	} else if ((model_info->dma_api)&&(model_info->dma_api->init)) {
-	    pcilib_map_register_space(ctx);
-	    ctx->dma_ctx = model_info->dma_api->init(ctx, PCILIB_DMA_MODIFICATION_DEFAULT, NULL);
-	}
-	
-	if (!ctx->dma_ctx) return NULL;
+const pcilib_dma_description_t *pcilib_get_dma_info(pcilib_t *ctx) {
+    int err;
+
+    err = pcilib_init_dma(ctx);
+    if (err) {
+	pcilib_error("Error (%i) while initializing DMA", err);
+	return NULL;
     }
-    
-    return &ctx->dma_info;
+
+    if (!ctx->dma_ctx) return NULL;
+
+    return ctx->model_info.dma;
 }
 
+
 pcilib_dma_engine_t pcilib_find_dma_by_addr(pcilib_t *ctx, pcilib_dma_direction_t direction, pcilib_dma_engine_addr_t dma) {
     pcilib_dma_engine_t i;
 
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
     if (!info) {
 	pcilib_error("DMA Engine is not configured in the current model");
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
-    
-    for (i = 0; info->engines[i]; i++) {
-	if ((info->engines[i]->addr == dma)&&((info->engines[i]->direction&direction)==direction)) break;
+
+    for (i = 0; info->engines[i].addr_bits; i++) {
+	if ((info->engines[i].addr == dma)&&((info->engines[i].direction&direction)==direction)) break;
     }
-    
-    if (info->engines[i]) return i;
+
+    if (info->engines[i].addr_bits) return i;
     return PCILIB_DMA_ENGINE_INVALID;
 }
 
-int pcilib_set_dma_engine_description(pcilib_t *ctx, pcilib_dma_engine_t engine, pcilib_dma_engine_description_t *desc) {
-    ctx->dma_info.engines[engine] = desc;
+
+pcilib_dma_engine_t pcilib_add_dma_engine(pcilib_t *ctx, pcilib_dma_engine_description_t *desc) {
+    pcilib_dma_engine_t engine = ctx->num_engines++;
+    memcpy (&ctx->engines[engine], desc, sizeof(pcilib_dma_engine_description_t));
+    return engine;
+}
+
+
+int pcilib_init_dma(pcilib_t *ctx) {
+    int err;
+    pcilib_dma_context_t *dma_ctx = NULL;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+
+    if (ctx->dma_ctx)
+	return 0;
+	
+
+    if ((ctx->event_ctx)&&(model_info->api)&&(model_info->api->init_dma)) {
+	err = pcilib_init_register_banks(ctx);
+	if (err) {
+	    pcilib_error("Error (%i) while initializing register banks", err);
+	    return err;
+	}
+
+	dma_ctx = model_info->api->init_dma(ctx->event_ctx);
+    } else if ((model_info->dma)&&(model_info->dma->api)&&(model_info->dma->api->init)) {
+	const pcilib_dma_description_t *dma = model_info->dma;
+	
+	err = pcilib_init_register_banks(ctx);
+	if (err) {
+	    pcilib_error("Error (%i) while initializing register banks", err);
+	    return err;
+	}
+
+	dma_ctx = dma->api->init(ctx, (dma->model?dma->model:ctx->model), dma->args);
+    }
+
+    if (dma_ctx) {
+	dma_ctx->pcilib = ctx;
+	    // DS: parameters?
+	ctx->dma_ctx = dma_ctx;
+    }
 
     return 0;
 }
 
 int pcilib_start_dma(pcilib_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
     if (!info) {
 	pcilib_error("DMA is not supported by the device");
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
 
-    if (!ctx->model_info.dma_api) {
+    if (!ctx->model_info.dma->api) {
 	pcilib_error("DMA Engine is not configured in the current model");
 	return PCILIB_ERROR_NOTAVAILABLE;
     }
     
-    if (!ctx->model_info.dma_api->start_dma) {
+    if (!ctx->model_info.dma->api->start_dma) {
 	return 0;
     }
     
-    return ctx->model_info.dma_api->start_dma(ctx->dma_ctx, dma, flags);
+    return ctx->model_info.dma->api->start_dma(ctx->dma_ctx, dma, flags);
 }
 
 int pcilib_stop_dma(pcilib_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
 
     if (!info) {
 	pcilib_error("DMA is not supported by the device");
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
 
-    if (!ctx->model_info.dma_api) {
+    if (!ctx->model_info.dma->api) {
 	pcilib_error("DMA Engine is not configured in the current model");
 	return PCILIB_ERROR_NOTAVAILABLE;
     }
     
-    if (!ctx->model_info.dma_api->stop_dma) {
+    if (!ctx->model_info.dma->api->stop_dma) {
 	return 0;
     }
 
-    return ctx->model_info.dma_api->stop_dma(ctx->dma_ctx, dma, flags);
+    return ctx->model_info.dma->api->stop_dma(ctx->dma_ctx, dma, flags);
 }
 
 int pcilib_enable_irq(pcilib_t *ctx, pcilib_irq_type_t irq_type, pcilib_dma_flags_t flags) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
 
-    if ((!info)||(!ctx->model_info.dma_api)||(!ctx->model_info.dma_api->enable_irq)) return 0;
+    if ((!info)||(!ctx->model_info.dma->api)||(!ctx->model_info.dma->api->enable_irq)) return 0;
 
-    return ctx->model_info.dma_api->enable_irq(ctx->dma_ctx, irq_type, flags);
+    return ctx->model_info.dma->api->enable_irq(ctx->dma_ctx, irq_type, flags);
 }
 
 int pcilib_disable_irq(pcilib_t *ctx, pcilib_dma_flags_t flags) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
 
-    if ((!info)||(!ctx->model_info.dma_api)||(!ctx->model_info.dma_api->disable_irq)) return 0;
+    if ((!info)||(!ctx->model_info.dma->api)||(!ctx->model_info.dma->api->disable_irq)) return 0;
 
-    return ctx->model_info.dma_api->disable_irq(ctx->dma_ctx, flags);
+    return ctx->model_info.dma->api->disable_irq(ctx->dma_ctx, flags);
 }
 
 int pcilib_acknowledge_irq(pcilib_t *ctx, pcilib_irq_type_t irq_type, pcilib_irq_source_t irq_source) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
 
-    if ((!info)||(!ctx->model_info.dma_api)||(!ctx->model_info.dma_api->acknowledge_irq)) return 0;
+    if ((!info)||(!ctx->model_info.dma->api)||(!ctx->model_info.dma->api->acknowledge_irq)) return 0;
 
-    return ctx->model_info.dma_api->acknowledge_irq(ctx->dma_ctx, irq_type, irq_source);
+    return ctx->model_info.dma->api->acknowledge_irq(ctx->dma_ctx, irq_type, irq_source);
 }
 
 typedef struct {
     size_t size;
     void *data;
     size_t pos;
-    
+
     pcilib_dma_flags_t flags;
 } pcilib_dma_read_callback_context_t;
 
@@ -166,33 +203,34 @@ static int pcilib_dma_skip_callback(void *arg, pcilib_dma_flags_t flags, size_t
 }
 
 int pcilib_stream_dma(pcilib_t *ctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, pcilib_dma_callback_t cb, void *cbattr) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
     if (!info) {
 	pcilib_error("DMA is not supported by the device");
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
 
-    if (!ctx->model_info.dma_api) {
+    if (!ctx->model_info.dma->api) {
 	pcilib_error("DMA Engine is not configured in the current model");
 	return PCILIB_ERROR_NOTAVAILABLE;
     }
     
-    if (!ctx->model_info.dma_api->stream) {
+    if (!ctx->model_info.dma->api->stream) {
 	pcilib_error("The DMA read is not supported by configured DMA engine");
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
-    
-    if (!info->engines[dma]) {
+
+	// DS: We should check we are not going outside of allocated engine space
+    if (!info->engines[dma].addr_bits) {
 	pcilib_error("The DMA engine (%i) is not supported by device", dma);
 	return PCILIB_ERROR_NOTAVAILABLE;
     }
 
-    if ((info->engines[dma]->direction&PCILIB_DMA_FROM_DEVICE) == 0) {
+    if ((info->engines[dma].direction&PCILIB_DMA_FROM_DEVICE) == 0) {
 	pcilib_error("The selected engine (%i) is S2C-only and does not support reading", dma);
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
 
-    return ctx->model_info.dma_api->stream(ctx->dma_ctx, dma, addr, size, flags, timeout, cb, cbattr);
+    return ctx->model_info.dma->api->stream(ctx->dma_ctx, dma, addr, size, flags, timeout, cb, cbattr);
 }
 
 int pcilib_read_dma_custom(pcilib_t *ctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, void *buf, size_t *read_bytes) {
@@ -242,33 +280,34 @@ int pcilib_skip_dma(pcilib_t *ctx, pcilib_dma_engine_t dma) {
 
 
 int pcilib_push_dma(pcilib_t *ctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, void *buf, size_t *written) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
     if (!info) {
 	pcilib_error("DMA is not supported by the device");
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
 
-    if (!ctx->model_info.dma_api) {
+    if (!ctx->model_info.dma->api) {
 	pcilib_error("DMA Engine is not configured in the current model");
 	return PCILIB_ERROR_NOTAVAILABLE;
     }
     
-    if (!ctx->model_info.dma_api->push) {
+    if (!ctx->model_info.dma->api->push) {
 	pcilib_error("The DMA write is not supported by configured DMA engine");
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
     
-    if (!info->engines[dma]) {
+	    // DS: We should check we don't exceed allocated engine range
+    if (!info->engines[dma].addr_bits) {
 	pcilib_error("The DMA engine (%i) is not supported by device", dma);
 	return PCILIB_ERROR_NOTAVAILABLE;
     }
 
-    if ((info->engines[dma]->direction&PCILIB_DMA_TO_DEVICE) == 0) {
+    if ((info->engines[dma].direction&PCILIB_DMA_TO_DEVICE) == 0) {
 	pcilib_error("The selected engine (%i) is C2S-only and does not support writes", dma);
 	return PCILIB_ERROR_NOTSUPPORTED;
     }
     
-    return ctx->model_info.dma_api->push(ctx->dma_ctx, dma, addr, size, flags, timeout, buf, written);
+    return ctx->model_info.dma->api->push(ctx->dma_ctx, dma, addr, size, flags, timeout, buf, written);
 }
 
 
@@ -277,51 +316,47 @@ int pcilib_write_dma(pcilib_t *ctx, pcilib_dma_engine_t dma, uintptr_t addr, siz
 }
 
 double pcilib_benchmark_dma(pcilib_t *ctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
     if (!info) {
 	pcilib_error("DMA is not supported by the device");
 	return 0;
     }
 
-    if (!ctx->model_info.dma_api) {
+    if (!ctx->model_info.dma->api) {
 	pcilib_error("DMA Engine is not configured in the current model");
 	return -1;
     }
     
-    if (!ctx->model_info.dma_api->benchmark) {
+    if (!ctx->model_info.dma->api->benchmark) {
 	pcilib_error("The DMA benchmark is not supported by configured DMA engine");
 	return -1;
-   }
-    
-    if (!info->engines[dma]) {
-	pcilib_error("The DMA engine (%i) is not supported by device", dma);
-	return -1;
     }
 
-    return ctx->model_info.dma_api->benchmark(ctx->dma_ctx, dma, addr, size, iterations, direction);
+    return ctx->model_info.dma->api->benchmark(ctx->dma_ctx, dma, addr, size, iterations, direction);
 }
 
 int pcilib_get_dma_status(pcilib_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_engine_status_t *status, size_t n_buffers, pcilib_dma_buffer_status_t *buffers) {
-    const pcilib_dma_info_t *info =  pcilib_get_dma_info(ctx);
+    const pcilib_dma_description_t *info =  pcilib_get_dma_info(ctx);
     if (!info) {
 	pcilib_error("DMA is not supported by the device");
 	return 0;
     }
 
-    if (!ctx->model_info.dma_api) {
+    if (!ctx->model_info.dma->api) {
 	pcilib_error("DMA Engine is not configured in the current model");
 	return -1;
     }
     
-    if (!ctx->model_info.dma_api->status) {
+    if (!ctx->model_info.dma->api->status) {
 	memset(status, 0, sizeof(pcilib_dma_engine_status_t));
 	return -1;
    }
     
-    if (!info->engines[dma]) {
+        // DS: We should check we don't exceed allocated engine range
+    if (!info->engines[dma].addr_bits) {
 	pcilib_error("The DMA engine (%i) is not supported by device", dma);
 	return -1;
     }
 
-    return ctx->model_info.dma_api->status(ctx->dma_ctx, dma, status, n_buffers, buffers);
+    return ctx->model_info.dma->api->status(ctx->dma_ctx, dma, status, n_buffers, buffers);
 }

dma.h

@@ -2,9 +2,7 @@
 #define _PCILIB_DMA_H
 
 #define PCILIB_DMA_BUFFER_INVALID ((size_t)-1)
-#define PCILIB_DMA_MODIFICATION_DEFAULT 0		/**< first 0x100 are reserved */
 
-typedef uint32_t pcilib_dma_modification_t;
 
 typedef struct {
     int started;
@@ -12,6 +10,22 @@ typedef struct {
     size_t ring_head, ring_tail;
 } pcilib_dma_engine_status_t;
 
+typedef enum {
+    PCILIB_DMA_TYPE_BLOCK,
+    PCILIB_DMA_TYPE_PACKET,
+    PCILIB_DMA_TYPE_UNKNOWN
+} pcilib_dma_engine_type_t;
+
+typedef struct {
+    pcilib_dma_engine_addr_t addr;
+    pcilib_dma_engine_type_t type;
+    pcilib_dma_direction_t direction;
+    size_t addr_bits;
+
+    const char *name;
+    const char *description;
+} pcilib_dma_engine_description_t;
+
 typedef struct {
     int used;
     int error;
@@ -20,10 +34,19 @@ typedef struct {
     size_t size;
 } pcilib_dma_buffer_status_t;
 
-struct pcilib_dma_api_description_s {
-    const char *title;
+/*
+typedef struct {
+    int ignore_eop;
+} pcilib_dma_parameters_t;
+*/
 
-    pcilib_dma_context_t *(*init)(pcilib_t *ctx, pcilib_dma_modification_t type, void *arg);
+typedef struct {
+//    pcilib_dma_parameters_t params;
+    pcilib_t *pcilib;
+} pcilib_dma_context_t;
+
+typedef struct {
+    pcilib_dma_context_t *(*init)(pcilib_t *ctx, const char *model, const void *arg);
     void (*free)(pcilib_dma_context_t *ctx);
     
     int (*status)(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_engine_status_t *status, size_t n_buffers, pcilib_dma_buffer_status_t *buffers);
@@ -39,14 +62,25 @@ struct pcilib_dma_api_description_s {
     int (*stream)(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, pcilib_dma_callback_t cb, void *cbattr);
 
     double (*benchmark)(pcilib_dma_context_t *ctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction);
-};
+} pcilib_dma_api_description_t;
 
-struct pcilib_dma_context_s {
-    int ignore_eop;
-};
+
+typedef struct {
+    const pcilib_dma_api_description_t *api;
+    const pcilib_register_bank_description_t *banks;
+    const pcilib_register_description_t *registers;
+    const pcilib_dma_engine_description_t *engines;
+    const char *model;
+    const void *args;
+    const char *name;
+    const char *description;
+} pcilib_dma_description_t;
 
 
-int pcilib_set_dma_engine_description(pcilib_t *ctx, pcilib_dma_engine_t engine, pcilib_dma_engine_description_t *desc);
+const pcilib_dma_description_t *pcilib_get_dma_info(pcilib_t *ctx);
+pcilib_dma_engine_t pcilib_add_dma_engine(pcilib_t *ctx, pcilib_dma_engine_description_t *desc);
 int pcilib_get_dma_status(pcilib_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_engine_status_t *status, size_t n_buffers, pcilib_dma_buffer_status_t *buffers);
+int pcilib_init_dma(pcilib_t *ctx);
+
 
 #endif /* _PCILIB_DMA_H */

dma/CMakeLists.txt

@@ -3,7 +3,9 @@ include_directories(
 )
 
 
-set(HEADERS ${HEADERS} nwl.h nwl_private.h nwl_engine.h nwl_irq.h nwl_loopback.h nwl_register.h ipe.h ipe_private.h ipe_registers.h)
+set(HEADERS ${HEADERS} nwl.h nwl_private.h nwl_engine.h nwl_irq.h nwl_loopback.h ipe.h ipe_private.h)
 
-add_library(dma STATIC nwl.c nwl_engine.c nwl_irq.c nwl_loopback.c nwl_register.c ipe.c)
+add_library(dma STATIC nwl.c nwl_engine.c nwl_irq.c nwl_loopback.c ipe.c)
 
+#set(HEADERS ${HEADERS} ipe.h ipe_private.h)
+#add_library(dma STATIC  ipe.c)

dma/ipe.c

@@ -15,25 +15,25 @@
 
 #include "ipe.h"
 #include "ipe_private.h"
-#include "ipe_registers.h"
 
 
 #define WR(addr, value) { *(uint32_t*)(ctx->base_addr + addr) = value; }
 #define RD(addr, value) { value = *(uint32_t*)(ctx->base_addr + addr); }
 
 
-pcilib_dma_context_t *dma_ipe_init(pcilib_t *pcilib, pcilib_dma_modification_t type, void *arg) {
-    int err = 0;
+pcilib_dma_context_t *dma_ipe_init(pcilib_t *pcilib, const char *model, const void *arg) {
+//    int err = 0;
     
-    pcilib_model_description_t *model_info = pcilib_get_model_description(pcilib);
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(pcilib);
 
     ipe_dma_t *ctx = malloc(sizeof(ipe_dma_t));
 
     if (ctx) {
 	memset(ctx, 0, sizeof(ipe_dma_t));
-	ctx->pcilib = pcilib;
+	ctx->dmactx.pcilib = pcilib;
 //	ctx->mode64 = 1;
-	
+
+/*	
 	memset(ctx->engine, 0, 2 * sizeof(pcilib_dma_engine_description_t));
 	ctx->engine[0].addr = 0;
 	ctx->engine[0].type = PCILIB_DMA_TYPE_PACKET;
@@ -41,8 +41,21 @@ pcilib_dma_context_t *dma_ipe_init(pcilib_t *pcilib, pcilib_dma_modification_t t
 	ctx->engine[0].addr_bits = 32;
 	pcilib_set_dma_engine_description(pcilib, 0, &ctx->engine[0]);
 	pcilib_set_dma_engine_description(pcilib, 1, NULL);
+*/
+
+	pcilib_register_bank_t dma_bank = pcilib_find_register_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
+/*
+	if (dma_bank == PCILIB_REGISTER_BANK_INVALID) {
+	    err = pcilib_add_register_banks(ctx->pcilib, 0, ipe_dma_register_banks);
+	    if (err) {
+		free(ctx);
+		pcilib_error("Error (%i) adding DMA register bank");
+		return NULL;
+	    }
+	}
 
-	pcilib_register_bank_t dma_bank = pcilib_find_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
+	dma_bank = pcilib_find_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
+*/
 	if (dma_bank == PCILIB_REGISTER_BANK_INVALID) {
 	    free(ctx);
 	    pcilib_error("DMA Register Bank could not be found");
@@ -52,12 +65,14 @@ pcilib_dma_context_t *dma_ipe_init(pcilib_t *pcilib, pcilib_dma_modification_t t
 	ctx->dma_bank = model_info->banks + dma_bank;
 	ctx->base_addr = pcilib_resolve_register_address(pcilib, ctx->dma_bank->bar, ctx->dma_bank->read_addr);
 
+/*
 	err = pcilib_add_registers(ctx->pcilib, 0, ipe_dma_registers);
 	if (err) {
 	    free(ctx);
 	    pcilib_error("Error adding DMA registers");
 	    return NULL;
 	}
+*/
     }
 
     return (pcilib_dma_context_t*)ctx;
@@ -100,16 +115,16 @@ int dma_ipe_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dm
     if (ctx->pages) return 0;
     
     kflags = PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_EXCLUSIVE|PCILIB_KMEM_FLAG_HARDWARE|(ctx->preserve?PCILIB_KMEM_FLAG_PERSISTENT:0);
-    pcilib_kmem_handle_t *desc = pcilib_alloc_kernel_memory(ctx->pcilib, PCILIB_KMEM_TYPE_CONSISTENT, 1, IPEDMA_DESCRIPTOR_SIZE, IPEDMA_DESCRIPTOR_ALIGNMENT, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x00), kflags);
-    pcilib_kmem_handle_t *pages = pcilib_alloc_kernel_memory(ctx->pcilib, PCILIB_KMEM_TYPE_DMA_C2S_PAGE, IPEDMA_DMA_PAGES, 0, 0, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x00), kflags);
+    pcilib_kmem_handle_t *desc = pcilib_alloc_kernel_memory(ctx->dmactx.pcilib, PCILIB_KMEM_TYPE_CONSISTENT, 1, IPEDMA_DESCRIPTOR_SIZE, IPEDMA_DESCRIPTOR_ALIGNMENT, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x00), kflags);
+    pcilib_kmem_handle_t *pages = pcilib_alloc_kernel_memory(ctx->dmactx.pcilib, PCILIB_KMEM_TYPE_DMA_C2S_PAGE, IPEDMA_DMA_PAGES, 0, 0, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x00), kflags);
 
     if (!desc||!pages) {
-	if (pages) pcilib_free_kernel_memory(ctx->pcilib, pages, 0);
-	if (desc) pcilib_free_kernel_memory(ctx->pcilib, desc, 0);
+	if (pages) pcilib_free_kernel_memory(ctx->dmactx.pcilib, pages, 0);
+	if (desc) pcilib_free_kernel_memory(ctx->dmactx.pcilib, desc, 0);
 	return PCILIB_ERROR_MEMORY;
     }
-    reuse_desc = pcilib_kmem_is_reused(ctx->pcilib, desc);
-    reuse_pages = pcilib_kmem_is_reused(ctx->pcilib, pages);
+    reuse_desc = pcilib_kmem_is_reused(ctx->dmactx.pcilib, desc);
+    reuse_pages = pcilib_kmem_is_reused(ctx->dmactx.pcilib, pages);
 
     if (reuse_desc == reuse_pages) {
 	if (reuse_desc & PCILIB_KMEM_REUSE_PARTIAL) pcilib_warning("Inconsistent DMA buffers are found (only part of required buffers is available), reinitializing...");
@@ -128,7 +143,7 @@ int dma_ipe_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dm
 	}
     } else pcilib_warning("Inconsistent DMA buffers (modes of ring and page buffers does not match), reinitializing....");
 
-    desc_va = pcilib_kmem_get_ua(ctx->pcilib, desc);
+    desc_va = pcilib_kmem_get_ua(ctx->dmactx.pcilib, desc);
     if (ctx->mode64) last_written_addr_ptr = desc_va + 3 * sizeof(uint32_t);
     else last_written_addr_ptr = desc_va + 4 * sizeof(uint32_t);
 
@@ -186,14 +201,14 @@ int dma_ipe_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dm
         
 	    // Setting current read position and configuring progress register
 	WR(IPEDMA_REG_LAST_READ, IPEDMA_DMA_PAGES);
-	WR(IPEDMA_REG_UPDATE_ADDR, pcilib_kmem_get_block_ba(ctx->pcilib, desc, 0));
+	WR(IPEDMA_REG_UPDATE_ADDR, pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, desc, 0));
 
 	    // Instructing DMA engine that writting should start from the first DMA page
-	*last_written_addr_ptr = 0;//htonl(pcilib_kmem_get_block_ba(ctx->pcilib, pages, IPEDMA_DMA_PAGES - 1));
+	*last_written_addr_ptr = 0;//htonl(pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, pages, IPEDMA_DMA_PAGES - 1));
 
 	
 	for (i = 0; i < IPEDMA_DMA_PAGES; i++) {
-	    uintptr_t bus_addr_check, bus_addr = pcilib_kmem_get_block_ba(ctx->pcilib, pages, i);
+	    uintptr_t bus_addr_check, bus_addr = pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, pages, i);
 	    WR(IPEDMA_REG_PAGE_ADDR, bus_addr);
 	    if (bus_addr%4096) printf("Bad address %lu: %lx\n", i, bus_addr);
 	    
@@ -219,13 +234,13 @@ int dma_ipe_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dm
 #endif /* IPEDMA_BUG_DMARD */
     }
 
-//    ctx->last_read_addr = htonl(pcilib_kmem_get_block_ba(ctx->pcilib, pages, ctx->last_read));
-    ctx->last_read_addr = pcilib_kmem_get_block_ba(ctx->pcilib, pages, ctx->last_read);
+//    ctx->last_read_addr = htonl(pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, pages, ctx->last_read));
+    ctx->last_read_addr = pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, pages, ctx->last_read);
 
 
     ctx->desc = desc;
     ctx->pages = pages;
-    ctx->page_size = pcilib_kmem_get_block_size(ctx->pcilib, pages, 0);;
+    ctx->page_size = pcilib_kmem_get_block_size(ctx->dmactx.pcilib, pages, 0);;
     ctx->ring_size = IPEDMA_DMA_PAGES;
 
     return 0;
@@ -269,12 +284,12 @@ int dma_ipe_stop(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma
 
 	// Clean buffers
     if (ctx->desc) {
-	pcilib_free_kernel_memory(ctx->pcilib, ctx->desc, kflags);
+	pcilib_free_kernel_memory(ctx->dmactx.pcilib, ctx->desc, kflags);
 	ctx->desc = NULL;
     }
 
     if (ctx->pages) {
-	pcilib_free_kernel_memory(ctx->pcilib, ctx->pages, kflags);
+	pcilib_free_kernel_memory(ctx->dmactx.pcilib, ctx->pages, kflags);
 	ctx->pages = NULL;
     }
 
@@ -286,7 +301,7 @@ int dma_ipe_get_status(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcil
     size_t i;
     ipe_dma_t *ctx = (ipe_dma_t*)vctx;
 
-    void *desc_va = (void*)pcilib_kmem_get_ua(ctx->pcilib, ctx->desc);
+    void *desc_va = (void*)pcilib_kmem_get_ua(ctx->dmactx.pcilib, ctx->desc);
     uint32_t *last_written_addr_ptr;
     uint32_t last_written_addr;
     
@@ -307,7 +322,7 @@ int dma_ipe_get_status(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcil
 
 	// Find where the ring head is actually are
     for (i = 0; i < ctx->ring_size; i++) {
-	uintptr_t bus_addr = pcilib_kmem_get_block_ba(ctx->pcilib, ctx->pages, i);
+	uintptr_t bus_addr = pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, ctx->pages, i);
 
 	if (bus_addr == last_written_addr) {
 	    status->ring_head = bus_addr;
@@ -373,7 +388,7 @@ int dma_ipe_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uin
     err = dma_ipe_start(vctx, dma, PCILIB_DMA_FLAGS_DEFAULT);
     if (err) return err;
 
-    desc_va = (void*)pcilib_kmem_get_ua(ctx->pcilib, ctx->desc);
+    desc_va = (void*)pcilib_kmem_get_ua(ctx->dmactx.pcilib, ctx->desc);
 
     if (ctx->mode64) last_written_addr_ptr = desc_va + 3 * sizeof(uint32_t);
     else last_written_addr_ptr = desc_va + 4 * sizeof(uint32_t);
@@ -428,24 +443,24 @@ int dma_ipe_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uin
 #endif /* IPEDMA_DEBUG */
 
 #ifdef IPEDMA_DETECT_PACKETS
-	if ((*empty_detected_ptr)&&(pcilib_kmem_get_block_ba(ctx->pcilib, ctx->pages, cur_read) == (*last_written_addr_ptr))) packet_flags = PCILIB_DMA_FLAG_EOP;
+	if ((*empty_detected_ptr)&&(pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, ctx->pages, cur_read) == (*last_written_addr_ptr))) packet_flags = PCILIB_DMA_FLAG_EOP;
 	else packet_flags = 0;
 #endif /* IPEDMA_DETECT_PACKETS */
 	
-	pcilib_kmem_sync_block(ctx->pcilib, ctx->pages, PCILIB_KMEM_SYNC_FROMDEVICE, cur_read);
-        void *buf = pcilib_kmem_get_block_ua(ctx->pcilib, ctx->pages, cur_read);
+	pcilib_kmem_sync_block(ctx->dmactx.pcilib, ctx->pages, PCILIB_KMEM_SYNC_FROMDEVICE, cur_read);
+        void *buf = pcilib_kmem_get_block_ua(ctx->dmactx.pcilib, ctx->pages, cur_read);
 	ret = cb(cbattr, packet_flags, ctx->page_size, buf);
 	if (ret < 0) return -ret;
 	
 //	DS: Fixme, it looks like we can avoid calling this for the sake of performance
-//	pcilib_kmem_sync_block(ctx->pcilib, ctx->pages, PCILIB_KMEM_SYNC_TODEVICE, cur_read);
+//	pcilib_kmem_sync_block(ctx->dmactx.pcilib, ctx->pages, PCILIB_KMEM_SYNC_TODEVICE, cur_read);
 
 	    // Numbered from 1
 	WR(IPEDMA_REG_LAST_READ, cur_read + 1);
 
 	ctx->last_read = cur_read;
-//	ctx->last_read_addr = htonl(pcilib_kmem_get_block_ba(ctx->pcilib, ctx->pages, cur_read));
-	ctx->last_read_addr = pcilib_kmem_get_block_ba(ctx->pcilib, ctx->pages, cur_read);
+//	ctx->last_read_addr = htonl(pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, ctx->pages, cur_read));
+	ctx->last_read_addr = pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, ctx->pages, cur_read);
 
 #ifdef IPEDMA_BUG_DMARD
 	FILE *f = fopen("/tmp/pcitool_lastread", "w");
@@ -481,7 +496,7 @@ double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
 
     WR(IPEDMA_REG_CONTROL, 0x0);
 
-    err = pcilib_skip_dma(ctx->pcilib, 0);
+    err = pcilib_skip_dma(ctx->dmactx.pcilib, 0);
     if (err) {
 	pcilib_error("Can't start benchmark, devices continuously writes unexpected data using DMA engine");
 	return -1;
@@ -500,7 +515,7 @@ double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
 	WR(IPEDMA_REG_CONTROL, 0x1);
 	
 	for (bytes = 0; bytes < size; bytes += rbytes) {
-	    err = pcilib_read_dma(ctx->pcilib, 0, addr, size - bytes, buf + bytes, &rbytes);
+	    err = pcilib_read_dma(ctx->dmactx.pcilib, 0, addr, size - bytes, buf + bytes, &rbytes);
 	    if (err) {
 		pcilib_error("Can't read data from DMA, error %i", err);
 	        return -1;
@@ -514,7 +529,7 @@ double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
 	gettimeofday(&cur, NULL);
 	us += ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec));
 	    
-	err = pcilib_skip_dma(ctx->pcilib, 0);
+	err = pcilib_skip_dma(ctx->dmactx.pcilib, 0);
 	if (err) {
 	    pcilib_error("Can't start iteration, devices continuously writes unexpected data using DMA engine");
 	    break;

dma/ipe.h

@@ -6,22 +6,19 @@
 
 //#define PCILIB_NWL_MODIFICATION_IPECAMERA 0x100
 
-pcilib_dma_context_t *dma_ipe_init(pcilib_t *ctx, pcilib_dma_modification_t type, void *arg);
+pcilib_dma_context_t *dma_ipe_init(pcilib_t *ctx, const char *model, const void *arg);
 void  dma_ipe_free(pcilib_dma_context_t *vctx);
 
 int dma_ipe_get_status(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma_engine_status_t *status, size_t n_buffers, pcilib_dma_buffer_status_t *buffers);
 
-
 int dma_ipe_start(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags);
 int dma_ipe_stop(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags);
 
 int dma_ipe_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, pcilib_dma_callback_t cb, void *cbattr);
 double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction);
 
-
-#ifdef _PCILIB_DMA_IPE_C
-pcilib_dma_api_description_t ipe_dma_api = {
-    "ipe_dma",
+#ifdef _PCILIB_CONFIG_C
+static const pcilib_dma_api_description_t ipe_dma_api = {
     dma_ipe_init,
     dma_ipe_free,
     dma_ipe_get_status,
@@ -34,9 +31,55 @@ pcilib_dma_api_description_t ipe_dma_api = {
     dma_ipe_stream_read,
     dma_ipe_benchmark
 };
-#else
-extern pcilib_dma_api_description_t ipe_dma_api;
-#endif
+
+static const pcilib_dma_engine_description_t ipe_dma_engines[] = {
+    { 0, PCILIB_DMA_TYPE_PACKET, PCILIB_DMA_FROM_DEVICE, 32, "dma", NULL },
+    { 0 }
+};
+
+static const pcilib_register_bank_description_t ipe_dma_banks[] = {
+    { PCILIB_REGISTER_BANK_DMA, PCILIB_BAR0, 0xA000, PCILIB_REGISTER_PROTOCOL_DEFAULT, 0,                        0,                        PCILIB_LITTLE_ENDIAN, 32, PCILIB_LITTLE_ENDIAN, "0x%lx", "dma", "DMA Registers"},
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL }
+};
+
+static const pcilib_register_description_t ipe_dma_registers[] = {
+    {0x0000, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dcr",  			"Device Control Status Register"},
+    {0x0000, 	0, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "reset_dma",  			""},
+    {0x0000, 	16, 	4, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "datapath_width",			""},
+    {0x0000, 	24, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "fpga_family",			""},
+    {0x0004, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "ddmacr",  			"Device DMA Control Status Register"},
+    {0x0004, 	0, 	1, 	0, 	0xFFFFFFFF,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_start",  			"Start writting memory"},
+    {0x0004, 	5, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_relxed_order",  		""},
+    {0x0004, 	6, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_nosnoop",  			""},
+    {0x0004, 	7, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_int_dis",  			""},
+    {0x0004, 	16, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mrd_start",  			""},
+    {0x0004, 	21, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mrd_relaxed_order",  		""},
+    {0x0004, 	22, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mrd_nosnoop",  			""},
+    {0x0004, 	23, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mrd_int_dis",  			""},
+    {0x000C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "mwr_size",  			"DMA TLP size"},
+    {0x000C, 	0, 	16, 	0x20, 	0xFFFFFFFF,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_len",  			"Max TLP size"},
+    {0x000C, 	16, 	3, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_tlp_tc",  			"TC for TLP packets"},
+    {0x000C, 	19, 	1, 	0, 	0xFFFFFFFF,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_64b_en",  			"Enable 64 bit memory addressing"},
+    {0x000C, 	20, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_phant_func_dis",		"Disable MWR phantom function"},
+    {0x000C, 	24, 	8, 	0, 	0xFFFFFFFF,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_up_addr",  			"Upper address for 64 bit memory addressing"},
+    {0x0010, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "mwr_count",  		"Write DMA TLP Count"},
+    {0x0014, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "mwr_pattern",  		"DMA generator data pattern"},
+    {0x0028, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "mwr_perf",			"MWR Performance"},
+    {0x003C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "cfg_lnk_width",		"Negotiated and max width of PCIe Link"},
+    {0x003C, 	0, 	6, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_cap_max_lnk_width", 		"Max link width"},
+    {0x003C, 	8, 	6, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_prg_max_lnk_width", 		"Negotiated link width"},
+    {0x0040, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "cfg_payload_size",  		""},
+    {0x0040, 	0, 	4, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_cap_max_payload_size",	"Max payload size"},
+    {0x0040, 	8, 	3, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_prg_max_payload_size",	"Prog max payload size"},
+    {0x0040, 	16, 	3, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_max_rd_req_size",		"Max read request size"},
+    {0x0050, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "desc_mem_din",  		"Descriptor memory"},
+    {0x0054, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "update_addr",  		"Address of progress register"},
+    {0x0058, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "last_descriptor_read",	"Last descriptor read by the host"},
+    {0x005C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "desc_mem_addr", 		"Number of descriptors configured"},
+    {0x0060, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "update_thresh",  		"Update threshold of progress register"},
+    {0,		0,	0,	0,	0x00000000,	0,                                           0,                        0, NULL, 			NULL}
+};
+#endif /* _PCILIB_CONFIG_C */
 
 
 #endif /* _PCILIB_DMA_IPE_H */

dma/ipe_private.h

@@ -1,6 +1,8 @@
 #ifndef _PCILIB_DMA_IPE_PRIVATE_H
 #define _PCILIB_DMA_IPE_PRIVATE_H
 
+#include "dma.h"
+
 #define IPEDMA_CORES			1
 #define IPEDMA_TLP_SIZE			32
 #define IPEDMA_PAGE_SIZE		4096
@@ -30,12 +32,10 @@
 typedef struct ipe_dma_s ipe_dma_t;
 
 struct ipe_dma_s {
-    struct pcilib_dma_context_s dmactx;
-    pcilib_dma_engine_description_t engine[2];
+    pcilib_dma_context_t dmactx;
+    //pcilib_dma_engine_description_t engine[2];
 
-    pcilib_t *pcilib;
-    
-    pcilib_register_bank_description_t *dma_bank;
+    const pcilib_register_bank_description_t *dma_bank;
     char *base_addr;
 
     pcilib_irq_type_t irq_enabled;	/**< indicates that IRQs are enabled */

dma/ipe_registers.h

@@ -1,44 +0,0 @@
-#ifndef _PCILIB_DMA_IPE_REGISTERS_H
-#define _PCILIB_DMA_IPE_REGISTERS_H 
-
-#ifdef _PCILIB_DMA_IPE_C 
-static pcilib_register_description_t ipe_dma_registers[] = {
-    {0x0000, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dcr",  			"Device Control Status Register"},
-    {0x0000, 	0, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "reset_dma",  			""},
-    {0x0000, 	16, 	4, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "datapath_width",			""},
-    {0x0000, 	24, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "fpga_family",			""},
-    {0x0004, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "ddmacr",  			"Device DMA Control Status Register"},
-    {0x0004, 	0, 	1, 	0, 	0xFFFFFFFF,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_start",  			"Start writting memory"},
-    {0x0004, 	5, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_relxed_order",  		""},
-    {0x0004, 	6, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_nosnoop",  			""},
-    {0x0004, 	7, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_int_dis",  			""},
-    {0x0004, 	16, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mrd_start",  			""},
-    {0x0004, 	21, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mrd_relaxed_order",  		""},
-    {0x0004, 	22, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mrd_nosnoop",  			""},
-    {0x0004, 	23, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mrd_int_dis",  			""},
-    {0x000C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "mwr_size",  			"DMA TLP size"},
-    {0x000C, 	0, 	16, 	0x20, 	0xFFFFFFFF,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_len",  			"Max TLP size"},
-    {0x000C, 	16, 	3, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_tlp_tc",  			"TC for TLP packets"},
-    {0x000C, 	19, 	1, 	0, 	0xFFFFFFFF,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_64b_en",  			"Enable 64 bit memory addressing"},
-    {0x000C, 	20, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_phant_func_dis",		"Disable MWR phantom function"},
-    {0x000C, 	24, 	8, 	0, 	0xFFFFFFFF,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "mwr_up_addr",  			"Upper address for 64 bit memory addressing"},
-    {0x0010, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "mwr_count",  		"Write DMA TLP Count"},
-    {0x0014, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "mwr_pattern",  		"DMA generator data pattern"},
-    {0x0028, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "mwr_perf",			"MWR Performance"},
-    {0x003C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "cfg_lnk_width",		"Negotiated and max width of PCIe Link"},
-    {0x003C, 	0, 	6, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_cap_max_lnk_width", 		"Max link width"},
-    {0x003C, 	8, 	6, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_prg_max_lnk_width", 		"Negotiated link width"},
-    {0x0040, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "cfg_payload_size",  		""},
-    {0x0040, 	0, 	4, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_cap_max_payload_size",	"Max payload size"},
-    {0x0040, 	8, 	3, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_prg_max_payload_size",	"Prog max payload size"},
-    {0x0040, 	16, 	3, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "cfg_max_rd_req_size",		"Max read request size"},
-    {0x0050, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "desc_mem_din",  		"Descriptor memory"},
-    {0x0054, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "update_addr",  		"Address of progress register"},
-    {0x0058, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "last_descriptor_read",	"Last descriptor read by the host"},
-    {0x005C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "desc_mem_addr", 		"Number of descriptors configured"},
-    {0x0060, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "update_thresh",  		"Update threshold of progress register"},
-    {0,		0,	0,	0,	0x00000000,	0,                                           0,                        0, NULL, 			NULL}
-};
-#endif /* _PCILIB_DMA_IPE_C */
-
-#endif /* _PCILIB_DMA_IPE_REGISTERS_H */

dma/nwl.c

@@ -1,5 +1,6 @@
 #define _PCILIB_DMA_NWL_C
 #define _BSD_SOURCE
+#define _GNU_SOURCE
 
 #include <stdio.h>
 #include <stdlib.h>
@@ -11,8 +12,8 @@
 #include "pcilib.h"
 #include "error.h"
 #include "tools.h"
-#include "nwl_private.h"
 
+#include "nwl_private.h"
 #include "nwl_defines.h"
 
 int dma_nwl_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags) {
@@ -25,7 +26,7 @@ int dma_nwl_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dm
     }
 
     if (dma == PCILIB_DMA_ENGINE_INVALID) return 0;
-    else if (dma > ctx->n_engines) return PCILIB_ERROR_INVALID_BANK;
+    else if (dma > ctx->dmactx.pcilib->num_engines) return PCILIB_ERROR_INVALID_BANK;
 
     if (flags&PCILIB_DMA_FLAG_PERSISTENT) ctx->engines[dma].preserve = 1;
 
@@ -44,7 +45,7 @@ int dma_nwl_stop(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma
     
 	// stop everything
     if (dma == PCILIB_DMA_ENGINE_INVALID) {
-        for (dma = 0; dma < ctx->n_engines; dma++) {
+        for (dma = 0; dma < ctx->dmactx.pcilib->num_engines; dma++) {
 	    if (flags&PCILIB_DMA_FLAG_PERSISTENT) {
 		ctx->engines[dma].preserve = 0;
 	    }
@@ -63,7 +64,7 @@ int dma_nwl_stop(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma
 	return 0;
     }
     
-    if (dma > ctx->n_engines) return PCILIB_ERROR_INVALID_BANK;
+    if (dma > ctx->dmactx.pcilib->num_engines) return PCILIB_ERROR_INVALID_BANK;
     
 	    // ignorign previous setting if flag specified
     if (flags&PCILIB_DMA_FLAG_PERSISTENT) {
@@ -74,55 +75,99 @@ int dma_nwl_stop(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma
 }
 
 
-pcilib_dma_context_t *dma_nwl_init(pcilib_t *pcilib, pcilib_dma_modification_t type, void *arg) {
-    int i;
+pcilib_dma_context_t *dma_nwl_init(pcilib_t *pcilib, const char *model, const void *arg) {
+    int i, j;
     int err;
-    pcilib_dma_engine_t n_engines;
-
-    pcilib_model_description_t *model_info = pcilib_get_model_description(pcilib);
+    
+    pcilib_dma_engine_t dma;
+    pcilib_register_description_t eregs[NWL_MAX_DMA_ENGINE_REGISTERS];
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(pcilib);
     
     nwl_dma_t *ctx = malloc(sizeof(nwl_dma_t));
-    if (ctx) {
-	memset(ctx, 0, sizeof(nwl_dma_t));
-	ctx->pcilib = pcilib;
-	ctx->type = type;
+    if (!ctx) return NULL;
 
-	if (type == PCILIB_NWL_MODIFICATION_IPECAMERA) {
-	    ctx->dmactx.ignore_eop = 1;
-	}
+    memset(ctx, 0, sizeof(nwl_dma_t));
+
+    pcilib_register_bank_t dma_bank = pcilib_find_register_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
+    if (dma_bank == PCILIB_REGISTER_BANK_INVALID) {
+	free(ctx);
+	pcilib_error("DMA Register Bank could not be found");
+	return NULL;
+    }
 
-	pcilib_register_bank_t dma_bank = pcilib_find_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
-	if (dma_bank == PCILIB_REGISTER_BANK_INVALID) {
+    ctx->dma_bank = model_info->banks + dma_bank;
+    ctx->base_addr = pcilib_resolve_register_address(pcilib, ctx->dma_bank->bar, ctx->dma_bank->read_addr);
+
+    if ((model)&&(strcasestr(model, "ipecamera"))) {
+	ctx->type = NWL_MODIFICATION_IPECAMERA;
+	ctx->ignore_eop = 1;
+    } else {
+	ctx->type = NWL_MODIFICATION_DEFAULT;
+	    
+	err = pcilib_add_registers(pcilib, 0, nwl_xrawdata_registers);
+	if (err) {
 	    free(ctx);
-	    pcilib_error("DMA Register Bank could not be found");
+	    pcilib_error("Error (%i) adding NWL XRAWDATA registers", err);
 	    return NULL;
 	}
-	
-	ctx->dma_bank = model_info->banks + dma_bank;
-	ctx->base_addr = pcilib_resolve_register_address(pcilib, ctx->dma_bank->bar, ctx->dma_bank->read_addr);
+    }
 
-	for (i = 0, n_engines = 0; i < 2 * PCILIB_MAX_DMA_ENGINES; i++) {
-	    char *addr = ctx->base_addr + DMA_OFFSET + i * DMA_ENGINE_PER_SIZE;
+    for (j = 0; nwl_dma_engine_registers[j].bits; j++);
+    if (j > NWL_MAX_DMA_ENGINE_REGISTERS) {
+	free(ctx);
+	pcilib_error("Too many (%i) engine registers defined, only %i supported", j, NWL_MAX_DMA_ENGINE_REGISTERS);
+	return NULL;
+    }
+
+    memcpy(eregs, nwl_dma_engine_registers, j * sizeof(pcilib_register_description_t));
+
+    for (i = 0; i < 2 * PCILIB_MAX_DMA_ENGINES; i++) {
+	pcilib_dma_engine_description_t edesc;
+	char *addr = ctx->base_addr + DMA_OFFSET + i * DMA_ENGINE_PER_SIZE;
 
-	    memset(ctx->engines + n_engines, 0, sizeof(pcilib_nwl_engine_description_t));
+	memset(&edesc, 0, sizeof(pcilib_dma_engine_description_t));
 
-	    err = dma_nwl_read_engine_config(ctx, ctx->engines + n_engines, addr);
-	    if (err) continue;
+	err = dma_nwl_read_engine_config(ctx, &edesc, addr);
+	if (err) continue;
+
+	for (j = 0; nwl_dma_engine_registers[j].bits; j++) {
+	    int dma_addr_len = (PCILIB_MAX_DMA_ENGINES > 9)?2:1;
+	    const char *dma_direction;
+
+	    eregs[j].name = nwl_dma_engine_register_names[i * NWL_MAX_DMA_ENGINE_REGISTERS + j];
+	    eregs[j].addr = nwl_dma_engine_registers[j].addr + (addr - ctx->base_addr);
 	    
-	    pcilib_set_dma_engine_description(pcilib, n_engines, (pcilib_dma_engine_description_t*)(ctx->engines + n_engines));
-	    ++n_engines;
+	    switch (edesc.direction) {
+		case PCILIB_DMA_FROM_DEVICE:
+		    dma_direction =  "r";
+		break;
+		case PCILIB_DMA_TO_DEVICE:
+		    dma_direction = "w";
+		break;
+		default:
+		    dma_direction = "";
+	    }    
+	    sprintf((char*)eregs[j].name, nwl_dma_engine_registers[j].name, dma_addr_len, edesc.addr, dma_direction);
 	}
-	pcilib_set_dma_engine_description(pcilib, n_engines, NULL);
-	
-	ctx->n_engines = n_engines;
 	
-	err = nwl_add_registers(ctx);
+        err = pcilib_add_registers(pcilib, j, eregs);
 	if (err) {
 	    free(ctx);
-	    pcilib_error("Failed to add DMA registers");
+	    pcilib_error("Error (%i) adding NWL DMA registers for engine %i", err, edesc.addr);
 	    return NULL;
 	}
+    
+	dma = pcilib_add_dma_engine(pcilib, &edesc);
+	if (dma == PCILIB_DMA_ENGINE_INVALID) {
+	    free(ctx);
+	    pcilib_error("Problem while registering DMA engine");
+	    return NULL;
+	}
+	
+	ctx->engines[dma].desc = &pcilib->engines[dma];
+	ctx->engines[dma].base_addr = addr;
     }
+
     return (pcilib_dma_context_t*)ctx;
 }
 
@@ -130,7 +175,7 @@ void  dma_nwl_free(pcilib_dma_context_t *vctx) {
     nwl_dma_t *ctx = (nwl_dma_t*)vctx;
 
     if (ctx) {
-	if (ctx->type == PCILIB_DMA_MODIFICATION_DEFAULT) dma_nwl_stop_loopback(ctx);
+	if (ctx->type == NWL_MODIFICATION_DEFAULT) dma_nwl_stop_loopback(ctx);
 	dma_nwl_free_irq(ctx);
 	dma_nwl_stop(vctx, PCILIB_DMA_ENGINE_ALL, PCILIB_DMA_FLAGS_DEFAULT);
 	    

dma/nwl.h

@@ -4,9 +4,7 @@
 #include <stdio.h>
 #include "../pcilib.h"
 
-#define PCILIB_NWL_MODIFICATION_IPECAMERA 0x100
-
-pcilib_dma_context_t *dma_nwl_init(pcilib_t *ctx, pcilib_dma_modification_t type, void *arg);
+pcilib_dma_context_t *dma_nwl_init(pcilib_t *ctx, const char *model, const void *arg);
 void  dma_nwl_free(pcilib_dma_context_t *vctx);
 
 int dma_nwl_get_status(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma_engine_status_t *status, size_t n_buffers, pcilib_dma_buffer_status_t *buffers);
@@ -22,10 +20,8 @@ int dma_nwl_write_fragment(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma,
 int dma_nwl_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, pcilib_dma_callback_t cb, void *cbattr);
 double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction);
 
-
-#ifdef _PCILIB_DMA_NWL_C
-pcilib_dma_api_description_t nwl_dma_api = {
-    "nwl_dma",
+#ifdef _PCILIB_CONFIG_C
+static const pcilib_dma_api_description_t nwl_dma_api = {
     dma_nwl_init,
     dma_nwl_free,
     dma_nwl_get_status,
@@ -38,9 +34,94 @@ pcilib_dma_api_description_t nwl_dma_api = {
     dma_nwl_stream_read,
     dma_nwl_benchmark
 };
-#else
-extern pcilib_dma_api_description_t nwl_dma_api;
-#endif
 
+static pcilib_register_bank_description_t nwl_dma_banks[] = {
+    { PCILIB_REGISTER_BANK_DMA, PCILIB_BAR0, 0xA000, PCILIB_REGISTER_PROTOCOL_DEFAULT    , 0,                        0,                        PCILIB_LITTLE_ENDIAN, 32, PCILIB_LITTLE_ENDIAN, "0x%lx", "dma", "DMA Registers"},
+    { 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL }
+};
+
+static pcilib_register_description_t nwl_dma_registers[] = {
+    {0x4000, 	0, 	32, 	0, 	0x00000011,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_control_and_status",  ""},
+    {0x4000, 	0, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_interrupt_enable",  ""},
+    {0x4000, 	1, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_interrupt_active",  ""},
+    {0x4000, 	2, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_interrupt_pending",  ""},
+    {0x4000, 	3, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_interrupt_mode",  ""},
+    {0x4000, 	4, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_user_interrupt_enable",  ""},
+    {0x4000, 	5, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_user_interrupt_active",  ""},
+    {0x4000, 	16, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_s2c_interrupt_status",  ""},
+    {0x4000, 	24, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_c2s_interrupt_status",  ""},
+    {0x8000, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_design_version",  ""},
+    {0x8000, 	0, 	4, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_subversion_number",  ""},
+    {0x8000, 	4, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_version_number",  ""},
+    {0x8000, 	28, 	4, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_targeted_device",  ""},
+    {0x8200, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_transmit_utilization",  ""},
+    {0x8200, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_transmit_sample_count",  ""},
+    {0x8200, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_transmit_dword_count",  ""},
+    {0x8204, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_receive_utilization",  ""},
+    {0x8004, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_receive_sample_count",  ""},
+    {0x8004, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_receive_dword_count",  ""},
+    {0x8208, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_mwr",  ""},
+    {0x8008, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_mwr_sample_count",  ""},
+    {0x8008, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_mwr_dword_count",  ""},
+    {0x820C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_cpld",  ""},
+    {0x820C, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_cpld_sample_count",  ""},
+    {0x820C, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_cpld_dword_count",  ""},
+    {0x8210, 	0, 	12, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_cpld",  ""},
+    {0x8214, 	0, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_cplh",  ""},
+    {0x8218, 	0, 	12, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_npd",  ""},
+    {0x821C, 	0, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_nph",  ""},
+    {0x8220, 	0, 	12, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_pd",  ""},
+    {0x8224, 	0, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_ph",  ""},
+    {0,		0,	0,	0,	0x00000000,	0,                                           0,                        0, NULL, NULL}
+};
+
+#endif /* _PCILIB_CONFIG_C */
+
+#ifdef _PCILIB_DMA_NWL_C 
+ // DMA Engine Registers
+#define NWL_MAX_DMA_ENGINE_REGISTERS 64
+#define NWL_MAX_REGISTER_NAME 128
+static char nwl_dma_engine_register_names[PCILIB_MAX_DMA_ENGINES * NWL_MAX_DMA_ENGINE_REGISTERS][NWL_MAX_REGISTER_NAME];
+static pcilib_register_description_t nwl_dma_engine_registers[] = {
+    {0x0000, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_engine_capabilities",  ""},
+    {0x0000, 	0, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_present",  ""},
+    {0x0000, 	1, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_direction",  ""},
+    {0x0000, 	4, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_type",  ""},
+    {0x0000, 	8, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_number",  ""},
+    {0x0000, 	24, 	6, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_max_buffer_size",  ""},
+    {0x0004, 	0, 	32, 	0, 	0x0000C100,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_engine_control",  ""},
+    {0x0004, 	0, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_interrupt_enable",  ""},
+    {0x0004, 	1, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_interrupt_active",  ""},
+    {0x0004, 	2, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_descriptor_complete",  ""},
+    {0x0004, 	3, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_descriptor_alignment_error",  ""},
+    {0x0004, 	4, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_descriptor_fetch_error",  ""},
+    {0x0004, 	5, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_sw_abort_error",  ""},
+    {0x0004, 	8, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_enable",  ""},
+    {0x0004, 	10, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_running",  ""},
+    {0x0004, 	11, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_waiting",  ""},
+    {0x0004, 	14, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset_request", ""},
+    {0x0004, 	15, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_W   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset", ""},
+    {0x0008, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_next_descriptor",  ""},
+    {0x000C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_sw_descriptor",  ""},
+    {0x0010, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_last_descriptor",  ""},
+    {0x0014, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_active_time",  ""},
+    {0x0018, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_wait_time",  ""},
+    {0x001C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_counter",  ""},
+    {0x001C, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_sample_count",  ""},
+    {0x001C, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_dword_count",  ""},
+    {0,		0,	0,	0,	0x00000000,	0,                                          0,                        0, NULL, NULL}
+};
+
+ // XRAWDATA registers
+static pcilib_register_description_t nwl_xrawdata_registers[] = {
+    {0x9100, 	0, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_enable_generator",  ""},
+    {0x9104, 	0, 	16, 	0, 	0x00000000,	PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_packet_length",  ""},
+    {0x9108, 	0, 	2, 	0, 	0x00000003,	PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_control",  ""},
+    {0x9108, 	0, 	1, 	0, 	0x00000003,	PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "xrawdata_enable_checker",  ""},
+    {0x9108, 	1, 	1, 	0, 	0x00000003,	PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "xrawdata_enable_loopback",  ""},
+    {0x910C, 	0, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_data_mistmatch",  ""},
+    {0,		0,	0,	0,	0x00000000,	0,                                            0,                        0, NULL, NULL}
+};
+#endif /* _PCILIB_DMA_NWL_C */
 
 #endif /* _PCILIB_DMA_NWL_H */

dma/nwl_engine.c

@@ -10,46 +10,41 @@
 #include "pcilib.h"
 #include "error.h"
 #include "tools.h"
-#include "nwl_private.h"
 
+#include "nwl_private.h"
 #include "nwl_defines.h"
-
 #include "nwl_engine_buffers.h"
 
-int dma_nwl_read_engine_config(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info, char *base) {
+int dma_nwl_read_engine_config(nwl_dma_t *ctx, pcilib_dma_engine_description_t *info, const char *base) {
     uint32_t val;
     
-    info->base_addr = base;
-    
     nwl_read_register(val, ctx, base, REG_DMA_ENG_CAP);
 
     if ((val & DMA_ENG_PRESENT_MASK) == 0) return PCILIB_ERROR_NOTAVAILABLE;
     
-    info->desc.addr = (val & DMA_ENG_NUMBER) >> DMA_ENG_NUMBER_SHIFT;
-    if ((info->desc.addr > PCILIB_MAX_DMA_ENGINES)||(info->desc.addr < 0)) return PCILIB_ERROR_INVALID_DATA;
+    info->addr = (val & DMA_ENG_NUMBER) >> DMA_ENG_NUMBER_SHIFT;
+    if ((info->addr > PCILIB_MAX_DMA_ENGINES)||(info->addr < 0)) return PCILIB_ERROR_INVALID_DATA;
     
     switch (val & DMA_ENG_DIRECTION_MASK) {
 	case  DMA_ENG_C2S:
-	    info->desc.direction = PCILIB_DMA_FROM_DEVICE;
+	    info->direction = PCILIB_DMA_FROM_DEVICE;
 	break;
 	default:
-	    info->desc.direction = PCILIB_DMA_TO_DEVICE;
+	    info->direction = PCILIB_DMA_TO_DEVICE;
     }
     
     switch (val & DMA_ENG_TYPE_MASK) {
 	case DMA_ENG_BLOCK:
-	    info->desc.type = PCILIB_DMA_TYPE_BLOCK;
+	    info->type = PCILIB_DMA_TYPE_BLOCK;
 	break;
 	case DMA_ENG_PACKET:
-	    info->desc.type = PCILIB_DMA_TYPE_PACKET;
+	    info->type = PCILIB_DMA_TYPE_PACKET;
 	break;
 	default:
-	    info->desc.type = PCILIB_DMA_TYPE_UNKNOWN;
+	    info->type = PCILIB_DMA_TYPE_UNKNOWN;
     }
     
-    info->desc.addr_bits = (val & DMA_ENG_BD_MAX_BC) >> DMA_ENG_BD_MAX_BC_SHIFT;
-
-    info->base_addr = base;
+    info->addr_bits = (val & DMA_ENG_BD_MAX_BC) >> DMA_ENG_BD_MAX_BC_SHIFT;
     
     return 0;
 }
@@ -60,22 +55,21 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
     uint32_t ring_pa;
     struct timeval start, cur;
 
-    pcilib_nwl_engine_description_t *info = ctx->engines + dma;
+    pcilib_nwl_engine_context_t *ectx = ctx->engines + dma;
     char *base = ctx->engines[dma].base_addr;
     
-    if (info->started) return 0;
-
+    if (ectx->started) return 0;
 
 	// This will only successed if there are no parallel access to DMA engine
-    err = dma_nwl_allocate_engine_buffers(ctx, info);
+    err = dma_nwl_allocate_engine_buffers(ctx, ectx);
     if (err) {
-	info->started = 1;
+	ectx->started = 1;
 	dma_nwl_stop_engine(ctx, dma);
 	return err;
     }
     
-    if (info->reused) {
-    	info->preserve = 1;
+    if (ectx->reused) {
+    	ectx->preserve = 1;
 
 	dma_nwl_acknowledge_irq((pcilib_dma_context_t*)ctx, PCILIB_DMA_IRQ, dma);
 
@@ -86,7 +80,7 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
 	// Disable IRQs
 	err = dma_nwl_disable_engine_irq(ctx, dma);
 	if (err) {
-	    info->started = 1;
+	    ectx->started = 1;
 	    dma_nwl_stop_engine(ctx, dma);
 	    return err;
 	}
@@ -102,9 +96,9 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
 	} while ((val & (DMA_ENG_STATE_MASK|DMA_ENG_USER_RESET))&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_REGISTER_TIMEOUT));
     
 	if (val & (DMA_ENG_STATE_MASK|DMA_ENG_USER_RESET)) {
-	    pcilib_error("Timeout during reset of DMA engine %i", info->desc.addr);
+	    pcilib_error("Timeout during reset of DMA engine %i", ectx->desc->addr);
 
-	    info->started = 1;
+	    ectx->started = 1;
 	    dma_nwl_stop_engine(ctx, dma);
 	    return PCILIB_ERROR_TIMEOUT;
 	}
@@ -119,24 +113,24 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
 	} while ((val & DMA_ENG_RESET)&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_REGISTER_TIMEOUT));
     
 	if (val & DMA_ENG_RESET) {
-	    pcilib_error("Timeout during reset of DMA engine %i", info->desc.addr);
+	    pcilib_error("Timeout during reset of DMA engine %i", ectx->desc->addr);
 
-	    info->started = 1;
+	    ectx->started = 1;
 	    dma_nwl_stop_engine(ctx, dma);
 	    return PCILIB_ERROR_TIMEOUT;
 	}
     
     	dma_nwl_acknowledge_irq((pcilib_dma_context_t*)ctx, PCILIB_DMA_IRQ, dma);
 
-	ring_pa = pcilib_kmem_get_pa(ctx->pcilib, info->ring);
-	nwl_write_register(ring_pa, ctx, info->base_addr, REG_DMA_ENG_NEXT_BD);
-	nwl_write_register(ring_pa, ctx, info->base_addr, REG_SW_NEXT_BD);
+	ring_pa = pcilib_kmem_get_pa(ctx->dmactx.pcilib, ectx->ring);
+	nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_DMA_ENG_NEXT_BD);
+	nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_SW_NEXT_BD);
 
 	__sync_synchronize();
 
-	nwl_read_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS);
+	nwl_read_register(val, ctx, ectx->base_addr, REG_DMA_ENG_CTRL_STATUS);
 	val |= (DMA_ENG_ENABLE);
-	nwl_write_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS);
+	nwl_write_register(val, ctx, ectx->base_addr, REG_DMA_ENG_CTRL_STATUS);
 
 	__sync_synchronize();
 
@@ -144,19 +138,19 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
 	dma_nwl_enable_engine_irq(ctx, dma);
 #endif /* NWL_GENERATE_DMA_IRQ */
 
-	if (info->desc.direction == PCILIB_DMA_FROM_DEVICE) {
-	    ring_pa += (info->ring_size - 1) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
-    	    nwl_write_register(ring_pa, ctx, info->base_addr, REG_SW_NEXT_BD);
+	if (ectx->desc->direction == PCILIB_DMA_FROM_DEVICE) {
+	    ring_pa += (ectx->ring_size - 1) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    	    nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_SW_NEXT_BD);
 
-	    info->tail = 0;
-	    info->head = (info->ring_size - 1);
+	    ectx->tail = 0;
+	    ectx->head = (ectx->ring_size - 1);
 	} else {
-	    info->tail = 0;
-	    info->head = 0;
+	    ectx->tail = 0;
+	    ectx->head = 0;
 	}
     }
     
-    info->started = 1;
+    ectx->started = 1;
     
     return 0;
 }
@@ -170,17 +164,17 @@ int dma_nwl_stop_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
     pcilib_kmem_flags_t flags;
     
     
-    pcilib_nwl_engine_description_t *info = ctx->engines + dma;
+    pcilib_nwl_engine_context_t *ectx = ctx->engines + dma;
     char *base = ctx->engines[dma].base_addr;
 
-    if (!info->started) return 0;
+    if (!ectx->started) return 0;
     
-    info->started = 0;
+    ectx->started = 0;
 
     err = dma_nwl_disable_engine_irq(ctx, dma);
     if (err) return err;
 
-    if (!info->preserve) {
+    if (!ectx->preserve) {
 	    // Stopping DMA is not enough reset is required
 	val = DMA_ENG_DISABLE|DMA_ENG_USER_RESET|DMA_ENG_RESET;
 	nwl_write_register(val, ctx, base, REG_DMA_ENG_CTRL_STATUS);
@@ -191,30 +185,30 @@ int dma_nwl_stop_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
     	    gettimeofday(&cur, NULL);
 	} while ((val & (DMA_ENG_RUNNING))&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_REGISTER_TIMEOUT));
 
-	if (info->ring) {
-	    ring_pa = pcilib_kmem_get_pa(ctx->pcilib, info->ring);
-	    nwl_write_register(ring_pa, ctx, info->base_addr, REG_DMA_ENG_NEXT_BD);
-	    nwl_write_register(ring_pa, ctx, info->base_addr, REG_SW_NEXT_BD);
+	if (ectx->ring) {
+	    ring_pa = pcilib_kmem_get_pa(ctx->dmactx.pcilib, ectx->ring);
+	    nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_DMA_ENG_NEXT_BD);
+	    nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_SW_NEXT_BD);
 	}
     }
     
     dma_nwl_acknowledge_irq((pcilib_dma_context_t*)ctx, PCILIB_DMA_IRQ, dma);
 
-    if (info->preserve) {
+    if (ectx->preserve) {
 	flags = PCILIB_KMEM_FLAG_REUSE;
     } else {
         flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT;
     }
     
 	// Clean buffers
-    if (info->ring) {
-	pcilib_free_kernel_memory(ctx->pcilib, info->ring, flags);
-	info->ring = NULL;
+    if (ectx->ring) {
+	pcilib_free_kernel_memory(ctx->dmactx.pcilib, ectx->ring, flags);
+	ectx->ring = NULL;
     }
 
-    if (info->pages) {
-	pcilib_free_kernel_memory(ctx->pcilib, info->pages, flags);
-	info->pages = NULL;
+    if (ectx->pages) {
+	pcilib_free_kernel_memory(ctx->dmactx.pcilib, ectx->pages, flags);
+	ectx->pages = NULL;
     }
 
     return 0;
@@ -226,28 +220,28 @@ int dma_nwl_write_fragment(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma,
     size_t bufnum;
     nwl_dma_t *ctx = (nwl_dma_t*)vctx;
 
-    pcilib_nwl_engine_description_t *info = ctx->engines + dma;
+    pcilib_nwl_engine_context_t *ectx = ctx->engines + dma;
 
     err = dma_nwl_start(vctx, dma, PCILIB_DMA_FLAGS_DEFAULT);
     if (err) return err;
 
     if (data) {
-	for (pos = 0; pos < size; pos += info->page_size) {
-	    int block_size = min2(size - pos, info->page_size);
+	for (pos = 0; pos < size; pos += ectx->page_size) {
+	    int block_size = min2(size - pos, ectx->page_size);
 	    
-    	    bufnum = dma_nwl_get_next_buffer(ctx, info, 1, timeout);
+    	    bufnum = dma_nwl_get_next_buffer(ctx, ectx, 1, timeout);
 	    if (bufnum == PCILIB_DMA_BUFFER_INVALID) {
 		if (written) *written = pos;
 		return PCILIB_ERROR_TIMEOUT;
 	    }
 	
-    	    void *buf = pcilib_kmem_get_block_ua(ctx->pcilib, info->pages, bufnum);
+    	    void *buf = pcilib_kmem_get_block_ua(ctx->dmactx.pcilib, ectx->pages, bufnum);
 
-	    pcilib_kmem_sync_block(ctx->pcilib, info->pages, PCILIB_KMEM_SYNC_FROMDEVICE, bufnum);
+	    pcilib_kmem_sync_block(ctx->dmactx.pcilib, ectx->pages, PCILIB_KMEM_SYNC_FROMDEVICE, bufnum);
 	    memcpy(buf, data, block_size);
-	    pcilib_kmem_sync_block(ctx->pcilib, info->pages, PCILIB_KMEM_SYNC_TODEVICE, bufnum);
+	    pcilib_kmem_sync_block(ctx->dmactx.pcilib, ectx->pages, PCILIB_KMEM_SYNC_TODEVICE, bufnum);
 
-	    err = dma_nwl_push_buffer(ctx, info, block_size, (flags&PCILIB_DMA_FLAG_EOP)&&((pos + block_size) == size), timeout);
+	    err = dma_nwl_push_buffer(ctx, ectx, block_size, (flags&PCILIB_DMA_FLAG_EOP)&&((pos + block_size) == size), timeout);
 	    if (err) {
 		if (written) *written = pos;
 		return err;
@@ -258,7 +252,7 @@ int dma_nwl_write_fragment(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma,
     if (written) *written = size;
     
     if (flags&PCILIB_DMA_FLAG_WAIT) {
-	bufnum =  dma_nwl_get_next_buffer(ctx, info, PCILIB_NWL_DMA_PAGES - 1, timeout);
+	bufnum =  dma_nwl_get_next_buffer(ctx, ectx, PCILIB_NWL_DMA_PAGES - 1, timeout);
 	if (bufnum == PCILIB_DMA_BUFFER_INVALID) return PCILIB_ERROR_TIMEOUT;
     }
     
@@ -276,7 +270,7 @@ int dma_nwl_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uin
 
     int eop;
 
-    pcilib_nwl_engine_description_t *info = ctx->engines + dma;
+    pcilib_nwl_engine_context_t *ectx = ctx->engines + dma;
 
     err = dma_nwl_start(vctx, dma, PCILIB_DMA_FLAGS_DEFAULT);
     if (err) return err;
@@ -288,21 +282,21 @@ int dma_nwl_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uin
 //	    case PCILIB_STREAMING_CHECK: wait = 0; break;
 	}
     
-        bufnum = dma_nwl_wait_buffer(ctx, info, &bufsize, &eop, wait);
+        bufnum = dma_nwl_wait_buffer(ctx, ectx, &bufsize, &eop, wait);
         if (bufnum == PCILIB_DMA_BUFFER_INVALID) {
 	    return (ret&PCILIB_STREAMING_FAIL)?PCILIB_ERROR_TIMEOUT:0;
 	}
 
 	    // EOP is not respected in IPE Camera
-	if (ctx->dmactx.ignore_eop) eop = 1;
+	if (ctx->ignore_eop) eop = 1;
 	
-	pcilib_kmem_sync_block(ctx->pcilib, info->pages, PCILIB_KMEM_SYNC_FROMDEVICE, bufnum);
-        void *buf = pcilib_kmem_get_block_ua(ctx->pcilib, info->pages, bufnum);
+	pcilib_kmem_sync_block(ctx->dmactx.pcilib, ectx->pages, PCILIB_KMEM_SYNC_FROMDEVICE, bufnum);
+        void *buf = pcilib_kmem_get_block_ua(ctx->dmactx.pcilib, ectx->pages, bufnum);
 	ret = cb(cbattr, (eop?PCILIB_DMA_FLAG_EOP:0), bufsize, buf);
 	if (ret < 0) return -ret;
 //	DS: Fixme, it looks like we can avoid calling this for the sake of performance
-//	pcilib_kmem_sync_block(ctx->pcilib, info->pages, PCILIB_KMEM_SYNC_TODEVICE, bufnum);
-	dma_nwl_return_buffer(ctx, info);
+//	pcilib_kmem_sync_block(ctx->dmactx.pcilib, ectx->pages, PCILIB_KMEM_SYNC_TODEVICE, bufnum);
+	dma_nwl_return_buffer(ctx, ectx);
 	
 	res += bufsize;
 

dma/nwl_engine.h

@@ -1,7 +1,7 @@
 #ifndef _PCILIB_DMA_NWL_ENGINE_H
 #define _PCILIB_DMA_NWL_ENGINE_H
 
-int dma_nwl_read_engine_config(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info, char *base);
+int dma_nwl_read_engine_config(nwl_dma_t *ctx, pcilib_dma_engine_description_t *info, const char *base);
 int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma);
 int dma_nwl_stop_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma);
 

dma/nwl_engine_buffers.h

@@ -2,10 +2,10 @@
 #define NWL_RING_SET(data, offset, val)  *(uint32_t*)(((char*)(data)) + (offset)) = (val)
 #define NWL_RING_UPDATE(data, offset, mask, val) *(uint32_t*)(((char*)(data)) + (offset)) = ((*(uint32_t*)(((char*)(data)) + (offset)))&(mask))|(val)
 
-static int dma_nwl_compute_read_s2c_pointers(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info, unsigned char *ring, uint32_t ring_pa) {
+static int dma_nwl_compute_read_s2c_pointers(nwl_dma_t *ctx, pcilib_nwl_engine_context_t *ectx, unsigned char *ring, uint32_t ring_pa) {
     uint32_t val;
 
-    char *base = info->base_addr;
+    const char *base = ectx->base_addr;
     
     nwl_read_register(val, ctx, base, REG_SW_NEXT_BD);
     if ((val < ring_pa)||((val - ring_pa) % PCILIB_NWL_DMA_DESCRIPTOR_SIZE)) {
@@ -14,9 +14,9 @@ static int dma_nwl_compute_read_s2c_pointers(nwl_dma_t *ctx, pcilib_nwl_engine_d
 	return PCILIB_ERROR_INVALID_STATE;
     }
 
-    info->head = (val - ring_pa) / PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
-    if (info->head >= PCILIB_NWL_DMA_PAGES) {
-	pcilib_warning("Inconsistent S2C DMA Ring buffer is found (REG_SW_NEXT_BD register value (%zu) out of range)", info->head);
+    ectx->head = (val - ring_pa) / PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    if (ectx->head >= PCILIB_NWL_DMA_PAGES) {
+	pcilib_warning("Inconsistent S2C DMA Ring buffer is found (REG_SW_NEXT_BD register value (%zu) out of range)", ectx->head);
 	return PCILIB_ERROR_INVALID_STATE;
     }
 
@@ -27,23 +27,23 @@ static int dma_nwl_compute_read_s2c_pointers(nwl_dma_t *ctx, pcilib_nwl_engine_d
 	return PCILIB_ERROR_INVALID_STATE;
     }
 
-    info->tail = (val - ring_pa) / PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
-    if (info->tail >= PCILIB_NWL_DMA_PAGES) {
-	pcilib_warning("Inconsistent S2C DMA Ring buffer is found (REG_DMA_ENG_NEXT_BD register value (%zu) out of range)", info->tail);
+    ectx->tail = (val - ring_pa) / PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    if (ectx->tail >= PCILIB_NWL_DMA_PAGES) {
+	pcilib_warning("Inconsistent S2C DMA Ring buffer is found (REG_DMA_ENG_NEXT_BD register value (%zu) out of range)", ectx->tail);
 	return PCILIB_ERROR_INVALID_STATE;
     }
 
 #ifdef DEBUG_NWL    
-    printf("S2C: %lu %lu\n", info->tail, info->head);
+    printf("S2C: %lu %lu\n", ectx->tail, ectx->head);
 #endif /* DEBUG_NWL */
 
     return 0;
 }
 
-static int dma_nwl_compute_read_c2s_pointers(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info, unsigned char *ring, uint32_t ring_pa) {
+static int dma_nwl_compute_read_c2s_pointers(nwl_dma_t *ctx, pcilib_nwl_engine_context_t *ectx, unsigned char *ring, uint32_t ring_pa) {
     uint32_t val;
 
-    char *base = info->base_addr;
+    const char *base = ectx->base_addr;
 
     nwl_read_register(val, ctx, base, REG_SW_NEXT_BD);
     if ((val < ring_pa)||((val - ring_pa) % PCILIB_NWL_DMA_DESCRIPTOR_SIZE)) {
@@ -52,24 +52,24 @@ static int dma_nwl_compute_read_c2s_pointers(nwl_dma_t *ctx, pcilib_nwl_engine_d
 	return PCILIB_ERROR_INVALID_STATE;
     }
 
-    info->head = (val - ring_pa) / PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
-    if (info->head >= PCILIB_NWL_DMA_PAGES) {
-	pcilib_warning("Inconsistent C2S DMA Ring buffer is found (REG_SW_NEXT_BD register value (%zu) out of range)", info->head);
+    ectx->head = (val - ring_pa) / PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    if (ectx->head >= PCILIB_NWL_DMA_PAGES) {
+	pcilib_warning("Inconsistent C2S DMA Ring buffer is found (REG_SW_NEXT_BD register value (%zu) out of range)", ectx->head);
 	return PCILIB_ERROR_INVALID_STATE;
     }
     
-    info->tail = info->head + 1;
-    if (info->tail == PCILIB_NWL_DMA_PAGES) info->tail = 0;
+    ectx->tail = ectx->head + 1;
+    if (ectx->tail == PCILIB_NWL_DMA_PAGES) ectx->tail = 0;
 
 #ifdef DEBUG_NWL    
-    printf("C2S: %lu %lu\n", info->tail, info->head);
+    printf("C2S: %lu %lu\n", ectx->tail, ectx->head);
 #endif /* DEBUG_NWL */
 
     return 0;
 }
 
 
-static int dma_nwl_allocate_engine_buffers(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info) {
+static int dma_nwl_allocate_engine_buffers(nwl_dma_t *ctx, pcilib_nwl_engine_context_t *ectx) {
     int err = 0;
 
     int i;
@@ -82,39 +82,39 @@ static int dma_nwl_allocate_engine_buffers(nwl_dma_t *ctx, pcilib_nwl_engine_des
     pcilib_kmem_flags_t flags;
     pcilib_kmem_type_t type;
 
-    char *base = info->base_addr;
+    char *base = ectx->base_addr;
     
-    if (info->pages) return 0;
+    if (ectx->pages) return 0;
     
 	// Or bidirectional specified by 0x0|addr, or read 0x0|addr and write 0x80|addr
-    type = (info->desc.direction == PCILIB_DMA_TO_DEVICE)?PCILIB_KMEM_TYPE_DMA_S2C_PAGE:PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
-    sub_use = info->desc.addr|((info->desc.direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00);
-    flags = PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_EXCLUSIVE|PCILIB_KMEM_FLAG_HARDWARE|(info->preserve?PCILIB_KMEM_FLAG_PERSISTENT:0);
+    type = (ectx->desc->direction == PCILIB_DMA_TO_DEVICE)?PCILIB_KMEM_TYPE_DMA_S2C_PAGE:PCILIB_KMEM_TYPE_DMA_C2S_PAGE;
+    sub_use = ectx->desc->addr|((ectx->desc->direction == PCILIB_DMA_TO_DEVICE)?0x80:0x00);
+    flags = PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_EXCLUSIVE|PCILIB_KMEM_FLAG_HARDWARE|(ectx->preserve?PCILIB_KMEM_FLAG_PERSISTENT:0);
     
-    pcilib_kmem_handle_t *ring = pcilib_alloc_kernel_memory(ctx->pcilib, PCILIB_KMEM_TYPE_CONSISTENT, 1, PCILIB_NWL_DMA_PAGES * PCILIB_NWL_DMA_DESCRIPTOR_SIZE, PCILIB_NWL_ALIGNMENT, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, sub_use), flags);
-    pcilib_kmem_handle_t *pages = pcilib_alloc_kernel_memory(ctx->pcilib, type, PCILIB_NWL_DMA_PAGES, 0, 0, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, sub_use), flags);
+    pcilib_kmem_handle_t *ring = pcilib_alloc_kernel_memory(ctx->dmactx.pcilib, PCILIB_KMEM_TYPE_CONSISTENT, 1, PCILIB_NWL_DMA_PAGES * PCILIB_NWL_DMA_DESCRIPTOR_SIZE, PCILIB_NWL_ALIGNMENT, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, sub_use), flags);
+    pcilib_kmem_handle_t *pages = pcilib_alloc_kernel_memory(ctx->dmactx.pcilib, type, PCILIB_NWL_DMA_PAGES, 0, 0, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, sub_use), flags);
 
     if (!ring||!pages) {
-	if (pages) pcilib_free_kernel_memory(ctx->pcilib, pages, 0);
-	if (ring) pcilib_free_kernel_memory(ctx->pcilib, ring, 0);
+	if (pages) pcilib_free_kernel_memory(ctx->dmactx.pcilib, pages, 0);
+	if (ring) pcilib_free_kernel_memory(ctx->dmactx.pcilib, ring, 0);
 	return PCILIB_ERROR_MEMORY;
     }
 
-    reuse_ring = pcilib_kmem_is_reused(ctx->pcilib, ring);
-    reuse_pages = pcilib_kmem_is_reused(ctx->pcilib, pages);
+    reuse_ring = pcilib_kmem_is_reused(ctx->dmactx.pcilib, ring);
+    reuse_pages = pcilib_kmem_is_reused(ctx->dmactx.pcilib, pages);
 
 //	I guess idea here was that we not need to check all that stuff during the second iteration
 //	which is basicaly true (shall we expect any driver-triggered changes or parallel accesses?)
 //	but still we need to set preserve flag (and that if we enforcing preservation --start-dma). 
 //	Probably having checks anyway is not harming...
-//    if (!info->preserve) {
+//    if (!ectx->preserve) {
 	if (reuse_ring == reuse_pages) {
 	    if (reuse_ring & PCILIB_KMEM_REUSE_PARTIAL) pcilib_warning("Inconsistent DMA buffers are found (only part of required buffers is available), reinitializing...");
 	    else if (reuse_ring & PCILIB_KMEM_REUSE_REUSED) {
 		if ((reuse_ring & PCILIB_KMEM_REUSE_PERSISTENT) == 0) pcilib_warning("Lost DMA buffers are found (non-persistent mode), reinitializing...");
 		else if ((reuse_ring & PCILIB_KMEM_REUSE_HARDWARE) == 0) pcilib_warning("Lost DMA buffers are found (missing HW reference), reinitializing...");
 		else {
-		    nwl_read_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS);
+		    nwl_read_register(val, ctx, ectx->base_addr, REG_DMA_ENG_CTRL_STATUS);
 
 		    if ((val&DMA_ENG_RUNNING) == 0) pcilib_warning("Lost DMA buffers are found (DMA engine is stopped), reinitializing...");
 		    else preserve = 1;
@@ -124,27 +124,27 @@ static int dma_nwl_allocate_engine_buffers(nwl_dma_t *ctx, pcilib_nwl_engine_des
 //    }
 
     
-    unsigned char *data = (unsigned char*)pcilib_kmem_get_ua(ctx->pcilib, ring);
-    uint32_t ring_pa = pcilib_kmem_get_pa(ctx->pcilib, ring);
+    unsigned char *data = (unsigned char*)pcilib_kmem_get_ua(ctx->dmactx.pcilib, ring);
+    uint32_t ring_pa = pcilib_kmem_get_pa(ctx->dmactx.pcilib, ring);
 
     if (preserve) {
-	if (info->desc.direction == PCILIB_DMA_FROM_DEVICE) err = dma_nwl_compute_read_c2s_pointers(ctx, info, data, ring_pa);
-	else err = dma_nwl_compute_read_s2c_pointers(ctx, info, data, ring_pa);
+	if (ectx->desc->direction == PCILIB_DMA_FROM_DEVICE) err = dma_nwl_compute_read_c2s_pointers(ctx, ectx, data, ring_pa);
+	else err = dma_nwl_compute_read_s2c_pointers(ctx, ectx, data, ring_pa);
 
 	if (err) preserve = 0;
     }
     
     if (preserve) {
-	info->reused = 1;
-        buf_sz = pcilib_kmem_get_block_size(ctx->pcilib, pages, 0);
+	ectx->reused = 1;
+        buf_sz = pcilib_kmem_get_block_size(ctx->dmactx.pcilib, pages, 0);
     } else {
-	info->reused = 0;
+	ectx->reused = 0;
 	
 	memset(data, 0, PCILIB_NWL_DMA_PAGES * PCILIB_NWL_DMA_DESCRIPTOR_SIZE);
 
 	for (i = 0; i < PCILIB_NWL_DMA_PAGES; i++, data += PCILIB_NWL_DMA_DESCRIPTOR_SIZE) {
-	    buf_pa = pcilib_kmem_get_block_pa(ctx->pcilib, pages, i);
-	    buf_sz = pcilib_kmem_get_block_size(ctx->pcilib, pages, i);
+	    buf_pa = pcilib_kmem_get_block_pa(ctx->dmactx.pcilib, pages, i);
+	    buf_sz = pcilib_kmem_get_block_size(ctx->dmactx.pcilib, pages, i);
 
 	    NWL_RING_SET(data, DMA_BD_NDESC_OFFSET, ring_pa + ((i + 1) % PCILIB_NWL_DMA_PAGES) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE);
 	    NWL_RING_SET(data, DMA_BD_BUFAL_OFFSET, buf_pa&0xFFFFFFFF);
@@ -160,25 +160,25 @@ static int dma_nwl_allocate_engine_buffers(nwl_dma_t *ctx, pcilib_nwl_engine_des
 	nwl_write_register(val, ctx, base, REG_DMA_ENG_NEXT_BD);
 	nwl_write_register(val, ctx, base, REG_SW_NEXT_BD);
 
-        info->head = 0;
-	info->tail = 0;
+        ectx->head = 0;
+	ectx->tail = 0;
     }
     
-    info->ring = ring;
-    info->pages = pages;
-    info->page_size = buf_sz;
-    info->ring_size = PCILIB_NWL_DMA_PAGES;
+    ectx->ring = ring;
+    ectx->pages = pages;
+    ectx->page_size = buf_sz;
+    ectx->ring_size = PCILIB_NWL_DMA_PAGES;
     
     return 0;
 }
 
 
-static size_t dma_nwl_clean_buffers(nwl_dma_t * ctx, pcilib_nwl_engine_description_t *info) {
+static size_t dma_nwl_clean_buffers(nwl_dma_t * ctx, pcilib_nwl_engine_context_t *ectx) {
     size_t res = 0;
     uint32_t status;
 
-    unsigned char *ring = pcilib_kmem_get_ua(ctx->pcilib, info->ring);
-    ring += info->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    unsigned char *ring = pcilib_kmem_get_ua(ctx->dmactx.pcilib, ectx->ring);
+    ring += ectx->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
 
 next_buffer:
     status = NWL_RING_GET(ring, DMA_BD_BUFL_STATUS_OFFSET)&DMA_BD_STATUS_MASK;
@@ -195,17 +195,17 @@ next_buffer:
     }
 	
     if (status & DMA_BD_COMP_MASK) {
-	info->tail++;
-	if (info->tail == info->ring_size) {
-	    ring -= (info->tail - 1) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
-	    info->tail = 0;
+	ectx->tail++;
+	if (ectx->tail == ectx->ring_size) {
+	    ring -= (ectx->tail - 1) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+	    ectx->tail = 0;
 	} else {
 	    ring += PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
 	}
 	
 	res++;
 
-	if (info->tail != info->head) goto next_buffer;
+	if (ectx->tail != ectx->head) goto next_buffer;
     }
     
 //    printf("====> Cleaned: %i\n", res);
@@ -213,18 +213,18 @@ next_buffer:
 }
 
 
-static size_t dma_nwl_get_next_buffer(nwl_dma_t * ctx, pcilib_nwl_engine_description_t *info, size_t n_buffers, pcilib_timeout_t timeout) {
+static size_t dma_nwl_get_next_buffer(nwl_dma_t * ctx, pcilib_nwl_engine_context_t *ectx, size_t n_buffers, pcilib_timeout_t timeout) {
     struct timeval start, cur;
 
     size_t res, n = 0;
     size_t head;
 
-    for (head = info->head; (((head + 1)%info->ring_size) != info->tail)&&(n < n_buffers); head++, n++);
-    if (n == n_buffers) return info->head;
+    for (head = ectx->head; (((head + 1)%ectx->ring_size) != ectx->tail)&&(n < n_buffers); head++, n++);
+    if (n == n_buffers) return ectx->head;
 
     gettimeofday(&start, NULL);
 
-    res = dma_nwl_clean_buffers(ctx, info);
+    res = dma_nwl_clean_buffers(ctx, ectx);
     if (res == (size_t)-1) return PCILIB_DMA_BUFFER_INVALID;
     else n += res;
 
@@ -237,7 +237,7 @@ static size_t dma_nwl_get_next_buffer(nwl_dma_t * ctx, pcilib_nwl_engine_descrip
 	
 	usleep (10);	
 
-        res = dma_nwl_clean_buffers(ctx, info);
+        res = dma_nwl_clean_buffers(ctx, ectx);
         if (res == (size_t)-1) return PCILIB_DMA_BUFFER_INVALID;
 	else if (res > 0) {
 	    gettimeofday(&start, NULL);
@@ -247,48 +247,48 @@ static size_t dma_nwl_get_next_buffer(nwl_dma_t * ctx, pcilib_nwl_engine_descrip
 
     if (n < n_buffers) return PCILIB_DMA_BUFFER_INVALID;
     
-    return info->head;
+    return ectx->head;
 }
 
-static int dma_nwl_push_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info, size_t size, int eop, pcilib_timeout_t timeout) {
+static int dma_nwl_push_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_context_t *ectx, size_t size, int eop, pcilib_timeout_t timeout) {
     int flags = 0;
     
     uint32_t val;
-    unsigned char *ring = pcilib_kmem_get_ua(ctx->pcilib, info->ring);
-    uint32_t ring_pa = pcilib_kmem_get_pa(ctx->pcilib, info->ring);
+    unsigned char *ring = pcilib_kmem_get_ua(ctx->dmactx.pcilib, ectx->ring);
+    uint32_t ring_pa = pcilib_kmem_get_pa(ctx->dmactx.pcilib, ectx->ring);
 
-    ring += info->head * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    ring += ectx->head * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
 
     
-    if (!info->writting) {
+    if (!ectx->writting) {
 	flags |= DMA_BD_SOP_MASK;
-	info->writting = 1;
+	ectx->writting = 1;
     }
     if (eop) {
 	flags |= DMA_BD_EOP_MASK;
-	info->writting = 0;
+	ectx->writting = 0;
     }
     
     NWL_RING_SET(ring, DMA_BD_BUFL_CTRL_OFFSET, size|flags);
     NWL_RING_SET(ring, DMA_BD_BUFL_STATUS_OFFSET, size);
 
-    info->head++;
-    if (info->head == info->ring_size) info->head = 0;
+    ectx->head++;
+    if (ectx->head == ectx->ring_size) ectx->head = 0;
     
-    val = ring_pa + info->head * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
-    nwl_write_register(val, ctx, info->base_addr, REG_SW_NEXT_BD);
+    val = ring_pa + ectx->head * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    nwl_write_register(val, ctx, ectx->base_addr, REG_SW_NEXT_BD);
     
     return 0;
 }
 
 
-static size_t dma_nwl_wait_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info, size_t *size, int *eop, pcilib_timeout_t timeout) {
+static size_t dma_nwl_wait_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_context_t *ectx, size_t *size, int *eop, pcilib_timeout_t timeout) {
     struct timeval start, cur;
     uint32_t status_size, status;
 
-    unsigned char *ring = pcilib_kmem_get_ua(ctx->pcilib, info->ring);
+    unsigned char *ring = pcilib_kmem_get_ua(ctx->dmactx.pcilib, ectx->ring);
     
-    ring += info->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    ring += ectx->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
 
     gettimeofday(&start, NULL);
     
@@ -309,13 +309,13 @@ static size_t dma_nwl_wait_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_description_
 
 /*	    
 	    if (mrd) {
-		if ((info->tail + 1) == info->ring_size) ring -= info->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+		if ((ectx->tail + 1) == ectx->ring_size) ring -= ectx->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
 		else ring += PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
 		*mrd = NWL_RING_GET(ring, DMA_BD_BUFL_STATUS_OFFSET)&DMA_BD_COMP_MASK;
 	    }
 */
 	
-	    return info->tail;
+	    return ectx->tail;
 	}
 	
 	usleep(10);
@@ -327,25 +327,25 @@ static size_t dma_nwl_wait_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_description_
 
 /*
     // This function is not used now, but we may need it in the future
-static int dma_nwl_is_overflown(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info) {
+static int dma_nwl_is_overflown(nwl_dma_t *ctx, pcilib_nwl_engine_context_t *ectx) {
     uint32_t status;
-    unsigned char *ring = pcilib_kmem_get_ua(ctx->pcilib, info->ring);
-    if (info->tail > 0) ring += (info->tail - 1) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
-    else ring += (info->ring_size - 1) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    unsigned char *ring = pcilib_kmem_get_ua(ctx->dmactx.pcilib, ectx->ring);
+    if (ectx->tail > 0) ring += (ectx->tail - 1) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    else ring += (ectx->ring_size - 1) * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
 
     status = NWL_RING_GET(ring, DMA_BD_BUFL_STATUS_OFFSET);
     return status&DMA_BD_COMP_MASK?1:0;
 }
 */
 
-static int dma_nwl_return_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info) {
+static int dma_nwl_return_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_context_t *ectx) {
     uint32_t val;
 
-    unsigned char *ring = pcilib_kmem_get_ua(ctx->pcilib, info->ring);
-    uint32_t ring_pa = pcilib_kmem_get_pa(ctx->pcilib, info->ring);
-    size_t bufsz = pcilib_kmem_get_block_size(ctx->pcilib, info->pages, info->tail);
+    unsigned char *ring = pcilib_kmem_get_ua(ctx->dmactx.pcilib, ectx->ring);
+    uint32_t ring_pa = pcilib_kmem_get_pa(ctx->dmactx.pcilib, ectx->ring);
+    size_t bufsz = pcilib_kmem_get_block_size(ctx->dmactx.pcilib, ectx->pages, ectx->tail);
 
-    ring += info->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    ring += ectx->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
 
 #ifdef NWL_GENERATE_DMA_IRQ    
     NWL_RING_SET(ring, DMA_BD_BUFL_CTRL_OFFSET, bufsz | DMA_BD_INT_ERROR_MASK | DMA_BD_INT_COMP_MASK);
@@ -355,11 +355,11 @@ static int dma_nwl_return_buffer(nwl_dma_t *ctx, pcilib_nwl_engine_description_t
 
     NWL_RING_SET(ring, DMA_BD_BUFL_STATUS_OFFSET, 0);
 
-    val = ring_pa + info->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
-    nwl_write_register(val, ctx, info->base_addr, REG_SW_NEXT_BD);
+    val = ring_pa + ectx->tail * PCILIB_NWL_DMA_DESCRIPTOR_SIZE;
+    nwl_write_register(val, ctx, ectx->base_addr, REG_SW_NEXT_BD);
     
-    info->tail++;
-    if (info->tail == info->ring_size) info->tail = 0;
+    ectx->tail++;
+    if (ectx->tail == ectx->ring_size) ectx->tail = 0;
     
     return 0;
 }
@@ -368,34 +368,34 @@ int dma_nwl_get_status(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcil
     size_t i;
     uint32_t bstatus;
     nwl_dma_t *ctx = (nwl_dma_t*)vctx;
-    pcilib_nwl_engine_description_t *info = ctx->engines + dma;
-    unsigned char *ring = (unsigned char*)pcilib_kmem_get_ua(ctx->pcilib, info->ring);
+    pcilib_nwl_engine_context_t *ectx = ctx->engines + dma;
+    unsigned char *ring = (unsigned char*)pcilib_kmem_get_ua(ctx->dmactx.pcilib, ectx->ring);
 
 
     if (!status) return -1;
     
-    status->started = info->started;
-    status->ring_size = info->ring_size;
-    status->buffer_size = info->page_size;
-    status->ring_tail = info->tail;
+    status->started = ectx->started;
+    status->ring_size = ectx->ring_size;
+    status->buffer_size = ectx->page_size;
+    status->ring_tail = ectx->tail;
     
-    if (info->desc.direction == PCILIB_DMA_FROM_DEVICE) {
+    if (ectx->desc->direction == PCILIB_DMA_FROM_DEVICE) {
 	size_t pos = 0;
-	for (i = 0; i < info->ring_size; i++) {
+	for (i = 0; i < ectx->ring_size; i++) {
 	    pos = status->ring_tail + i;
-	    if (pos >= info->ring_size) pos -= info->ring_size;
+	    if (pos >= ectx->ring_size) pos -= ectx->ring_size;
 
 	    bstatus = NWL_RING_GET(ring + pos * PCILIB_NWL_DMA_DESCRIPTOR_SIZE, DMA_BD_BUFL_STATUS_OFFSET);
 	    if ((bstatus&(DMA_BD_ERROR_MASK|DMA_BD_COMP_MASK)) == 0) break;
 	}
         status->ring_head = pos;
     } else {
-        status->ring_head = info->head;
+        status->ring_head = ectx->head;
     }
 
 
     if (buffers) {	
-	for (i = 0; (i < info->ring_size)&&(i < n_buffers); i++) {
+	for (i = 0; (i < ectx->ring_size)&&(i < n_buffers); i++) {
 	    bstatus = NWL_RING_GET(ring, DMA_BD_BUFL_STATUS_OFFSET);
 
 	    buffers[i].error = bstatus & (DMA_BD_ERROR_MASK/*|DMA_BD_SHORT_MASK*/);

dma/nwl_irq.c

@@ -49,7 +49,7 @@ int dma_nwl_enable_irq(pcilib_dma_context_t *vctx, pcilib_irq_type_t type, pcili
     val &= ~(DMA_INT_ENABLE|DMA_USER_INT_ENABLE);
     nwl_write_register(val, ctx, ctx->base_addr, REG_DMA_CTRL_STATUS);
     
-    pcilib_clear_irq(ctx->pcilib, NWL_DMA_IRQ_SOURCE);
+    pcilib_clear_irq(ctx->dmactx.pcilib, NWL_DMA_IRQ_SOURCE);
 
     if (type & PCILIB_DMA_IRQ) val |= DMA_INT_ENABLE;
     if (type & PCILIB_EVENT_IRQ) val |= DMA_USER_INT_ENABLE;
@@ -104,15 +104,15 @@ int dma_nwl_acknowledge_irq(pcilib_dma_context_t *vctx, pcilib_irq_type_t irq_ty
     uint32_t val;
     
     nwl_dma_t *ctx = (nwl_dma_t*)vctx;
-    pcilib_nwl_engine_description_t *info = ctx->engines + irq_source;
+    pcilib_nwl_engine_context_t *ectx = ctx->engines + irq_source;
 
     if (irq_type != PCILIB_DMA_IRQ) return PCILIB_ERROR_NOTSUPPORTED;
-    if (irq_source >= ctx->n_engines) return PCILIB_ERROR_NOTAVAILABLE;
+    if (irq_source >= ctx->dmactx.pcilib->num_engines) return PCILIB_ERROR_NOTAVAILABLE;
 
-    nwl_read_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS);
+    nwl_read_register(val, ctx, ectx->base_addr, REG_DMA_ENG_CTRL_STATUS);
     if (val & DMA_ENG_INT_ACTIVE_MASK) {
 	val |= DMA_ENG_ALLINT_MASK;
-	nwl_write_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS);
+	nwl_write_register(val, ctx, ectx->base_addr, REG_DMA_ENG_CTRL_STATUS);
     }
     
     return 0;

dma/nwl_irq.h

@@ -1,5 +1,5 @@
-#ifndef _PCILIB_NWL_IRQ_H
-#define _PCILIB_NWL_IRQ_H
+#ifndef _PCILIB_DMA_NWL_IRQ_H
+#define _PCILIB_DMA_NWL_IRQ_H
 
 int dma_nwl_init_irq(nwl_dma_t *ctx, uint32_t val);
 int dma_nwl_free_irq(nwl_dma_t *ctx);
@@ -7,4 +7,4 @@ int dma_nwl_free_irq(nwl_dma_t *ctx);
 int dma_nwl_enable_engine_irq(nwl_dma_t *ctx, pcilib_dma_engine_t dma);
 int dma_nwl_disable_engine_irq(nwl_dma_t *ctx, pcilib_dma_engine_t dma);
 
-#endif /* _PCILIB_NWL_IRQ_H */
+#endif /* _PCILIB_DMA_NWL_IRQ_H */

dma/nwl_loopback.c

@@ -25,7 +25,7 @@ int dma_nwl_start_loopback(nwl_dma_t *ctx,  pcilib_dma_direction_t direction, si
     val = packet_size;
     nwl_write_register(val, ctx, ctx->base_addr, PKT_SIZE_ADDRESS);
 
-    if (ctx->type == PCILIB_DMA_MODIFICATION_DEFAULT) {
+    if (ctx->type == NWL_MODIFICATION_DEFAULT) {
 	switch (direction) {
           case PCILIB_DMA_BIDIRECTIONAL:
 	    val = LOOPBACK;
@@ -54,7 +54,7 @@ int dma_nwl_stop_loopback(nwl_dma_t *ctx) {
 	engine initialized in previous run, and benchmark is only actual usage.
 	Otherwise, we should detect current loopback status during initialization */
 
-    if (ctx->type == PCILIB_DMA_MODIFICATION_DEFAULT) {
+    if (ctx->type == NWL_MODIFICATION_DEFAULT) {
 	nwl_write_register(val, ctx, ctx->base_addr, TX_CONFIG_ADDRESS);
 	nwl_write_register(val, ctx, ctx->base_addr, RX_CONFIG_ADDRESS);
     }
@@ -77,25 +77,25 @@ double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
 
     nwl_dma_t *ctx = (nwl_dma_t*)vctx;
 
-    pcilib_dma_engine_t readid = pcilib_find_dma_by_addr(ctx->pcilib, PCILIB_DMA_FROM_DEVICE, dma);
-    pcilib_dma_engine_t writeid = pcilib_find_dma_by_addr(ctx->pcilib, PCILIB_DMA_TO_DEVICE, dma);
+    pcilib_dma_engine_t readid = pcilib_find_dma_by_addr(ctx->dmactx.pcilib, PCILIB_DMA_FROM_DEVICE, dma);
+    pcilib_dma_engine_t writeid = pcilib_find_dma_by_addr(ctx->dmactx.pcilib, PCILIB_DMA_TO_DEVICE, dma);
 
     if (size%sizeof(uint32_t)) size = 1 + size / sizeof(uint32_t);
     else size /= sizeof(uint32_t);
 
 	// Not supported
-    if (ctx->type == PCILIB_DMA_MODIFICATION_DEFAULT) {
+    if (ctx->type == NWL_MODIFICATION_DEFAULT) {
 	if (direction == PCILIB_DMA_TO_DEVICE) return -1.;
     }
-//    else if ((direction == PCILIB_DMA_FROM_DEVICE)&&(ctx->type != PCILIB_DMA_MODIFICATION_DEFAULT)) return -1.;
+//    else if ((direction == PCILIB_DMA_FROM_DEVICE)&&(ctx->type != NWL_MODIFICATION_DEFAULT)) return -1.;
 
 	// Stop Generators and drain old data
-    if (ctx->type == PCILIB_DMA_MODIFICATION_DEFAULT) dma_nwl_stop_loopback(ctx);
+    if (ctx->type == NWL_MODIFICATION_DEFAULT) dma_nwl_stop_loopback(ctx);
 //    dma_nwl_stop_engine(ctx, readid); // DS: replace with something better
 
     __sync_synchronize();
 
-    err = pcilib_skip_dma(ctx->pcilib, readid);
+    err = pcilib_skip_dma(ctx->dmactx.pcilib, readid);
     if (err) {
 	pcilib_error("Can't start benchmark, devices continuously writes unexpected data using DMA engine");
 	return -1;
@@ -125,31 +125,31 @@ double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
 	return -1;
     }
 
-    if (ctx->type == PCILIB_NWL_MODIFICATION_IPECAMERA) {
-	pcilib_write_register(ctx->pcilib, NULL, "control", 0x1e5);
+    if (ctx->type == NWL_MODIFICATION_IPECAMERA) {
+	pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x1e5);
 	usleep(100000);
-	pcilib_write_register(ctx->pcilib, NULL, "control", 0x1e1);
+	pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x1e1);
 
 	    // This way causes more problems with garbage
-	//pcilib_write_register(ctx->pcilib, NULL, "control", 0x3e1);
+	//pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x3e1);
     }
 
 	// Benchmark
     for (iter = 0; iter < iterations; iter++) {
         memset(cmp, 0x13 + iter, size * sizeof(uint32_t));
 
-	if (ctx->type == PCILIB_NWL_MODIFICATION_IPECAMERA) {
-	    pcilib_write_register(ctx->pcilib, NULL, "control", 0x1e1);
+	if (ctx->type == NWL_MODIFICATION_IPECAMERA) {
+	    pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x1e1);
 	}
 
-	if ((direction&PCILIB_DMA_TO_DEVICE)||(ctx->type != PCILIB_DMA_MODIFICATION_DEFAULT)) {
+	if ((direction&PCILIB_DMA_TO_DEVICE)||(ctx->type != NWL_MODIFICATION_DEFAULT)) {
 	    memcpy(buf, cmp, size * sizeof(uint32_t));
 
     	    if (direction&PCILIB_DMA_TO_DEVICE) {
 		gettimeofday(&start, NULL);
 	    }
 	    
-	    err = pcilib_write_dma(ctx->pcilib, writeid, addr, size * sizeof(uint32_t), buf, &bytes);
+	    err = pcilib_write_dma(ctx->dmactx.pcilib, writeid, addr, size * sizeof(uint32_t), buf, &bytes);
 	    if ((err)||(bytes != size * sizeof(uint32_t))) {
 		error = "Write failed";
 	    	break;
@@ -165,8 +165,8 @@ double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
 	    }
 	}
 
-	if (ctx->type == PCILIB_NWL_MODIFICATION_IPECAMERA) {
-	    pcilib_write_register(ctx->pcilib, NULL, "control", 0x3e1);
+	if (ctx->type == NWL_MODIFICATION_IPECAMERA) {
+	    pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x3e1);
 	}
 
 	memset(buf, 0, size * sizeof(uint32_t));
@@ -180,7 +180,7 @@ double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
 	    retry:
 #endif
     
-	    err = pcilib_read_dma(ctx->pcilib, readid, addr, packet_size * sizeof(uint32_t), buf + (bytes>>2), &rbytes);
+	    err = pcilib_read_dma(ctx->dmactx.pcilib, readid, addr, packet_size * sizeof(uint32_t), buf + (bytes>>2), &rbytes);
 	    if ((err)||(rbytes%sizeof(uint32_t))) {
 		break;
 	    } 
@@ -227,8 +227,8 @@ double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
 #endif
     }
 
-    if (ctx->type == PCILIB_NWL_MODIFICATION_IPECAMERA) {
-	pcilib_write_register(ctx->pcilib, NULL, "control", 0x1e1);
+    if (ctx->type == NWL_MODIFICATION_IPECAMERA) {
+	pcilib_write_register(ctx->dmactx.pcilib, NULL, "control", 0x1e1);
     }
 
     if (error) {
@@ -245,7 +245,7 @@ double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
     __sync_synchronize();
     
     if (direction == PCILIB_DMA_FROM_DEVICE) {
-	pcilib_skip_dma(ctx->pcilib, readid);
+	pcilib_skip_dma(ctx->dmactx.pcilib, readid);
     }
     
     free(cmp);

dma/nwl_loopback.h

@@ -1,7 +1,7 @@
-#ifndef _PCILIB_NWL_LOOPBACK_H
-#define _PCILIB_NWL_LOOPBACK_H
+#ifndef _PCILIB_DMA_NWL_LOOPBACK_H
+#define _PCILIB_DMA_NWL_LOOPBACK_H
 
 int dma_nwl_start_loopback(nwl_dma_t *ctx,  pcilib_dma_direction_t direction, size_t packet_size);
 int dma_nwl_stop_loopback(nwl_dma_t *ctx);
 
-#endif /* _PCILIB_NWL_LOOPBACK_H */
+#endif /* _PCILIB_DMA_NWL_LOOPBACK_H */

dma/nwl_private.h

@@ -2,7 +2,7 @@
 #define _PCILIB_DMA_NWL_PRIVATE_H
 
 typedef struct nwl_dma_s nwl_dma_t;
-typedef struct pcilib_nwl_engine_description_s pcilib_nwl_engine_description_t;
+typedef struct pcilib_nwl_engine_context_s pcilib_nwl_engine_context_t;
 
 #define NWL_DMA_IRQ_SOURCE 0
 
@@ -20,17 +20,17 @@ typedef struct pcilib_nwl_engine_description_s pcilib_nwl_engine_description_t;
 
 #include "nwl.h"
 #include "nwl_irq.h"
-#include "nwl_register.h"
 #include "nwl_engine.h"
 #include "nwl_loopback.h"
 
 #define nwl_read_register(var, ctx, base, reg) pcilib_datacpy(&var, base + reg, 4, 1, ctx->dma_bank->raw_endianess)
 #define nwl_write_register(var, ctx, base, reg) pcilib_datacpy(base + reg, &var, 4, 1, ctx->dma_bank->raw_endianess)
 
-struct pcilib_nwl_engine_description_s {
-    pcilib_dma_engine_description_t desc;
+
+struct pcilib_nwl_engine_context_s {
+    const pcilib_dma_engine_description_t *desc;
     char *base_addr;
-    
+
     size_t ring_size, page_size;
     size_t head, tail;
     pcilib_kmem_handle_t *ring;
@@ -42,15 +42,18 @@ struct pcilib_nwl_engine_description_s {
     int preserve;			/**< indicates that DMA should not be stopped during clean-up */
 };
 
+typedef enum {
+    NWL_MODIFICATION_DEFAULT,
+    NWL_MODIFICATION_IPECAMERA
+} nwl_modification_t;
 
 struct nwl_dma_s {
-    struct pcilib_dma_context_s dmactx;
-    
-    pcilib_t *pcilib;
-    
-    pcilib_dma_modification_t type;
-    
-    pcilib_register_bank_description_t *dma_bank;
+    pcilib_dma_context_t dmactx;
+
+    nwl_modification_t type;
+    int ignore_eop;			/**< always set end-of-packet */
+
+    const pcilib_register_bank_description_t *dma_bank;
     char *base_addr;
 
     pcilib_irq_type_t irq_enabled;	/**< indicates that IRQs are enabled */
@@ -59,9 +62,10 @@ struct nwl_dma_s {
     int irq_started;			/**< indicates that IRQ subsystem is initialized (detecting which types should be preserverd) */    
     int loopback_started;		/**< indicates that benchmarking subsystem is initialized */
 
-    pcilib_dma_engine_t n_engines;
-    pcilib_nwl_engine_description_t engines[PCILIB_MAX_DMA_ENGINES + 1];
+//    pcilib_dma_engine_t n_engines;
+    pcilib_nwl_engine_context_t engines[PCILIB_MAX_DMA_ENGINES + 1];
 };
 
+int nwl_add_registers(nwl_dma_t *ctx);
 
 #endif /* _PCILIB_DMA_NWL_PRIVATE_H */

dma/nwl_register.c

@@ -1,77 +0,0 @@
-#define _PCILIB_NWL_REGISTER_C 
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <unistd.h>
-#include <sys/time.h>
-
-#include "pcilib.h"
-
-#include "pci.h"
-#include "error.h"
-#include "tools.h"
-
-#include "nwl_private.h"
-#include "nwl_register.h"
-
-int nwl_add_registers(nwl_dma_t *ctx) {
-    int err;
-    size_t n, i, j;
-    int length;
-    const char *names[NWL_MAX_DMA_ENGINE_REGISTERS];
-    uintptr_t addr[NWL_MAX_DMA_ENGINE_REGISTERS];
-    
-	// We don't want DMA registers
-    if (pcilib_find_bank_by_addr(ctx->pcilib, PCILIB_REGISTER_BANK_DMA) == PCILIB_REGISTER_BANK_INVALID) return 0;
-    
-    err = pcilib_add_registers(ctx->pcilib, 0, nwl_dma_registers);
-    if (err) return err;
-
-    if (ctx->type == PCILIB_DMA_MODIFICATION_DEFAULT) {
-	err = pcilib_add_registers(ctx->pcilib, 0, nwl_xrawdata_registers);
-	if (err) return err;
-    }
-
-    
-    for (n = 0; nwl_dma_engine_registers[n].bits; n++) {
-	names[n] = nwl_dma_engine_registers[n].name;
-	addr[n] = nwl_dma_engine_registers[n].addr;
-    }
-
-    if (ctx->n_engines > 9) length = 2;
-    else length = 1;
-
-    
-    for (i = 0; i < ctx->n_engines; i++) {
-	for (j = 0; nwl_dma_engine_registers[j].bits; j++) {
-	    const char *direction;
-	    nwl_dma_engine_registers[j].name = nwl_dma_engine_register_names[i * NWL_MAX_DMA_ENGINE_REGISTERS + j];
-	    nwl_dma_engine_registers[j].addr = addr[j] + (ctx->engines[i].base_addr - ctx->base_addr);
-//	    printf("%lx %lx\n", (ctx->engines[i].base_addr - ctx->base_addr), nwl_dma_engine_registers[j].addr);
-	    
-	    switch (ctx->engines[i].desc.direction) {
-		case PCILIB_DMA_FROM_DEVICE:
-		    direction =  "r";
-		break;
-		case PCILIB_DMA_TO_DEVICE:
-		    direction = "w";
-		break;
-		default:
-		    direction = "";
-	    }
-	    
-	    sprintf((char*)nwl_dma_engine_registers[j].name, names[j], length, ctx->engines[i].desc.addr, direction);
-	}
-	
-        err = pcilib_add_registers(ctx->pcilib, n, nwl_dma_engine_registers);
-	if (err) return err;
-    }
-    
-    for (n = 0; nwl_dma_engine_registers[n].bits; n++) {
-	nwl_dma_engine_registers[n].name = names[n];
-	nwl_dma_engine_registers[n].addr = addr[n];
-    }
-    
-    return 0;
-}

dma/nwl_register.h

@@ -1,97 +0,0 @@
-#ifndef _PCILIB_NWL_REGISTERS_H
-#define _PCILIB_NWL_REGISTERS_H 
-
-#ifdef _PCILIB_NWL_REGISTER_C 
-  // DMA
-static pcilib_register_description_t nwl_dma_registers[] = {
-    {0x4000, 	0, 	32, 	0, 	0x00000011,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_control_and_status",  ""},
-    {0x4000, 	0, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_interrupt_enable",  ""},
-    {0x4000, 	1, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_interrupt_active",  ""},
-    {0x4000, 	2, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_interrupt_pending",  ""},
-    {0x4000, 	3, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_interrupt_mode",  ""},
-    {0x4000, 	4, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_user_interrupt_enable",  ""},
-    {0x4000, 	5, 	1, 	0, 	0x00000011,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_user_interrupt_active",  ""},
-    {0x4000, 	16, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_s2c_interrupt_status",  ""},
-    {0x4000, 	24, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_c2s_interrupt_status",  ""},
-    {0x8000, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_design_version",  ""},
-    {0x8000, 	0, 	4, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_subversion_number",  ""},
-    {0x8000, 	4, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_version_number",  ""},
-    {0x8000, 	28, 	4, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_targeted_device",  ""},
-    {0x8200, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_transmit_utilization",  ""},
-    {0x8200, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_transmit_sample_count",  ""},
-    {0x8200, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_transmit_dword_count",  ""},
-    {0x8204, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_receive_utilization",  ""},
-    {0x8004, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_receive_sample_count",  ""},
-    {0x8004, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_receive_dword_count",  ""},
-    {0x8208, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_mwr",  ""},
-    {0x8008, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_mwr_sample_count",  ""},
-    {0x8008, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_mwr_dword_count",  ""},
-    {0x820C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_cpld",  ""},
-    {0x820C, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_cpld_sample_count",  ""},
-    {0x820C, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma_cpld_dword_count",  ""},
-    {0x8210, 	0, 	12, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_cpld",  ""},
-    {0x8214, 	0, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_cplh",  ""},
-    {0x8218, 	0, 	12, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_npd",  ""},
-    {0x821C, 	0, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_nph",  ""},
-    {0x8220, 	0, 	12, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_pd",  ""},
-    {0x8224, 	0, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma_init_fc_ph",  ""},
-    {0,		0,	0,	0,	0x00000000,	0,                                           0,                        0, NULL, NULL}
-};
-
- // DMA Engine Registers
-#define NWL_MAX_DMA_ENGINE_REGISTERS 64
-#define NWL_MAX_REGISTER_NAME 128
-static char nwl_dma_engine_register_names[PCILIB_MAX_DMA_ENGINES * NWL_MAX_DMA_ENGINE_REGISTERS][NWL_MAX_REGISTER_NAME];
-static pcilib_register_description_t nwl_dma_engine_registers[] = {
-    {0x0000, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_engine_capabilities",  ""},
-    {0x0000, 	0, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_present",  ""},
-    {0x0000, 	1, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_direction",  ""},
-    {0x0000, 	4, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_type",  ""},
-    {0x0000, 	8, 	8, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_number",  ""},
-    {0x0000, 	24, 	6, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_max_buffer_size",  ""},
-    {0x0004, 	0, 	32, 	0, 	0x0000C100,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_engine_control",  ""},
-    {0x0004, 	0, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_interrupt_enable",  ""},
-    {0x0004, 	1, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_interrupt_active",  ""},
-    {0x0004, 	2, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_descriptor_complete",  ""},
-    {0x0004, 	3, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_descriptor_alignment_error",  ""},
-    {0x0004, 	4, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_descriptor_fetch_error",  ""},
-    {0x0004, 	5, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW1C, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_sw_abort_error",  ""},
-    {0x0004, 	8, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_enable",  ""},
-    {0x0004, 	10, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_running",  ""},
-    {0x0004, 	11, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_waiting",  ""},
-    {0x0004, 	14, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset_request", ""},
-    {0x0004, 	15, 	1, 	0, 	0x0000C100,	PCILIB_REGISTER_W   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset", ""},
-    {0x0008, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_next_descriptor",  ""},
-    {0x000C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_RW  , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_sw_descriptor",  ""},
-    {0x0010, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_last_descriptor",  ""},
-    {0x0014, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_active_time",  ""},
-    {0x0018, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_wait_time",  ""},
-    {0x001C, 	0, 	32, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_counter",  ""},
-    {0x001C, 	0, 	2, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_sample_count",  ""},
-    {0x001C, 	2, 	30, 	0, 	0x00000000,	PCILIB_REGISTER_R   , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_dword_count",  ""},
-    {0,		0,	0,	0,	0x00000000,	0,                                          0,                        0, NULL, NULL}
-};
-
-/*
- // XAUI registers
-static pcilib_register_description_t nwl_xaui_registers[] = {
-    {0,		0,	0,	0,	0,                                          0,                        0, NULL, NULL}
-};
-*/
-
- // XRAWDATA registers
-static pcilib_register_description_t nwl_xrawdata_registers[] = {
-    {0x9100, 	0, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_enable_generator",  ""},
-    {0x9104, 	0, 	16, 	0, 	0x00000000,	PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_packet_length",  ""},
-    {0x9108, 	0, 	2, 	0, 	0x00000003,	PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_control",  ""},
-    {0x9108, 	0, 	1, 	0, 	0x00000003,	PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "xrawdata_enable_checker",  ""},
-    {0x9108, 	1, 	1, 	0, 	0x00000003,	PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "xrawdata_enable_loopback",  ""},
-    {0x910C, 	0, 	1, 	0, 	0x00000000,	PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_data_mistmatch",  ""},
-    {0,		0,	0,	0,	0x00000000,	0,                                            0,                        0, NULL, NULL}
-};
-
-#endif /* _PCILIB_NWL_REGISTERS_C */
-
-int nwl_add_registers(nwl_dma_t *ctx);
-
-#endif /* _PCILIB_NWL_REGISTERS_H */

driver/base.c

@@ -313,25 +313,23 @@ static int __devinit pcidriver_probe(struct pci_dev *pdev, const struct pci_devi
 		mod_info("Found unknown Xilinx device (%x) at %s\n", id->device, dev_name(&pdev->dev));
 	    }
 	} else {
-		/* It is something else */
-		mod_info( "Found unknown board (%x:%x) at %s\n", id->vendor, id->device, dev_name(&pdev->dev));
+	    /* It is something else */
+	    mod_info( "Found unknown board (%x:%x) at %s\n", id->vendor, id->device, dev_name(&pdev->dev));
 	}
 
 	/* Enable the device */
 	if ((err = pci_enable_device(pdev)) != 0) {
-		mod_info("Couldn't enable device\n");
-		goto probe_pcien_fail;
+	    mod_info("Couldn't enable device\n");
+	    goto probe_pcien_fail;
 	}
 	
 	/* Bus master & dma */
-	if ((id->vendor == PCIE_XILINX_VENDOR_ID)&&(id->device == PCIE_IPECAMERA_DEVICE_ID)) {
-	    pci_set_master(pdev);
+	pci_set_master(pdev);
 	    
-	    err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
-	    if (err < 0) {
-		printk(KERN_ERR "pci_set_dma_mask failed\n");
-		goto probe_dma_fail;
-	    }
+	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+	if (err < 0) {
+	    printk(KERN_ERR "pci_set_dma_mask failed\n");
+	    goto probe_dma_fail;
 	}
 
 	/* Set Memory-Write-Invalidate support */

driver/common.h

@@ -1,8 +1,7 @@
 #ifndef _PCIDRIVER_COMMON_H
 #define _PCIDRIVER_COMMON_H
 
-#include "pcilib_types.h"
-
+#include "../kmem.h"
 /*************************************************************************/
 /* Private data types and structures */
 

driver/pciDriver.h

@@ -57,64 +57,83 @@
  */
 
 #include <linux/ioctl.h>
-#include "../pcilib_types.h"
 
 /* Identifies the PCI-E Xilinx ML605 */
 #define PCIE_XILINX_VENDOR_ID 0x10ee
 #define PCIE_ML605_DEVICE_ID 0x6024
 
-/* Identifies the PCI-E IPE Camera */
+/* Identifies the PCI-E IPE Hardware */
 #define PCIE_IPECAMERA_DEVICE_ID 0x6081
 #define PCIE_KAPTURE_DEVICE_ID 0x6028
-//#define PCIE_IPECAMERA_DEVICE_ID 0x6018
 
 
 /* Possible values for ioctl commands */
 
 /* PCI mmap areas */
-#define	PCIDRIVER_BAR0		0
-#define	PCIDRIVER_BAR1		1
-#define	PCIDRIVER_BAR2		2
-#define	PCIDRIVER_BAR3		3
-#define	PCIDRIVER_BAR4		4
-#define	PCIDRIVER_BAR5		5
+#define	PCIDRIVER_BAR0			0
+#define	PCIDRIVER_BAR1			1
+#define	PCIDRIVER_BAR2			2
+#define	PCIDRIVER_BAR3			3
+#define	PCIDRIVER_BAR4			4
+#define	PCIDRIVER_BAR5			5
 
 /* mmap mode of the device */
-#define PCIDRIVER_MMAP_PCI	0
-#define PCIDRIVER_MMAP_KMEM 1
+#define PCIDRIVER_MMAP_PCI		0
+#define PCIDRIVER_MMAP_KMEM 		1
 
 /* Direction of a DMA operation */
 #define PCIDRIVER_DMA_BIDIRECTIONAL 	0
-#define	PCIDRIVER_DMA_TODEVICE		PCILIB_KMEM_SYNC_TODEVICE
-#define PCIDRIVER_DMA_FROMDEVICE	PCILIB_KMEM_SYNC_FROMDEVICE
+#define	PCIDRIVER_DMA_TODEVICE		1//PCILIB_KMEM_SYNC_TODEVICE
+#define PCIDRIVER_DMA_FROMDEVICE	2//PCILIB_KMEM_SYNC_FROMDEVICE
 
 /* Possible sizes in a PCI command */
-#define PCIDRIVER_PCI_CFG_SZ_BYTE  1
-#define PCIDRIVER_PCI_CFG_SZ_WORD  2
-#define PCIDRIVER_PCI_CFG_SZ_DWORD 3
+#define PCIDRIVER_PCI_CFG_SZ_BYTE  	1
+#define PCIDRIVER_PCI_CFG_SZ_WORD  	2
+#define PCIDRIVER_PCI_CFG_SZ_DWORD 	3
 
 /* Possible types of SG lists */
-#define PCIDRIVER_SG_NONMERGED 0
-#define PCIDRIVER_SG_MERGED 1
+#define PCIDRIVER_SG_NONMERGED 		0
+#define PCIDRIVER_SG_MERGED 		1
 
 /* Maximum number of interrupt sources */
-#define PCIDRIVER_INT_MAXSOURCES 16
+#define PCIDRIVER_INT_MAXSOURCES 	16
 
+#define KMEM_REF_HW 		0x80000000				/**< Special reference to indicate hardware access */
+#define KMEM_REF_COUNT		0x0FFFFFFF				/**< Mask of reference counter (mmap/munmap), couting in mmaped memory pages */
 
-#define KMEM_FLAG_REUSE 1	/**< Try to reuse existing buffer with the same use & item */
-#define KMEM_FLAG_EXCLUSIVE 2	/**< Allow only a single application accessing a specified use & item */
-#define KMEM_FLAG_PERSISTENT 4	/**< Sets persistent mode */
-#define KMEM_FLAG_HW 8		/**< The buffer may be accessed by hardware, the hardware access will not occur any more if passed to _free function */
-#define KMEM_FLAG_FORCE 16	/**< Force memory cleanup even if references are present */
-#define KMEM_FLAG_MASS 32	/**< Apply to all buffers of selected use */
-#define KMEM_FLAG_TRY 64	/**< Do not allocate buffers, try to reuse and fail if not possible */
+#define KMEM_MODE_REUSABLE	0x80000000				/**< Indicates reusable buffer */
+#define KMEM_MODE_EXCLUSIVE	0x40000000				/**< Only a single process is allowed to mmap the buffer */
+#define KMEM_MODE_PERSISTENT	0x20000000				/**< Persistent mode instructs kmem_free to preserve buffer in memory */
+#define KMEM_MODE_COUNT		0x0FFFFFFF				/**< Mask of reuse counter (alloc/free) */
 
-#define KMEM_FLAG_REUSED 1		/**< Indicates if buffer with specified use & item was already allocated and reused */
-#define KMEM_FLAG_REUSED_PERSISTENT 4	/**< Indicates that reused buffer was persistent before the call */
-#define KMEM_FLAG_REUSED_HW 8		/**< Indicates that reused buffer had a HW reference before the call */
+#define KMEM_FLAG_REUSE 		PCILIB_KMEM_FLAG_REUSE		/**< Try to reuse existing buffer with the same use & item */
+#define KMEM_FLAG_EXCLUSIVE 		PCILIB_KMEM_FLAG_EXCLUSIVE	/**< Allow only a single application accessing a specified use & item */
+#define KMEM_FLAG_PERSISTENT		PCILIB_KMEM_FLAG_PERSISTENT	/**< Sets persistent mode */
+#define KMEM_FLAG_HW			PCILIB_KMEM_FLAG_HARDWARE	/**< The buffer may be accessed by hardware, the hardware access will not occur any more if passed to _free function */
+#define KMEM_FLAG_FORCE			PCILIB_KMEM_FLAG_FORCE		/**< Force memory cleanup even if references are present */
+#define KMEM_FLAG_MASS			PCILIB_KMEM_FLAG_MASS		/**< Apply to all buffers of selected use */
+#define KMEM_FLAG_TRY			PCILIB_KMEM_FLAG_TRY		/**< Do not allocate buffers, try to reuse and fail if not possible */
 
+#define KMEM_FLAG_REUSED 		PCILIB_KMEM_FLAG_REUSE		/**< Indicates if buffer with specified use & item was already allocated and reused */
+#define KMEM_FLAG_REUSED_PERSISTENT 	PCILIB_KMEM_FLAG_PERSISTENT	/**< Indicates that reused buffer was persistent before the call */
+#define KMEM_FLAG_REUSED_HW 		PCILIB_KMEM_FLAG_HARDWARE	/**< Indicates that reused buffer had a HW reference before the call */
 
 /* Types */
+typedef struct {
+    unsigned short vendor_id;
+    unsigned short device_id;
+    unsigned short bus;
+    unsigned short slot;
+    unsigned short func;
+    unsigned short devfn;
+    unsigned char interrupt_pin;
+    unsigned char interrupt_line;
+    unsigned int irq;
+    unsigned long bar_start[6];
+    unsigned long bar_length[6];
+    unsigned long bar_flags[6];
+} pcilib_board_info_t;
+
 typedef struct {
 	unsigned long type;
 	unsigned long pa;
@@ -166,22 +185,6 @@ typedef struct {
 	} val;
 } pci_cfg_cmd;
 
-typedef struct {
-	unsigned short vendor_id;
-	unsigned short device_id;
-	unsigned short bus;
-	unsigned short slot;
-	unsigned short func;
-	unsigned short devfn;
-	unsigned char interrupt_pin;
-	unsigned char interrupt_line;
-	unsigned int irq;
-	unsigned long bar_start[6];
-	unsigned long bar_length[6];
-	unsigned long bar_flags[6];
-} pcilib_board_info_t;
-
-
 /* ioctl interface */
 /* See documentation for a detailed usage explanation */
 

error.c

@@ -1,11 +1,10 @@
-#define _PCILIB_ERROR_C
-
 #include <stdio.h>
 #include <stdarg.h>
 
+#include "config.h"
 #include "error.h"
 
-static void pcilib_print_error(const char *msg, ...) {
+void pcilib_print_error(const char *msg, ...) {
     va_list va;
     
     va_start(va, msg);
@@ -14,8 +13,6 @@ static void pcilib_print_error(const char *msg, ...) {
     printf("\n");
 }
 
-void (*pcilib_error)(const char *msg, ...) = pcilib_print_error;
-void (*pcilib_warning)(const char *msg, ...) = pcilib_print_error;
 
 int pcilib_set_error_handler(void (*err)(const char *msg, ...), void (*warn)(const char *msg, ...)) {
     if (err) pcilib_error = err;

error.h

@@ -25,10 +25,8 @@ enum {
     PCILIB_ERROR_BUSY = EBUSY
 } pcilib_errot_t;
 
-
-#ifndef _PCILIB_ERROR_C
+void pcilib_print_error(const char *msg, ...);
 extern void (*pcilib_error)(const char *msg, ...);
 extern void (*pcilib_warning)(const char *msg, ...);
-#endif /* _PCILIB_ERROR_C */
 
 #endif /* _PCILIB_ERROR_H */

event.c

@@ -30,8 +30,8 @@ struct timespec {
 pcilib_event_t pcilib_find_event(pcilib_t *ctx, const char *event) {
     int i;
 
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-    pcilib_event_description_t *events = model_info->events;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_description_t *events = model_info->events;
 
     for (i = 0; events[i].name; i++) {
 	if (!strcasecmp(events[i].name, event)) return events[i].evid;
@@ -43,8 +43,8 @@ pcilib_event_t pcilib_find_event(pcilib_t *ctx, const char *event) {
 pcilib_event_data_type_t pcilib_find_event_data_type(pcilib_t *ctx, pcilib_event_t event, const char *data_type) {
     int i;
     
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-    pcilib_event_data_type_description_t *data_types = model_info->data_types;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_data_type_description_t *data_types = model_info->data_types;
     
     for (i = 0; data_types[i].name; i++) {
 	if ((data_types[i].evid&event)&&(!strcasecmp(data_types[i].name, data_type))) return data_types[i].data_type;
@@ -54,12 +54,12 @@ pcilib_event_data_type_t pcilib_find_event_data_type(pcilib_t *ctx, pcilib_event
 }
 
 int pcilib_init_event_engine(pcilib_t *ctx) {
-    pcilib_event_api_description_t *api;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
 
-//    api = pcilib_model[model].event_api;
+//    api = pcilib_model[model].api;
     if ((api)&&(api->init)) {
 	ctx->event_ctx = api->init(ctx);
 	if (ctx->event_ctx) {
@@ -71,11 +71,11 @@ int pcilib_init_event_engine(pcilib_t *ctx) {
 }
 
 int pcilib_reset(pcilib_t *ctx) {
-    pcilib_event_api_description_t *api;
+    const pcilib_event_api_description_t *api;
     
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -88,11 +88,10 @@ int pcilib_reset(pcilib_t *ctx) {
 }
 
 int pcilib_configure_rawdata_callback(pcilib_t *ctx, pcilib_event_rawdata_callback_t callback, void *user) {
-    pcilib_event_api_description_t *api;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -105,11 +104,10 @@ int pcilib_configure_rawdata_callback(pcilib_t *ctx, pcilib_event_rawdata_callba
 }
 
 int pcilib_configure_autostop(pcilib_t *ctx, size_t max_events, pcilib_timeout_t duration) {
-    pcilib_event_api_description_t *api;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -131,11 +129,10 @@ int pcilib_configure_autotrigger(pcilib_t *ctx, pcilib_timeout_t interval, pcili
 }
 
 int pcilib_configure_preprocessing_threads(pcilib_t *ctx, size_t max_threads) {
-    pcilib_event_api_description_t *api;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -147,11 +144,10 @@ int pcilib_configure_preprocessing_threads(pcilib_t *ctx, size_t max_threads) {
 }
 
 int pcilib_start(pcilib_t *ctx, pcilib_event_t event_mask, pcilib_event_flags_t flags) {
-    pcilib_event_api_description_t *api;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -164,11 +160,10 @@ int pcilib_start(pcilib_t *ctx, pcilib_event_t event_mask, pcilib_event_flags_t
 }
 
 int pcilib_stop(pcilib_t *ctx, pcilib_event_flags_t flags) {
-    pcilib_event_api_description_t *api;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -181,11 +176,10 @@ int pcilib_stop(pcilib_t *ctx, pcilib_event_flags_t flags) {
 }
 
 int pcilib_stream(pcilib_t *ctx, pcilib_event_callback_t callback, void *user) {
-    pcilib_event_api_description_t *api;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -215,12 +209,11 @@ static int pcilib_return_event_callback(pcilib_event_id_t event_id, pcilib_event
 */
 
 int pcilib_get_next_event(pcilib_t *ctx, pcilib_timeout_t timeout, pcilib_event_id_t *evid, size_t info_size, pcilib_event_info_t *info) {
-    pcilib_event_api_description_t *api;
+    const pcilib_event_api_description_t *api;
 //    pcilib_return_event_callback_context_t user;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -246,11 +239,10 @@ int pcilib_get_next_event(pcilib_t *ctx, pcilib_timeout_t timeout, pcilib_event_
 }
 
 int pcilib_trigger(pcilib_t *ctx, pcilib_event_t event, size_t trigger_size, void *trigger_data) {
-    pcilib_event_api_description_t *api;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
-    api = model_info->event_api;
+    api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -267,9 +259,8 @@ int pcilib_trigger(pcilib_t *ctx, pcilib_event_t event, size_t trigger_size, voi
 void *pcilib_get_data_with_argument(pcilib_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t arg_size, void *arg, size_t *size) {
     int err;
     void *res = NULL;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-
-    pcilib_event_api_description_t *api = model_info->event_api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api = model_info->api;
     if (!api) {
 	if (size) *size = (size_t)PCILIB_ERROR_NOTSUPPORTED;
 	pcilib_error("Event API is not supported by the selected model");
@@ -292,9 +283,8 @@ void *pcilib_get_data_with_argument(pcilib_t *ctx, pcilib_event_id_t event_id, p
 int pcilib_copy_data_with_argument(pcilib_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t arg_size, void *arg, size_t size, void *buf, size_t *retsize) {
     int err;
     void *res = buf;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-
-    pcilib_event_api_description_t *api = model_info->event_api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -317,9 +307,8 @@ int pcilib_copy_data_with_argument(pcilib_t *ctx, pcilib_event_id_t event_id, pc
 void *pcilib_get_data(pcilib_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t *size) {
     int err;
     void *res = NULL;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-
-    pcilib_event_api_description_t *api = model_info->event_api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	if (size) *size = (size_t)PCILIB_ERROR_NOTSUPPORTED;
@@ -342,9 +331,8 @@ void *pcilib_get_data(pcilib_t *ctx, pcilib_event_id_t event_id, pcilib_event_da
 int pcilib_copy_data(pcilib_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t size, void *buf, size_t *ret_size) {
     int err;
     void *res = buf;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-
-    pcilib_event_api_description_t *api = model_info->event_api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;
@@ -364,9 +352,8 @@ int pcilib_copy_data(pcilib_t *ctx, pcilib_event_id_t event_id, pcilib_event_dat
 }
 
 int pcilib_return_data(pcilib_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, void *data) {
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-    
-    pcilib_event_api_description_t *api = model_info->event_api;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_event_api_description_t *api = model_info->api;
     if (!api) {
 	pcilib_error("Event API is not supported by the selected model");
 	return PCILIB_ERROR_NOTSUPPORTED;

event.h

@@ -3,6 +3,54 @@
 
 #include "pcilib.h"
 
+typedef struct {
+    size_t max_events;
+    pcilib_timeout_t duration;
+} pcilib_autostop_parameters_t;
+
+typedef struct {
+    pcilib_event_rawdata_callback_t callback;
+    void *user;
+} pcilib_rawdata_parameters_t;
+
+typedef struct {
+    size_t max_threads;
+} pcilib_parallel_parameters_t;
+
+typedef struct {
+    pcilib_autostop_parameters_t autostop;
+    pcilib_rawdata_parameters_t rawdata;
+    pcilib_parallel_parameters_t parallel;
+} pcilib_event_parameters_t;
+
+struct pcilib_event_context_s {
+    pcilib_event_parameters_t params;
+    pcilib_t *pcilib;
+};
+
+typedef struct {
+    pcilib_event_t evid;
+    const char *name;
+    const char *description;
+} pcilib_event_description_t;
+
+typedef struct {
+    pcilib_event_data_type_t data_type;
+    pcilib_event_t evid;
+    const char *name;
+    const char *description;
+} pcilib_event_data_type_description_t;
+
+typedef enum {
+    PCILIB_STREAMING_STOP = 0, 		/**< stop streaming */
+    PCILIB_STREAMING_CONTINUE = 1, 	/**< wait the default DMA timeout for a new data */
+    PCILIB_STREAMING_WAIT = 2,		/**< wait the specified timeout for a new data */
+    PCILIB_STREAMING_CHECK = 3,		/**< do not wait for the data, bail out imideatly if no data ready */
+    PCILIB_STREAMING_FAIL = 4,		/**< fail if data is not available on timeout */
+    PCILIB_STREAMING_REQ_FRAGMENT = 5,	/**< only fragment of a packet is read, wait for next fragment and fail if no data during DMA timeout */
+    PCILIB_STREAMING_REQ_PACKET = 6,	/**< wait for next packet and fail if no data during the specified timeout */
+    PCILIB_STREAMING_TIMEOUT_MASK = 3	/**< mask specifying all timeout modes */
+} pcilib_streaming_action_t;
 
 /*
  * get_data: This call is used by get_data and copy_data functions of public  
@@ -16,9 +64,7 @@
  * returned instead. The copy can be managed by the envelope function.
  */
 
-struct pcilib_event_api_description_s {
-    const char *title;
-    
+typedef struct {
     pcilib_context_t *(*init)(pcilib_t *ctx);
     void (*free)(pcilib_context_t *ctx);
 
@@ -35,35 +81,10 @@ struct pcilib_event_api_description_s {
 
     int (*get_data)(pcilib_context_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t arg_size, void *arg, size_t *size, void **data);
     int (*return_data)(pcilib_context_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, void *data);
-};
-
-
-typedef struct {
-    size_t max_events;
-    pcilib_timeout_t duration;
-} pcilib_autostop_parameters_t;
-
-typedef struct {
-    pcilib_event_rawdata_callback_t callback;
-    void *user;
-} pcilib_rawdata_parameters_t;
-
-typedef struct {
-    size_t max_threads;
-} pcilib_parallel_parameters_t;
-
-typedef struct {
-    pcilib_autostop_parameters_t autostop;
-    pcilib_rawdata_parameters_t rawdata;
-    pcilib_parallel_parameters_t parallel;
-} pcilib_event_parameters_t;
-
-struct pcilib_event_context_s {
-    pcilib_event_parameters_t params;
-    pcilib_t *pcilib;
-};
+} pcilib_event_api_description_t;
 
 
 int pcilib_init_event_engine(pcilib_t *ctx);
 
+
 #endif /* _PCILIB_EVENT_H */

ipecamera/CMakeLists.txt

@@ -1,12 +0,0 @@
-include_directories(
-    ${CMAKE_SOURCE_DIR}
-    ${UFODECODE_INCLUDE_DIRS}
-)
-
-set(HEADERS ${HEADERS} ipecamera.h model.h reader.h events.h data.h public.h private.h)
-
-add_library(ipecamera STATIC ipecamera.c model.c reader.c events.c data.c)
-
-install(FILES ipecamera.h
-    DESTINATION include
-)

ipecamera/data.c

@@ -1,272 +0,0 @@
-#define _BSD_SOURCE
-#define _GNU_SOURCE
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <string.h>
-#include <sys/time.h>
-#include <pthread.h>
-#include <assert.h>
-
-#include <ufodecode.h>
-
-#include "../tools.h"
-#include "../error.h"
-
-#include "pcilib.h"
-#include "private.h"
-#include "data.h"
-
-// DS: Currently, on event_id overflow we are assuming the buffer is lost
-static int ipecamera_resolve_event_id(ipecamera_t *ctx, pcilib_event_id_t evid) {
-    pcilib_event_id_t diff;
-
-    if (evid > ctx->event_id) {
-	diff = (((pcilib_event_id_t)-1) - ctx->event_id) + evid;
-	if (diff >= ctx->buffer_size) return -1;
-    } else {
-	diff = ctx->event_id - evid;
-        if (diff >= ctx->buffer_size) return -1;
-    }
-    
-	// DS: Request buffer_size to be power of 2 and replace to shifts (just recompute in set_buffer_size)
-    return (evid - 1) % ctx->buffer_size;
-}
-
-inline static int ipecamera_decode_frame(ipecamera_t *ctx, pcilib_event_id_t event_id) {
-    int err = 0;
-    size_t res;
-    uint16_t *pixels;
-    
-    int buf_ptr = ipecamera_resolve_event_id(ctx, event_id);
-    if (buf_ptr < 0) return PCILIB_ERROR_TIMEOUT;
-    
-    if (ctx->frame[buf_ptr].event.image_ready) return 0;
-    
-    if (ctx->frame[buf_ptr].event.info.flags&PCILIB_EVENT_INFO_FLAG_BROKEN) {
-	err = PCILIB_ERROR_INVALID_DATA;
-	ctx->frame[buf_ptr].event.image_broken = err;
-	goto ready;
-    }
-	
-		
-    pixels = ctx->image + buf_ptr * ctx->image_size;
-    memset(ctx->cmask + ctx->buffer_pos * ctx->dim.height, 0, ctx->dim.height * sizeof(ipecamera_change_mask_t));
-    res = ufo_decoder_decode_frame(ctx->ipedec, ctx->buffer + buf_ptr * ctx->padded_size, ctx->raw_size, pixels, &ctx->frame[buf_ptr].event.meta);
-    if (!res) {
-        err = PCILIB_ERROR_FAILED;
-        ctx->frame[buf_ptr].event.image_broken = err;
-	goto ready;
-    }
-	    
-    ctx->frame[buf_ptr].event.image_broken = 0;
-
-ready:
-    ctx->frame[buf_ptr].event.image_ready = 1;
-
-    if (ipecamera_resolve_event_id(ctx, event_id) < 0) {
-	ctx->frame[buf_ptr].event.image_ready = 0;
-	return PCILIB_ERROR_TIMEOUT;
-    }
-    
-    return err;
-}
-
-static int ipecamera_get_next_buffer_to_process(ipecamera_t *ctx, pcilib_event_id_t *evid) {
-    int res;
-
-    if (ctx->preproc_id == ctx->event_id) return -1;
-    
-    if (ctx->preproc) 
-	pthread_mutex_lock(&ctx->preproc_mutex);
-	
-    if (ctx->preproc_id == ctx->event_id) {
-	if (ctx->preproc)
-	    pthread_mutex_unlock(&ctx->preproc_mutex);
-	return -1;
-    }
-
-    if ((ctx->event_id - ctx->preproc_id) > (ctx->buffer_size - IPECAMERA_RESERVE_BUFFERS)) ctx->preproc_id = ctx->event_id - (ctx->buffer_size - 1 - IPECAMERA_RESERVE_BUFFERS - 1);
-
-    res = ctx->preproc_id%ctx->buffer_size;
-
-    if (pthread_rwlock_trywrlock(&ctx->frame[res].mutex)) {
-	pthread_mutex_unlock(&ctx->preproc_mutex);
-	return -1;
-    }
-    
-    *evid = ++ctx->preproc_id;
-
-    if (ctx->preproc)
-	pthread_mutex_unlock(&ctx->preproc_mutex);
-
-    return res;
-}
-
-
-void *ipecamera_preproc_thread(void *user) {
-    int buf_ptr;
-    pcilib_event_id_t evid;
-    
-    ipecamera_preprocessor_t *preproc = (ipecamera_preprocessor_t*)user;
-    ipecamera_t *ctx = preproc->ipecamera;
-    
-    while (ctx->run_preprocessors) {
-	buf_ptr = ipecamera_get_next_buffer_to_process(ctx, &evid);
-	if (buf_ptr < 0) {
-	    usleep(IPECAMERA_NOFRAME_PREPROC_SLEEP);
-	    continue;
-	}
-	
-	ipecamera_decode_frame(ctx, evid);
-	
-	pthread_rwlock_unlock(&ctx->frame[buf_ptr].mutex);
-    }
-
-    return NULL;
-}
-
-static int ipecamera_get_frame(ipecamera_t *ctx, pcilib_event_id_t event_id) {
-    int err;
-    int buf_ptr = (event_id - 1) % ctx->buffer_size;
-    
-    if (ctx->preproc) {	
-	if (ctx->frame[buf_ptr].event.image_broken)
-		return ctx->frame[buf_ptr].event.image_broken;
-    } else {
-	pthread_rwlock_rdlock(&ctx->frame[buf_ptr].mutex);
-
-	err = ipecamera_decode_frame(ctx, event_id);
-
-	if (err) {
-	    pthread_rwlock_unlock(&ctx->frame[buf_ptr].mutex);
-	    return err;
-	}
-	
-	return 0;
-    }
-    
-    
-    while (!ctx->frame[buf_ptr].event.image_ready) {
-	usleep(IPECAMERA_NOFRAME_PREPROC_SLEEP);
-
-	buf_ptr = ipecamera_resolve_event_id(ctx, event_id);
-	if (buf_ptr < 0) return PCILIB_ERROR_OVERWRITTEN;
-    }	
-
-    pthread_rwlock_rdlock(&ctx->frame[buf_ptr].mutex);
-    
-    buf_ptr = ipecamera_resolve_event_id(ctx, event_id);
-    if ((buf_ptr < 0)||(!ctx->frame[buf_ptr].event.image_ready)) {
-	pthread_rwlock_unlock(&ctx->frame[buf_ptr].mutex);
-	return PCILIB_ERROR_OVERWRITTEN;
-    }
-    
-    return 0;    
-}
-
-
-/*
- We will lock the data for non-raw data to prevent ocasional overwritting. The 
- raw data will be overwritten by the reader thread anyway and we can't do 
- anything to prevent it for performance reasons.
-*/
-int ipecamera_get(pcilib_context_t *vctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t arg_size, void *arg, size_t *size, void **ret) {
-    int err;
-    int buf_ptr;
-    size_t raw_size;
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-
-    void *data = *ret;
-
-    if (!ctx) {
-	pcilib_error("IPECamera imaging is not initialized");
-	return PCILIB_ERROR_NOTINITIALIZED;
-    }
-
-    buf_ptr = ipecamera_resolve_event_id(ctx, event_id);
-    if (buf_ptr < 0) return PCILIB_ERROR_OVERWRITTEN;
-    
-    switch ((ipecamera_data_type_t)data_type) {
-	case IPECAMERA_RAW_DATA:
-	    raw_size = ctx->frame[buf_ptr].event.raw_size;
-	    if (data) {
-		if ((!size)||(*size < raw_size)) return PCILIB_ERROR_TOOBIG;
-		memcpy(data, ctx->buffer + buf_ptr * ctx->padded_size, raw_size);
-		if (ipecamera_resolve_event_id(ctx, event_id) < 0) return PCILIB_ERROR_OVERWRITTEN;
-		*size = raw_size;
-		return 0;
-	    }
-	    if (size) *size = raw_size;
-	    *ret = ctx->buffer + buf_ptr * ctx->padded_size;
-	    return 0;
-	case IPECAMERA_IMAGE_DATA:
-	    err = ipecamera_get_frame(ctx, event_id);
-	    if (err) return err;
-
-	    if (data) {
-		if ((!size)||(*size < ctx->image_size * sizeof(ipecamera_pixel_t))) return PCILIB_ERROR_TOOBIG;
-		memcpy(data, ctx->image + buf_ptr * ctx->image_size, ctx->image_size * sizeof(ipecamera_pixel_t));
-		pthread_rwlock_unlock(&ctx->frame[buf_ptr].mutex);
-		*size =  ctx->image_size * sizeof(ipecamera_pixel_t);
-		return 0;
-	    }
-	
-	    if (size) *size = ctx->image_size * sizeof(ipecamera_pixel_t);
-	    *ret = ctx->image + buf_ptr * ctx->image_size;
-	    return 0;
-	case IPECAMERA_CHANGE_MASK:
-	    err = ipecamera_get_frame(ctx, event_id);
-	    if (err) return err;
-
-	    if (data) {
-		if ((!size)||(*size < ctx->dim.height * sizeof(ipecamera_change_mask_t))) return PCILIB_ERROR_TOOBIG;
-		memcpy(data, ctx->image + buf_ptr * ctx->dim.height, ctx->dim.height * sizeof(ipecamera_change_mask_t));
-		pthread_rwlock_unlock(&ctx->frame[buf_ptr].mutex);
-		*size =  ctx->dim.height * sizeof(ipecamera_change_mask_t);
-		return 0;
-	    }
-
-	    if (size) *size = ctx->dim.height * sizeof(ipecamera_change_mask_t);
-	    *ret = ctx->cmask + buf_ptr * ctx->dim.height;
-	    return 0;
-	case IPECAMERA_DIMENSIONS:
-	    if (size) *size = sizeof(ipecamera_image_dimensions_t);
-	    ret = (void*)&ctx->dim;
-	    return 0;
-	case IPECAMERA_IMAGE_REGION:
-	case IPECAMERA_PACKED_IMAGE:
-	    // Shall we return complete image or only changed parts?
-	case IPECAMERA_PACKED_LINE:
-	case IPECAMERA_PACKED_PAYLOAD:
-	    pcilib_error("Support for data type (%li) is not implemented yet", data_type);
-	    return PCILIB_ERROR_NOTSUPPORTED;
-	default:
-	    pcilib_error("Unknown data type (%li) is requested", data_type);
-	    return PCILIB_ERROR_INVALID_REQUEST;
-    }
-}
-
-
-/*
- We will unlock non-raw data and check if the raw data is not overwritten yet
-*/
-int ipecamera_return(pcilib_context_t *vctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, void *data) {
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-
-    if (!ctx) {
-	pcilib_error("IPECamera imaging is not initialized");
-	return PCILIB_ERROR_NOTINITIALIZED;
-
-    }
-
-    if ((ipecamera_data_type_t)data_type == IPECAMERA_RAW_DATA) {
-	if (ipecamera_resolve_event_id(ctx, event_id) < 0) return PCILIB_ERROR_OVERWRITTEN;
-    } else {
-	int buf_ptr = (event_id - 1) % ctx->buffer_size;
-	pthread_rwlock_unlock(&ctx->frame[buf_ptr].mutex);
-    }
-
-    return 0;
-}

ipecamera/data.h

@@ -1,6 +0,0 @@
-#ifndef _IPECAMERA_DATA_H
-#define _IPECAMERA_DATA_H
-
-void *ipecamera_preproc_thread(void *user);
-
-#endif /* _IPECAMERA_DATA_H */

ipecamera/events.c

@@ -1,160 +0,0 @@
-#define _BSD_SOURCE
-#define _GNU_SOURCE
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <string.h>
-#include <sys/time.h>
-#include <pthread.h>
-#include <assert.h>
-
-#include <ufodecode.h>
-
-#include "../tools.h"
-#include "../error.h"
-
-#include "pcilib.h"
-#include "public.h"
-#include "private.h"
-#include "events.h"
-
-int ipecamera_stream(pcilib_context_t *vctx, pcilib_event_callback_t callback, void *user) {
-    int run_flag = 1;
-    int res, err = 0;
-    int do_stop = 0;
-    
-    ipecamera_event_info_t info;
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-
-    if (!ctx) {
-	pcilib_error("IPECamera imaging is not initialized");
-	return PCILIB_ERROR_NOTINITIALIZED;
-    }
-
-    ctx->streaming = 1;
-    ctx->run_streamer = 1;
-
-    if (!ctx->started) {
-	err = ipecamera_start(vctx, PCILIB_EVENTS_ALL, PCILIB_EVENT_FLAGS_DEFAULT);
-	if (err) {
-	    ctx->streaming = 0;
-	    return err;
-	}
-	
-	do_stop = 1;
-    }
-    
-    if (ctx->parse_data) {
-	    // This loop iterates while the generation
-	while ((run_flag)&&((ctx->run_streamer)||(ctx->reported_id != ctx->event_id))) {
-#ifdef IPECAMERA_ANNOUNCE_READY
-	    while (((!ctx->preproc)&&(ctx->reported_id != ctx->event_id))||((ctx->preproc)&&(ctx->reported_id != ctx->preproc_id))) {
-#else /* IPECAMERA_ANNOUNCE_READY */
-	    while (ctx->reported_id != ctx->event_id) {
-#endif /* IPECAMERA_ANNOUNCE_READY */
-		if ((ctx->event_id - ctx->reported_id) > (ctx->buffer_size - IPECAMERA_RESERVE_BUFFERS)) ctx->reported_id = ctx->event_id - (ctx->buffer_size - 1 - IPECAMERA_RESERVE_BUFFERS);
-		else ++ctx->reported_id;
-
-		memcpy(&info, ctx->frame + ((ctx->reported_id-1)%ctx->buffer_size), sizeof(ipecamera_event_info_t));
-
-		if ((ctx->event_id - ctx->reported_id) < ctx->buffer_size) {
-		    res = callback(ctx->reported_id, (pcilib_event_info_t*)&info, user);
-		    if (res <= 0) {
-			if (res < 0) err = -res;
-			run_flag = 0;
-			break;
-		    }
-		}
-	    }
-	    usleep(IPECAMERA_NOFRAME_SLEEP);
-	}
-    } else {
-	while ((run_flag)&&(ctx->run_streamer)) {
-	    usleep(IPECAMERA_NOFRAME_SLEEP);
-	}
-    }
-
-    ctx->streaming = 0;
-
-    if (do_stop) {
-	ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-    }
-    
-
-    return err;
-}
-
-int ipecamera_next_event(pcilib_context_t *vctx, pcilib_timeout_t timeout, pcilib_event_id_t *evid, size_t info_size, pcilib_event_info_t *info) {
-    struct timeval tv;
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-
-    if (!ctx) {
-	pcilib_error("IPECamera imaging is not initialized");
-	return PCILIB_ERROR_NOTINITIALIZED;
-    }
-
-    if (!ctx->started) {
-	pcilib_error("IPECamera is not in grabbing mode");
-	return PCILIB_ERROR_INVALID_REQUEST;
-    }
-    
-    if (!ctx->parse_data) {
-	pcilib_error("RAWData only mode is requested");
-	return PCILIB_ERROR_INVALID_REQUEST;
-    }
-
-#ifdef IPECAMERA_ANNOUNCE_READY
-    if (((!ctx->preproc)&&(ctx->reported_id == ctx->event_id))||((ctx->preproc)&&(ctx->reported_id == ctx->preproc_id))) {
-#else /* IPECAMERA_ANNOUNCE_READY */
-    if (ctx->reported_id == ctx->event_id) {
-#endif /* IPECAMERA_ANNOUNCE_READY */
-
-	if (timeout) {
-	    if (timeout == PCILIB_TIMEOUT_INFINITE) {
-#ifdef IPECAMERA_ANNOUNCE_READY
-		while ((((!ctx->preproc)&&(ctx->reported_id == ctx->event_id))||((ctx->preproc)&&(ctx->reported_id == ctx->preproc_id)))) {
-#else /* IPECAMERA_ANNOUNCE_READY */
-		while ((ctx->reported_id == ctx->event_id)) {
-#endif /* IPECAMERA_ANNOUNCE_READY */
-		usleep(IPECAMERA_NOFRAME_SLEEP);
-		}
-	    } else {	    
-		pcilib_calc_deadline(&tv, timeout);
-
-#ifdef IPECAMERA_ANNOUNCE_READY
-		while ((ctx->started)&&(pcilib_calc_time_to_deadline(&tv) > 0)&&(((!ctx->preproc)&&(ctx->reported_id == ctx->event_id))||((ctx->preproc)&&(ctx->reported_id == ctx->preproc_id)))) {
-#else /* IPECAMERA_ANNOUNCE_READY */
-		while ((ctx->started)&&(pcilib_calc_time_to_deadline(&tv) > 0)&&(ctx->reported_id == ctx->event_id)) {
-#endif /* IPECAMERA_ANNOUNCE_READY */
-		    usleep(IPECAMERA_NOFRAME_SLEEP);
-		}
-	    }
-	}
-	
-	if (ctx->reported_id == ctx->event_id) {
-	    return PCILIB_ERROR_TIMEOUT;
-	}
-	
-    }
-
-retry:
-    if ((ctx->event_id - ctx->reported_id) > (ctx->buffer_size - IPECAMERA_RESERVE_BUFFERS)) ctx->reported_id = ctx->event_id - (ctx->buffer_size - 1 - IPECAMERA_RESERVE_BUFFERS);
-    else ++ctx->reported_id;
-
-    if (evid) *evid = ctx->reported_id;
-
-    if (info) {
-	if (info_size >= sizeof(ipecamera_event_info_t))
-	    memcpy(info, ctx->frame + ((ctx->reported_id-1)%ctx->buffer_size), sizeof(ipecamera_event_info_t));
-	else if (info_size >= sizeof(pcilib_event_info_t))
-	    memcpy(info, ctx->frame + ((ctx->reported_id-1)%ctx->buffer_size), sizeof(pcilib_event_info_t));
-	else
-	    return PCILIB_ERROR_INVALID_ARGUMENT;
-    }
-
-    if ((ctx->event_id - ctx->reported_id) >= ctx->buffer_size) goto retry;
-
-    return 0;
-}
-

ipecamera/events.h

@@ -1,5 +0,0 @@
-#ifndef _IPECAMERA_EVENTS_H
-#define _IPECAMERA_EVENTS_H
-
-
-#endif /* _IPECAMERA_EVENTS_H */

ipecamera/ipecamera.c

@@ -1,678 +0,0 @@
-#define _IPECAMERA_IMAGE_C
-#define _BSD_SOURCE
-#define _GNU_SOURCE
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <string.h>
-#include <sys/time.h>
-#include <pthread.h>
-#include <assert.h>
-
-#include <ufodecode.h>
-
-#include "../tools.h"
-#include "../error.h"
-#include "../event.h"
-
-#include "pcilib.h"
-#include "private.h"
-#include "model.h"
-#include "reader.h"
-#include "events.h"
-#include "data.h"
-
-
-#include "dma/nwl.h"
-
-#define FIND_REG(var, bank, name)  \
-        ctx->var = pcilib_find_register(pcilib, bank, name); \
-	if (ctx->var ==  PCILIB_REGISTER_INVALID) { \
-	    err = PCILIB_ERROR_NOTFOUND; \
-	    pcilib_error("Unable to find a %s register", name); \
-	}
-    
-
-#define GET_REG(reg, var) \
-    if (!err) { \
-	err = pcilib_read_register_by_id(pcilib, ctx->reg, &var); \
-	if (err) { \
-	    pcilib_error("Error reading %s register", ipecamera_registers[ctx->reg].name); \
-	} \
-    }
-
-#define SET_REG(reg, val) \
-    if (!err) { \
-	err = pcilib_write_register_by_id(pcilib, ctx->reg, val); \
-	if (err) { \
-	    pcilib_error("Error writting %s register", ipecamera_registers[ctx->reg].name); \
-	} \
-    }
-
-#define CHECK_REG(reg, check) \
-    if (!err) { \
-	err = pcilib_read_register_by_id(pcilib, ctx->reg, &value); \
-	if (err) { \
-	    pcilib_error("Error reading %s register", ipecamera_registers[ctx->reg].name); \
-	} \
-	if (value != check) { \
-	    pcilib_error("Unexpected value (0x%lx) of register %s", value, ipecamera_registers[ctx->reg].name); \
-	    err = PCILIB_ERROR_INVALID_DATA; \
-	} \
-    }
-
-#define IPECAMERA_GET_EXPECTED_STATUS(ctx) ((ctx->firmware == 4)?IPECAMERA_EXPECTED_STATUS_4:IPECAMERA_EXPECTED_STATUS)
-#define CHECK_STATUS_REG() CHECK_REG(status_reg, IPECAMERA_GET_EXPECTED_STATUS(ctx))
-
-#define CHECK_VALUE(value, val) \
-    if ((!err)&&(value != val)) { \
-	pcilib_error("Unexpected value (0x%x) in data stream (0x%x is expected)", value, val); \
-	err = PCILIB_ERROR_INVALID_DATA; \
-    }
-
-#define CHECK_FLAG(flag, check, ...) \
-    if ((!err)&&(!(check))) { \
-	pcilib_error("Unexpected value (0x%x) of " flag,  __VA_ARGS__); \
-	err = PCILIB_ERROR_INVALID_DATA; \
-    }
-
-
-pcilib_context_t *ipecamera_init(pcilib_t *pcilib) {
-    int err = 0; 
-    
-    ipecamera_t *ctx = malloc(sizeof(ipecamera_t));
-
-    if (ctx) {
-	pcilib_register_value_t value;
-	
-	memset(ctx, 0, sizeof(ipecamera_t));
-
-	ctx->buffer_size = IPECAMERA_DEFAULT_BUFFER_SIZE;
-	ctx->dim.bpp = sizeof(ipecamera_pixel_t) * 8;
-
-	    // We need DMA engine initialized to resolve DMA registers
-//	FIND_REG(packet_len_reg, "fpga", "xrawdata_packet_length");
-	
-	FIND_REG(status_reg, "fpga", "status");
-	FIND_REG(control_reg, "fpga", "control");
-
-	FIND_REG(status3_reg, "fpga", "status3");
-
-	FIND_REG(n_lines_reg, "cmosis", "cmosis_number_lines");
-	FIND_REG(line_reg, "cmosis", "cmosis_start1");
-	FIND_REG(exposure_reg, "cmosis", "cmosis_exp_time");
-	FIND_REG(flip_reg, "cmosis", "cmosis_image_flipping");
-	
-	FIND_REG(firmware_version_reg, "fpga", "firmware_version");
-	FIND_REG(adc_resolution_reg, "fpga", "adc_resolution");
-	FIND_REG(output_mode_reg, "fpga", "output_mode");
-	
-	FIND_REG(max_frames_reg, "fpga", "ddr_max_frames");
-	FIND_REG(num_frames_reg, "fpga", "ddr_num_frames");
-
-
-	GET_REG(firmware_version_reg, value);
-	switch (value) {
-	 case 4:
-	 case 5:
-	    ctx->firmware = value;
-	    break;
-	 default:
-//    	    pcilib_error("Unsupported version of firmware (%lu)", value);
-	    ctx->firmware = 0;
-	}
-
-#ifdef IPECAMERA_BUG_POSTPONED_READ
-	GET_REG(max_frames_reg, value);
-	if ((value + IPECAMERA_RESERVE_BUFFERS + 3) > ctx->buffer_size) {
-	    ctx->buffer_size = (value + 1) + IPECAMERA_RESERVE_BUFFERS + 2;
-	}
-#endif /* IPECAMERA_BUG_POSTPONED_READ */
-
-
-	ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
-	ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
-
-	if (err) {
-	    free(ctx);
-	    return NULL;
-	}
-    }
-    
-    return (pcilib_context_t*)ctx;
-}
-
-void ipecamera_free(pcilib_context_t *vctx) {
-    if (vctx) {
-	ipecamera_t *ctx = (ipecamera_t*)vctx;
-	ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	free(ctx);
-    }
-}
-
-pcilib_dma_context_t *ipecamera_init_dma(pcilib_context_t *vctx) {
-#ifdef IPECAMERA_DMA_R3
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-#endif
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(vctx->pcilib);
-    if ((!model_info->dma_api)||(!model_info->dma_api->init)) {
-	pcilib_error("The DMA engine is not configured in model");
-	return NULL;
-    }
-
-
-#ifdef IPECAMERA_DMA_R3
-    if (ctx->firmware) {
-	return model_info->dma_api->init(vctx->pcilib, PCILIB_NWL_MODIFICATION_IPECAMERA, NULL);
-    } else {
-	return model_info->dma_api->init(vctx->pcilib, PCILIB_DMA_MODIFICATION_DEFAULT, NULL);
-    }
-#else
-    return model_info->dma_api->init(vctx->pcilib, PCILIB_DMA_MODIFICATION_DEFAULT, NULL);
-#endif
-}
-
-
-int ipecamera_set_buffer_size(ipecamera_t *ctx, int size) {
-    if (ctx->started) {
-	pcilib_error("Can't change buffer size while grabbing");
-	return PCILIB_ERROR_INVALID_REQUEST;
-    }
-    
-    if (size < 2) {
-	pcilib_error("The buffer size is too small");
-	return PCILIB_ERROR_INVALID_REQUEST;
-    }
-    
-    if (((size^(size-1)) < size) < size) {
-	pcilib_error("The buffer size is not power of 2");
-    }
-    
-    ctx->buffer_size = size;
-    
-    return 0;
-}
-
-int ipecamera_reset(pcilib_context_t *vctx) {
-    int err = 0;
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-    pcilib_t *pcilib = vctx->pcilib;
-
-    pcilib_register_t control, status;
-    pcilib_register_value_t value;
-
-    if (!ctx) {
-	pcilib_error("IPECamera imaging is not initialized");
-	return PCILIB_ERROR_NOTINITIALIZED;
-    }
-    
-    if (!ctx->firmware) {
-	pcilib_warning("Unsupported version of firmware (%lu)", ctx->firmware);
-	return 0;
-    }
-
-    pcilib = vctx->pcilib;
-    control = ctx->control_reg;
-    status = ctx->status_reg;
-
-	// Set Reset bit to CMOSIS
-    err = pcilib_write_register_by_id(pcilib, control, 0x1e4);
-    if (err) {
-	pcilib_error("Error setting FPGA reset bit");
-	return err;
-    }
-    usleep(IPECAMERA_SLEEP_TIME);
-
-	// Remove Reset bit to CMOSIS
-    err = pcilib_write_register_by_id(pcilib, control, 0x1e1);
-    if (err) {
-	pcilib_error("Error reseting FPGA reset bit");
-	return err;
-    }
-    usleep(IPECAMERA_SLEEP_TIME);
-
-	// Special settings for CMOSIS v.2
-    value = 01; err = pcilib_write_register_space(pcilib, "cmosis", 115, 1, &value);
-    if (err) {
-	pcilib_error("Error setting CMOSIS configuration");
-	return err;
-    }
-    usleep(IPECAMERA_SLEEP_TIME);
-
-    value = 07; err = pcilib_write_register_space(pcilib, "cmosis", 82, 1, &value);
-    if (err) {
-	pcilib_error("Error setting CMOSIS configuration");
-	return err;
-    }
-    usleep(IPECAMERA_SLEEP_TIME);
-
-	// Set default parameters
-    err = pcilib_write_register_by_id(pcilib, control, IPECAMERA_IDLE);
-    if (err) {
-	pcilib_error("Error bringing FPGA in default mode");
-	return err;
-    }
-
-    usleep(10000);
-
-    err = pcilib_read_register_by_id(pcilib, status, &value);
-    if (err) {
-	pcilib_error("Error reading status register");
-	return err;
-    }
-
-    if (value != IPECAMERA_GET_EXPECTED_STATUS(ctx)) {
-	pcilib_error("Unexpected value (%lx) of status register, expected %lx", value, IPECAMERA_GET_EXPECTED_STATUS(ctx));
-	return PCILIB_ERROR_VERIFY;
-    }
-
-    return 0;    
-}
-
-
-int ipecamera_start(pcilib_context_t *vctx, pcilib_event_t event_mask, pcilib_event_flags_t flags) {
-    int i;
-    int err = 0;
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-    pcilib_t *pcilib = vctx->pcilib;
-    pcilib_register_value_t value;
-    
-    pthread_attr_t attr;
-    struct sched_param sched;
-    
-    if (!ctx) {
-	pcilib_error("IPECamera imaging is not initialized");
-	return PCILIB_ERROR_NOTINITIALIZED;
-    }
-
-    if (!ctx->firmware) {
-	pcilib_error("Unsupported version of firmware (%lu)", ctx->firmware);
-	return PCILIB_ERROR_INVALID_REQUEST;
-    }
-    
-    if (ctx->started) {
-	pcilib_error("IPECamera grabbing is already started");
-	return PCILIB_ERROR_INVALID_REQUEST;
-    }
-
-	// Allow readout and clean the FRAME_REQUEST mode if set for some reason
-    GET_REG(control_reg, value);
-    SET_REG(control_reg, value|IPECAMERA_READOUT_FLAG);
-    usleep(IPECAMERA_SLEEP_TIME);
-    if (value&0x1000) ctx->fr_mode = 1;
-    else {
-	ctx->fr_mode = 0;
-	CHECK_STATUS_REG();
-	if (err) return err;
-    }
-
-    ctx->event_id = 0;
-    ctx->preproc_id = 0;
-    ctx->reported_id = 0;
-    ctx->buffer_pos = 0;
-    ctx->parse_data = (flags&PCILIB_EVENT_FLAG_RAW_DATA_ONLY)?0:1;
-    ctx->cur_size = 0;
-    
-    ctx->dim.width = IPECAMERA_WIDTH;
-    ctx->dim.height = IPECAMERA_MAX_LINES;
-//    GET_REG(n_lines_reg, ctx->dim.height);
-    
-    GET_REG(output_mode_reg, value);
-    switch (value) {
-     case IPECAMERA_MODE_16_CHAN_IO:
-        ctx->cmosis_outputs = 16;
-        break;
-     case IPECAMERA_MODE_4_CHAN_IO:
-        ctx->cmosis_outputs = 4;
-        break;
-     default:
-        pcilib_error("IPECamera reporting invalid output_mode 0x%lx", value);
-        return PCILIB_ERROR_INVALID_STATE;
-    }
-    
-    ipecamera_compute_buffer_size(ctx, ctx->dim.height);
-
-    ctx->raw_size = ctx->cur_raw_size;
-    ctx->full_size = ctx->cur_full_size;
-    ctx->padded_size = ctx->cur_padded_size;
-
-    ctx->image_size = ctx->dim.width * ctx->dim.height;
-
-    
-    GET_REG(max_frames_reg, value);
-    ctx->max_frames = value;
-
-    ctx->buffer = malloc(ctx->padded_size * ctx->buffer_size);
-    if (!ctx->buffer) {
-	ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	pcilib_error("Unable to allocate ring buffer (%lu bytes)", ctx->padded_size * ctx->buffer_size);
-	return PCILIB_ERROR_MEMORY;
-    }
-
-    ctx->image = (ipecamera_pixel_t*)malloc(ctx->image_size * ctx->buffer_size * sizeof(ipecamera_pixel_t));
-    if (!ctx->image) {
-	ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	pcilib_error("Unable to allocate image buffer (%lu bytes)", ctx->image_size * ctx->buffer_size * sizeof(ipecamera_pixel_t));
-	return PCILIB_ERROR_MEMORY;
-    }
-
-    ctx->cmask = malloc(ctx->dim.height * ctx->buffer_size * sizeof(ipecamera_change_mask_t));
-    if (!ctx->cmask) {
-	ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	pcilib_error("Unable to allocate change-mask buffer");
-	return PCILIB_ERROR_MEMORY;
-    }
-
-    ctx->frame = (ipecamera_frame_t*)malloc(ctx->buffer_size * sizeof(ipecamera_frame_t));
-    if (!ctx->frame) {
-	ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	pcilib_error("Unable to allocate frame-info buffer");
-	return PCILIB_ERROR_MEMORY;
-    }
-    
-    memset(ctx->frame, 0, ctx->buffer_size * sizeof(ipecamera_frame_t));
-    
-    for (i = 0; i < ctx->buffer_size; i++) {
-	err = pthread_rwlock_init(&ctx->frame[i].mutex, NULL);
-	if (err) break;
-    }
-
-    ctx->frame_mutex_destroy = i;
-
-    if (err) {
-        ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	pcilib_error("Initialization of rwlock mutexes for frame synchronization has failed");
-	return PCILIB_ERROR_FAILED;
-    }
-    
-    ctx->ipedec = ufo_decoder_new(ctx->dim.height, ctx->dim.width, NULL, 0);
-    if (!ctx->ipedec) {
-        ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	pcilib_error("Unable to initialize IPECamera decoder library");
-	return PCILIB_ERROR_FAILED;
-    }
-
-    if (!err) {
-	ctx->rdma = pcilib_find_dma_by_addr(vctx->pcilib, PCILIB_DMA_FROM_DEVICE, IPECAMERA_DMA_ADDRESS);
-	if (ctx->rdma == PCILIB_DMA_ENGINE_INVALID) {
-	    err = PCILIB_ERROR_NOTFOUND;
-	    pcilib_error("The C2S channel of IPECamera DMA Engine (%u) is not found", IPECAMERA_DMA_ADDRESS);
-	} else {
-	    err = pcilib_start_dma(vctx->pcilib, ctx->rdma, PCILIB_DMA_FLAGS_DEFAULT);
-	    if (err) {
-		ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
-		pcilib_error("Failed to initialize C2S channel of IPECamera DMA Engine (%u)", IPECAMERA_DMA_ADDRESS);
-	    }
-	}
-    }
-    
-/*    
-    if (!err) {
-	ctx->wdma = pcilib_find_dma_by_addr(vctx->pcilib, PCILIB_DMA_TO_DEVICE, IPECAMERA_DMA_ADDRESS);
-	if (ctx->wdma == PCILIB_DMA_ENGINE_INVALID) {
-	    err = PCILIB_ERROR_NOTFOUND;
-	    pcilib_error("The S2C channel of IPECamera DMA Engine (%u) is not found", IPECAMERA_DMA_ADDRESS);
-	} else {
-	    err = pcilib_start_dma(vctx->pcilib, ctx->wdma, PCILIB_DMA_FLAGS_DEFAULT);
-	    if (err) {
-		ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
-		pcilib_error("Failed to initialize S2C channel of IPECamera DMA Engine (%u)", IPECAMERA_DMA_ADDRESS);
-	    }
-	}
-    }
-*/    
-
-/*
-    SET_REG(packet_len_reg, IPECAMERA_DMA_PACKET_LENGTH);
-*/
-
-    if (err) {
-        ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	return err;
-    }
-
-	// Clean DMA
-#ifndef IPECAMERA_BUG_POSTPONED_READ
-    err = pcilib_skip_dma(vctx->pcilib, ctx->rdma);
-    if (err) {
-        ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	pcilib_error("Can't start grabbing, device continuously writes unexpected data using DMA engine");
-	return err;
-    }
-#endif /* ! IPECAMERA_BUG_POSTPONED_READ */
-
-    if (vctx->params.autostop.duration) {
-	gettimeofday(&ctx->autostop.timestamp, NULL);
-	ctx->autostop.timestamp.tv_usec += vctx->params.autostop.duration % 1000000;
-	if (ctx->autostop.timestamp.tv_usec > 999999) {
-	    ctx->autostop.timestamp.tv_sec += 1 + vctx->params.autostop.duration / 1000000;
-	    ctx->autostop.timestamp.tv_usec -= 1000000;
-	} else {
-	    ctx->autostop.timestamp.tv_sec += vctx->params.autostop.duration / 1000000;
-	}
-    }
-    
-    if (vctx->params.autostop.max_events) {
-	ctx->autostop.evid = vctx->params.autostop.max_events;
-    }
-    
-    if ((ctx->parse_data)&&(flags&PCILIB_EVENT_FLAG_PREPROCESS)) {
-	ctx->n_preproc = pcilib_get_cpu_count();
-	
-	    // it would be greate to detect hyperthreading cores and ban them
-	switch (ctx->n_preproc) {
-	    case 1: break;
-	    case 2 ... 3: ctx->n_preproc -= 1; break;
-	    default: ctx->n_preproc -= 2; break;
-	}
-
-	if ((vctx->params.parallel.max_threads)&&(vctx->params.parallel.max_threads < ctx->n_preproc))
-	    ctx->n_preproc = vctx->params.parallel.max_threads;
-
-	ctx->preproc = (ipecamera_preprocessor_t*)malloc(ctx->n_preproc * sizeof(ipecamera_preprocessor_t));
-	if (!ctx->preproc) {
-	    ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	    pcilib_error("Unable to allocate memory for preprocessor contexts");
-	    return PCILIB_ERROR_MEMORY;
-	}
-
-	memset(ctx->preproc, 0, ctx->n_preproc * sizeof(ipecamera_preprocessor_t));
-
-	err = pthread_mutex_init(&ctx->preproc_mutex, NULL);
-	if (err) {
-	    ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	    pcilib_error("Failed to initialize event mutex");
-	    return PCILIB_ERROR_FAILED;
-	}
-	ctx->preproc_mutex_destroy = 1;
-	
-
-	ctx->run_preprocessors = 1;
-	for (i = 0; i < ctx->n_preproc; i++) {
-	    ctx->preproc[i].i = i;
-	    ctx->preproc[i].ipecamera = ctx;
-	    err = pthread_create(&ctx->preproc[i].thread, NULL, ipecamera_preproc_thread, ctx->preproc + i);
-	    if (err) {
-		err = PCILIB_ERROR_FAILED;
-		break;
-	    } else {
-		ctx->preproc[i].started = 1;
-	    }
-	}
-	
-	if (err) {
-	    ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	    pcilib_error("Failed to schedule some of the preprocessor threads");
-	    return err;
-	}
-    } else {
-	ctx->n_preproc = 0;
-    }
-
-    ctx->started = 1;
-    ctx->run_reader = 1;
-
-    pthread_attr_init(&attr);
-
-    if (pthread_attr_setschedpolicy(&attr, SCHED_FIFO)) {
-	pcilib_warning("Can't schedule a real-time thread, you may consider running as root");
-    } else {
-	sched.sched_priority = sched_get_priority_max(SCHED_FIFO) - 1;	// Let 1 priority for something really critcial
-	pthread_attr_setschedparam(&attr, &sched);
-    }
-
-    if (pthread_create(&ctx->rthread, &attr, &ipecamera_reader_thread, (void*)ctx)) {
-	ctx->started = 0;
-	ipecamera_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	err = PCILIB_ERROR_FAILED;
-    }
-    
-    pthread_attr_destroy(&attr);    
-
-    return err;
-}
-
-
-int ipecamera_stop(pcilib_context_t *vctx, pcilib_event_flags_t flags) {
-    int i;
-    int err;
-    void *retcode;
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-
-    if (!ctx) {
-	pcilib_error("IPECamera imaging is not initialized");
-	return PCILIB_ERROR_NOTINITIALIZED;
-    }
-
-    if (flags&PCILIB_EVENT_FLAG_STOP_ONLY) {
-	ctx->run_reader = 0;
-	return 0;
-    }
-
-    if (ctx->started) {
-	ctx->run_reader = 0;
-	err = pthread_join(ctx->rthread, &retcode);
-	if (err) pcilib_error("Error joining the reader thread");
-    }
-    
-    if (ctx->preproc) {
-	ctx->run_preprocessors = 0;
-	
-	for (i = 0; i < ctx->n_preproc; i++) {
-	    if (ctx->preproc[i].started) {
-		pthread_join(ctx->preproc[i].thread, &retcode);
-		ctx->preproc[i].started = 0;
-	    }
-	}
-
-	if (ctx->preproc_mutex_destroy) {
-	    pthread_mutex_destroy(&ctx->preproc_mutex);
-	    ctx->preproc_mutex_destroy = 0;
-	}
-	
-	free(ctx->preproc);
-	ctx->preproc = NULL;
-    }
-    
-    if (ctx->frame_mutex_destroy) {
-	for (i = 0; i < ctx->frame_mutex_destroy; i++) {
-	    pthread_rwlock_destroy(&ctx->frame[i].mutex);
-	}
-	ctx->frame_mutex_destroy = 0;
-    }
-    
-
-    if (ctx->wdma != PCILIB_DMA_ENGINE_INVALID) {
-	pcilib_stop_dma(vctx->pcilib, ctx->wdma, PCILIB_DMA_FLAGS_DEFAULT);
-	ctx->wdma = PCILIB_DMA_ENGINE_INVALID;
-    }
-
-    if (ctx->rdma != PCILIB_DMA_ENGINE_INVALID) {
-	pcilib_stop_dma(vctx->pcilib, ctx->rdma, PCILIB_DMA_FLAGS_DEFAULT);
-	ctx->rdma = PCILIB_DMA_ENGINE_INVALID;
-    }
-
-    while (ctx->streaming) {
-        usleep(IPECAMERA_NOFRAME_SLEEP);
-    }
-
-    if (ctx->ipedec) {
-	ufo_decoder_free(ctx->ipedec);
-	ctx->ipedec = NULL;
-    }
-
-    if (ctx->frame) {
-	free(ctx->frame);
-	ctx->frame = NULL;
-    }
-
-    if (ctx->cmask) {
-	free(ctx->cmask);
-	ctx->cmask = NULL;
-    }
-
-    if (ctx->image) {
-	free(ctx->image);
-	ctx->image = NULL;
-    }
-
-    if (ctx->buffer) {
-	free(ctx->buffer);
-	ctx->buffer = NULL;
-    }
-    
-
-    memset(&ctx->autostop, 0, sizeof(ipecamera_autostop_t));
-
-    ctx->event_id = 0;
-    ctx->reported_id = 0;
-    ctx->buffer_pos = 0; 
-    ctx->started = 0;
-
-    return 0;
-}
-
-
-int ipecamera_trigger(pcilib_context_t *vctx, pcilib_event_t event, size_t trigger_size, void *trigger_data) {
-    int err = 0;
-    pcilib_register_value_t value;
-
-    ipecamera_t *ctx = (ipecamera_t*)vctx;
-    pcilib_t *pcilib = vctx->pcilib;
-
-    if (!ctx) {
-	pcilib_error("IPECamera imaging is not initialized");
-	return PCILIB_ERROR_NOTINITIALIZED;
-    }
-
-    if (!ctx->firmware) {
-	pcilib_error("Unsupported version of firmware (%lu)", ctx->firmware);
-	return PCILIB_ERROR_INVALID_REQUEST;
-    }
-
-    pcilib_sleep_until_deadline(&ctx->next_trigger);
-
-    GET_REG(num_frames_reg, value);
-    if (value == ctx->max_frames) {
-	return PCILIB_ERROR_BUSY;
-    }
-/*
-    do {
-	usleep(10);
-	GET_REG(status3_reg, value);
-    } while (value&0x20000000);
-*/
-
-    GET_REG(control_reg, value); 
-    SET_REG(control_reg, value|IPECAMERA_FRAME_REQUEST);
-    usleep(IPECAMERA_WAIT_FRAME_RCVD_TIME);
-    //CHECK_REG(status_reg, IPECAMERA_EXPECTED_STATUS);
-    SET_REG(control_reg, value);
-
-
-    pcilib_calc_deadline(&ctx->next_trigger, IPECAMERA_NEXT_FRAME_DELAY);
-
-    return 0;
-}

ipecamera/ipecamera.h

@@ -1,38 +0,0 @@
-#ifndef _IPECAMERA_H
-#define _IPECAMERA_H
-
-#include <ufodecode.h>
-
-typedef struct ipecamera_s ipecamera_t;
-
-typedef  struct {
-    unsigned int bpp;			/*<< Bits per pixel (8, 16, or 32) as returned by IPECAMERA_IMAGE_DATA */
-    unsigned int real_bpp;		/*<< Bits per pixel as returned by camera and IPECAMERA_PACKED_IMAGE */
-    unsigned int width, height;
-} ipecamera_image_dimensions_t;
-
-typedef enum {
-    IPECAMERA_IMAGE_DATA = 0,
-    IPECAMERA_RAW_DATA = 1,
-    IPECAMERA_DIMENSIONS = 0x8000,
-    IPECAMERA_IMAGE_REGION = 0x8010,
-    IPECAMERA_PACKED_IMAGE = 0x8020,
-    IPECAMERA_PACKED_LINE = 0x8021,
-    IPECAMERA_PACKED_PAYLOAD = 0x8022,
-    IPECAMERA_CHANGE_MASK = 0x8030
-} ipecamera_data_type_t;
-
-typedef uint16_t ipecamera_change_mask_t;
-typedef uint16_t ipecamera_pixel_t;
-
-typedef struct {
-    pcilib_event_info_t info;
-    UfoDecoderMeta meta;	/**< Frame metadata declared in ufodecode.h */
-    int image_ready;		/**< Indicates if image data is parsed */
-    int image_broken;		/**< Unlike the info.flags this is bound to the reconstructed image (i.e. is not updated on rawdata overwrite) */
-    size_t raw_size;		/**< Indicates the actual size of raw data */
-} ipecamera_event_info_t;
-
-int ipecamera_set_buffer_size(ipecamera_t *ctx, int size);
-
-#endif /* _IPECAMERA_H */

ipecamera/model.c

@@ -1,211 +0,0 @@
-#define _BSD_SOURCE
-#define _IPECAMERA_MODEL_C
-#include <sys/time.h>
-#include <unistd.h>
-#include <assert.h>
-
-#include "../tools.h"
-#include "../error.h"
-#include "model.h"
-
-#define ADDR_MASK 0x7F00
-#define WRITE_BIT 0x8000
-#define RETRIES 10
-
-//ToDo: check bot 1 and 2 bits for READY
-#define READ_READY_BIT 0x20000
-#define READ_ERROR_BIT 0x40000
-
-#define ipecamera_datacpy(dst, src, bank)   pcilib_datacpy(dst, src, 4, 1, bank->raw_endianess)
-
-//#define IPECAMERA_SIMPLIFIED_READOUT
-#define IPECAMERA_MULTIREAD
-
-//static pcilib_register_value_t ipecamera_bit_mask[9] = { 0, 1, 3, 7, 15, 31, 63, 127, 255 };
-
-int ipecamera_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t *value) {
-    uint32_t val, tmp[4];
-    char *wr, *rd;
-    struct timeval start;//, cur;
-    int retries = RETRIES;
-
-    assert(addr < 128);
-    
-    wr =  pcilib_resolve_register_address(ctx, bank->bar, bank->write_addr);
-    rd =  pcilib_resolve_register_address(ctx, bank->bar, bank->read_addr);
-    if ((!rd)||(!wr)) {
-	pcilib_error("Error resolving addresses of read & write registers");
-	return PCILIB_ERROR_INVALID_ADDRESS;
-    }
-
-    //printf("%i %x %p %p\n", addr,  val, wr, rd);
-
-/*
-#ifdef IPECAMERA_SIMPLIFIED_READOUT
-    ipecamera_datacpy(tmp, rd, bank);
-#endif
-*/
-
-retry:
-    val = (addr << 8);
-
-    ipecamera_datacpy(wr, &val, bank);
-
-#ifdef IPECAMERA_SIMPLIFIED_READOUT
-    usleep(PCILIB_REGISTER_TIMEOUT);
-//    ipecamera_datacpy(tmp, rd, bank);
-//    usleep(PCILIB_REGISTER_TIMEOUT);
-    ipecamera_datacpy(wr, &val, bank);
-    usleep(PCILIB_REGISTER_TIMEOUT);
-//    ipecamera_datacpy(tmp, rd, bank);
-//    usleep(PCILIB_REGISTER_TIMEOUT);
-    ipecamera_datacpy(wr, &val, bank);
-    usleep(PCILIB_REGISTER_TIMEOUT);
-#endif /* IPECAMERA_SIMPLIFIED_READOUT */
-    
-    gettimeofday(&start, NULL);
-
-#ifdef IPECAMERA_MULTIREAD
-    usleep(PCILIB_REGISTER_TIMEOUT);
-    pcilib_datacpy(tmp, rd, 4, 4, bank->raw_endianess);
-    val = tmp[0];
-#else /* IPECAMERA_MULTIREAD */
-    ipecamera_datacpy(&val, rd, bank);
-
-    while ((val & READ_READY_BIT) == 0) {
-        gettimeofday(&cur, NULL);
-	if (((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) > PCILIB_REGISTER_TIMEOUT) break;
-	
-	ipecamera_datacpy(&val, rd, bank);
-    }
-#endif /* IPECAMERA_MULTIREAD */
-
-    if ((val & READ_READY_BIT) == 0) {
-	if (--retries > 0) {
-	    pcilib_warning("Timeout reading register value (CMOSIS %lu, status: %lx), retrying (try %i of %i)...", addr, val, RETRIES - retries, RETRIES);
-	    goto retry;
-	}
-	pcilib_error("Timeout reading register value (CMOSIS %lu, status: %lx)", addr, val);
-	return PCILIB_ERROR_TIMEOUT;
-    }
-    
-    if (val & READ_ERROR_BIT) {
-/*	if (--retries > 0) {
-	    pcilib_warning("Error reading register (CMOSIS %lu, status: %lx), retrying (try %i of %i)...", addr, val, RETRIES - retries, RETRIES);
-	    goto retry;
-	}*/
-	pcilib_error("Error reading register value (CMOSIS %lu, status: %lx)", addr, val);
-	return PCILIB_ERROR_FAILED;
-    }
-
-    if (((val&ADDR_MASK) >> 8) != addr) {
-	if (--retries > 0) {
-	    pcilib_warning("Address verification failed during register read (CMOSIS %lu, status: %lx), retrying (try %i of %i)...", addr, val, RETRIES - retries, RETRIES);
-	    goto retry;
-	}
-	pcilib_error("Address verification failed during register read (CMOSIS %lu, status: %lx)", addr, val);
-	return PCILIB_ERROR_VERIFY;
-    }
-
-//    *value = val&ipecamera_bit_mask[bits];
-    *value = val&0xFF;
-
-    return 0;
-}
-
-int ipecamera_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t value) {
-    uint32_t val, tmp[4];
-    char *wr, *rd;
-    struct timeval start;//, cur;
-    int retries = RETRIES;
-
-    assert(addr < 128);
-    assert(value < 256);
-    
-    wr =  pcilib_resolve_register_address(ctx, bank->bar, bank->write_addr);
-    rd =  pcilib_resolve_register_address(ctx, bank->bar, bank->read_addr);
-    if ((!rd)||(!wr)) {
-	pcilib_error("Error resolving addresses of read & write registers");
-	return PCILIB_ERROR_INVALID_ADDRESS;
-    }
-
-    //printf("%i %x %p %p\n", addr,  val, wr, rd);
-
-/*
-#ifdef IPECAMERA_SIMPLIFIED_READOUT
-    ipecamera_datacpy(tmp, rd, bank);
-#endif
-*/
-
-retry:
-    val = WRITE_BIT|(addr << 8)|(value&0xFF);
-    ipecamera_datacpy(wr, &val, bank);
-
-#ifdef IPECAMERA_SIMPLIFIED_READOUT
-    usleep(PCILIB_REGISTER_TIMEOUT);
-//    ipecamera_datacpy(tmp, rd, bank);
-//    usleep(PCILIB_REGISTER_TIMEOUT);
-    ipecamera_datacpy(wr, &val, bank);
-    usleep(PCILIB_REGISTER_TIMEOUT);
-//    ipecamera_datacpy(tmp, rd, bank);
-//    usleep(PCILIB_REGISTER_TIMEOUT);
-    ipecamera_datacpy(wr, &val, bank);
-    usleep(PCILIB_REGISTER_TIMEOUT);
-#endif /* IPECAMERA_SIMPLIFIED_READOUT */
-
-    gettimeofday(&start, NULL);
-
-#ifdef IPECAMERA_MULTIREAD
-    usleep(PCILIB_REGISTER_TIMEOUT);
-    pcilib_datacpy(tmp, rd, 4, 4, bank->raw_endianess);
-    val = tmp[0];
-#else /* IPECAMERA_MULTIREAD */
-    ipecamera_datacpy(&val, rd, bank);
-    while ((val & READ_READY_BIT) == 0) {
-        gettimeofday(&cur, NULL);
-	if (((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) > PCILIB_REGISTER_TIMEOUT) break;
-	
-	ipecamera_datacpy(&val, rd, bank);
-    }
-#endif /* IPECAMERA_MULTIREAD */
-
-    if ((val & READ_READY_BIT) == 0) {
-	if (--retries > 0) {
-	    pcilib_warning("Timeout occured during register write (CMOSIS %lu, value: %lu, status: %lx), retrying (try %i of %i)...", addr, value, val, RETRIES - retries, RETRIES);
-	    goto retry;
-	}
-
-	pcilib_error("Timeout writting register value (CMOSIS %lu, value: %lu, status: %lx)", addr, value, val);
-	return PCILIB_ERROR_TIMEOUT;
-    }
-    
-    if (val & READ_ERROR_BIT) {
-/*	if (--retries > 0) {
-	    pcilib_warning("Register write has failed (CMOSIS %lu, value: %lu, status: %lx), retrying (try %i of %i)...", addr, value, val, RETRIES - retries, RETRIES);
-	    goto retry;
-	}*/
-	pcilib_error("Error writting register value (CMOSIS %lu, value: %lu, status: %lx)", addr, value, val);
-	return PCILIB_ERROR_FAILED;
-    }
-
-    if (((val&ADDR_MASK) >> 8) != addr) {
-	if (--retries > 0) {
-	    pcilib_warning("Address verification failed during register write (CMOSIS %lu, value: %lu, status: %lx), retrying (try %i of %i)...", addr, value, val, RETRIES - retries, RETRIES);
-	    goto retry;
-	}
-	pcilib_error("Address verification failed during register write (CMOSIS %lu, value: %lu, status: %lx)", addr, value, val);
-	return PCILIB_ERROR_VERIFY;
-    }
-    
-    if ((val&0xFF/*&ipecamera_bit_mask[bits]*/) != value) {
-	pcilib_error("Value verification failed during register read (CMOSIS %lu, value: %lu != %lu)", addr, val/*&ipecamera_bit_mask[bits]*/, value);
-	return PCILIB_ERROR_VERIFY;
-    }
-
-    //printf("%i\n", val&ipecamera_bit_mask[bits]);
-
-    return 0;
-}
-
-
-

ipecamera/model.h

@@ -1,179 +0,0 @@
-#ifndef _IPECAMERA_MODEL_H
-#define _IPECAMERA_MODEL_H
-
-#include <stdio.h>
-
-#include "../pcilib.h"
-#include "public.h"
-
-//#define IPECAMERA_DEBUG
-
-#define IPECAMERA_DMA_R3
-#define IPECAMERA_DMA_ADDRESS 1
-#define IPECAMERA_DMA_PACKET_LENGTH 4096
-
-//#define IPECAMERA_REGISTER_SPACE 0xfeaffc00
-#define IPECAMERA_REGISTER_SPACE 0x9000
-#define IPECAMERA_REGISTER_WRITE (IPECAMERA_REGISTER_SPACE + 0)
-#define IPECAMERA_REGISTER_READ (IPECAMERA_REGISTER_WRITE + 16)
-
-#ifdef _IPECAMERA_MODEL_C
-pcilib_register_bank_description_t ipecamera_register_banks[] = {
-    { PCILIB_REGISTER_BANK0,    PCILIB_BAR0,    128, IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ , IPECAMERA_REGISTER_WRITE, PCILIB_LITTLE_ENDIAN, 8 , PCILIB_LITTLE_ENDIAN, "%lu"  , "cmosis", "CMOSIS CMV2000 Registers" },
-    { PCILIB_REGISTER_BANK1,    PCILIB_BAR0, 0x0200, PCILIB_DEFAULT_PROTOCOL    , IPECAMERA_REGISTER_SPACE, IPECAMERA_REGISTER_SPACE, PCILIB_LITTLE_ENDIAN, 32, PCILIB_LITTLE_ENDIAN, "0x%lx", "fpga", "IPECamera Registers" },
-    { PCILIB_REGISTER_BANK_DMA, PCILIB_BAR0, 0xA000, PCILIB_DEFAULT_PROTOCOL    , 0,                        0,                        PCILIB_LITTLE_ENDIAN, 32, PCILIB_LITTLE_ENDIAN, "0x%lx", "dma", "DMA Registers"},
-    { 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL }
-};
-
-pcilib_register_description_t ipecamera_registers[] = {
-{1, 	0, 	16, 	1088, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines",  ""},
-{3, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_start1", ""},
-{5, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_start2", ""},
-{7, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_start3", ""},
-{9, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_start4", ""},
-{11,	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_start5", ""},
-{13, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_start6", ""},
-{15, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_start7", ""},
-{17, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_start8", ""},
-{19, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines1", ""},
-{21, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines2", ""},
-{23, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines3", ""},
-{25, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines4", ""},
-{27, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines5", ""},
-{29, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines6", ""},
-{31, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines7", ""},
-{33, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_lines8", ""},
-{35, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_sub_s", ""},
-{37, 	0, 	16, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_sub_a", ""},
-{39, 	0, 	1, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_color", ""},
-{40, 	0, 	2, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_image_flipping", ""},
-{41, 	0, 	2, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_flags", ""},
-{42, 	0, 	24, 	1088, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_time", ""},
-{45, 	0, 	24, 	1088, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_step", ""},
-{48, 	0, 	24, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_kp1", ""},
-{51, 	0, 	24, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_kp2", ""},
-{54, 	0, 	2, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_nr_slopes", ""},
-{55, 	0, 	8, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_seq", ""},
-{56, 	0, 	24, 	1088, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_time2", ""},
-{59, 	0, 	24, 	1088, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_step2", ""},
-{68, 	0, 	2, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_nr_slopes2", ""},
-{69, 	0, 	8, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_exp_seq2", ""},
-{70, 	0, 	16, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_number_frames", ""},
-{72, 	0, 	2, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_output_mode", ""},
-{78, 	0, 	12, 	85, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_training_pattern", ""},
-{80, 	0, 	18, 	0x3FFFF,0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_channel_en", ""},
-{82, 	0, 	3, 	7, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_special_82", ""},
-{89, 	0, 	8, 	96, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_vlow2", ""},
-{90, 	0, 	8, 	96, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_vlow3", ""},
-{100, 	0, 	14, 	16260, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_offset", ""},
-{102, 	0, 	2, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_pga", ""},
-{103, 	0, 	8, 	32, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_adc_gain", ""},
-{111, 	0, 	1, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_bit_mode", ""},
-{112, 	0, 	2, 	0, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_adc_resolution", ""},
-{115, 	0, 	1, 	1, 	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "cmosis_special_115", ""},
-/*{126, 	0, 	16, 	0,                        	PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK0, "temp", ""},*/
-{0x00,	0, 	32,	0,	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "spi_conf_input", ""},
-{0x10,	0, 	32,	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "spi_conf_output", ""},
-{0x20,	0, 	32,	0,	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "spi_clk_speed", ""},
-{0x30,	0, 	32,	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "firmware_info", ""},
-{0x30, 	0, 	8, 	0, 	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "firmware_version",  ""},
-{0x30, 	8, 	1, 	0, 	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "firmware_bitmode",  ""},
-{0x30, 	12, 	2, 	0, 	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "adc_resolution",  ""},
-{0x30, 	16, 	2, 	0, 	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "output_mode",  ""},
-{0x40,	0, 	32, 	0,	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "control", ""},
-{0x50,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "status", ""},
-{0x54,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "status2", ""},
-{0x58,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "status3", ""},
-{0x5c,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "fr_status", ""},
-{0x70,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "start_address", ""},
-{0x74,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "end_address", ""},
-{0x78,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "rd_address", ""},
-{0xa0,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "fr_param1", ""},
-{0xa0, 	0, 	10, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "fr_skip_lines",  ""},
-{0xa0, 	10, 	11, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "fr_num_lines",  ""},
-{0xa0, 	21, 	11, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "fr_start_address",  ""},
-{0xb0,	0, 	32, 	0,	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "fr_param2", ""},
-{0xb0, 	0, 	11, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "fr_threshold_start_line",  ""},
-{0xb0, 	16, 	10, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "fr_area_lines",  ""},
-{0xc0,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "skiped_lines", ""},
-{0xd0,	0, 	32, 	0,	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "fr_thresholds", ""},
-{0xd0,	0, 	10, 	0,	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "fr_pixel_thr", ""},
-{0xd0,	10, 	11, 	0,	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "fr_num_pixel_thr", ""},
-{0xd0,	21, 	11, 	0,	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "fr_num_lines_thr", ""},
-{0x100,	0, 	32, 	0,	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "rawdata_pkt_addr", ""},
-{0x110,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "temperature_info", ""},
-{0x110,	0, 	16, 	0, 	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "sensor_temperature",  ""},
-{0x110,	16, 	3, 	0, 	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "sensor_temperature_alarms",  ""},
-{0x110,	19, 	10, 	0, 	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "fpga_temperature",  ""},
-{0x110,	29, 	3, 	0, 	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "fpga_temperature_alarms",  ""},
-{0x120,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "num_lines", ""},
-{0x130,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "start_line", ""},
-{0x140,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "exp_time", ""},
-{0x150,	0, 	32, 	0,	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "motor", ""},
-{0x150,	0, 	5, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "motor_phi",  ""},
-{0x150,	5, 	5, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "motor_z",  ""},
-{0x150,	10, 	5, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "motor_y",  ""},
-{0x150,	15, 	5, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "motor_x",  ""},
-{0x150,	20, 	8, 	0, 	PCILIB_REGISTER_ALL_BITS, PCILIB_REGISTER_R,  PCILIB_REGISTER_BITS,     PCILIB_REGISTER_BANK1, "adc_gain",  ""},
-{0x160,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "write_status", ""},
-{0x170,	0, 	32, 	0,	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "num_triggers", ""},
-{0x180,	0, 	32, 	0x280,	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "trigger_period", ""},
-{0x190,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "temperature_sample_period", ""},
-{0x1a0,	0, 	32, 	0x64,	0,                        PCILIB_REGISTER_RW, PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "ddr_max_frames", ""},
-{0x1b0,	0, 	32, 	0,	0,                        PCILIB_REGISTER_R,  PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK1, "ddr_num_frames", ""},
-{0,	0,	0,	0,	0,                        0,                  0,                        0,                     NULL, NULL}
-};
-
-pcilib_register_range_t ipecamera_register_ranges[] = {
-    {0, 	128, 	PCILIB_REGISTER_BANK0, 0},
-    {0x9000,	0x9FFF,	PCILIB_REGISTER_BANK1, -0x9000},
-    {0, 0, 0, 0}
-};
-
-pcilib_event_description_t ipecamera_events[] = {
-    {PCILIB_EVENT0, "new_frame", ""},
-    {0, NULL, NULL}
-};
-
-pcilib_event_data_type_description_t ipecamera_data_types[] = {
-    {IPECAMERA_IMAGE_DATA, PCILIB_EVENT0, "image", "16 bit pixel data" },
-    {IPECAMERA_RAW_DATA, PCILIB_EVENT0, "raw", "raw data from camera" },
-    {IPECAMERA_CHANGE_MASK, PCILIB_EVENT0, "cmask", "change mask" },
-    {0, 0, NULL, NULL}
-};
-
-#else
-extern pcilib_register_description_t ipecamera_registers[];
-extern pcilib_register_bank_description_t ipecamera_register_banks[];
-extern pcilib_register_range_t ipecamera_register_ranges[];
-extern pcilib_event_description_t ipecamera_events[];
-extern pcilib_event_data_type_description_t ipecamera_data_types[];
-#endif 
-
-#ifdef _IPECAMERA_IMAGE_C
-pcilib_event_api_description_t ipecamera_image_api = {
-    "ipecamera",
-    
-    ipecamera_init,
-    ipecamera_free,
-
-    ipecamera_init_dma,
-
-    ipecamera_reset,
-    ipecamera_start,
-    ipecamera_stop,
-    ipecamera_trigger,
-    
-    ipecamera_stream,
-    ipecamera_next_event,
-    ipecamera_get,
-    ipecamera_return
-};
-#else
-extern pcilib_event_api_description_t ipecamera_image_api;
-#endif
-
-int ipecamera_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t *value);
-int ipecamera_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t value);
-
-#endif /* _IPECAMERA_MODEL_H */

ipecamera/private.h

@@ -1,149 +0,0 @@
-#ifndef _IPECAMERA_PRIVATE_H
-#define _IPECAMERA_PRIVATE_H
-
-#include "ipecamera.h"
-
-#define IPECAMERA_BUG_EXTRA_DATA
-#define IPECAMERA_BUG_MULTIFRAME_PACKETS
-//#define IPECAMERA_BUG_INCOMPLETE_PACKETS
-//#define IPECAMERA_BUG_POSTPONED_READ
-//#define IPECAMERA_DEBUG_RAW_PACKETS		"/mnt/fast/frames"
-
-//#define IPECAMERA_ANNOUNCE_READY		//**< announce new event only after the reconstruction is done */
-
-#define IPECAMERA_DEFAULT_BUFFER_SIZE 64  	//**< should be power of 2 */
-#define IPECAMERA_RESERVE_BUFFERS 2		//**< Return Frame is Lost error, if requested frame will be overwritten after specified number of frames
-#define IPECAMERA_SLEEP_TIME 250000 		//**< Michele thinks 250 should be enough, but reset failing in this case */
-#define IPECAMERA_NEXT_FRAME_DELAY 1000 	//**< Michele requires 30000 to sync between End Of Readout and next Frame Req */
-#define IPECAMERA_WAIT_FRAME_RCVD_TIME 0 	//**< by Uros ,wait 6 ms */
-#define IPECAMERA_NOFRAME_SLEEP 100
-#define IPECAMERA_NOFRAME_PREPROC_SLEEP 100
-
-//#define IPECAMERA_MAX_LINES 1088
-#define IPECAMERA_MAX_LINES 2048
-#define IPECAMERA_EXPECTED_STATUS_4 0x08409FFFF
-#define IPECAMERA_EXPECTED_STATUS 0x08449FFFF
-
-#define IPECAMERA_END_OF_SEQUENCE 0x1F001001
-
-#define IPECAMERA_MAX_CHANNELS 16
-#define IPECAMERA_PIXELS_PER_CHANNEL 128
-#define IPECAMERA_WIDTH (IPECAMERA_MAX_CHANNELS * IPECAMERA_PIXELS_PER_CHANNEL)
-
-#define IPECAMERA_FRAME_REQUEST 		0x1E9
-#define IPECAMERA_READOUT_FLAG			0x200
-#define IPECAMERA_READOUT			0x3E1
-#define IPECAMERA_IDLE 				0x1E1
-#define IPECAMERA_START_INTERNAL_STIMULI 	0x1F1
-
-#define IPECAMERA_MODE_16_CHAN_IO		0
-#define IPECAMERA_MODE_4_CHAN_IO		2
-
-#define IPECAMERA_MODE_12_BIT_ADC		2
-#define IPECAMERA_MODE_11_BIT_ADC		1
-#define IPECAMERA_MODE_10_BIT_ADC		0
-
-typedef uint32_t ipecamera_payload_t;
-
-typedef struct {
-    pcilib_event_id_t evid;
-    struct timeval timestamp;
-} ipecamera_autostop_t;
-
-typedef struct {
-    size_t i;
-    pthread_t thread;
-    ipecamera_t *ipecamera;
-    
-    int started;			/**< flag indicating that join & cleanup is required */
-} ipecamera_preprocessor_t;
-
-
-typedef struct {
-    ipecamera_event_info_t event;	/**< this structure is overwritten by the reader thread, we need a copy */
-    pthread_rwlock_t mutex;		/**< this mutex protects reconstructed buffers only, the raw data, event_info, etc. will be overwritten by reader thread anyway */
-} ipecamera_frame_t;
-
-struct ipecamera_s {
-    pcilib_context_t event;
-    UfoDecoder *ipedec;
-
-    char *data;
-    ipecamera_pixel_t *image;
-    size_t size;
-
-    pcilib_event_callback_t cb;
-    void *cb_user;
-
-    volatile pcilib_event_id_t event_id;
-    volatile pcilib_event_id_t preproc_id;
-    pcilib_event_id_t reported_id;
-    
-    pcilib_dma_engine_t rdma, wdma;
-
-    pcilib_register_t packet_len_reg;
-    pcilib_register_t control_reg, status_reg;
-    pcilib_register_t status3_reg;
-    pcilib_register_t n_lines_reg;
-    uint16_t line_reg;
-    pcilib_register_t exposure_reg;
-    pcilib_register_t flip_reg;
-
-    pcilib_register_t firmware_version_reg;
-    pcilib_register_t adc_resolution_reg;
-    pcilib_register_t output_mode_reg;
-    
-    pcilib_register_t max_frames_reg;
-    pcilib_register_t num_frames_reg;
-
-    int started;		/**< Camera is in grabbing mode (start function is called) */
-    int streaming;		/**< Camera is in streaming mode (we are within stream call) */
-    int parse_data;		/**< Indicates if some processing of the data is required, otherwise only rawdata_callback will be called */
-
-    volatile int run_reader;		/**< Instructs the reader thread to stop processing */
-    volatile int run_streamer;		/**< Indicates request to stop streaming events and can be set by reader_thread upon exit or by user request */
-    volatile int run_preprocessors;	/**< Instructs preprocessors to exit */
-    
-    ipecamera_autostop_t autostop;
-
-    struct timeval autostop_time;
-    struct timeval next_trigger;	/**< The minimal delay between trigger signals is mandatory, this indicates time when next trigger is possible */
-
-    size_t buffer_size;		/**< How many images to store */
-    size_t buffer_pos;		/**< Current image offset in the buffer, due to synchronization reasons should not be used outside of reader_thread */
-    size_t cur_size;		/**< Already written part of data in bytes */
-    size_t raw_size;		/**< Size of raw data in bytes */
-    size_t full_size;		/**< Size of raw data including the padding */
-    size_t padded_size;		/**< Size of buffer for raw data, including the padding for performance */
-    size_t cur_raw_size;	/**< Size of raw data in bytes */
-    size_t cur_full_size;	/**< Size of raw data including the padding */
-    size_t cur_padded_size;	/**< Size of buffer for raw data, including the padding for performance */
-    
-    size_t image_size;		/**< Size of a single image in bytes */
-    
-    size_t max_frames;		/**< Maximal number of frames what may be buffered in camera DDR memory */
-    int firmware;		/**< Firmware version */
-    int fr_mode;		/**< Fast Reject mode */
-    int cmosis_outputs;		/**< Number of active cmosis outputs: 4 or 16 */
-    int width, height;
-
-    
-//    void *raw_buffer;
-    void *buffer;
-    ipecamera_change_mask_t *cmask;
-    ipecamera_frame_t *frame;
-    
-
-    ipecamera_image_dimensions_t dim;
-
-    pthread_t rthread;
-    
-    size_t n_preproc;
-    ipecamera_preprocessor_t *preproc;
-    pthread_mutex_t preproc_mutex;
-    
-    int preproc_mutex_destroy;
-    int frame_mutex_destroy;
-};
-
-#endif /* _IPECAMERA_PRIVATE_H */

ipecamera/public.h

@@ -1,25 +0,0 @@
-#ifndef _IPECAMERA_PUBLIC_H
-#define _IPECAMERA_PUBLIC_H
-
-#include <stdio.h>
-
-#include "ipecamera.h"
-#include "../pcilib.h"
-
-
-pcilib_context_t *ipecamera_init(pcilib_t *pcilib);
-void ipecamera_free(pcilib_context_t *ctx);
-
-pcilib_dma_context_t *ipecamera_init_dma(pcilib_context_t *ctx);
-
-int ipecamera_reset(pcilib_context_t *ctx);
-int ipecamera_start(pcilib_context_t *ctx, pcilib_event_t event_mask, pcilib_event_flags_t flags);
-int ipecamera_stop(pcilib_context_t *ctx, pcilib_event_flags_t flags);
-int ipecamera_trigger(pcilib_context_t *ctx, pcilib_event_t event, size_t trigger_size, void *trigger_data);
-int ipecamera_stream(pcilib_context_t *vctx, pcilib_event_callback_t callback, void *user);
-int ipecamera_next_event(pcilib_context_t *vctx, pcilib_timeout_t timeout, pcilib_event_id_t *evid, size_t info_size, pcilib_event_info_t *info);
-
-int ipecamera_get(pcilib_context_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t arg_size, void *arg, size_t *size, void **buf);
-int ipecamera_return(pcilib_context_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, void *data);
-
-#endif /* _IPECAMERA_PUBLIC_H */

ipecamera/reader.c

@@ -1,268 +0,0 @@
-#define _BSD_SOURCE
-#define _GNU_SOURCE
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <string.h>
-#include <sys/time.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <pthread.h>
-#include <assert.h>
-
-#include <ufodecode.h>
-
-#include "../tools.h"
-#include "../error.h"
-
-#include "pcilib.h"
-#include "model.h"
-#include "private.h"
-#include "reader.h"
-
-
-int ipecamera_compute_buffer_size(ipecamera_t *ctx, size_t lines) {
-    const size_t header_size = 8 * sizeof(ipecamera_payload_t);
-    const size_t footer_size = 8 * sizeof(ipecamera_payload_t);
-
-    size_t line_size, raw_size, padded_blocks;
-
-
-    switch (ctx->firmware) {
-     case 4:
-	line_size = IPECAMERA_MAX_CHANNELS * (2 + IPECAMERA_PIXELS_PER_CHANNEL / 3) * sizeof(ipecamera_payload_t);
-	raw_size = header_size + lines * line_size + footer_size;
-	break;
-     default:
-	line_size = (1 + IPECAMERA_PIXELS_PER_CHANNEL) * 32; 
-	raw_size = header_size + lines * line_size - 32 + footer_size;
-	raw_size *= 16 / ctx->cmosis_outputs;
-    }
-
-    padded_blocks = raw_size / IPECAMERA_DMA_PACKET_LENGTH + ((raw_size % IPECAMERA_DMA_PACKET_LENGTH)?1:0);
-    
-    ctx->cur_raw_size = raw_size;
-    ctx->cur_full_size = padded_blocks * IPECAMERA_DMA_PACKET_LENGTH;
-
-#ifdef IPECAMERA_BUG_EXTRA_DATA
-    ctx->cur_full_size += 8;
-    padded_blocks ++;
-#endif /* IPECAMERA_BUG_EXTRA_DATA */
-
-    ctx->cur_padded_size = padded_blocks * IPECAMERA_DMA_PACKET_LENGTH;
-
-    return 0;
-}
-
-static inline int ipecamera_new_frame(ipecamera_t *ctx) {
-    ctx->frame[ctx->buffer_pos].event.raw_size = ctx->cur_size;
-
-    if (ctx->cur_size < ctx->cur_raw_size) {
-	ctx->frame[ctx->buffer_pos].event.info.flags |= PCILIB_EVENT_INFO_FLAG_BROKEN;
-    }
-    
-    ctx->buffer_pos = (++ctx->event_id) % ctx->buffer_size;
-    ctx->cur_size = 0;
-
-    ctx->frame[ctx->buffer_pos].event.info.type = PCILIB_EVENT0;
-    ctx->frame[ctx->buffer_pos].event.info.flags = 0;
-    ctx->frame[ctx->buffer_pos].event.image_ready = 0;
-
-    if ((ctx->event_id == ctx->autostop.evid)&&(ctx->event_id)) {
-	ctx->run_reader = 0;
-	return 1;
-    }
-	
-    if (pcilib_check_deadline(&ctx->autostop.timestamp, PCILIB_DMA_TIMEOUT)) {
-	ctx->run_reader = 0;
-	return 1;
-    }
-    
-    return 0;
-}
-
-static uint32_t frame_magic[5] = { 0x51111111, 0x52222222, 0x53333333, 0x54444444, 0x55555555 };
-
-static int ipecamera_data_callback(void *user, pcilib_dma_flags_t flags, size_t bufsize, void *buf) {
-    int res;
-    int eof = 0;
-
-#ifdef IPECAMERA_BUG_MULTIFRAME_PACKETS
-    size_t real_size;
-    size_t extra_data = 0;
-#endif /* IPECAMERA_BUG_MULTIFRAME_PACKETS */
-
-    ipecamera_t *ctx = (ipecamera_t*)user;
-
-#if defined(IPECAMERA_BUG_INCOMPLETE_PACKETS)||defined(IPECAMERA_BUG_MULTIFRAME_PACKETS)
-    static  pcilib_event_id_t invalid_frame_id = (pcilib_event_id_t)-1;
-#endif
-
-#ifdef IPECAMERA_DEBUG_RAW_PACKETS
-    char fname[128];
-    { 
-	static unsigned long packet_id = 0;
-	sprintf(fname,"%s/frame%4lu", IPECAMERA_DEBUG_RAW_PACKETS, ctx->event_id);
-	mkdir(fname, 0755);
-	sprintf(fname,"%s/frame%4lu/frame%9lu", IPECAMERA_DEBUG_RAW_PACKETS, ctx->event_id, packet_id);
-	FILE *f = fopen(fname, "w");
-	if (f) {
-	    fwrite(buf, 1, bufsize, f);
-	    fclose(f);
-	}
-	sprintf(fname,"%s/frame%4lu/frame%9lu.invalid", IPECAMERA_DEBUG_RAW_PACKETS, ctx->event_id, packet_id++);
-    }
-#endif /* IPECAMERA_DEBUG_RAW_PACKETS */
-    
-    if (!ctx->cur_size) {
-#if defined(IPECAMERA_BUG_INCOMPLETE_PACKETS)||defined(IPECAMERA_BUG_MULTIFRAME_PACKETS)
-	size_t startpos;
-	for (startpos = 0; (startpos + sizeof(frame_magic)) < bufsize; startpos += sizeof(uint32_t)) {
-	    if (!memcmp(buf + startpos, frame_magic, sizeof(frame_magic))) break;
-	}
-	
-	if ((startpos + sizeof(frame_magic)) >= bufsize) {
-#ifdef IPECAMERA_DEBUG_RAW_PACKETS
-	    FILE *f = fopen(fname, "w");
-	    if (f) fclose(f);
-#endif /* IPECAMERA_DEBUG_RAW_PACKETS */
-	    
-	    if (invalid_frame_id != ctx->event_id) {
-		pcilib_warning("No frame magic in DMA packet of %u bytes, current event %lu", bufsize, ctx->event_id);
-		invalid_frame_id = ctx->event_id;
-	    }
-
-	    return PCILIB_STREAMING_CONTINUE;
-	}
-	
-	if (startpos) {
-		// pass padding to rawdata callback
-	    if (ctx->event.params.rawdata.callback) {
-		res = ctx->event.params.rawdata.callback(0, NULL, PCILIB_EVENT_FLAG_RAW_DATA_ONLY, startpos, buf, ctx->event.params.rawdata.user);
-		if (res <= 0) {
-		    if (res < 0) return res;
-		    ctx->run_reader = 0;
-		}
-	    }
-
-
-	    buf += startpos;
-	    bufsize -= startpos;
-	}
-#endif /* IPECAMERA_BUG_INCOMPLETE_PACKETS */
-
-	if ((bufsize >= 8)&&(!memcmp(buf, frame_magic, sizeof(frame_magic)))) {
-	    size_t n_lines = ((uint32_t*)buf)[5] & 0x7FF;
-	    ipecamera_compute_buffer_size(ctx, n_lines);
-
-	    ctx->frame[ctx->buffer_pos].event.info.seqnum = ((uint32_t*)buf)[6] & 0x1FFFFFF;
-	    ctx->frame[ctx->buffer_pos].event.info.offset = (((uint32_t*)buf)[7] & 0xFFFFFF) * 80;
-
-//	    ctx->frame[ctx->buffer_pos].event.info.seqnum = ctx->event_id + 1;
-
-	    gettimeofday(&ctx->frame[ctx->buffer_pos].event.info.timestamp, NULL);
-	} else {
-//	    pcilib_warning("Frame magic is not found, ignoring broken data...");
-	    return PCILIB_STREAMING_CONTINUE;
-	}
-    }
-
-#ifdef IPECAMERA_BUG_MULTIFRAME_PACKETS
-	// for rawdata_callback with complete padding
-    real_size = bufsize;
-    
-    if (ctx->cur_size + bufsize > ctx->cur_raw_size) {
-        size_t need;
-	
-	for (need = ctx->cur_raw_size - ctx->cur_size; (need + sizeof(frame_magic)) < bufsize; need += sizeof(uint32_t)) {
-	    if (!memcmp(buf + need, frame_magic, sizeof(frame_magic))) break;
-	}
-	
-	if ((need + sizeof(frame_magic)) < bufsize) {
-	    extra_data = bufsize - need;
-	    //bufsize = need;
-	    eof = 1;
-	}
-	
-	    // just rip of padding
-	bufsize = ctx->cur_raw_size - ctx->cur_size;
-
-#ifdef IPECAMERA_DEBUG_RAW_PACKETS
-	sprintf(fname + strlen(fname) - 8, ".partial");
-	FILE *f = fopen(fname, "w");
-	if (f) {
-	    fwrite(buf, 1, bufsize, f);
-	    fclose(f);
-	}
-#endif /* IPECAMERA_DEBUG_RAW_PACKETS */
-    }
-#endif /* IPECAMERA_BUG_MULTIFRAME_PACKETS */
-
-    if (ctx->parse_data) {
-	if (ctx->cur_size + bufsize > ctx->full_size) {
-    	    pcilib_error("Unexpected event data, we are expecting at maximum (%zu) bytes, but (%zu) already read", ctx->full_size, ctx->cur_size + bufsize);
-	    return -PCILIB_ERROR_TOOBIG;
-	}
-
-        memcpy(ctx->buffer + ctx->buffer_pos * ctx->padded_size +  ctx->cur_size, buf, bufsize);
-    }
-
-    ctx->cur_size += bufsize;
-//    printf("%i: %i %i\n", ctx->buffer_pos, ctx->cur_size, bufsize);
-
-    if (ctx->cur_size >= ctx->full_size) eof = 1;
-
-    if (ctx->event.params.rawdata.callback) {
-	res = ctx->event.params.rawdata.callback(ctx->event_id, (pcilib_event_info_t*)(ctx->frame + ctx->buffer_pos), (eof?PCILIB_EVENT_FLAG_EOF:PCILIB_EVENT_FLAGS_DEFAULT), bufsize, buf, ctx->event.params.rawdata.user);
-	if (res <= 0) {
-	    if (res < 0) return res;
-	    ctx->run_reader = 0;
-	}
-    }
-    
-    if (eof) {
-	if ((ipecamera_new_frame(ctx))||(!ctx->run_reader)) {
-	    return PCILIB_STREAMING_STOP;
-	}
-	
-#ifdef IPECAMERA_BUG_MULTIFRAME_PACKETS
-	if (extra_data) {
-	    return ipecamera_data_callback(user, flags, extra_data, buf + (real_size - extra_data));
-	}
-#endif /* IPECAMERA_BUG_MULTIFRAME_PACKETS */
-    }
-
-    return PCILIB_STREAMING_REQ_FRAGMENT;
-}
-
-void *ipecamera_reader_thread(void *user) {
-    int err;
-    ipecamera_t *ctx = (ipecamera_t*)user;
-    
-    while (ctx->run_reader) {
-	err = pcilib_stream_dma(ctx->event.pcilib, ctx->rdma, 0, 0, PCILIB_DMA_FLAG_MULTIPACKET, PCILIB_DMA_TIMEOUT, &ipecamera_data_callback, user);
-	if (err) {
-	    if (err == PCILIB_ERROR_TIMEOUT) {
-		if (ctx->cur_size >= ctx->cur_raw_size) ipecamera_new_frame(ctx);
-#ifdef IPECAMERA_BUG_INCOMPLETE_PACKETS
-		else if (ctx->cur_size > 0) ipecamera_new_frame(ctx);
-#endif /* IPECAMERA_BUG_INCOMPLETE_PACKETS */
-		if (pcilib_check_deadline(&ctx->autostop.timestamp, PCILIB_DMA_TIMEOUT)) {
-		    ctx->run_reader = 0;
-		    break;
-		}
-		usleep(IPECAMERA_NOFRAME_SLEEP);
-	    } else pcilib_error("DMA error while reading IPECamera frames, error: %i", err);
-	} //else printf("no error\n");
-
-	//usleep(1000);
-    }
-    
-    ctx->run_streamer = 0;
-    
-    if (ctx->cur_size)
-	pcilib_error("partialy read frame after stop signal, %zu bytes in the buffer", ctx->cur_size);
-
-    return NULL;
-}

ipecamera/reader.h

@@ -1,8 +0,0 @@
-#ifndef _IPECAMERA_READER_H
-#define _IPECAMERA_READER_H
-
-int ipecamera_compute_buffer_size(ipecamera_t *ctx, size_t lines);
-
-void *ipecamera_reader_thread(void *user);
-
-#endif /* _IPECAMERA_READER_H */

kapture/CMakeLists.txt

@@ -1,9 +0,0 @@
-include_directories(
-    ${CMAKE_SOURCE_DIR}
-    ${UFODECODE_INCLUDE_DIRS}
-)
-
-set(HEADERS ${HEADERS} model.h)
-
-add_library(kapture STATIC kapture.c)
-

kapture/kapture.c

@@ -1,62 +0,0 @@
-#define _KAPTURE_C
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <string.h>
-#include <sys/time.h>
-#include <pthread.h>
-#include <assert.h>
-
-#include "../tools.h"
-#include "../error.h"
-#include "../event.h"
-
-#include "pcilib.h"
-#include "model.h"
-#include "kapture.h"
-#include "private.h"
-
-
-pcilib_context_t *kapture_init(pcilib_t *vctx) {
-    kapture_t *ctx = malloc(sizeof(kapture_t));
-
-    if (ctx) {
-	memset(ctx, 0, sizeof(kapture_t));
-    }
-
-    return ctx;
-}
-
-void kapture_free(pcilib_context_t *vctx) {
-    if (vctx) {
-	kapture_t *ctx = (kapture_t*)vctx;
-	kapture_stop(vctx, PCILIB_EVENT_FLAGS_DEFAULT);
-	free(ctx);
-    }
-}
-
-int kapture_reset(pcilib_context_t *ctx) {
-}
-
-int kapture_start(pcilib_context_t *ctx, pcilib_event_t event_mask, pcilib_event_flags_t flags) {
-}
-
-int kapture_stop(pcilib_context_t *ctx, pcilib_event_flags_t flags) {
-}
-
-int kapture_trigger(pcilib_context_t *ctx, pcilib_event_t event, size_t trigger_size, void *trigger_data) {
-}
-
-int kapture_stream(pcilib_context_t *ctx, pcilib_event_callback_t callback, void *user) {
-}
-
-int kapture_next_event(pcilib_context_t *ctx, pcilib_timeout_t timeout, pcilib_event_id_t *evid, size_t info_size, pcilib_event_info_t *info) {
-}
-
-int kapture_get(pcilib_context_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t arg_size, void *arg, size_t *size, void **data) {
-}
-
-int kapture_return(pcilib_context_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, void *data) {
-}
-
-

kapture/kapture.h

@@ -1,6 +0,0 @@
-#ifndef _KAPTURE_H
-#define _KAPTURE_H
-
-typedef struct kapture_s kapture_t;
-
-#endif /* _KAPTURE_H */

kapture/model.h

@@ -1,81 +0,0 @@
-#ifndef _KAPTURE_MODEL_H
-#define _KAPTURE_MODEL_H
-
-#include <stdio.h>
-
-#include "../pcilib.h"
-
-
-#define KAPTURE_REGISTER_SPACE 0x9000
-
-#ifdef _KAPTURE_C
-pcilib_register_bank_description_t kapture_register_banks[] = {
-//    { PCILIB_REGISTER_BANK0,    PCILIB_BAR0, 0x0200, PCILIB_DEFAULT_PROTOCOL    , KAPTURE_REGISTER_SPACE, KAPTURE_REGISTER_SPACE, PCILIB_LITTLE_ENDIAN, 32, PCILIB_LITTLE_ENDIAN, "0x%lx", "fpga", "KAPTURE Registers" },
-    { PCILIB_REGISTER_BANK_DMA, PCILIB_BAR0, 0x0200, PCILIB_DEFAULT_PROTOCOL    , 0,                        0,                    PCILIB_LITTLE_ENDIAN, 32, PCILIB_LITTLE_ENDIAN, "0x%lx", "dma", "DMA Registers"},
-    { 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL }
-};
-
-pcilib_register_description_t kapture_registers[] = {
-{0,	0,	0,	0,	0,                        0,                  0,                        0,                     NULL, NULL}
-};
-
-pcilib_register_range_t kapture_register_ranges[] = {
-    {0, 0, 0, 0}
-};
-
-pcilib_event_description_t kapture_events[] = {
-    {PCILIB_EVENT0, "event", ""},
-    {0, NULL, NULL}
-};
-
-pcilib_event_data_type_description_t kapture_data_types[] = {
-    {PCILIB_EVENT_RAW_DATA, PCILIB_EVENT0, "raw", "raw data from kapture" },
-    {0, 0, NULL, NULL}
-};
-
-#else
-extern pcilib_register_description_t kapture_registers[];
-extern pcilib_register_bank_description_t kapture_register_banks[];
-extern pcilib_register_range_t kapture_register_ranges[];
-extern pcilib_event_description_t kapture_events[];
-extern pcilib_event_data_type_description_t kapture_data_types[];
-#endif 
-
-
-pcilib_context_t *kapture_init(pcilib_t *pcilib);
-void kapture_free(pcilib_context_t *ctx);
-
-int kapture_reset(pcilib_context_t *ctx);
-int kapture_start(pcilib_context_t *ctx, pcilib_event_t event_mask, pcilib_event_flags_t flags);
-int kapture_stop(pcilib_context_t *ctx, pcilib_event_flags_t flags);
-int kapture_trigger(pcilib_context_t *ctx, pcilib_event_t event, size_t trigger_size, void *trigger_data);
-int kapture_stream(pcilib_context_t *vctx, pcilib_event_callback_t callback, void *user);
-int kapture_next_event(pcilib_context_t *vctx, pcilib_timeout_t timeout, pcilib_event_id_t *evid, size_t info_size, pcilib_event_info_t *info);
-int kapture_get(pcilib_context_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, size_t arg_size, void *arg, size_t *size, void **buf);
-int kapture_return(pcilib_context_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, void *data);
-
-#ifdef _KAPTURE_C
-pcilib_event_api_description_t kapture_api = {
-    "kapture",
-    
-    kapture_init,
-    kapture_free,
-
-    NULL,
-
-    kapture_reset,
-    kapture_start,
-    kapture_stop,
-    kapture_trigger,
-    
-    kapture_stream,
-    kapture_next_event,
-    kapture_get,
-    kapture_return
-};
-#else
-extern pcilib_event_api_description_t kapture_api;
-#endif
-
-
-#endif /* _KAPTURE_MODEL_H */

kapture/private.h

@@ -1,10 +0,0 @@
-#ifndef _KAPTURE_PRIVATE_H
-#define _KAPTURE_PRIVATE_H
-
-struct kapture_s {
-    pcilib_context_t event;
-
-};
-
-
-#endif /* _KAPTURE_PRIVATE_H */

kmem.c

@@ -20,7 +20,7 @@
 int pcilib_clean_kernel_memory(pcilib_t *ctx, pcilib_kmem_use_t use, pcilib_kmem_flags_t flags) {
     kmem_handle_t kh = {0};
     kh.use = use;
-    kh.flags = flags|KMEM_FLAG_MASS;
+    kh.flags = flags|PCILIB_KMEM_FLAG_MASS;
 
     return ioctl(ctx->handle, PCIDRIVER_IOC_KMEM_FREE, &kh);
 }

kmem.h

@@ -1,19 +1,49 @@
 #ifndef _PCILIB_KMEM_H
 #define _PCILIB_KMEM_H
 
-#include "pcilib.h"
-
+typedef struct pcilib_s pcilib_t;
 typedef struct pcilib_kmem_list_s pcilib_kmem_list_t;
 
-#include "tools.h"
+typedef enum {
+    PCILIB_TRISTATE_NO = 0,
+    PCILIB_TRISTATE_PARTIAL = 1,
+    PCILIB_TRISTATE_YES = 2
+} pcilib_tristate_t;
+
+#define PCILIB_KMEM_TYPE_MASK	0xFFFF0000
+#define PCILIB_KMEM_USE(type, subtype) (((type) << 16)|(subtype))
+
+typedef enum {
+    PCILIB_KMEM_TYPE_CONSISTENT = 0x00000,
+    PCILIB_KMEM_TYPE_PAGE = 0x10000,
+    PCILIB_KMEM_TYPE_DMA_S2C_PAGE = 0x10001,
+    PCILIB_KMEM_TYPE_DMA_C2S_PAGE = 0x10002,
+    PCILIB_KMEM_TYPE_REGION = 0x20000,
+    PCILIB_KMEM_TYPE_REGION_S2C = 0x20001,
+    PCILIB_KMEM_TYPE_REGION_C2S = 0x20002
+} pcilib_kmem_type_t;
+
+typedef enum {
+    PCILIB_KMEM_USE_STANDARD = 0,
+    PCILIB_KMEM_USE_DMA_RING = 1,
+    PCILIB_KMEM_USE_DMA_PAGES = 2,
+    PCILIB_KMEM_USE_USER = 0x10
+} pcilib_kmem_use_t;
+
+typedef enum {
+    PCILIB_KMEM_SYNC_BIDIRECTIONAL = 0,
+    PCILIB_KMEM_SYNC_TODEVICE = 1,
+    PCILIB_KMEM_SYNC_FROMDEVICE = 2
+} pcilib_kmem_sync_direction_t;
 
 typedef enum {
-    PCILIB_KMEM_FLAG_REUSE = KMEM_FLAG_REUSE,
-    PCILIB_KMEM_FLAG_EXCLUSIVE = KMEM_FLAG_EXCLUSIVE,
-    PCILIB_KMEM_FLAG_PERSISTENT = KMEM_FLAG_PERSISTENT,
-    PCILIB_KMEM_FLAG_HARDWARE = KMEM_FLAG_HW,
-    PCILIB_KMEM_FLAG_FORCE = KMEM_FLAG_FORCE,
-    PCILIB_KMEM_FLAG_TRY =  KMEM_FLAG_TRY
+    PCILIB_KMEM_FLAG_REUSE = 1,				/**< Try to reuse existing buffer with the same use & item */
+    PCILIB_KMEM_FLAG_EXCLUSIVE = 2,			/**< Allow only a single application accessing a specified use & item */
+    PCILIB_KMEM_FLAG_PERSISTENT = 4,			/**< Sets persistent mode */
+    PCILIB_KMEM_FLAG_HARDWARE = 8,			/**< The buffer may be accessed by hardware, the hardware access will not occur any more if passed to _free function */
+    PCILIB_KMEM_FLAG_FORCE = 16,			/**< Force memory cleanup even if references are present */
+    PCILIB_KMEM_FLAG_MASS = 32,				/**< Apply to all buffers of selected use */
+    PCILIB_KMEM_FLAG_TRY =  64				/**< Do not allocate buffers, try to reuse and fail if not possible */
 } pcilib_kmem_flags_t;
 
 

model.c

@@ -0,0 +1,22 @@
+#include <stdio.h>
+#include <string.h>
+#include <strings.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <sys/ioctl.h>
+#include <sys/mman.h>
+#include <arpa/inet.h>
+#include <errno.h>
+#include <assert.h>
+
+#include "pcilib.h"
+#include "pci.h"
+#include "tools.h"
+#include "error.h"
+
+
+const pcilib_model_description_t *pcilib_get_model_description(pcilib_t *ctx) {
+    return &ctx->model_info;
+}

model.h

@@ -0,0 +1,31 @@
+#ifndef _PCILIB_MODEL_H
+#define _PCILIB_MODEL_H
+
+#include <bank.h>
+#include <register.h>
+#include <dma.h>
+#include <event.h>
+
+typedef struct {
+    uint8_t access;
+    pcilib_endianess_t endianess;
+
+    const pcilib_register_description_t *registers;
+    const pcilib_register_bank_description_t *banks;
+    const pcilib_register_protocol_description_t *protocols;
+    const pcilib_register_range_t *ranges;
+
+    const pcilib_event_description_t *events;
+    const pcilib_event_data_type_description_t *data_types;
+
+    const pcilib_dma_description_t *dma;
+    const pcilib_event_api_description_t *api;
+
+    const char *name;
+    const char *description;
+} pcilib_model_description_t;
+
+
+const pcilib_model_description_t *pcilib_get_model_description(pcilib_t *ctx);
+
+#endif /* _PCILIB_MODEL_H */

pci.c

@@ -1,6 +1,6 @@
-#define _PCILIB_PCI_C
 //#define PCILIB_FILE_IO
-#define _POSIX_C_SOURCE 199309L
+#define _BSD_SOURCE
+#define _POSIX_C_SOURCE 200809L
 
 #include <stdio.h>
 #include <string.h>
@@ -17,20 +17,72 @@
 
 #include "pcilib.h"
 #include "pci.h"
-#include "kernel.h"
 #include "tools.h"
 #include "error.h"
+#include "model.h"
 
-#include "ipecamera/model.h"
-#include "kapture/model.h"
+static int pcilib_detect_model(pcilib_t *ctx, const char *model) {
+    int i, j;
 
+	// Registers & Banks must be copied!
 
-pcilib_t *pcilib_open(const char *device, pcilib_model_t model) {
+    if (model) {
+	    // Check for DMA models
+	for (i = 0; pcilib_dma[i].name; i++) {
+	    if (!strcasecmp(model, pcilib_dma[i].name))
+		break;
+	}
+
+	if (pcilib_dma[i].api) {
+	    memcpy(&ctx->dma, &pcilib_dma[i], sizeof(pcilib_dma_description_t));
+	    ctx->model_info.dma = &ctx->dma;
+
+	    if (pcilib_dma[i].banks)
+	        pcilib_add_register_banks(ctx, 0, pcilib_dma[i].banks);
+	    
+	    if (pcilib_dma[i].registers)
+		pcilib_add_registers(ctx, 0, pcilib_dma[i].registers);
+
+	    if (pcilib_dma[i].engines) {
+		for (j = 0; pcilib_dma[i].engines[j].addr_bits; j++)
+		memcpy(ctx->engines, pcilib_dma[i].engines, j * sizeof(pcilib_dma_engine_description_t));
+		ctx->num_engines = j;
+	    } else
+		ctx->dma.engines = ctx->engines;
+
+	    return 0;
+	}
+
+	// Check for XML models (DMA + XML registers)
+
+	// Check for specified model
+	
+	// Iterate other all other models
+    }
+
+    // Check for all installed models
+    // memcpy(&ctx->model_info, model, sizeof(pcilib_model_description_t));
+    // how we reconcile the banks from event model and dma description? The banks specified in the DMA description should override corresponding banks of events...
+
+
+    if (model)
+	return PCILIB_ERROR_NOTFOUND;
+
+	// Otherwise, simple pci access (all model members are set to NULL)
+
+    return 0;
+}
+
+
+
+pcilib_t *pcilib_open(const char *device, const char *model) {
+    int err;
+    size_t i;
     pcilib_t *ctx = malloc(sizeof(pcilib_t));
 
     if (ctx) {
-	memset(ctx, 0, sizeof(pcilib_t));	
-    
+	memset(ctx, 0, sizeof(pcilib_t));
+	
 	ctx->handle = open(device, O_RDWR);
 	if (ctx->handle < 0) {
 	    pcilib_error("Error opening device (%s)", device);
@@ -39,21 +91,66 @@ pcilib_t *pcilib_open(const char *device, pcilib_model_t model) {
 	}
 	
 	ctx->page_mask = (uintptr_t)-1;
-	ctx->model = model;
-
-	if (!model) model = pcilib_get_model(ctx);
+	ctx->model = model?strdup(model):NULL;
+
+	ctx->alloc_reg = PCILIB_DEFAULT_REGISTER_SPACE;
+	ctx->registers = (pcilib_register_description_t *)malloc(PCILIB_DEFAULT_REGISTER_SPACE * sizeof(pcilib_register_description_t));
+/*	ctx->banks = (pcilib_register_bank_context_t *)malloc(PCILIB_MAX_BANKS * sizeof(pcilib_register_bank_context_t));
+	ctx->ranges = (pcilib_register_range_t *)malloc(PCILIB_MAX_RANGES * sizeof(pcilib_register_range_t));
+	ctx->protocols
+	ctx->engines*/
+	
+	if ((!ctx->registers)/*||(!ctx->banks)||(!ctx->ranges)*/) {
+	    pcilib_error("Error allocating memory for register model");
+	    pcilib_close(ctx);
+	    free(ctx);
+	    return NULL;
+	}
+	
+	memset(ctx->registers, 0, sizeof(pcilib_register_description_t));
+	memset(ctx->banks, 0, sizeof(pcilib_register_bank_description_t));
+	memset(ctx->ranges, 0, sizeof(pcilib_register_range_t));
 	
-	memcpy(&ctx->model_info, pcilib_model + model, sizeof(pcilib_model_description_t));
+	for (i = 0; pcilib_protocols[i].api; i++);
+	memcpy(ctx->protocols, pcilib_protocols, i * sizeof(pcilib_register_protocol_description_t));
+
+	ctx->model_info.registers = ctx->registers;
+	ctx->model_info.banks = ctx->banks;
+	ctx->model_info.protocols = ctx->protocols;
+	ctx->model_info.ranges = ctx->ranges;
 
-	pcilib_init_event_engine(ctx);
+	err = pcilib_detect_model(ctx, model);
+	if (err) {
+	    const pcilib_board_info_t *board_info = pcilib_get_board_info(ctx);
+	    if (board_info)
+	        pcilib_error("Error (%i) configuring model %s (%x:%x)", err, (model?model:""), board_info->vendor_id, board_info->device_id);
+	    else
+	        pcilib_error("Error (%i) configuring model %s", err, (model?model:""));
+	    pcilib_close(ctx);
+	    free(ctx);
+	    return NULL;
+	}
+
+	err = pcilib_init_register_banks(ctx);
+	if (err) {
+	    pcilib_error("Error (%i) initializing regiser banks\n", err);
+	    pcilib_close(ctx);
+	    free(ctx);
+	    return NULL;
+	}
+	
+	err = pcilib_init_event_engine(ctx);
+	if (err) {
+	    pcilib_error("Error (%i) initializing event engine\n", err);
+	    pcilib_close(ctx);
+	    free(ctx);
+	    return NULL;
+	}
     }
 
     return ctx;
 }
 
-pcilib_model_description_t *pcilib_get_model_description(pcilib_t *ctx) {
-    return &ctx->model_info;
-}
 
 const pcilib_board_info_t *pcilib_get_board_info(pcilib_t *ctx) {
     int ret;
@@ -72,31 +169,10 @@ const pcilib_board_info_t *pcilib_get_board_info(pcilib_t *ctx) {
 }
 
 
-
 pcilib_context_t *pcilib_get_implementation_context(pcilib_t *ctx) {
     return ctx->event_ctx;
 }
 
-pcilib_model_t pcilib_get_model(pcilib_t *ctx) {
-    if (ctx->model == PCILIB_MODEL_DETECT) {
-//	unsigned short vendor_id;
-//	unsigned short device_id;
-
-	//return PCILIB_MODEL_PCI;
-	
-	const pcilib_board_info_t *board_info = pcilib_get_board_info(ctx);
-	if (!board_info) return PCILIB_MODEL_PCI;
-
-	if ((board_info->vendor_id == PCIE_XILINX_VENDOR_ID)&&(board_info->device_id == PCIE_IPECAMERA_DEVICE_ID))
-	    ctx->model = PCILIB_MODEL_IPECAMERA;
-	else if ((board_info->vendor_id == PCIE_XILINX_VENDOR_ID)&&(board_info->device_id == PCIE_KAPTURE_DEVICE_ID))
-	    ctx->model = PCILIB_MODEL_KAPTURE;
-	else
-	    ctx->model = PCILIB_MODEL_PCI;
-    }
-    
-    return ctx->model;
-}
 
 static pcilib_bar_t pcilib_detect_bar(pcilib_t *ctx, uintptr_t addr, size_t size) {
     int n = 0;
@@ -105,7 +181,7 @@ static pcilib_bar_t pcilib_detect_bar(pcilib_t *ctx, uintptr_t addr, size_t size
     const pcilib_board_info_t *board_info = pcilib_get_board_info(ctx);
     if (!board_info) return PCILIB_BAR_INVALID;
 		
-    for (i = 0; i < PCILIB_MAX_BANKS; i++) {
+    for (i = 0; i < PCILIB_MAX_BARS; i++) {
 	if (board_info->bar_length[i] > 0) {
 	    if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + size))) return i;
 
@@ -201,8 +277,8 @@ int pcilib_map_register_space(pcilib_t *ctx) {
     pcilib_register_bank_t i;
     
     if (!ctx->reg_bar_mapped)  {
-	pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-	pcilib_register_bank_description_t *banks = model_info->banks;
+	const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+	const pcilib_register_bank_description_t *banks = model_info->banks;
     
 	for (i = 0; ((banks)&&(banks[i].access)); i++) {
 //	    uint32_t buf[2];
@@ -235,9 +311,11 @@ int pcilib_map_register_space(pcilib_t *ctx) {
 //		pcilib_memcpy(&buf, reg_space, 8);
 		
 	    }
+	    
 	    if (!i) ctx->reg_bar = bar;
 	}
 	
+	
 	ctx->reg_bar_mapped = 1;
     }
     
@@ -260,7 +338,7 @@ int pcilib_map_data_space(pcilib_t *ctx, uintptr_t addr) {
 	
 	int data_bar = -1;	
 	
-	for (i = 0; i < PCILIB_MAX_BANKS; i++) {
+	for (i = 0; i < PCILIB_MAX_BARS; i++) {
 	    if ((ctx->bar_space[i])||(!board_info->bar_length[i])) continue;
 	    
 	    if (addr) {
@@ -302,22 +380,6 @@ int pcilib_map_data_space(pcilib_t *ctx, uintptr_t addr) {
     return 0;
 }
 	
-/*
-static void pcilib_unmap_register_space(pcilib_t *ctx) {
-    if (ctx->reg_space) {
-	pcilib_unmap_bar(ctx, ctx->reg_bar, ctx->reg_space);
-	ctx->reg_space = NULL;
-    }
-}
-
-static void pcilib_unmap_data_space(pcilib_t *ctx) {
-    if (ctx->data_space) {
-	pcilib_unmap_bar(ctx, ctx->data_bar, ctx->data_space);
-	ctx->data_space = NULL;
-    }
-}
-*/
-
 char  *pcilib_resolve_register_address(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr) {
     if (bar == PCILIB_BAR_DETECT) {
 	    // First checking the default register bar
@@ -378,19 +440,18 @@ char *pcilib_resolve_data_space(pcilib_t *ctx, uintptr_t addr, size_t *size) {
 
 void pcilib_close(pcilib_t *ctx) {
     pcilib_bar_t i;
-    
+
     if (ctx) {
-	pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-	pcilib_event_api_description_t *eapi = model_info->event_api;
-	pcilib_dma_api_description_t *dapi = model_info->dma_api;
-    
+	const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+	const pcilib_event_api_description_t *eapi = model_info->api;
+	const pcilib_dma_api_description_t *dapi = NULL;
+	
+	if (model_info->dma) dapi = model_info->dma->api;
+
         if ((eapi)&&(eapi->free)) eapi->free(ctx->event_ctx);
         if ((dapi)&&(dapi->free)) dapi->free(ctx->dma_ctx);
-	
-	if (ctx->model_info.registers != model_info->registers) {
-	    free(ctx->model_info.registers);
-	    ctx->model_info.registers = pcilib_model[ctx->model].registers;
-	}
+
+	pcilib_free_register_banks(ctx);
 	
 	if (ctx->kmem_list) {
 	    pcilib_warning("Not all kernel buffers are properly cleaned");
@@ -399,15 +460,23 @@ void pcilib_close(pcilib_t *ctx) {
 		pcilib_free_kernel_memory(ctx, ctx->kmem_list, 0);
 	    }
 	}
-
-	for (i = 0; i < PCILIB_MAX_BANKS; i++) {
+	
+	for (i = 0; i < PCILIB_MAX_BARS; i++) {
 	    if (ctx->bar_space[i]) {
 		char *ptr = ctx->bar_space[i];
 		ctx->bar_space[i] = NULL;
 		pcilib_unmap_bar(ctx, i, ptr);
 	    }
 	}
-	close(ctx->handle);
+
+	if (ctx->registers)
+	    free(ctx->registers);
+	
+	if (ctx->model)
+	    free(ctx->model);
+	
+	if (ctx->handle >= 0)
+	    close(ctx->handle);
 	
 	free(ctx);
     }

pci.h

@@ -7,9 +7,15 @@
 #define PCILIB_DMA_TIMEOUT 10000		/**< us */
 #define PCILIB_DMA_SKIP_TIMEOUT 1000000		/**< us */
 #define PCILIB_REGISTER_TIMEOUT 10000		/**< us */
+#define PCILIB_MAX_BARS 6			/**< this is defined by PCI specification */
+#define PCILIB_DEFAULT_REGISTER_SPACE 1024	/**< number of registers to allocate on init */
+#define PCILIB_MAX_REGISTER_BANKS 32		/**< maximum number of register banks to allocate space for */
+#define PCILIB_MAX_REGISTER_RANGES 32		/**< maximum number of register ranges to allocate space for */
+#define PCILIB_MAX_REGISTER_PROTOCOLS 32	/**< maximum number of register protocols to support */
+#define PCILIB_MAX_DMA_ENGINES 32		/**< maximum number of supported DMA engines */
 
+#include "linux-3.10.h"
 #include "driver/pciDriver.h"
-#include "pcilib_types.h"
 
 #include "pcilib.h"
 #include "register.h"
@@ -17,69 +23,55 @@
 #include "irq.h"
 #include "dma.h"
 #include "event.h"
+#include "model.h"
+#include "config.h"
 
 struct pcilib_s {
-    int handle;
+    int handle;										/**< file handle of device */
     
-    uintptr_t page_mask;
-    pcilib_board_info_t board_info;
-    pcilib_dma_info_t dma_info;
-    pcilib_model_t model;
-    
-    char *bar_space[PCILIB_MAX_BANKS];
+    uintptr_t page_mask;								/**< Selects bits which define offset within the page */
+    pcilib_board_info_t board_info;							/**< The mandatory information about board as defined by PCI specification */
+    char *bar_space[PCILIB_MAX_BARS];							/**< Pointers to the mapped BARs in virtual address space */
 
-    int reg_bar_mapped;
-    pcilib_bar_t reg_bar;
-//    char *reg_space;
+    int reg_bar_mapped;									/**< Indicates that all BARs used to access registers are mapped */
+    pcilib_bar_t reg_bar;								/**< Default BAR to look for registers, other BARs will be looked as well */
+    int data_bar_mapped;								/**< Indicates that a BAR for large PIO is mapped */
+    pcilib_bar_t data_bar;								/**< BAR for large PIO operations */
 
-    int data_bar_mapped;
-    pcilib_bar_t data_bar;
-//    char *data_space;
-//    size_t data_size;
-    
-    pcilib_kmem_list_t *kmem_list;
+    pcilib_kmem_list_t *kmem_list;							/**< List of currently allocated kernel memory */
+
+    char *model;									/**< Requested model */
+    pcilib_model_description_t model_info;						/**< Current model description combined from the information returned by the event plugin and all dynamic sources (XML, DMA registers, etc.). Contains only pointers, no deep copy of information returned by event plugin */
+
+    size_t num_banks_init;								/**< Number of initialized banks */
+    size_t num_reg, alloc_reg;								/**< Number of registered and allocated registers */
+    size_t num_banks, num_ranges;							/**< Number of registered banks and register ranges */
+    size_t num_engines;									/**> Number of configured DMA engines */
+    pcilib_register_description_t *registers;						/**< List of currently defined registers (from all sources) */
+    pcilib_register_bank_description_t banks[PCILIB_MAX_REGISTER_BANKS + 1];		/**< List of currently defined register banks (from all sources) */
+    pcilib_register_range_t ranges[PCILIB_MAX_REGISTER_RANGES + 1];			/**< List of currently defined register ranges (from all sources) */
+    pcilib_register_protocol_description_t protocols[PCILIB_MAX_REGISTER_PROTOCOLS + 1];/**< List of currently defined register protocols (from all sources) */
+    pcilib_dma_description_t dma;							/**< Configuration of used DMA implementation */
+    pcilib_dma_engine_description_t engines[PCILIB_MAX_DMA_ENGINES +  1];		/**< List of engines defined by the DMA implementation */
+
+//    pcilib_register_context_t *register_ctx;						/**< Contexts for registers */
+    pcilib_register_bank_context_t *bank_ctx[PCILIB_MAX_REGISTER_BANKS];		/**< Contexts for registers banks if required by register protocol */
+    pcilib_dma_context_t *dma_ctx;							/**< DMA context */
+    pcilib_context_t *event_ctx;							/**< Implmentation context */
+
+//    pcilib_dma_info_t dma_info;
 
-    size_t num_reg, alloc_reg;
-    pcilib_model_description_t model_info;
-    
-    pcilib_dma_context_t *dma_ctx;
-    pcilib_context_t *event_ctx;
-    
 #ifdef PCILIB_FILE_IO
     int file_io_handle;
 #endif /* PCILIB_FILE_IO */
 };
 
-#ifdef _PCILIB_PCI_C
-# include "ipecamera/model.h"
-# include "kapture/model.h"
-# include "dma/nwl.h"
-# include "dma/ipe.h"
-# include "default.h"
-
-pcilib_model_description_t pcilib_model[4] = {
-    { 4, PCILIB_HOST_ENDIAN, 	NULL, NULL, NULL, NULL, NULL, NULL },
-    { 4, PCILIB_HOST_ENDIAN, 	NULL, NULL, NULL, NULL, NULL, NULL },
-    { 4, PCILIB_LITTLE_ENDIAN,	ipecamera_registers, ipecamera_register_banks, ipecamera_register_ranges, ipecamera_events, ipecamera_data_types, &nwl_dma_api, &ipecamera_image_api },
-    { 4, PCILIB_LITTLE_ENDIAN,	kapture_registers, kapture_register_banks, kapture_register_ranges, kapture_events, kapture_data_types, &ipe_dma_api, &kapture_api },
-};
-
-pcilib_protocol_description_t pcilib_protocol[3] = {
-    { pcilib_default_read, pcilib_default_write },
-    { ipecamera_read, ipecamera_write },
-    { NULL, NULL }
-};
-#else
-extern pcilib_model_description_t pcilib_model[];
-extern pcilib_protocol_description_t pcilib_protocol[];
-#endif /* _PCILIB_PCI_C */
 
+pcilib_context_t *pcilib_get_implementation_context(pcilib_t *ctx);
 const pcilib_board_info_t *pcilib_get_board_info(pcilib_t *ctx);
-const pcilib_dma_info_t *pcilib_get_dma_info(pcilib_t *ctx);
 
 int pcilib_map_register_space(pcilib_t *ctx);
 int pcilib_map_data_space(pcilib_t *ctx, uintptr_t addr);
 int pcilib_detect_address(pcilib_t *ctx, pcilib_bar_t *bar, uintptr_t *addr, size_t size);
 
-
 #endif /* _PCITOOL_PCI_H */

pcilib.h

@@ -1,31 +1,16 @@
 #ifndef _PCITOOL_PCILIB_H
 #define _PCITOOL_PCILIB_H
 
-#define PCILIB_MAX_BANKS 6
-#define PCILIB_MAX_DMA_ENGINES 32
-
 #include <sys/time.h>
+#include <stddef.h>
 #include <stdint.h>
 
-#define pcilib_memcpy pcilib_memcpy32
-#define pcilib_datacpy pcilib_datacpy32
-
 typedef struct pcilib_s pcilib_t;
 typedef struct pcilib_event_context_s pcilib_context_t;
-typedef struct pcilib_dma_context_s pcilib_dma_context_t;
-
-
-typedef struct pcilib_dma_api_description_s pcilib_dma_api_description_t;
-typedef struct pcilib_event_api_description_s pcilib_event_api_description_t;
-typedef struct  pcilib_protocol_description_s pcilib_protocol_description_t;
-typedef unsigned int pcilib_irq_hw_source_t;
-typedef uint32_t pcilib_irq_source_t;
 
 typedef uint8_t pcilib_bar_t;			/**< Type holding the PCI Bar number */
-typedef uint8_t pcilib_register_t;		/**< Type holding the register ID within the Bank */
-typedef uint32_t pcilib_register_addr_t;	/**< Type holding the register ID within the Bank */
-typedef uint8_t pcilib_register_bank_t;		/**< Type holding the register bank number */
-typedef uint8_t pcilib_register_bank_addr_t;	/**< Type holding the register bank number */
+typedef uint16_t pcilib_register_t;		/**< Type holding the register position within the field listing registers in the model */
+typedef uint32_t pcilib_register_addr_t;	/**< Type holding the register address within address-space of BARs */
 typedef uint8_t pcilib_register_size_t;		/**< Type holding the size in bits of the register */
 typedef uint32_t pcilib_register_value_t;	/**< Type holding the register value */
 typedef uint8_t pcilib_dma_engine_addr_t;
@@ -33,6 +18,8 @@ typedef uint8_t pcilib_dma_engine_t;
 typedef uint64_t pcilib_event_id_t;
 typedef uint32_t pcilib_event_t;
 typedef uint64_t pcilib_timeout_t;		/**< In microseconds */
+typedef unsigned int pcilib_irq_hw_source_t;
+typedef uint32_t pcilib_irq_source_t;
 
 typedef enum {
     PCILIB_HOST_ENDIAN = 0,
@@ -41,51 +28,30 @@ typedef enum {
 } pcilib_endianess_t;
 
 typedef enum {
-    PCILIB_MODEL_DETECT,
-    PCILIB_MODEL_PCI,
-    PCILIB_MODEL_IPECAMERA,
-    PCILIB_MODEL_KAPTURE
-} pcilib_model_t;
-
-typedef enum {
-    PCILIB_REGISTER_R = 1,
-    PCILIB_REGISTER_W = 2,
-    PCILIB_REGISTER_RW = 3,
-    PCILIB_REGISTER_W1C = 4,		/**< writting 1 resets the flag */
-    PCILIB_REGISTER_RW1C = 5
-} pcilib_register_mode_t;
+    PCILIB_DMA_IRQ = 1,
+    PCILIB_EVENT_IRQ = 2
+} pcilib_irq_type_t;
 
-typedef enum {
-    PCILIB_DEFAULT_PROTOCOL,
-    IPECAMERA_REGISTER_PROTOCOL
-} pcilib_register_protocol_t;
+typedef enum {					/**< 0x8000 and up are reserved for driver-specific types */
+    PCILIB_EVENT_DATA = 0,			/**< default data format */
+    PCILIB_EVENT_RAW_DATA = 1			/**< raw data */
+} pcilib_event_data_type_t;
 
 typedef enum {
-    PCILIB_EVENT_DATA = 0,		/**< default data format */
-    PCILIB_EVENT_RAW_DATA = 1		/**< raw data */
-} pcilib_event_data_type_t;
+    PCILIB_DMA_TO_DEVICE = 1,
+    PCILIB_DMA_FROM_DEVICE = 2,
+    PCILIB_DMA_BIDIRECTIONAL = 3
+} pcilib_dma_direction_t;
 
 typedef enum {
     PCILIB_DMA_FLAGS_DEFAULT = 0,
-    PCILIB_DMA_FLAG_EOP = 1,		/**< last buffer of the packet */
-    PCILIB_DMA_FLAG_WAIT = 2,		/**< wait completion of write operation / wait for data during read operation */
-    PCILIB_DMA_FLAG_MULTIPACKET = 4,	/**< read multiple packets */
-    PCILIB_DMA_FLAG_PERSISTENT = 8,	/**< do not stop DMA engine on application termination / permanently close DMA engine on dma_stop */
-    PCILIB_DMA_FLAG_IGNORE_ERRORS = 16	/**< do not crash on errors, but return appropriate error codes */
+    PCILIB_DMA_FLAG_EOP = 1,			/**< last buffer of the packet */
+    PCILIB_DMA_FLAG_WAIT = 2,			/**< wait completion of write operation / wait for data during read operation */
+    PCILIB_DMA_FLAG_MULTIPACKET = 4,		/**< read multiple packets */
+    PCILIB_DMA_FLAG_PERSISTENT = 8,		/**< do not stop DMA engine on application termination / permanently close DMA engine on dma_stop */
+    PCILIB_DMA_FLAG_IGNORE_ERRORS = 16		/**< do not crash on errors, but return appropriate error codes */
 } pcilib_dma_flags_t;
 
-typedef enum {
-    PCILIB_STREAMING_STOP = 0, 		/**< stop streaming */
-    PCILIB_STREAMING_CONTINUE = 1, 	/**< wait the default DMA timeout for a new data */
-    PCILIB_STREAMING_WAIT = 2,		/**< wait the specified timeout for a new data */
-    PCILIB_STREAMING_CHECK = 3,		/**< do not wait for the data, bail out imideatly if no data ready */
-    PCILIB_STREAMING_FAIL = 4,		/**< fail if data is not available on timeout */
-    PCILIB_STREAMING_REQ_FRAGMENT = 5,	/**< only fragment of a packet is read, wait for next fragment and fail if no data during DMA timeout */
-    PCILIB_STREAMING_REQ_PACKET = 6,	/**< wait for next packet and fail if no data during the specified timeout */
-    PCILIB_STREAMING_TIMEOUT_MASK = 3	/**< mask specifying all timeout modes */
-} pcilib_streaming_action_t;
-
-
 typedef enum {
     PCILIB_EVENT_FLAGS_DEFAULT = 0,
     PCILIB_EVENT_FLAG_RAW_DATA_ONLY = 1,	/**< Do not parse data, just read raw and pass it to rawdata callback. If passed to rawdata callback, idicates the data is not identified as event (most probably just padding) */
@@ -98,11 +64,14 @@ typedef enum {
     PCILIB_EVENT_INFO_FLAG_BROKEN = 1		/**< Indicates broken frames (if this flag is fales, the frame still can be broken) */
 } pcilib_event_info_flags_t;
 
-typedef enum {
-    PCILIB_REGISTER_STANDARD = 0,
-    PCILIB_REGISTER_FIFO,
-    PCILIB_REGISTER_BITS
-} pcilib_register_type_t;
+typedef struct {
+    pcilib_event_t type;
+    uint64_t seqnum;				/**< we will add seqnum_overflow if required */
+    uint64_t offset;				/**< nanoseconds */
+    struct timeval timestamp;			/**< most accurate timestamp */
+    pcilib_event_info_flags_t flags;		/**< flags */
+} pcilib_event_info_t;
+
 
 #define PCILIB_BAR_DETECT 		((pcilib_bar_t)-1)
 #define PCILIB_BAR_INVALID		((pcilib_bar_t)-1)
@@ -114,12 +83,6 @@ typedef enum {
 #define PCILIB_DMA_ENGINE_ADDR_INVALID	((pcilib_dma_engine_addr_t)-1)
 #define PCILIB_REGISTER_INVALID		((pcilib_register_t)-1)
 #define PCILIB_ADDRESS_INVALID		((uintptr_t)-1)
-#define PCILIB_REGISTER_BANK_INVALID	((pcilib_register_bank_t)-1)
-#define PCILIB_REGISTER_BANK0 		0
-#define PCILIB_REGISTER_BANK1 		1
-#define PCILIB_REGISTER_BANK2 		2
-#define PCILIB_REGISTER_BANK3 		3
-#define PCILIB_REGISTER_BANK_DMA	128
 #define PCILIB_EVENT0			1
 #define PCILIB_EVENT1			2
 #define PCILIB_EVENT2			4
@@ -131,16 +94,8 @@ typedef enum {
 #define PCILIB_TIMEOUT_IMMEDIATE	0
 #define PCILIB_IRQ_TYPE_ALL 		0
 #define PCILIB_IRQ_SOURCE_DEFAULT	0
-#define PCILIB_REGISTER_NO_BITS		0
-#define PCILIB_REGISTER_ALL_BITS	((pcilib_register_value_t)-1)
+#define PCILIB_MODEL_DETECT		NULL
 
-typedef struct {
-    pcilib_event_t type;
-    uint64_t seqnum;			/**< we will add seqnum_overflow if required */
-    uint64_t offset;			/**< nanoseconds */
-    struct timeval timestamp;		/**< most accurate timestamp */
-    pcilib_event_info_flags_t flags;	/**< flags */
-} pcilib_event_info_t;
 
 /**<
  * Callback function called when new data is read by DMA streaming function
@@ -161,115 +116,11 @@ typedef int (*pcilib_dma_callback_t)(void *ctx, pcilib_dma_flags_t flags, size_t
 typedef int (*pcilib_event_callback_t)(pcilib_event_id_t event_id, pcilib_event_info_t *info, void *user);
 typedef int (*pcilib_event_rawdata_callback_t)(pcilib_event_id_t event_id, pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user);
 
-typedef struct {
-    pcilib_register_bank_addr_t addr;
 
-    pcilib_bar_t bar;			// optional
-    size_t size;
-    
-    pcilib_register_protocol_t protocol;
-
-    uintptr_t read_addr;		// or offset if bar specified
-    uintptr_t write_addr;		// or offset if bar specified
-    uint8_t raw_endianess;
-
-    uint8_t access;
-    uint8_t endianess;
-    
-    const char *format;
-    const char *name;
-    const char *description;
-} pcilib_register_bank_description_t;
-
-typedef struct {
-    pcilib_register_addr_t addr;
-    pcilib_register_size_t offset;
-    pcilib_register_size_t bits;
-    pcilib_register_value_t defvalue;
-    pcilib_register_value_t rwmask;	/**< 1 - read before write bits, 0 - zero should be written to preserve value 
-					Used to define how external bits of PCILIB_REGISTER_BITS registers are treated.
-					Currently it is a bit confusing, we may find a better way in the next release */
-    pcilib_register_mode_t mode;
-    pcilib_register_type_t type;
-    
-    pcilib_register_bank_t bank;
-    
-    const char *name;
-    const char *description;
-} pcilib_register_description_t;
-
-/**
-  * Default mappings
-  */
-typedef struct {
-    uintptr_t start;
-    uintptr_t end;
-    pcilib_register_bank_addr_t bank;
-    long addr_shift;
-} pcilib_register_range_t;
-
-typedef struct {
-    pcilib_event_t evid;
-    const char *name;
-    const char *description;
-} pcilib_event_description_t;
-
-typedef struct {
-    pcilib_event_data_type_t data_type;
-    pcilib_event_t evid;
-    const char *name;
-    const char *description;
-} pcilib_event_data_type_description_t;
-
-typedef enum {
-    PCILIB_DMA_IRQ = 1,
-    PCILIB_EVENT_IRQ = 2
-} pcilib_irq_type_t;
-
-typedef enum {
-    PCILIB_DMA_TO_DEVICE = 1,
-    PCILIB_DMA_FROM_DEVICE = 2,
-    PCILIB_DMA_BIDIRECTIONAL = 3
-} pcilib_dma_direction_t;
-
-typedef enum {
-    PCILIB_DMA_TYPE_BLOCK,
-    PCILIB_DMA_TYPE_PACKET,
-    PCILIB_DMA_TYPE_UNKNOWN
-} pcilib_dma_engine_type_t;
-
-typedef struct {
-    pcilib_dma_engine_addr_t addr;
-    pcilib_dma_engine_type_t type;
-    pcilib_dma_direction_t direction;
-    size_t addr_bits;
-} pcilib_dma_engine_description_t;
-
-typedef struct {
-    pcilib_dma_engine_description_t *engines[PCILIB_MAX_DMA_ENGINES +  1];
-} pcilib_dma_info_t;
-
-typedef struct {
-    uint8_t access;
-    uint8_t endianess;
-    
-    pcilib_register_description_t *registers;
-    pcilib_register_bank_description_t *banks;
-    pcilib_register_range_t *ranges;
-    pcilib_event_description_t *events;
-    pcilib_event_data_type_description_t *data_types;
-
-    pcilib_dma_api_description_t *dma_api;    
-    pcilib_event_api_description_t *event_api;
-} pcilib_model_description_t;
 
 int pcilib_set_error_handler(void (*err)(const char *msg, ...), void (*warn)(const char *msg, ...));
 
-pcilib_model_t pcilib_get_model(pcilib_t *ctx);
-pcilib_model_description_t *pcilib_get_model_description(pcilib_t *ctx);
-pcilib_context_t *pcilib_get_implementation_context(pcilib_t *ctx);
-
-pcilib_t *pcilib_open(const char *device, pcilib_model_t model);
+pcilib_t *pcilib_open(const char *device, const char *model);
 void pcilib_close(pcilib_t *ctx);
 
 int pcilib_start_dma(pcilib_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags);
@@ -288,9 +139,6 @@ void pcilib_unmap_bar(pcilib_t *ctx, pcilib_bar_t bar, void *data);
 char *pcilib_resolve_register_address(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr);	// addr is offset if bar is specified
 char *pcilib_resolve_data_space(pcilib_t *ctx, uintptr_t addr, size_t *size);
 
-pcilib_register_bank_t pcilib_find_bank_by_addr(pcilib_t *ctx, pcilib_register_bank_addr_t bank);
-pcilib_register_bank_t pcilib_find_bank_by_name(pcilib_t *ctx, const char *bankname);
-pcilib_register_bank_t pcilib_find_bank(pcilib_t *ctx, const char *bank);
 pcilib_register_t pcilib_find_register(pcilib_t *ctx, const char *bank, const char *reg);
 pcilib_event_t pcilib_find_event(pcilib_t *ctx, const char *event);
 pcilib_event_data_type_t pcilib_find_event_data_type(pcilib_t *ctx, pcilib_event_t event, const char *data_type);
@@ -368,8 +216,6 @@ void *pcilib_get_data_with_argument(pcilib_t *ctx, pcilib_event_id_t event_id, p
  */
 int pcilib_return_data(pcilib_t *ctx, pcilib_event_id_t event_id, pcilib_event_data_type_t data_type, void *data);
 
-
-
 /*
  * @param data - will be allocated and shuld be freed if NULL, otherwise used and size should contain correct size.
  *   In case of failure the content of data is undefined.

pcilib_types.h

@@ -1,44 +0,0 @@
-#ifndef _PCILIB_TYPES_H
-#define _PCILIB_TYPES_H
-
-#define KMEM_REF_HW 		0x80000000	/**< Special reference to indicate hardware access */
-#define KMEM_REF_COUNT		0x0FFFFFFF	/**< Mask of reference counter (mmap/munmap), couting in mmaped memory pages */
-
-#define KMEM_MODE_REUSABLE	0x80000000	/**< Indicates reusable buffer */
-#define KMEM_MODE_EXCLUSIVE	0x40000000	/**< Only a single process is allowed to mmap the buffer */
-#define KMEM_MODE_PERSISTENT	0x20000000	/**< Persistent mode instructs kmem_free to preserve buffer in memory */
-#define KMEM_MODE_COUNT		0x0FFFFFFF	/**< Mask of reuse counter (alloc/free) */
-
-#define PCILIB_KMEM_TYPE_MASK	0xFFFF0000
-
-typedef enum {
-    PCILIB_KMEM_TYPE_CONSISTENT = 0x00000,
-    PCILIB_KMEM_TYPE_PAGE = 0x10000,
-    PCILIB_KMEM_TYPE_DMA_S2C_PAGE = 0x10001,
-    PCILIB_KMEM_TYPE_DMA_C2S_PAGE = 0x10002,
-    PCILIB_KMEM_TYPE_REGION = 0x20000,
-    PCILIB_KMEM_TYPE_REGION_S2C = 0x20001,
-    PCILIB_KMEM_TYPE_REGION_C2S = 0x20002
-} pcilib_kmem_type_t;
-
-typedef enum {
-    PCILIB_KMEM_USE_STANDARD = 0,
-    PCILIB_KMEM_USE_DMA_RING = 1,
-    PCILIB_KMEM_USE_DMA_PAGES = 2,
-    PCILIB_KMEM_USE_USER = 0x10
-} pcilib_kmem_use_t;
-
-typedef enum {
-    PCILIB_KMEM_SYNC_BIDIRECTIONAL = 0,
-    PCILIB_KMEM_SYNC_TODEVICE = 1,
-    PCILIB_KMEM_SYNC_FROMDEVICE = 2
-} pcilib_kmem_sync_direction_t;
-
-
-#define PCILIB_KMEM_USE(type, subtype) (((type) << 16)|(subtype))
-
-
-//pcilib_alloc_kmem_buffer(pcilib_t *ctx, size_t size, size_t alignment)
-
-
-#endif /* _PCILIB_TYPES_H */

protocols/CMakeLists.txt

@@ -0,0 +1,8 @@
+include_directories(
+    ${CMAKE_SOURCE_DIR}
+)
+
+
+set(HEADERS ${HEADERS} default.h)
+
+add_library(protocols STATIC default.c)

protocols/default.c

@@ -0,0 +1,40 @@
+#include <sys/time.h>
+#include <arpa/inet.h>
+#include <assert.h>
+
+#include "tools.h"
+#include "model.h"
+#include "error.h"
+
+#define default_datacpy(dst, src, access, bank)   pcilib_datacpy(dst, src, access, 1, bank->raw_endianess)
+
+int pcilib_default_read(pcilib_t *ctx, pcilib_register_bank_context_t *bank_ctx, pcilib_register_addr_t addr, pcilib_register_value_t *value) {
+    char *ptr;
+    pcilib_register_value_t val = 0;
+    
+    const pcilib_register_bank_description_t *b = bank_ctx->bank;
+
+    int access = b->access / 8;
+
+    ptr =  pcilib_resolve_register_address(ctx, b->bar, b->read_addr + addr);
+    default_datacpy(&val, ptr, access, b);
+
+//    *value = val&BIT_MASK(bits);
+    *value = val;
+
+    return 0;
+}
+
+
+int pcilib_default_write(pcilib_t *ctx, pcilib_register_bank_context_t *bank_ctx, pcilib_register_addr_t addr, pcilib_register_value_t value) {
+    char *ptr;
+
+    const pcilib_register_bank_description_t *b = bank_ctx->bank;
+
+    int access = b->access / 8;
+
+    ptr =  pcilib_resolve_register_address(ctx, b->bar, b->write_addr + addr);
+    default_datacpy(ptr, &value, access, b);
+
+    return 0;
+}

protocols/default.h

@@ -0,0 +1,15 @@
+#ifndef _PCILIB_DEFAULT_H
+#define _PCILIB_DEFAULT_H
+
+#include "pcilib.h"
+#include "model.h"
+
+int pcilib_default_read(pcilib_t *ctx, pcilib_register_bank_context_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t *value);
+int pcilib_default_write(pcilib_t *ctx, pcilib_register_bank_context_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t value);
+
+#ifdef _PCILIB_CONFIG_C
+static pcilib_register_protocol_api_description_t pcilib_default_protocol_api =
+    { NULL, NULL, pcilib_default_read, pcilib_default_write };
+#endif /* _PCILIB_CONFIG_C */
+
+#endif /* _PCILIB_DEFAULT_H */

register.c

@@ -13,135 +13,58 @@
 #include <assert.h>
 
 #include "pci.h"
+#include "bank.h"
 
 #include "tools.h"
 #include "error.h"
 
-int pcilib_add_registers(pcilib_t *ctx, size_t n, pcilib_register_description_t *registers) {
+
+int pcilib_add_registers(pcilib_t *ctx, size_t n, const pcilib_register_description_t *registers) {
+	// DS: What we are doing if register exists?
+	
     pcilib_register_description_t *regs;
-    size_t size, n_present = 0;
+    size_t size;
 
     if (!n) {
 	for (n = 0; registers[n].bits; n++);
     }
 
-    if (ctx->model_info.registers == pcilib_model[ctx->model].registers) {
-        for (n_present = 0; ctx->model_info.registers[n_present].bits; n_present++);
-	for (size = 1024; size < 2 * (n + n_present + 1); size<<=1);
-	regs = (pcilib_register_description_t*)malloc(size * sizeof(pcilib_register_description_t));
+    if ((ctx->num_reg + n + 1) > ctx->alloc_reg) {
+	for (size = ctx->alloc_reg; size < 2 * (n + ctx->num_reg + 1); size<<=1);
+
+	regs = (pcilib_register_description_t*)realloc(ctx->registers, size * sizeof(pcilib_register_description_t));
 	if (!regs) return PCILIB_ERROR_MEMORY;
-	
+
+	ctx->registers = regs;
 	ctx->model_info.registers = regs;
-	ctx->num_reg = n + n_present;
 	ctx->alloc_reg = size;
-	
-	memcpy(ctx->model_info.registers, pcilib_model[ctx->model].registers, (n_present + 1) * sizeof(pcilib_register_description_t));
-    } else {
-	n_present = ctx->num_reg;
-	if ((n_present + n + 1) > ctx->alloc_reg) {
-	    for (size = ctx->alloc_reg; size < 2 * (n + n_present + 1); size<<=1);
-
-	    regs = (pcilib_register_description_t*)realloc(ctx->model_info.registers, size * sizeof(pcilib_register_description_t));
-	    if (!regs) return PCILIB_ERROR_MEMORY;
-
-	    ctx->model_info.registers = regs;
-	    ctx->alloc_reg = size;
-	}
-	ctx->num_reg += n;
     }
 
-    memcpy(ctx->model_info.registers + ctx->num_reg, ctx->model_info.registers + n_present, sizeof(pcilib_register_description_t));
-    memcpy(ctx->model_info.registers + n_present, registers, n * sizeof(pcilib_register_description_t));
+    memcpy(ctx->registers + ctx->num_reg, registers, n * sizeof(pcilib_register_description_t));
+    memset(ctx->registers + ctx->num_reg + n, 0, sizeof(pcilib_register_description_t));
+    ctx->num_reg += n;
 
     return 0;
 }
 
-pcilib_register_bank_t pcilib_find_bank_by_addr(pcilib_t *ctx, pcilib_register_bank_addr_t bank) {
-    pcilib_register_bank_t i;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-    pcilib_register_bank_description_t *banks = model_info->banks;
-
-    for (i = 0; banks[i].access; i++)
-	if (banks[i].addr == bank) return i;
-
-    return -1;
-}
-
-pcilib_register_bank_t pcilib_find_bank_by_name(pcilib_t *ctx, const char *bankname) {
-    pcilib_register_bank_t i;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-    pcilib_register_bank_description_t *banks = model_info->banks;
-
-    for (i = 0; banks[i].access; i++)
-	if (!strcasecmp(banks[i].name, bankname)) return i;
-
-    return -1;
-}
-
-pcilib_register_bank_t pcilib_find_bank(pcilib_t *ctx, const char *bank) {
-    pcilib_register_bank_t res;
-    unsigned long addr;
-    
-    if (!bank) {
-        pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-	pcilib_register_bank_description_t *banks = model_info->banks;
-	if ((banks)&&(banks[0].access)) return (pcilib_register_bank_t)0;
-	return -1;
-    }
-    
-    if (pcilib_isxnumber(bank)&&(sscanf(bank,"%lx", &addr) == 1)) {
-	res = pcilib_find_bank_by_addr(ctx, addr);
-	if (res != PCILIB_REGISTER_BANK_INVALID) return res;
-    }
-    
-    return pcilib_find_bank_by_name(ctx, bank);
-}
-
-    // FIXME create hash during map_register space
-pcilib_register_t pcilib_find_register(pcilib_t *ctx, const char *bank, const char *reg) {
-    pcilib_register_t i;
-    pcilib_register_bank_t bank_id;
-    pcilib_register_bank_addr_t bank_addr = 0;
-
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-    pcilib_register_description_t *registers =  model_info->registers;
-    
-    if (bank) {
-	bank_id = pcilib_find_bank(ctx, bank);
-	if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
-	    pcilib_error("Invalid bank (%s) is specified", bank);
-	    return -1;
-	}
-	
-	bank_addr = model_info->banks[bank_id].addr;
-    }
-    
-    for (i = 0; registers[i].bits; i++) {
-	if ((!strcasecmp(registers[i].name, reg))&&((!bank)||(registers[i].bank == bank_addr))) return i;
-    }
-    
-    if ((ctx->model_info.dma_api)&&(!ctx->dma_ctx)&&(pcilib_get_dma_info(ctx))) {
-        registers =  model_info->registers;
-
-	for (; registers[i].bits; i++) {
-	    if ((!strcasecmp(registers[i].name, reg))&&((!bank)||(registers[i].bank == bank_addr))) return i;
-	}
-    }
-    
-    return (pcilib_register_t)-1;
-};
 
 static int pcilib_read_register_space_internal(pcilib_t *ctx, pcilib_register_bank_t bank, pcilib_register_addr_t addr, size_t n, pcilib_register_size_t offset, pcilib_register_size_t bits, pcilib_register_value_t *buf) {
     int err;
     size_t i;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-    pcilib_register_bank_description_t *b = model_info->banks + bank;
-    
+
+    pcilib_register_bank_context_t *bctx = ctx->bank_ctx[bank];
+    const pcilib_register_protocol_api_description_t *bapi = bctx->api;
+    const pcilib_register_bank_description_t *b = bctx->bank;
+
     int access = b->access / 8;
 
     assert(bits < 8 * sizeof(pcilib_register_value_t));
-    
+
+    if (!bapi->read) {
+	pcilib_error("Used register protocol does not define a way to read register value");
+	return PCILIB_ERROR_NOTSUPPORTED;
+    }
+
     if (((addr + n) > b->size)||(((addr + n) == b->size)&&(bits))) {
 	if ((b->format)&&(strchr(b->format, 'x')))
 	    pcilib_error("Accessing register (%u regs at addr 0x%x) out of register space (%u registers total)", bits?(n+1):n, addr, b->size);
@@ -150,23 +73,20 @@ static int pcilib_read_register_space_internal(pcilib_t *ctx, pcilib_register_ba
 	return PCILIB_ERROR_OUTOFRANGE;
     }
 
-    err = pcilib_map_register_space(ctx);
-    if (err) {
-	pcilib_error("Failed to map the register space");
-	return err;
-    }
+    //err = pcilib_init_register_banks(ctx);
+    //if (err) return err;
     
     //n += bits / b->access;
     //bits %= b->access; 
     
     for (i = 0; i < n; i++) {
-	err = pcilib_protocol[b->protocol].read(ctx, b, addr + i * access, buf + i);
+	err = bapi->read(ctx, bctx, addr + i * access, buf + i);
 	if (err) break;
     }
     
     if ((bits > 0)&&(!err)) {
 	pcilib_register_value_t val = 0;
-	err = pcilib_protocol[b->protocol].read(ctx, b, addr + n * access, &val);
+	err = bapi->read(ctx, bctx, addr + n * access, &val);
 
 	val = (val >> offset)&BIT_MASK(bits);
 	memcpy(buf + n, &val, sizeof(pcilib_register_value_t));
@@ -176,7 +96,7 @@ static int pcilib_read_register_space_internal(pcilib_t *ctx, pcilib_register_ba
 }
 
 int pcilib_read_register_space(pcilib_t *ctx, const char *bank, pcilib_register_addr_t addr, size_t n, pcilib_register_value_t *buf) {
-    pcilib_register_bank_t bank_id = pcilib_find_bank(ctx, bank);
+    pcilib_register_bank_t bank_id = pcilib_find_register_bank(ctx, bank);
     if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
 	if (bank) pcilib_error("Invalid register bank is specified (%s)", bank);
 	else pcilib_error("Register bank should be specified");
@@ -192,13 +112,13 @@ int pcilib_read_register_by_id(pcilib_t *ctx, pcilib_register_t reg, pcilib_regi
     pcilib_register_size_t bits;
     pcilib_register_value_t res;
     pcilib_register_bank_t bank;
-    pcilib_register_description_t *r;
-    pcilib_register_bank_description_t *b;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_register_description_t *r;
+    const pcilib_register_bank_description_t *b;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
     r = model_info->registers + reg;
     
-    bank = pcilib_find_bank_by_addr(ctx, r->bank);
+    bank = pcilib_find_register_bank_by_addr(ctx, r->bank);
     if (bank == PCILIB_REGISTER_BANK_INVALID) return PCILIB_ERROR_INVALID_BANK;
     
     b = model_info->banks + bank;
@@ -228,13 +148,13 @@ int pcilib_read_register_by_id(pcilib_t *ctx, pcilib_register_t reg, pcilib_regi
 
 int pcilib_read_register(pcilib_t *ctx, const char *bank, const char *regname, pcilib_register_value_t *value) {
     int reg;
-    
+
     reg = pcilib_find_register(ctx, bank, regname);
     if (reg < 0) {
 	pcilib_error("Register (%s) is not found", regname);
 	return PCILIB_ERROR_NOTFOUND;
     }
-    
+
     return pcilib_read_register_by_id(ctx, reg, value);
 }
 
@@ -242,14 +162,20 @@ int pcilib_read_register(pcilib_t *ctx, const char *bank, const char *regname, p
 static int pcilib_write_register_space_internal(pcilib_t *ctx, pcilib_register_bank_t bank, pcilib_register_addr_t addr, size_t n, pcilib_register_size_t offset, pcilib_register_size_t bits, pcilib_register_value_t rwmask, pcilib_register_value_t *buf) {
     int err;
     size_t i;
-    
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
-    pcilib_register_bank_description_t *b = model_info->banks + bank;
+
+    pcilib_register_bank_context_t *bctx = ctx->bank_ctx[bank];
+    const pcilib_register_protocol_api_description_t *bapi = bctx->api;
+    const pcilib_register_bank_description_t *b = bctx->bank;
 
     int access = b->access / 8;
 
     assert(bits < 8 * sizeof(pcilib_register_value_t));
 
+    if (!bapi->write) {
+	pcilib_error("Used register protocol does not define a way to write value into the register");
+	return PCILIB_ERROR_NOTSUPPORTED;
+    }
+
     if (((addr + n) > b->size)||(((addr + n) == b->size)&&(bits))) {
 	if ((b->format)&&(strchr(b->format, 'x')))
 	    pcilib_error("Accessing register (%u regs at addr 0x%x) out of register space (%u registers total)", bits?(n+1):n, addr, b->size);
@@ -258,17 +184,14 @@ static int pcilib_write_register_space_internal(pcilib_t *ctx, pcilib_register_b
 	return PCILIB_ERROR_OUTOFRANGE;
     }
 
-    err = pcilib_map_register_space(ctx);
-    if (err) {
-	pcilib_error("Failed to map the register space");
-	return err;
-    }
+    //err = pcilib_init_register_banks(ctx);
+    //if (err) return err;
     
     //n += bits / b->access;
     //bits %= b->access; 
     
     for (i = 0; i < n; i++) {
-	err = pcilib_protocol[b->protocol].write(ctx, b, addr + i * access, buf[i]);
+	err = bapi->write(ctx, bctx, addr + i * access, buf[i]);
 	if (err) break;
     }
     
@@ -278,21 +201,26 @@ static int pcilib_write_register_space_internal(pcilib_t *ctx, pcilib_register_b
 
 	if (~mask&rwmask) {
 	    pcilib_register_value_t rval;
-	    
-	    err = pcilib_protocol[b->protocol].read(ctx, b, addr + n * access, &rval); 
+
+	    if (!bapi->read) {
+		pcilib_error("Used register protocol does not define a way to read register. Therefore, it is only possible to write a full bank word, not partial as required by the accessed register");
+		return PCILIB_ERROR_NOTSUPPORTED;
+	    }
+
+	    err = bapi->read(ctx, bctx, addr + n * access, &rval); 
 	    if (err) return err;
-	    
+
 	    val |= (rval & rwmask & ~mask);
 	}
 	
-	err = pcilib_protocol[b->protocol].write(ctx, b, addr + n * access, val);
+	err = bapi->write(ctx, bctx, addr + n * access, val);
     }
     
     return err;
 }
 
 int pcilib_write_register_space(pcilib_t *ctx, const char *bank, pcilib_register_addr_t addr, size_t n, pcilib_register_value_t *buf) {
-    pcilib_register_bank_t bank_id = pcilib_find_bank(ctx, bank);
+    pcilib_register_bank_t bank_id = pcilib_find_register_bank(ctx, bank);
     if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
 	if (bank) pcilib_error("Invalid register bank is specified (%s)", bank);
 	else pcilib_error("Register bank should be specified");
@@ -309,13 +237,13 @@ int pcilib_write_register_by_id(pcilib_t *ctx, pcilib_register_t reg, pcilib_reg
     pcilib_register_size_t bits;
     pcilib_register_bank_t bank;
     pcilib_register_value_t res;
-    pcilib_register_description_t *r;
-    pcilib_register_bank_description_t *b;
-    pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
+    const pcilib_register_description_t *r;
+    const pcilib_register_bank_description_t *b;
+    const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
 
     r = model_info->registers + reg;
 
-    bank = pcilib_find_bank_by_addr(ctx, r->bank);
+    bank = pcilib_find_register_bank_by_addr(ctx, r->bank);
     if (bank == PCILIB_REGISTER_BANK_INVALID) return PCILIB_ERROR_INVALID_BANK;
 
     b = model_info->banks + bank;

register.h

@@ -1,14 +1,51 @@
 #ifndef _PCILIB_REGISTER_H
 #define _PCILIB_REGISTER_H
 
-#include "pcilib.h"
+#include <pcilib.h>
+#include <bank.h>
 
-struct pcilib_protocol_description_s {
-    int (*read)(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t *value);
-    int (*write)(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t value);
-};
+typedef enum {
+    PCILIB_REGISTER_R = 1,			/**< reading from register is allowed */
+    PCILIB_REGISTER_W = 2,			/**< normal writting to register is allowed */
+    PCILIB_REGISTER_RW = 3,
+    PCILIB_REGISTER_W1C = 4,			/**< writting 1 resets the bit, writting 0 keeps the value */
+    PCILIB_REGISTER_RW1C = 5,
+    PCILIB_REGISTER_W1I = 8,			/**< writting 1 inversts the bit, writting 0 keeps the value */
+    PCILIB_REGISTER_RW1I = 9,
+} pcilib_register_mode_t;
+
+typedef enum {
+    PCILIB_REGISTER_STANDARD = 0,
+    PCILIB_REGISTER_FIFO,
+    PCILIB_REGISTER_BITS
+} pcilib_register_type_t;
+
+typedef struct {
+    pcilib_register_addr_t addr;		/**< Register address in the bank */
+    pcilib_register_size_t offset;		/**< Register offset in the byte (in bits) */
+    pcilib_register_size_t bits;		/**< Register size in bits */
+    pcilib_register_value_t defvalue;		/**< Default register value (some protocols, i.e. software registers, may set it during the initialization) */
+    pcilib_register_value_t rwmask;		/**< Used to define how external bits of PCILIB_REGISTER_BITS registers are treated. 
+						To keep bit value unchanged, we need to observe the following behavior depending on status of corresponding bit in this field:
+						1 - standard bit (i.e. if we want to keep the bit value we need to read it, and, the write back), 
+						0 - non-standard bit which behavior is defined by mode (only partially implemented. 
+						    so far only 1C/1I modes (zero should be written to preserve the value) are supported */
+    pcilib_register_mode_t mode;		/**< Register access (ro/wo/rw) and how writting to register works (if value just set as specified or, for instance, the bits which
+						are on in the value are cleared/inverted). For information only, no preprocessing on bits is performed. */
+    pcilib_register_type_t type;		/**< Defines type of register is it standard register, subregister for bit fields or view, fifo */
+    pcilib_register_bank_addr_t bank;		/**< Specified the address of the bank this register belongs to */
+    
+    const char *name;				/**< The access name of the register */
+    const char *description;			/**< Brief description of the register */
+} pcilib_register_description_t;
+
+/*
+typedef struct {
+    pcilib_register_bank_t bank;
+} pcilib_register_context_t;
+*/
+
+int pcilib_add_registers(pcilib_t *ctx, size_t n, const pcilib_register_description_t *registers);
 
-    // we don't copy strings, they should be statically allocated
-int pcilib_add_registers(pcilib_t *ctx, size_t n, pcilib_register_description_t *registers);
 
 #endif /* _PCILIB_REGISTER_H */

tests/heb/DataTaking.sh

@@ -1,96 +0,0 @@
-#!/bin/bash
-
-#Channel 1 --> 05
-#Channel 2 --> 0B
-#Channel 1&2 --> 0F
-#Channel 3 --> 13
-#Channel 4 --> 23
-#Channel 3&4 --> 33
-#ALL --> 3F
-
-#rm *.out
-pci -r dma1 --multipacket -o /dev/null
-
-echo "Start DMA ..... "
-#pci --start-dma dma1
-sleep 0.2
-
-echo "Data Reset ... "
-pci -w 0x9040 000003f1 
-sleep 0.1
-pci -w 0x9040 000003f0 
-
-sleep 0.1
-#echo "Pilot bunch emulator ..... "
-#pci -w 0x9040 400003f0 
-sleep 0.2
-pci -w 0x9040 03f0 
-#pci -r 0x9000 -s 40
-#sleep 0.2
-echo "Start data pci. ..... "
-pci -w 0x9040 00bf0 
-
-sleep 2
-
-echo "Stop data acquis...... "
-pci -w 0x9040 003f0 
-pci -r 0x9000 -s 40
-sleep 0.1
-echo "Enable data transfer.... "
-pci -w 0x9040 007f0 
-exit
-sleep 2
-pci -r dma1 -o run_num_$1.out --multipacket
-sleep 2
-
-pci -w 0x9040 003f0 
-#echo "Status ... "
-
-
-
-pci -r 0x9000 -s 40
-
-   status=`pci -r 0x9050 -s 1 | awk '{print $2$3$4}'`
-    if [ "$status" != "85000021" ]; then
-       echo "--------------------------------->>>> ERROR! ... "
-       error=1
-       exit
-    else 
-       echo " Status 1 -> OK "	
-    fi	
-	
-   status=`pci -r 0x9000 -s 1 | awk '{print $2$3$4}'`
-    if [ "$status" != "01000021" ]; then
-       echo "--------------------------------->>>> ERROR! ... "
-       error=1
-        exit
-    else 
-       echo " Status 1 Readout -> OK "	
-   fi
-    
-status=`pci -r 0x9008 -s 1 | awk '{print $2$3$4}'`
-    if [ "$status" != "01000021" ]; then
-       echo "--------------------------------->>>> ERROR! ... "
-       error=1
-        exit
-    else 
-       echo " Status 2 Readout -> OK "	
-   fi
-
-status=`pci -r 0x9010 -s 1 | awk '{print $2$3$4}'`
-    if [ "$status" != "01000021" ]; then
-       echo "--------------------------------->>>> ERROR! ... "
-       error=1
-        exit
-    else 
-       echo " Status 3 Readout -> OK "	
-   fi
-
-status=`pci -r 0x9018 -s 1 | awk '{print $2$3$4}'`
-    if [ "$status" != "01000021" ]; then
-       echo "--------------------------------->>>> ERROR! ... "
-       error=1
-        exit
-    else 
-       echo " Status 4 Readout -> OK "	
-   fi

tests/heb/cfg/BoardOFF.sh

@@ -1,11 +0,0 @@
-#!/bin/bash
-
-
-echo " ************************************************************** "
-echo " 			Board OFF"
-echo " ************************************************************** "
-
-pci -w 0x9040 0x01
-sleep 0.5
-
-pci --stop-dma dma1

tests/heb/cfg/BoardOn.sh

@@ -1,57 +0,0 @@
-#!/bin/bash
-
-echo " ************************************************************** "
-echo "				Start DMA"
-echo " ************************************************************** "
-
-pci --start-dma dma1
-sleep 0.5
-pci  --list-dma-engines
-
-
-echo " ************************************************************** "
-echo " 			Board ON procedure"
-echo " ************************************************************** "
-
-pci -w 0x9040 0x01
-sleep 1
-
-echo "switch ON the power supply  --> FIRST <--"
-echo "Press a key to continue ...."
-read -n 1 -s
-
-echo "Switch ON T/Hs"
-pci -w 0x9040 0x3C1
-pci -r 0x9040 -s1
-
-echo "switch ON the power supply  --> SECOND <--"
-echo "Press a key to continue ...."
-read -n 1 -s
-
-echo "Switch ON ADCs"
-pci -w 0x9040 0x3F1
-pci -r 0x9040 -s1
-sleep 0.1
-
-
-pci -w 0x9040 0x3F0 
-pci -r 0x9040 -s1
-sleep 1
-
-echo " Status ................... "
-pci -r 0x9000 -s 40
-
-
-
-./PLL_conf_calib_3001.sh
-
-echo " Status ................... "
-pci -r 0x9000 -s 40
-
-
-echo " ************************************************************** "
-echo "				Board Ready"
-echo " ************************************************************** "
-
-
-echo " --> remember to run: ./Set_Default.sh"

tests/heb/cfg/README

@@ -1,11 +0,0 @@
- - Initializing
-    ./BoardOn.sh
-    ./Set_Default.sh
-
- - Configuring the size
-    pci -w 9020 0x20 (linear scale)
-
-    * Number of samples are determined by 0x9020 / 0x9028 (0x0e by default)
-    * For each sample is descibed by (184 / 2) * 128 bits
-    * Where most-significant bytes of 4 dwords (128 bit) are iterating 
-    from 0x00 to 0xb8 with step 0x02

tests/heb/cfg/Set_ADC_1_Delay.sh

@@ -1,10 +0,0 @@
-#!/bin/bash
-
-echo "Set CH_4 clock ADC 1 delay... "
-
-upfix=000501
-fixed=4
-
-    hex_val=$(printf "%01x\n" $1)
-    echo "Set $hex_val --> Time value picosecond = `expr $1 "*" 150`."
-    pci -w 0x9060 $upfix$hex_val$fixed

tests/heb/cfg/Set_ADC_2_Delay.sh

@@ -1,10 +0,0 @@
-#!/bin/bash
-
-echo "Set CH_5 clock ADC 2 delay... "
-
-upfix=000501
-fixed=5
-
-    hex_val=$(printf "%01x\n" $1)
-    echo "Set $hex_val --> Time value picosecond = `expr $1 "*" 150`."
-    pci -w 0x9060 $upfix$hex_val$fixed

tests/heb/cfg/Set_ADC_3_Delay.sh

@@ -1,10 +0,0 @@
-#!/bin/bash
-
-echo "Set CH_6 clock ADC 3 delay... "
-
-upfix=000501
-fixed=6
-
-    hex_val=$(printf "%01x\n" $1)
-    echo "Set $hex_val --> Time value picosecond = `expr $1 "*" 150`."
-    pci -w 0x9060 $upfix$hex_val$fixed

tests/heb/cfg/Set_ADC_4_Delay.sh

@@ -1,11 +0,0 @@
-#!/bin/bash
-
-echo "Set CH_7 clock ADC 4 delay... "
-
-upfix=000501
-fixed=7
-
-    hex_val=$(printf "%01x\n" $1)
-    echo "Set $hex_val --> Time value picosecond = `expr $1 "*" 150`."
-    pci -w 0x9060 $upfix$hex_val$fixed
-

tests/heb/cfg/Set_Default.sh

@@ -1,30 +0,0 @@
-#!/bin/bash
-
-echo "Set Defaults delay value in the board... "
-
-./Set_FPGA_clock_delay.sh 0
-sleep 0.1
-
- ./Set_Delay_chip.sh 16 16 16 16
-sleep 0.1
-
-./Set_TH_Delay.sh 12
-sleep 0.1
-
-./Set_ADC_1_Delay.sh 5
-sleep 0.1
-
-./Set_ADC_2_Delay.sh 5
-sleep 0.1
-
-./Set_ADC_3_Delay.sh 5
-sleep 0.1
-
-./Set_ADC_4_Delay.sh 5
-
-#pci -w 0x9020 200b20
-pci -w 0x9020 20
-pci -w 0x9028 e
-
-echo " DONE ................ "
-

tests/heb/cfg/Set_Delay_chip.sh

@@ -1,11 +0,0 @@
-#!/bin/bash
-
-    zero=0
-    hex_val1=$(printf "%02x\n" $1)
-    hex_val2=$(printf "%02x\n" $2)
-    hex_val3=$(printf "%02x\n" $3)
-    hex_val4=$(printf "%02x\n" $4)
-
-    pci -w 0x9080 $zero$hex_val4$hex_val3$hex_val2$hex_val1
-    pci -r 0x9080 -s 1
-    sleep 0.5			    

tests/heb/cfg/Set_FPGA_clock_delay.sh

@@ -1,10 +0,0 @@
-#!/bin/bash
-
-echo "Set delay on T/Hs signals... "
-
-upfix=000501
-fixed=0
-
-    hex_val=$(printf "%01x\n" $1)
-    echo "Set $hex_val --> Time picosecond = `expr $1 "*" 150`."
-    pci -w 0x9060 $upfix$hex_val$fixed

tests/heb/cfg/Set_TH_Delay.sh

@@ -1,10 +0,0 @@
-#!/bin/bash
-
-echo "Set delay on T/Hs signals... "
-
-upfix=000501
-fixed=3
-
-    hex_val=$(printf "%01x\n" $1)
-    echo "Set $hex_val --> Time picosecond = `expr $1 "*" 150`."
-    pci -w 0x9060 $upfix$hex_val$fixed

tests/heb/debug/debug.sh

@@ -1,45 +0,0 @@
-#! /bin/bash
-
-SCRIPT_PATH="`dirname \"$0\"`" 
-SCRIPT_PATH="`( cd \"$TESTS_PATH\" && pwd )`"
-PCILIB_PATH=${SCRIPT_PATH%/tests/*}
-
-function pci {
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-function strip_bad_values {
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/apps/heb_strip_bad_values $*
-}
-
-function request_data {
-    $PCILIB_PATH/tests/heb/debug/request_data.sh $*
-}
-
-while [ 1 ]; do
-    from=`pci --list-dma-engines | grep C2S | sed -s 's/\s\+/ /g' | cut -d ' ' -f 6`
-    to=`pci --list-dma-engines | grep C2S | sed -s 's/\s\+/ /g' | cut -d ' ' -f 8`
-
-    if [ $from -gt $to ]; then
-	buffers="`seq $from 255` `seq 0 $to`"
-    else
-	buffers=`seq $from $to`
-    fi
-
-    echo $buffers
-
-    rm data.out
-    for i in $buffers; do
-	pci --read-dma-buffer dma1r:$i -o data.out
-    done
-
-
-    error=`strip_bad_values data.out | head -n 1 | cut -f 1 -d ':'`
-    if [ $error != "0x1140" ]; then
-	echo "Problems found"
-	exit
-    else
-	echo "Fine"
-	request_data
-    fi
-done

tests/heb/debug/request_data.sh

@@ -1,27 +0,0 @@
-#!/bin/bash
-
-pci -r dma1 --multipacket -o /dev/null
-
-#echo "Data Reset ... "
-pci -w 0x9040 000003f1 
-sleep 0.1
-pci -w 0x9040 000003f0 
-
-sleep 0.1
-#echo "Pilot bunch emulator ..... "
-#pci -w 0x9040 400003f0 
-sleep 0.2
-pci -w 0x9040 03f0 
-#pci -r 0x9000 -s 40
-#sleep 0.2
-#echo "Start data pci. ..... "
-pci -w 0x9040 00bf0 
-
-sleep 2
-
-#echo "Stop data acquis...... "
-pci -w 0x9040 003f0 
-pci -r 0x9000 -s 40
-sleep 0.1
-#echo "Enable data transfer.... "
-pci -w 0x9040 007f0 

tests/ipecamera/bench.sh

@@ -1,34 +0,0 @@
-#!/bin/bash
-
-function pci {
-    PCILIB_PATH="/root/pcitool"
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-size=16
-bytes=`expr $size "*" 4`
-
-rm -f bench.out 
-pci --stop-dma dma1
-pci --reset
-
-#pci -w xrawdata_packet_length $bytes
-
-pci --start-dma dma1
-pci -w control 0x1e5
-sleep 1
-pci -w control 0x1e1
-
-sleep 1
-pci -w control 0x3e1
-for i in `seq 1 10`; do
-#    pci -w control 0x1e1
-    pci -w dma1 -s $size "*$i"
-#    pci -w control 0x3e1
-    usleep 100000
-    pci -r dma1 -s $size -o bench.out
-done
-
-pci -w control 0x1e1
-pci --stop-dma dma1
-

tests/ipecamera/cfg/Reset_Init_all_reg_10bit.sh

@@ -1,326 +0,0 @@
-#!/bin/bash
-
-###################### by Michele Caselle and Uros Stafanovic ##################################################
-############ Resent procedure and camera initialization for 10 -bit mode ######################################
-
-error=0
-echo " Reset Readout and CMOSIS "
-pci -w 0x9040 80000204 
-sleep .1
-#echo " Release Reset for Readout"
-#pci -w 0x9040 800001e0
-sleep .1
-##################### PLL SET #####################################
-val=f501
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10 
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1		
-    # exit
-fi
-sleep 0.01
-echo " Start CMOSIS Configuration .."
-pci -w 0x9000 f301 
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "bf301" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-val=d207
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-
-# Michele 10 - 12 bit mode #
-# ###################################################################################################
-echo " 10 - bit mode, set Bit_mode "
-val=ef00 ######################################################
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-# Michele set ADC_resolution @ 12 bits
-echo " 10 bit mode, set ADC resolution 10 bits "
-val=f000 # qui for 10 - 11 - 12 bits ########################################################
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-
-# adc recommended 28=44
-val=e72c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val "
-    error=1
-    # exit
-fi
-sleep 0.01
-# ####################################################################################################
-
-################# CAMERA CONFIGURATION ############################################
-val=e603
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-
-val=d404
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-val=d501
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-# recommended is d840
-val=d840
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-# sleep 0.01
-# recommended is db40
-val=db40
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-val=de65
-# val=de0
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-sleep 0.01
-val=df6a
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-echo " End CMOSIS Configuration .."
-########################################################################################################
-echo " Write exp time......"
-
-######################################### EXP TIME #######################################################
-val=aa25
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-# val=ab2c
-val=ab00
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-# val=acaa
-val=ac00
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-####################################################################################################################
-
-sleep 0.01
-#pci -w 0x9040 80000201
-sleep 0.01
-########################## WRITE THE READOUT NUMBER OF LINE #######################################################
-pci -w cmosis_number_lines 1088
-#pci -w number_lines 8
-sleep 0.01
-#################################################################################################################
-pci --start-dma dma1
-sleep 0.01
-#VRAMP 6c is 108
-val=e26c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-#VRAMP 6c is 108
-val=e36c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-###################################### NUMBER OF OUTPUT ############################################################
-##pci -w 0x9000 0xc803
-sleep 0.01
-val=c800 
-pci -w 0x9000 $val
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-#pci -r 0x9000 -s 10
-
-sleep 0.01
-#pci -w 0x9000 0xd011
-sleep 0.01
-#pci -r 0x9000 -s 10
-
-sleep 0.01
-#pci -w 0x9000 0xd111
-#########################################################################################################
-sleep 0.01
-
-
-
-##################################################
-#SET the max number of frame in DDR
-pci -w 0x91a0 0x71
-
-#echo " Reset Readout and CMOSIS "
-pci -w 0x9040 0x80000204
-sleep .1
-echo " Release Reset for Readout"
-pci -w 0x9040 0x80000201
-sleep .1
-
-status=`pci -r 0x9050 -s 4 | awk '{print $2$3$4}'`
-if [ "$status" != "8449ffff0f0010013ffff111" ]; then
-    echo "--------------------------------->>>> ERROR! in the camera status ... "
-    echo "  $status     "
-    error=1
-    # exit
-fi
-
-#echo "--> $status"
-
-if [ "$error" = "1" ]; then
-	echo " Error in the reset and initialization"
-else
-	echo " Camera READY ........................... OK"		
-fi
-echo 
-
-echo "DMA reset ... "
-pci --stop-dma dma1
-sleep 0.5
-pci --start-dma dma1
-
-

tests/ipecamera/cfg/Reset_Init_all_reg_10bit_4Mp.sh

@@ -1,325 +0,0 @@
-#!/bin/bash
-
-###################### by Michele Caselle and Uros Stafanovic ##################################################
-############ Resent procedure and camera initialization for 10 -bit mode ######################################
-
-error=0
-echo " Reset Readout and CMOSIS "
-pci -w 0x9040 80000204 
-sleep .1
-#echo " Release Reset for Readout"
-#pci -w 0x9040 800001e0
-sleep .1
-##################### PLL SET #####################################
-val=f501
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10 
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1		
-    # exit
-fi
-sleep 0.01
-echo " Start CMOSIS Configuration .."
-pci -w 0x9000 f301 
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "bf301" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-val=d207
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-
-# Michele 10 - 12 bit mode #
-# ###################################################################################################
-echo " 10 - bit mode, set Bit_mode "
-val=ef00 ######################################################
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-# Michele set ADC_resolution @ 12 bits
-echo " 10 bit mode, set ADC resolution 10 bits "
-val=f000 # qui for 10 - 11 - 12 bits ########################################################
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-
-# adc recommended 28=44
-val=e72c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val "
-    error=1
-    # exit
-fi
-sleep 0.01
-# ####################################################################################################
-
-################# CAMERA CONFIGURATION ############################################
-val=e603
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-
-val=d404
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-val=d501
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-# recommended is d840
-val=d840
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-# sleep 0.01
-# recommended is db40
-val=db40
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-val=de65
-# val=de0
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-sleep 0.01
-val=df6a
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-echo " End CMOSIS Configuration .."
-########################################################################################################
-echo " Write exp time......"
-
-######################################### EXP TIME #######################################################
-val=aa25
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-# val=ab2c
-val=ab00
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-# val=acaa
-val=ac00
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-####################################################################################################################
-
-sleep 0.01
-#pci -w 0x9040 80000201
-sleep 0.01
-########################## WRITE THE READOUT NUMBER OF LINE #######################################################
-pci -w cmosis_number_lines 2047
-#pci -w number_lines 8
-sleep 0.01
-#################################################################################################################
-pci --start-dma dma1
-sleep 0.01
-#VRAMP 6c is 108
-val=e26c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-#VRAMP 6c is 108
-val=e36c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-sleep 0.01
-###################################### NUMBER OF OUTPUT ############################################################
-##pci -w 0x9000 0xc803
-sleep 0.01
-val=c800 
-pci -w 0x9000 $val
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error=1
-    # exit
-fi
-#pci -r 0x9000 -s 10
-
-sleep 0.01
-#pci -w 0x9000 0xd011
-sleep 0.01
-#pci -r 0x9000 -s 10
-
-sleep 0.01
-#pci -w 0x9000 0xd111
-#########################################################################################################
-sleep 0.01
-
-
-
-##################################################
-#SET the max number of frame in DDR
-pci -w 0x91a0 0x71
-
-#echo " Reset Readout and CMOSIS "
-pci -w 0x9040 0x80000204
-sleep .1
-echo " Release Reset for Readout"
-pci -w 0x9040 0x80000201
-sleep .1
-
-status=`pci -r 0x9050 -s 4 | awk '{print $2$3$4}'`
-if [ "$status" != "8449ffff0f0010013ffff111" ]; then
-    echo "--------------------------------->>>> ERROR! in the camera status ... "
-    error=1
-    # exit
-fi
-
-#echo "--> $status"
-
-if [ "$error" = "1" ]; then
-	echo " Error in the reset and initialization"
-else
-	echo " Camera READY ........................... OK"		
-fi
-echo 
-
-echo "DMA reset ... "
-pci --stop-dma dma1
-sleep 0.5
-pci --start-dma dma1
-
-

tests/ipecamera/cfg/Reset_Init_all_reg_11bit.sh

@@ -1,318 +0,0 @@
-#!/bin/bash
-
-###################### by Michele Caselle and Uros Stafanovic ##################################################
-############ Resent procedure and camera initialization for 12 -bit mode ######################################
-
-error=0
-echo " Reset Readout and CMOSIS "
-pci -w 0x9040 1e4 
-sleep .1
-echo " Release Reset for Readout"
-pci -w 0x9040 1e0
-sleep .1
-##################### PLL SET #####################################
-val=f501
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10 
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1		
-    # exit
-fi
-sleep 0.01
-echo " Start CMOSIS Configuration .."
-pci -w 0x9000 f301 
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "bf301" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-val=d207
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-
-# Michele 10 - 12 bit mode #
-# ###################################################################################################
-echo " 11 - bit mode, set Bit_mode "
-val=ef00 ######################################################
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-# Michele set ADC_resolution @ 12 bits
-echo " 11 bit mode, set ADC resolution 11 bits "
-val=f001 # qui for 10 - 11 - 12 bits ########################################################
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-
-# adc recommended 28=44
-val=e72c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val "
-    error =1
-    # exit
-fi
-sleep 0.01
-# ####################################################################################################
-
-################# CAMERA CONFIGURATION ############################################
-val=e603
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-
-val=d404
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-val=d501
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-# recommended is d840
-val=d840
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-# sleep 0.01
-# recommended is db40
-val=db40
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-val=de65
-# val=de0
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-sleep 0.01
-val=df6a
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-echo " End CMOSIS Configuration .."
-########################################################################################################
-echo " Write exp time......"
-
-######################################### EXP TIME #######################################################
-val=aa25
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-# val=ab2c
-val=ab02
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-# val=acaa
-val=ac00
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-####################################################################################################################
-
-sleep 0.01
-pci -w 0x9040 201
-sleep 0.01
-########################## WRITE THE READOUT NUMBER OF LINE #######################################################
-pci -w cmosis_number_lines 1088
-#pci -w number_lines 8
-sleep 0.01
-#################################################################################################################
-pci --start-dma dma1
-sleep 0.01
-#VRAMP 6c is 108
-val=e26c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-#VRAMP 6c is 108
-val=e36c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-########################################################################################################
-#pci -w 0x9000 0xc802
-##pci -w 0x9000 0xc803
-sleep 0.01
-val=c802
-pci -w 0x9000 $val
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-#pci -r 0x9000 -s 10
-
-##################################################
-#SET the max number of frame in DDR
-pci -w 0x91a0 0x1C
-
-sleep 0.01
-#pci -w 0x9000 0xd011
-sleep 0.01
-#pci -r 0x9000 -s 10
-
-sleep 0.01
-#pci -w 0x9000 0xd111
-#pci -r 0x9000 -s 10
-#########################################################################################################
-sleep 0.01
-
-status=`pci -r 0x9050 -s 4 | awk '{print $2$3$4}'`
-if [ "$status" != "8449ffff0f0010013ffff111" ]; then
-    echo "--------------------------------->>>> ERROR! in the camera status ... "
-    error =1
-    # exit
-fi
-
-#echo "--> $status"
-
-if [ "$error" = "1" ]; then
-	echo " Error in the resetand initialization"
-else
-	echo " Camera READY ........ OK"		
-fi
-echo 
-
-
-echo "DMA reset ... "
-pci --stop-dma dma1
-sleep 0.5
-pci --start-dma dma1
-

tests/ipecamera/cfg/Reset_Init_all_reg_12bit.sh

@@ -1,323 +0,0 @@
-#!/bin/bash
-
-###################### by Michele Caselle and Uros Stafanovic ##################################################
-############ Resent procedure and camera initialization for 12 -bit mode ######################################
-
-error=0
-echo " Reset Readout and CMOSIS "
-pci -w 0x9040 1e4 
-sleep .1
-echo " Release Reset for Readout"
-pci -w 0x9040 1e0
-sleep .1
-##################### PLL SET #####################################
-val=f501
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10 
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1		
-    # exit
-fi
-sleep 0.01
-echo " Start CMOSIS Configuration .."
-pci -w 0x9000 f301 
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "bf301" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-val=d207
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-
-# Michele 10 - 12 bit mode #
-# ###################################################################################################
-echo " 12 - bit mode, set Bit_mode "
-val=ef00 ######################################################
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-# Michele set ADC_resolution @ 12 bits
-echo " 12 bit mode, set ADC resolution 12 bits "
-val=f002 # qui for 10 - 11 - 12 bits ########################################################
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-
-# adc recommended 28=44
-val=e72c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val "
-    error =1
-    # exit
-fi
-sleep 0.01
-# ####################################################################################################
-
-################# CAMERA CONFIGURATION ############################################
-val=e603
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-
-val=d404
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-val=d501
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-# recommended is d840
-val=d840
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-# sleep 0.01
-# recommended is db40
-val=db40
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-val=de65
-# val=de0
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-sleep 0.01
-val=df6a
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-echo " End CMOSIS Configuration .."
-########################################################################################################
-echo " Write exp time......"
-
-######################################### EXP TIME #######################################################
-val=aa0f
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-# val=ab2c
-val=ab00
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-# val=acaa
-val=ac00
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-####################################################################################################################
-
-sleep 0.01
-pci -w 0x9040 201
-sleep 0.01
-########################## WRITE THE READOUT NUMBER OF LINE #######################################################
-pci -w cmosis_number_lines 1088
-#pci -w number_lines 8
-sleep 0.01
-#################################################################################################################
-pci --start-dma dma1
-sleep 0.01
-#VRAMP 6c is 108
-val=e26c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-#VRAMP 6c is 108
-val=e36c
-pci -w 0x9000 $val
-sleep 0.01
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-sleep 0.01
-########################################################################################################
-#pci -w 0x9000 0xc802
-##pci -w 0x9000 0xc803
-sleep 0.01
-val=c802
-pci -w 0x9000 $val
-#pci -r 0x9000 -s 10
-sleep 0.01
-value=`pci -r 0x9000 -s 8 | grep 9010 | awk '{print $2}' | cut -c 4-8`
-if [ "$value" != "b$val" ]; then
-    echo "--------------------------------->>>> ERROR! read value: ${value:1:4}, written value: $val"
-    error =1
-    # exit
-fi
-#pci -r 0x9000 -s 10
-
-sleep 0.01
-
-##################################################
-#SET the max number of frame in DDR
-pci -w 0x91a0 0x1C
-
-
-#pci -w 0x9000 0xd011
-sleep 0.01
-pci -r 0x9000 -s 10
-
-sleep 0.01
-#pci -w 0x9000 0xd111
-sleep 0.01
-pci -r 0x9000 -s 10
-#########################################################################################################
-sleep 0.1
-
-status=`pci -r 0x9050 -s 4 | awk '{print $2$3$4}'`
-if [ "$status" != "844950280f0010013ffff111" ]; then
-
-    echo "--------------------------------->>>> ERROR! in the camera status ... "
-    echo $status
-    error=1
-    # exit
-fi
-
-#echo "--> $status"
-
-if [ "$error" = "1" ]; then
-	echo " Error in the resetand initialization"
-else
-	echo " Camera READY ........ OK"		
-fi
-echo 
-
-
-
-echo "DMA reset ... "
-pci --stop-dma dma1
-sleep 0.5
-pci --start-dma dma1

tests/ipecamera/debug/incomplete.sh

@@ -1,37 +0,0 @@
-#! /bin/bash
-
-function pci {
-    PCILIB_PATH="/root/pcitool"
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-rm -f images.raw
-touch images.raw
-
-echo "Starting the grabber"
-pci --stop-dma
-pci --start-dma dma1
-pci -g -o images.raw --run-time 1000000000 &
-pid=$!
-
-usleep 1000000
-
-for i in `seq 1 100000`; do
-    old_size=`ls -la images.raw | cut -d " " -f 5`
-    echo "Trigger $i"
-    pci --trigger
-    usleep 100000
-    new_size=`ls -la images.raw | cut -d " " -f 5`
-    if [ $old_size -eq $new_size ]; then
-	sleep 2
-	new_size=`ls -la images.raw | cut -d " " -f 5`
-	if [ $old_size -eq $new_size ]; then
-	    echo "Incomplete frame..."
-	    killall -SIGINT pci
-	    break
-	fi
-    fi
-done
-
-echo "Waiting grabber to finish"
-wait $pid

tests/ipecamera/frame.sh

@@ -1,36 +0,0 @@
-#!/bin/bash
-
-TESTS_PATH="`dirname \"$0\"`"
-TESTS_PATH="`( cd \"$TESTS_PATH\" && pwd )`"
-
-function pci {
-    PCILIB_PATH=$TESTS_PATH/..
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-pci --stop-dma dma1
-#pci --reset
-
-echo "Set packet size 1024 .. "
-pci -w cmosis_number_lines 1088
-#pci -w xrawdata_packet_length 4096
-pci --start-dma dma1
-usleep 1000
-
-echo "Send frame request ... "
-pci -w control 1e9
-usleep 100000
-pci -w control 1e1
-usleep 100000
-
-echo "Enable Readout ... "
-pci -w control 3e1
-
-usleep 100000
-
-pci -r dma1 -o bench.out --multipacket
-
-pci -w control 1e1
-
-pci --stop-dma dma1
-

tests/ipecamera/frame_req.sh

@@ -1,27 +0,0 @@
-#!/bin/bash
-
-function pci {
-    PCILIB_PATH="/root/pcitool"
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-#pci --stop-dma dma1
-#pci --reset
-
-echo "Set packet size 1024 .. "
-pci -w cmosis_number_lines 1088
-#pci -w xrawdata_packet_length 4096
-pci --start-dma dma1
-usleep 1000
-
-echo "Send frame request ... "
-pci -w control 1e9
-usleep 100000
-pci -w control 1e1
-usleep 100000
-
-echo "Enable Readout 3... "
-pci -w control 3e1
-usleep 1000000
-pci -w control 1e1
-

tests/ipecamera/grab-hwtrigger.sh

@@ -1,20 +0,0 @@
-#! /bin/bash
-
-function pci {
-    PCILIB_PATH="/root/pcitool"
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-function enable_hw_trigger {
-    usleep 100000
-    pci -w control 0xa01
-}
-
-rm -f images.raw
-
-enable_hw_trigger &
-pid=$!
-
-echo "Starting the grabber"
-pci -g -o images.raw --run-time 60000000 --verbose 10 -o /dev/null
-wait $pid

tests/ipecamera/stimuli.sh

@@ -1,30 +0,0 @@
-#!/bin/bash
-
-function pci {
-    PCILIB_PATH="/root/pcitool"
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-rm -f bench.out
-
-echo "Set FFFF the frame space .."
-pci -w 0x9180 fff 
-
-echo "Set the number of frames .."
-pci -w reg9170 55
-
-pci --start-dma dma1
-
-echo "Send frame request ... "
-pci -w control 1f1
-usleep 100000
-pci -w control 1e1
-
-
-echo "Enable Readout ... "
-pci -w control 3e1
-pci -r dma1 -o bench.out --multipacket
-pci -w control 1e1
-
-pci --stop-dma dma1
-

tests/ipecamera/tests/loopback-test.sh

@@ -1,87 +0,0 @@
-#! /bin/bash
-
-TESTS_PATH="`dirname \"$0\"`" 
-TESTS_PATH="`( cd \"$TESTS_PATH\" && pwd )`"
-
-function pci {
-    PCILIB_PATH=$TESTS_PATH/..
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-function compare {
-    PCILIB_PATH=$TESTS_PATH/..
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/apps/compare_to_value $*
-}
-
-#size=`expr 1024 "*" 1024`
-size=`expr 1024 "*" 1`
-multiplier=2
-wait=0
-
-/root/pcitool/tests/ipecamera/frame.sh &> /dev/null
-rm -f bench.out
-
-pci --stop-dma dma1
-pci --start-dma dma1
-
-pci -r dma1 -s 16777216 --multipacket -o /dev/null &> /dev/null
-
-pci -r dma1 -s 1024 -o /dev/null | grep -i "Error (62)" &> /dev/null
-if [ $? -ne 0 ]; then
-    echo "There is data on dma..."
-    exit
-fi
-
-failed=0
-send=0
-errors=0
-err_num=0
-
-print_iters=`expr 2 + 1024 '*' 100 / $size`
-
-read_size=`expr $multiplier '*' $size`
-echo "Starting..."
-i=1
-
-pci -w 0x9040 0x201
-
-while [ 1 ]; do
-    if [ $wait -gt 0 ]; then
-	pci -w 0x9040 0x1
-    fi
-    
-    pci -w dma1 -s $size "*0x$i"
-    rm -f /tmp/camera-test.out
-    pci -r dma1 --wait --multipacket -s $read_size -o /tmp/camera-test.out -t 1000000 &> /dev/null
-    if [ $wait -gt 0 ]; then
-	wrdone=0
-	while [ $wrdone -eq 0 ]; do
-#	    pci --list-dma-engines
-	    pci --list-dma-engines | grep "DMA1 S2C" | grep "SD" #&> /dev/null
-	    wrdone=$?
-	done
-	pci -w 0x9040 0x201
-    fi
-
-    res=`compare /tmp/camera-test.out  $read_size "$i" 6 2 6`
-    if [ $? -eq 0 ]; then
-	err_cnt=`echo $res | cut -f 1 -d ' '`
-	if [ "$err_cnt" -ne 0 ]; then
-	    pci -r dma1 --wait --multipacket -o /tmp/camera-test.out -t 1000000 &> /dev/null
-	    cp /tmp/camera-test.out /tmp/camera-test.out.$err_num
-	    err_num=$(($err_num + 1))
-	fi
-	byte_cnt=`echo $res | cut -f 3 -d ' '`
-	send=$(($send + $byte_cnt * 4))
-	errors=$(($errors + $err_cnt * 4))
-    else 
-	failed=$(($failed + 1))
-    fi
-    
-    i=$((i + 1))
-    if [ $i -eq $print_iters ]; then
-	echo "Data send: $send bytes, Errors: $errors bytes, Failed exchanges: $failed"
-#	pci -r 0x9070 -s 4	
-	i=1
-    fi
-done

tests/ipecamera/tests/run-and-decode-test.sh

@@ -1,103 +0,0 @@
-#! /bin/bash
-
-location=/mnt/fast/
-#location="./"
-duration=10000000
-wait_frame=1000000
-
-TESTS_PATH="`dirname \"$0\"`" 
-TESTS_PATH="`( cd \"$TESTS_PATH\" && pwd )`"
-
-function pci {
-    PCILIB_PATH=$TESTS_PATH/..
-    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci $*
-}
-
-function stop {
-    usleep $duration
-    pci -w control 0x201 &> /dev/null
-}
-
-function reset {
-    pci -r 0x9000 -s 256 > $1.status
-    $TESTS_PATH/ipecamera/Reset_Init_all_reg_10bit.sh &> $1.reset 
-}
-
-
-$TESTS_PATH/ipecamera/cfg/Reset_Init_all_reg_10bit.sh &> /dev/null
-$TESTS_PATH/ipecamera/frame.sh &> /dev/null
-rm -f bench.out
-
-pci --stop-dma
-pci --start-dma dma1
-
-
-pci -r dma1 -s 16777216 --multipacket -o /dev/null &> /dev/null
-
-pci -r dma1 -s 1 | grep -i "Error (62)" &> /dev/null
-if [ $? -ne 0 ]; then
-    echo "There is data on dma..."
-    exit
-fi
-
-echo "Starting ... "
-
-decode_failures=0
-failures=0
-failed=0
-frames=0
-fpga_failures=0
-cmosis_failures=0
-frame_rate_failures=0
-
-iter=0
-while [ 1 ]; do
-    pci -w control 0xa01 &> /dev/null
-    stop &
-
-    output="$location/test$iter.out"
-    rm -f $output
-    pci -r dma1 -o $output  --wait --multipacket -t $wait_frame &> /dev/null
-
-    killall -9 usleep &> /dev/null
-    usleep 100000
-    pci -w control 0x201 &> /dev/null
-    
-    if [ -f $output ]; then
-	result=`ipedec -d -v --continue $output 2>&1 | grep -iE "failed|decoded"`
-	cur_failed=`echo $result | wc -l`
-	cur_decoded=`echo $result | tail -n 1 | grep -i decoded`
-	if [ $? -ne 0 -o $cur_failed -eq 0 ]; then
-	    ipedec -d -v --continue $output > $output.decode
-	    decode_failures=$(($decode_failures + 1))
-	    reset $output
-	else
-	    cur_failed=$(($cur_failed - 1))
-	    cur_frames=`echo $cur_decoded | cut -f 2 -d ' '`
-	    failed=$(($failed + $cur_failed))
-	    frames=$(($frames + $cur_frames))
-	    fpga_status=`pci -r 0x9054 | awk '{print $2;}' | cut -c 2`
-	    cmosis_status=`pci -r 0x9050 | awk '{print $2;}' | cut -c 3-4`
-	    if [ "$fpga_status" != "f" ]; then
-		fpga_failures=$(($fpga_failures + 1))
-		reset $output
-	    elif [ "$cmosis_status" == "7d" ]; then
-		cmosis_failures=$(($cmosis_failures + 1))
-		reset $output
-	    elif [ $cur_frames -lt 10 ]; then
-		frame_rate_failures=$(($frame_rate_failures + 1))
-		reset $output
-	    elif [ $cur_failed -eq 0 ]; then
-		rm -f $output
-	    else
-		reset $output
-	    fi
-	fi
-    else
-	failures=$(($failures + 1))
-	reset $output
-    fi
-
-    echo "Frames: $frames, Failed Frames: $failed, Failed Exchanges: $failures, Failed Decodings: $decode_failures, FPGA Failures: $fpga_failures, CMOSIS Failures: $cmosis_failures, Low Frame Rate: $frame_rate_failures"
-    iter=`expr $iter + 1`
-done

tests/ipedma/ipecamera-frame.sh

@@ -0,0 +1,48 @@
+#!/bin/bash
+
+TESTS_PATH="`dirname \"$0\"`"
+TESTS_PATH="`( cd \"$TESTS_PATH\" && pwd )`"
+
+function pci {
+    PCILIB_PATH=$TESTS_PATH/../../..
+    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci -m ipedma $*
+}
+
+
+rm bench.out
+
+pci --stop-dma dma0r
+#pci --reset
+
+echo "Set packet size 1024 .. "
+#pci -w cmosis_number_lines 1088
+#pci -w xrawdata_packet_length 4096
+pci --start-dma dma0r
+usleep 1000
+
+pci -w 0x90a8 0x0a
+pci -w 0x90a0 0x0a
+
+echo "Send frame request ... "
+# Single frame
+pci -w 0x9040 80000209
+# Stimuli
+#pci -w 0x9040 800002f1
+# Streaming
+#pci -w 0x9040 80000a01
+usleep 100000
+pci -w 0x9040 80000201
+usleep 100000
+
+echo "Enable Readout ... "
+#pci -w control 3e1
+pci -w 0x4 0x1
+
+usleep 100000
+
+pci -r dma0 -o bench.out --multipacket
+
+pci -w 0x9040 80000001
+
+pci --stop-dma dma0r
+

tests/ipedma/ipecamera-test.sh

@@ -0,0 +1,40 @@
+#!/bin/bash
+
+size=65536
+
+function pci {
+    PCILIB_PATH=`pwd`/../../..
+    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci -m ipedma $*
+}
+
+
+rm -f bench.out
+
+pci --stop-dma dma0r
+
+
+# Configuring DDR
+pci -w 0x9100 0x00001000
+#pci -w 0x9040 0x88000201
+#usleep 90000
+pci -w 0x9040 0x88000201
+
+pci --start-dma dma0r
+
+
+# Clean DMA buffers
+#while [ $? -eq 0 ]; do
+#    pci -r dma0 -s 65536 &> /dev/null
+#done
+
+for i in `seq 1 100`; do
+    pci -r dma0 --multipacket -s $size -o bench.out
+    if [ $? -ne 0 ]; then
+#	pci --stop-dma dma0r
+	exit
+    fi
+done
+
+pci --stop-dma dma0r
+
+../../../apps/check_counter bench.out

tests/ipedma/test.sh

@@ -0,0 +1,40 @@
+#!/bin/bash
+
+size=65536
+
+function pci {
+    PCILIB_PATH=`pwd`/../../..
+    LD_LIBRARY_PATH="$PCILIB_PATH" $PCILIB_PATH/pci -m ipedma $*
+}
+
+
+rm -f bench.out
+
+echo "Stopping DMA and skipping exiting data..."
+pci --stop-dma dma0r
+echo "Starting DMA..."
+pci --start-dma dma0r
+echo "Enabling data generation..."
+pci -w 0x4 0x1
+
+# Clean DMA buffers
+#while [ $? -eq 0 ]; do
+#    pci -r dma0 -s 65536 &> /dev/null
+#done
+
+echo "Reading the data from DMA..."
+for i in `seq 1 100`; do
+    pci -r dma0 --multipacket -s $size -o bench.out
+    if [ $? -ne 0 ]; then
+	echo "Stopping DMA due to the error..."
+	pci --stop-dma dma0r
+	exit
+    fi
+done
+
+echo "Stopping DMA..."
+pci --stop-dma dma0r
+
+../../../apps/check_counter bench.out
+
+#pci -r 0 -s 32